Embedded-cavity tunable filter

Abstract

An embedded-cavity tunable filter integrated with high-quality, high-capacitance tuning ratio varactors, metal-insulator-metal (MIM) capacitors, and 3D inductors with alumina ceramic substrate through-vias is disclosed. The varactor and MIM capacitor dies are embedded in a blind alumina cavity (BAC) in an alumina ceramic substrate.

Description

[Technical Field]

[0001] The present disclosure relates generally to die packages or modules, and more particularly to die packages / modules that include a cavity-embedded tunable filter in a substrate, such as, but not limited to, an alumina ceramic substrate, and techniques for fabricating the same. [Background technology]

[0002]

[0002] Integrated circuit technology has achieved great advances in increasing computing power by miniaturizing active components. Packaged devices can be found in many electronic devices, including processors, servers, radio frequency (RF) integrated circuits, etc. Packaging techniques have become cost-effective for high pin count devices and / or high production volume parts.

[0003]

[0003] Tunable filters (varactors) with variable capacitors, which are voltage-controlled capacitors, are desirable for both cellular and Wi-Fi communications in their RF front end (RFFE) applications to cover multiple bands and multiple frequencies. Among the key performance indicators (KPIs) for technology benchmarking are varactors with a large Cmax / Cmin tuning ratio (TR), good isolation, linearity, and Q-factor, and high power handling capability.

[0004]

[0004] For high-performance varactor devices with RF KPI, there have been few technology options to consider RFFE. For example, silicon-on-insulator (SOI) varactors and microelectromechanical system (MEMS) varactors on Si substrates, as well as MEMS varactors on glass substrates, have been developed. MEMS varactors exhibit high tuning capabilities (e.g., TR>8). Unfortunately, this requires a high-voltage charge pump (e.g., >20V) for tuning the capacitor.

[0005]

[0005] For RF filters used in the TX path, high-Q 3D through-substrate via (TSV) inductors built on low-loss and high-thermal-conductivity substrates are desirable, which not only enable low insertion loss but also high power handling capabilities. Among the available 3D TSV substrates, neither Si nor glass can meet both high-Q and high power handling requirements. Sapphire or alumina can be used as the substrate. However, their low TSV etch rates using conventional photolithography (batch process) mean that a continuous laser scanning / drilling process is used, resulting in low throughput.

[0006] Accordingly, there is a need for systems, devices, and methods that overcome the shortcomings of conventional multi-die modules, including the methods, systems, and devices provided herein. Summary of the Invention

[0007] The following presents a simplified summary of one or more aspects and / or examples associated with the apparatus and methods disclosed herein. As such, the following summary should not be considered an extensive overview of all contemplated aspects and / or examples, nor should it be considered to identify key or critical elements of all contemplated aspects and / or examples or to delineate the scope associated with any particular aspect and / or example. Accordingly, the following summary is intended solely to present certain concepts of one or more aspects and / or examples associated with the apparatus and methods disclosed herein in a simplified form, prior to the detailed description presented below.

[0008] An exemplary tunable filter is disclosed. The tunable filter may include a substrate having a blind substrate cavity (BSC) formed therein. The BSC may penetrate to a depth from the front side of the substrate. The tunable filter may also include a varactor / cap die within the BSC. The varactor / cap die may include a varactor and a capacitor. The tunable filter may further include one or more through-substrate vias (TSVs) in the substrate. Each TSV may extend from the front side of the substrate to the back side of the substrate. The tunable filter may further include one or more front-side redistribution layer (RDL) metal portions on the front side of the substrate. The one or more front-side RDL metal portions may be electrically connected to the one or more TSVs, varactors, and capacitors. The tunable filter may further include one or more back-side RDL metal portions on the back side of the substrate. The one or more backside RDL metal portions may be electrically connected to one or more TSVs. The one or more TSVs, the one or more frontside RDL metal portions, and the one or more backside RDL metal portions may be configured to form one or more inductors.

[0009] A method for fabricating an exemplary multi-die module is disclosed. The method may include providing a substrate having a blind substrate cavity (BSC) formed therein. The BSC may extend from a front side of the substrate to a depth. The method may also include providing a varactor / cap die within the BSC. The varactor / cap die may include a varactor and a capacitor. The method may further include forming one or more through-substrate vias (TSVs) in the substrate. Each TSV may extend from the front side of the substrate to the back side of the substrate. The method may still include forming one or more front-side redistribution layer (RDL) metal portions on the front side of the substrate. The one or more front-side RDL metal portions may be electrically connected to one or more TSVs, varactors, and capacitors. The method may still further include forming one or more back-side RDL metal portions on the back side of the substrate. The one or more back-side RDL metal portions may be electrically connected to one or more TSVs. The one or more TSVs, the one or more front side RDL metal portions, and the one or more back side RDL metal portions may be configured to form one or more inductors.

[0010]

[0010] Other features and advantages associated with the apparatus and methods disclosed herein will become apparent to those skilled in the art based on the accompanying drawings and detailed description of the invention. [Brief explanation of the drawings]

[0011]

[0011] A more complete understanding of the aspects of the present disclosure and many of its attendant advantages will be readily attained by reference to the following detailed description of the invention, taken in conjunction with the accompanying drawings, which are presented merely to illustrate and not to limit the disclosure, and in which: [Figure 1]

[0012] FIG. 1 shows the frequency response of an exemplary tunable filter. [Figure 2]

[0013] FIG. 2 shows a circuit topology of an exemplary tunable filter. [Figure 3]

[0014] FIG. 3 shows an example of a conventional tunable filter. [Figure 4]

[0015] FIG. 4 illustrates an example of a tunable filter in accordance with one or more aspects of the present disclosure. [Figure 5A]

[0016] 1 illustrates an example of a tunable filter in accordance with one or more aspects of the present disclosure. [Figure 5B-D]

[0017] FIG. 5B illustrates a close-up view of a 3D inductor of a tunable filter in accordance with one or more aspects of the present disclosure.

[0018] 5C and 5D show front views of a tunable filter according to one or more embodiments of the present disclosure. [Figure 6]

[0019] 1 illustrates an example of a varactor / cap die according to one or more aspects of the present disclosure. [Figure 7A-B]

[0020] 1 illustrates example stages in the manufacture of a tunable filter, according to one or more aspects of the present disclosure. [Figure 7C-D] 1 illustrates example stages in the manufacture of a tunable filter, according to one or more aspects of the present disclosure. [Figure 7E-F] 1 illustrates example stages in the manufacture of a tunable filter, according to one or more aspects of the present disclosure. [Figure 7G-H] 1 illustrates example stages in the manufacture of a tunable filter, according to one or more aspects of the present disclosure. [Figure 7I] 1 illustrates example stages in the manufacture of a tunable filter, according to one or more aspects of the present disclosure. [Figure 8]

[0021] 1 illustrates a flowchart of an exemplary method for manufacturing a multi-die module in accordance with one or more aspects of the present disclosure. [Figure 9] 1 illustrates a flowchart of an exemplary method for manufacturing a multi-die module in accordance with one or more aspects of the present disclosure. [Figure 10]

[0022] 1 illustrates various electronic devices that may utilize one or more aspects of the present disclosure.

[0012]

[0023] Other objects and advantages associated with aspects disclosed herein will be apparent to those skilled in the art based on the accompanying drawings and detailed description. According to common practice, features depicted by the drawings may not be drawn to scale. Accordingly, dimensions of depicted features may be arbitrarily increased or decreased for clarity. According to common practice, some of the drawings have been simplified for clarity. Thus, the drawings may not depict all components of a particular device or method. Moreover, like reference numerals refer to like features throughout the specification and figures. DETAILED DESCRIPTION OF THE INVENTION

[0013]

[0024] Aspects of the present disclosure are illustrated in the following description and related drawings directed to specific embodiments. Alternative aspects or embodiments may be devised without departing from the scope of the teachings herein. Additionally, well-known elements of exemplary embodiments herein may not be described in detail or may be omitted so as not to obscure the relevant details of the teachings in the present disclosure.

[0014]

[0025] In certain described exemplary implementations, instances are identified in which portions of the structure and operation of various components may be adopted from known conventional techniques and then configured in accordance with one or more exemplary embodiments. In such instances, internal details of portions of the structure and / or operation of known conventional components may be omitted to help avoid potentially obscuring the concepts illustrated in the exemplary embodiments disclosed herein.

[0015]

[0026] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and / or "including," when used herein, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0016]

[0027] It was mentioned above that tunable filters are desirable for both cellular and Wi-Fi communications in their RF front-end (RFFE) applications to cover multiple bands and multiple frequencies. Figure 1 shows the frequency response of an exemplary tunable filter. As can be seen, by tuning the tunable filter, a desired frequency response mode can be selected. Desirable characteristics of a tunable filter include (among others): Low routing parasitic components, Highly tunable ratio capacitor, ●HQ and precision inductors, Compact / small footprint, ● Performance (low insertion loss), ●Low bias voltage.

[0017]

[0028] FIG. 2 shows the circuit topology of an exemplary tunable filter having five inductors L1 through L5. In this case, it is desirable for the second and fourth inductors (L2, L4) to be very precise. For example, the inductances of L2 and L4 may be within 3% of their desired values. Alternatively or additionally, the inductances of L2 and L4 may be within 3% of each other. The first, third, and fifth inductors (L1, L3, L5) do not need to be as precise as L2 and L4. Nevertheless, high precision is desirable. For example, the inductances of L1, L3, and L5 may be within 5% of their desired values. Alternatively or additionally, the inductances of L1, L3, and L5 may be within 5% of each other. Such precision of inductors L1 through L5 allows for fine tuning of the tunable filter.

[0018]

[0029] FIG. 3 shows an example of an existing tunable filter 300. As can be seen from the figure, the conventional tunable filter 300 includes a varactor die 310, an SMT device 320, a laminate substrate 330, and a ball grid array (BGA) 340. The varactor die 310 and the SMT device 320 are mounted on the laminate substrate. The L2 and L4 inductors are mounted in the SMT device 320, and the L1, L3, and L5 inductors are mounted in the laminate substrate 330. As a result, large parasitic losses may occur (e.g., due to long paths). The tuning ratio (TR) (Cmax / Cmin) of the varactor die may be less than 4. Furthermore, the inductor variation may be greater than 10%. Because the varactor die 310 and the SMT device 320 are far away from the BGA 340, thermal processing may be insufficient. Furthermore, the module size may be large (e.g., a thickness greater than 150 μm). Still further, costs can be high (SMT devices can be expensive).

[0019]

[0030] According to various aspects disclosed herein, a compact cavity-embedded tunable filter is proposed to address issues associated with conventional tunable filters. The proposed tunable filter can be integrated with high-quality (HQ) and high capacitance tuning-ratio (HTR) varactors, metal-insulator-metal (MIM) capacitors, and 3D solenoid inductors with through alumina ceramic substrate vias (TAVs) for next-generation Wi-Fi RFFE applications. The varactor and MIM capacitor die(s) can be embedded in a 3D blind alumina cavity (BAC) ceramic substrate die-to-wafer (D2W), followed by a thermally conductive (TC) dry film filler to planarize the embedded varactor die(s) and alumina surface. Device construction can be followed by 3D TAV inductor formation, for example, a copper (Cu) redistribution layer (RDL) process on a thin alumina substrate.

[0020]

[0031] Some salient features of the proposed tunable filter include: ●Compact cavity embedded tunable filter. • Low parasitic integrated inductor (L) and capacitor(s) (C). • High capacitance tuning ratio (HTR) varactors (e.g., GaAs hyper-abrupt (HA) varactors). ●HQ and precision inductors by TAV 3D inductors. ●High thermal conductivity alumina ceramic substrate and blind cavity. ●Thermal conductive dry film inside blind alumina cavity (BAC). ●High performance filter with low insertion loss.

[0021]

[0032] FIG. 4 illustrates an example of a tunable filter according to one or more embodiments of the present disclosure. The tunable filter 400 may include a varactor / cap die 410 within a substrate 430. The substrate 430 may be a thermally conductive substrate, such as an alumina ceramic substrate. The varactor / cap die 410 may be embedded in a BAC 415 of the substrate 430. The varactor / cap die 410 may include a III-V varactor, such as a GaAs varactor, with a hyperabrupt (HA) junction active layer that can achieve high TR at a lower bias voltage (e.g., ∼5v). In one embodiment, the varactor / cap die 410 may also include a MIM capacitor(s).

[0022]

[0033] One or more through-substrate vias (TSVs) 450 may also be formed in the substrate 430. Note that the substrate of the TSVs 450 may include materials for packaging substrates, such as silicon (Si), glass, germanium (Ge), gallium arsenide (GaAs), III-V materials, metal oxides, ceramics, aluminum nitride (AlN), silicon carbide (SiC), etc. When the substrate 430 is an alumina ceramic substrate, the TSVs 450 may also be referred to as through-alumina vias (TAVs) 450. The tunable filter 400 may also include a front-side RDL metal portion 474 and a back-side RDL metal portion 424 on the front and back sides of the substrate 430 (the bottom and top sides of the substrate 430 in FIG. 4 ), respectively. The front and / or backside redistribution layer (RDL) metal portions 474, 424 may be formed from metals such as copper (Cu), aluminum (Al), etc. The front-side RDL metal portion 474 may be formed during the process of providing the redistribution layer (RDL). One or more inductors 460 may be formed by connecting the TAV 450 with the front and backside RDL metal portions 474, 424 to form a loop. As can be seen, the inductor 460 may be a 3D inductor. External connections 440 may be formed on the front-side RDL metal portion 474 to provide connections to devices external to the tunable filter 500. Bumps, solder balls, land grid arrays (LGAs), etc. may be examples of the external connections 440.

[0023]

[0034] The illustrated tunable filter 400 (as well as other proposed tunable filters) can be cavity-embedded in and co-integrated with an alumina ceramic substrate 430. Alumina with TAV and BAC can provide low insertion loss (e.g., less than 0.6 dB). Other technical advantages include high TR varactors (e.g., ∼6 for GaAs and ∼8 for MEMS), HQ and precision 3D TAV inductors (e.g., HQ greater than 100, dispersion less than 3%), improved thermal processing (high TC alumina (30 W / m·k), vertical Cu TAV paths), size (e.g., less than 100 μm due to the die being embedded in the substrate), and cost (cheap due to high integration with reduced components).

[0024]

[0035] FIG. 5A illustrates another example of a tunable filter according to one or more embodiments of the present disclosure. In one embodiment, the tunable filter 500 of FIG. 5 can be considered to provide a more detailed view of the tunable filter 400 of FIG. 4. The tunable filter 500 can include a varactor / cap die 510 within a substrate 530. The substrate 530 can be thermally conductive, i.e., have a thermal conductivity greater than 2 W / m·k. Note that the thermal conductivity of an alumina ceramic substrate is 30 W / m·k. The varactor / cap die 510 can be embedded in a BSC 515 of the substrate 530 by an adhesive 580. When the substrate 530 is an alumina ceramic substrate, the BSC 515 is sometimes referred to as a BAC 515. The BSC / BAC 515 can penetrate to a certain depth from the front side of the substrate 530. The varactor / cap die 510 may include a III-V varactor (e.g., a GaAs varactor) with a hyperabrupt (HA) junction active layer. The varactor / cap die 510 may also include one or more MIM capacitors.

[0025]

[0036] One or more TSVs 550 (or TAVs when formed in alumina) may also be formed in the substrate 530. Each TAV 550 may extend from the front side of the substrate 530 to the back side of the substrate 530. On the front side, the exposed front surfaces of the substrate 530 and the TAVs 550 may be planar. On the back side, the exposed back surfaces of the substrate 530 and the TAVs 550 may be planar.

[0026]

[0037] One or more backside RDL metal portions 524 may be formed on the backside of the substrate 530. A backside interlayer dielectric (ILD) 522 may also be formed on the backside (below FIG. 5A ) of the substrate 530. The backside ILD 522 may encapsulate the backside RDL metal portions 524. The backside RDL metal portions 524 may be electrically connected to the TAV 550. For example, the backside RDL metal portion 524 may be in direct contact with the TAV 550 on the backside.

[0027]

[0038] A first front-side ILD 572 may be formed on the front side (top side of FIG. 5A ) of the substrate 530. The first front-side ILD 572 may be formed such that one or more TAVs 550 are exposed at the front side of the substrate. The first front-side ILD 572 may also be formed such that connections to the varactor / cap die 510 are exposed.

[0028]

[0039] One or more front-side RDL metal portions 574 may be formed on the first front-side ILD 572 and on the front side of the substrate 530 through exposed portions of the front-side ILD 572. The front-side RDL metal portions 574 may be electrically connected to the TAV 550. The front-side RDL metal portions 574 may also be electrically connected to connections of the varactor / cap die 510. For example, the front-side RDL metal portions 574 may be in direct contact with the TAV 550 on the front side and / or with connections of the varactor / cap die 510.

[0029]

[0040] A second front-side ILD 576 may be formed on the front-side RDL metallization 574 and the first front-side ILD 572. A portion of the second front-side ILD 576 may be removed to expose the front-side RDL metallization 574. Underbump metallizations (UBM) 545 may be formed in the exposed portions of the second front-side ILD 576. External connections 540 may be formed on the corresponding UBMs 545. For example, the external connections 540 may be in direct contact with the UBMs 545. In this manner, the external connections 540 provide a manner of electrically connecting the tunable filter 500 to devices external to the tunable filter 500. Bumps, solder balls, land grid arrays (LGAs), etc. may be examples of the external connections 540.

[0030]

[0041] 5B shows a close-up view of a 3D inductor 560 of a tunable filter according to one or more aspects of the present disclosure. It can be seen that the 3D inductor 560 can be formed by forming a conductive loop using a TAV 550, a front-side RDL metal portion 574, and a back-side RDL metal portion 524. In general, there can be one or more 3D inductors 560. Each 3D inductor 560 can comprise one or more loops, and each loop can comprise at least one TAV 550 electrically connected to at least one front-side RDL metal portion 574 and at least one back-side RDL metal portion 524.

[0031]

[0042] 5C shows a view from the front side of the substrate 530. As can be seen, there may be one or more 3D inductors 560. When there are multiple 3D inductors 560, the multiple 3D inductors 560 may correspond to the inductors of the circuit topology shown in FIG. 2. Although not shown in FIG. 5B, one or more 2D inductors may also be formed by connecting some of the front side RDL metal portions 574 to one or more loops on the front side of the substrate 530 and / or by connecting some of the back side RDL metal portions 524 to one or more loops on the back side of the substrate 530.

[0032]

[0043] It should be noted that different technologies can also be mixed. Figure 5D shows another view from the front side of the substrate 530. As can be seen, the controller 512 can also be provided within the substrate 530. That is, the controller 512 can be embedded within the BAC of the substrate 530, and electrical connections to the controller 512 can be provided via the external connections 540, the UMB 545, and the front side RDL metallization 574. The controller 512 can be formed from a different technology than the varactor / cap die 510. For example, the controller 512 can be CMOS-based.

[0033]

[0044] It should be noted that the controller 512 is just one example of another die that may be embedded in the BSC / BAC 515. Also, while one BSC / BAC 515 is shown, there may be any number of BSC / BACs 515. For example, to enhance isolation between the varactor / cap die 510 and another die (such as the CMOS controller 512), two BSC / BACs 515 may be formed, with the varactor / cap die 510 embedded in the first BSC / BAC 515 and the other die embedded in the second BSC / BAC 515.

[0034]

[0045] 6 illustrates an example of a varactor / cap die 510 according to one or more embodiments of the present disclosure. As can be seen, the varactor / cap die 510 may include a varactor 610 formed on a first side of a varactor / cap substrate 630. As can be seen in FIG. 5A, a second side (opposite the first side) of the varactor / cap substrate 630 may be on a lateral surface of the substrate 530 within the BSC / BAC 515. An adhesive 580 may be utilized to more securely mount the varactor / cap die 510.

[0035]

[0046] Varactor 610 may include a hyperabrupt junction active layer. In FIG. 6, varactor 610 is shown as a GaAs varactor. However, in general, varactor 610 is not limited to such. For example, varactor 610 may be formed from other III-V materials. Similarly, varactor / cap substrate 630 may be formed from a III-V material such as GaAs.

[0036]

[0047] The varactor / cap die 510 may include a MIM capacitor 620 also formed on a first side of the varactor / cap substrate 630. A varactor / cap connection 640 may be electrically connected to the varactor / cap die 510 and / or the MIM capacitor 620. As can be seen in FIG. 5A, the varactor / cap connection 640 may also be electrically connected to the front-side RDL metallization 574. The varactor / cap connection 640 may be formed from a metal such as Cu, Al, etc.

[0037]

[0048] The process flow for manufacturing a tunable filter (such as tunable filters 400, 500) can generally be described as follows. ● Form TAV (generally TSV) holes and BAC (generally BSC). ● Embed the varactor / cap die in the BAC (BSC) of the substrate. ●Apply a thermally conductive dry film and then apply the first ILD. Forming (e.g., by plating) the TAVs (TSVs), backside RDL metallization, and frontside RDL metallization. ● Apply backside ILD, frontside ILD, and frontside passivation Form UBM and external connections.

[0038]

[0049] 7A-7H illustrate example stages in fabricating a tunable filter, such as tunable filters 400, 500, according to one or more aspects of the present disclosure. Figure 7A illustrates stages in which BAC / BSC 515 and TAV / TSV holes 750 may be formed in substrate 530. Although not shown, the backside of substrate 530 (the bottom side of Figure 7A) may be supported on a temporary carrier.

[0039]

[0050] 7B shows a step in which TAV / TSV holes 750 may be filled with a metal (e.g., Cu, Al, W, Pd, Ni, Au, Ta, Ti, Sb, Mo, Ru, etc.) to form TAV / TSV 550. For example, a metal such as Cu may be preferred due to its low resistance / high conductance and may be plated.

[0040]

[0051] 7C shows a stage where the varactor / cap die 510 may be embedded within the substrate 530. An adhesive 580 may be used to attach the varactor / cap die 510 to the BAC 515. In particular, the adhesive 580 may be used to attach the second side of the varactor / cap substrate 630 to a lateral surface of the substrate 530 within the BAC 515.

[0041]

[0052] 7D illustrates a stage where the thermally conductive dry film 555 and the first front-side ILD 572 may be formed. The dry film 555 may fill the gap between the side of the BAC 515 and the varactor / cap die 510. In one embodiment, the thermally conductive dry film 555 and the first front-side ILD 572 may be formed from the same dielectric material. For example, the dielectric material may be applied to integrally form the dry film 555 and the first front-side ILD 572. In one embodiment, the thermal conductivity of the dry film 555 may be at least 2 W / m·k.

[0042]

[0053] FIG. 7E shows a stage where first front-side ILD 572 may be patterned (eg, through a photomask) to expose TAV / TSV 550 and varactor / cap connections 640 on the front-side of substrate 530.

[0043]

[0054] 7F illustrates a stage where front-side RDL metallization 574 and back-side RDL metallization 524 may be formed on the front and back sides, respectively, of substrate 530. In one embodiment, double-sided plating / metallization (e.g., with Cu, Al, W, etc.) may be performed.

[0044]

[0055] 7G illustrates a step where the front side may be passivated. For example, a second backside ILD 576 may be formed on the front side of substrate 530. In one embodiment, second backside ILD 576 may be patterned to form an opening that exposes front side RDL metal portion 574.

[0045]

[0056] 7H shows a step of providing connections to external devices. For example, a UBM 545 may be formed on the front-side RDL metallization 574 in the exposed portion of the second back-side ILD 576. External connections 540 (e.g., bumps, balls, land grid arrays (LGA), C4, CuP, etc.) may then be formed on the UBM 545.

[0046]

[0057] FIG. 8 illustrates a flowchart of an example method 800 of manufacturing a tunable filter, such as tunable filter 400 and / or 500, in accordance with one or more aspects of the present disclosure.

[0047]

[0058] In block 810, a substrate 530 may be provided. A blind substrate cavity (BSC) 515 may be formed in the substrate 530. The BSC 515 may extend to a depth from the front side of the substrate 530. In one embodiment, block 810 may correspond to the step shown in FIG. 7A.

[0048]

[0059] In block 820, a varactor / cap die 510 may be provided within the BSC 515. The varactor / cap die 510 may include a varactor 610 and a capacitor 620 (e.g., an MIM capacitor). In one aspect, block 820 may correspond to the step shown in FIG. 7C.

[0049]

[0060] In block 830, one or more through-substrate vias (TSVs) 550 may be formed in the substrate 530. Each TSV 550 may extend from the front side of the substrate 530 to the back side of the substrate 530. In one aspect, block 830 may correspond to the step shown in FIG. 7B.

[0050]

[0061] In block 840, one or more front-side RDL metal portions 574 may be formed on the front-side of the substrate 530. The front-side RDL metal portions 574 may be electrically connected to one or more TSVs 550, varactors 610, and capacitors 620. In one aspect, block 840 may correspond to the step shown in FIG.

[0051]

[0062] In block 850, one or more backside RDL metal portions 524 may be formed on the backside of the substrate 530. The backside RDL metal portions 524 may be electrically connected to one or more TSVs 550. The one or more TSVs 550, the one or more frontside RDL metal portions 574, and the one or more backside RDL metal portions 524 may be configured to form one or more inductors 560. In one aspect, block 850 may correspond to the step shown in FIG.

[0052]

[0063] 9 illustrates a flowchart of an exemplary method 900 for fabricating a tunable filter, such as tunable filter 400 and / or 500, in accordance with one or more aspects of the present disclosure. FIG. 6 may be considered more comprehensive than FIG.

[0053]

[0064] Block 910 may be similar to block 810. That is, in block 910, a substrate 530 may be provided. A blind substrate cavity (BSC) 515 may be formed in the substrate 530. The BSC 515 may penetrate to a certain depth from the front side of the substrate 530. In one embodiment, block 910 may correspond to the step shown in FIG. 7A.

[0054]

[0065] Block 920 may be similar to block 820. That is, in block 920, a varactor / cap die 510 may be provided within the BSC 515. The varactor / cap die 510 may include a varactor 610 and a capacitor 620 (e.g., an MIM capacitor). In one aspect, block 920 may correspond to the step shown in FIG. 7C.

[0055]

[0066] In block 922 (which is optional), another die 512 may be placed in the BSC 515. In one embodiment, block 920 may correspond to Figure 5D.

[0056]

[0067] In block 925, a thermally conductive dry film 555 may be formed to form a first front-side ILD 572. The dry film 555 may be formed to fill gaps between the sides of the BAC 515 and the varactor / cap die 510. The first front-side ILD 572 may be formed on the front side of the substrate 530 and patterned to expose the TSVs 550 and the varactor / cap connections 640 of the varactor / cap die 510. Block 925 may correspond to the steps shown in FIGS. 7D and 7E. Although not shown, if another die 512 is also provided within the BAC 515, the dry film 555 may also fill gaps on the sides of the BAC 515 and the other die 512. If necessary, the dry film 555 may also fill gaps between the varactor / cap die 510 and the other die 512.

[0057]

[0068] Block 930 may be similar to block 830. That is, in block 930, one or more through-substrate vias (TSVs) 550 may be formed in substrate 530. Each TSV 550 may extend from the front side of substrate 530 to the back side of substrate 530. In one aspect, block 930 may correspond to the step shown in FIG. 7B.

[0058]

[0069] Block 940 may be similar to block 840. That is, in block 940, one or more front-side RDL metal portions 574 may be formed on the front-side of the substrate 530. The front-side RDL metal portions 574 may be electrically connected to one or more TSVs 550, varactors 610, and capacitors 620. In one aspect, block 940 may correspond to the step shown in FIG.

[0059]

[0070] Block 950 may be similar to block 850. That is, in block 950, one or more backside RDL metal portions 524 may be formed on the backside of the substrate 530. The backside RDL metal portions 524 may be electrically connected to one or more TSVs 550. The one or more TSVs 550, the one or more frontside RDL metal portions 574, and the one or more backside RDL metal portions 524 may be configured to form one or more inductors 560. In one aspect, block 950 may correspond to the step shown in FIG. 7F.

[0060]

[0071] In block 960, a second front side ILD 576 may be formed on the front side of substrate 530, and a back side ILD 522 may be formed on the back side of substrate 530. The second front side ILD 576 may be patterned to expose the surfaces of one or more front side RDL metal portions 574. In one embodiment, block 950 may correspond to the stage shown in FIG.

[0061]

[0072] In block 970, UBM 545 may be formed on the exposed surface of front RDL metal portion 574. External connections 545 may also be formed on UBM 545. In one embodiment, block 950 may correspond to the step shown in FIG.

[0062]

[0073] 10 illustrates various electronic devices 1000 that may be integrated with any of the aforementioned tunable filters in accordance with various aspects of the present disclosure. For example, a mobile phone device 1002, a laptop computer device 1004, and a stationary terminal device 1006 may each be generally considered user equipment (UE) and may include one or more tunable filters (e.g., tunable filters 400 and / or 500) as described herein. The devices 1002, 1004, 1006 illustrated in FIG. 10 are merely exemplary. Other electronic devices may also include die packages including, but not limited to, a group of devices (e.g., electronic devices) including mobile devices, handheld personal communication systems (PCS) units, portable data units such as personal digital assistants, global positioning system (GPS) enabled devices, navigation devices, set-top boxes, music players, video players, entertainment units, stationary data units such as meter reading equipment, communication devices, smartphones, tablet computers, computers, wearable devices, servers, routers, electronic devices implemented in automated vehicles (e.g., autonomous vehicles), Internet of things (IoT) devices, or any other device that stores or retrieves data or computer instructions, or any combination thereof.

[0063]

[0074] The devices and functionality disclosed above can be designed and configured into computer files (e.g., RTL, GDSII, GERBER, etc.) stored on a computer-readable medium. Some or all of such files can be provided to a manufacturer, who will produce devices based on such files. The resulting product can include semiconductor wafers that are later cut into semiconductor dies and packaged with antennas on glass devices. The antennas on glass devices can then be employed in the devices described herein.

[0064]

[0075] The following numbering clauses describe example implementations.

[0065]

[0076] Clause 1: A tunable filter comprising: a substrate having a blind substrate cavity (BSC) formed therein, the BSC penetrating from a front side of the substrate to a certain depth; a varactor / cap die within the BSC, the varactor / cap die comprising a varactor and a capacitor; one or more through-substrate vias (TSVs) in the substrate, each TSV extending from the front side of the substrate to a back side of the substrate; one or more front-side redistribution layer (RDL) metal portions on the front side of the substrate electrically connected to the one or more TSVs, varactors, and capacitors; and one or more back-side RDL metal portions on the back side of the substrate electrically connected to the one or more TSVs, wherein the one or more TSVs, the one or more front-side RDL metal portions, and the one or more back-side RDL metal portions are configured to form one or more inductors.

[0066]

[0077] Clause 2: The tunable filter of clause 1, wherein the thermal conductivity of the substrate is greater than 2 W / m·k.

[0067]

[0078] Clause 3: The tunable filter of clause 1 or 2, wherein the substrate is an alumina ceramic substrate and the one or more TSVs are one or more through alumina vias (TAVs).

[0068]

[0079] Clause 4: A tunable filter described in any one of clauses 1 to 4, wherein at least one inductor is a 3D inductor having one or more loops, each loop having at least one TAV electrically connected to at least one front-side RDL metal portion and at least one back-side RDL metal portion.

[0069]

[0080] Clause 5: The tunable filter of clause 4, wherein the one or more inductors comprise a plurality of 3D inductors.

[0070]

[0081] Clause 6: A tunable filter as described in any one of clauses 1 to 5, wherein one or more TSVs are formed from any one or more of copper (Cu), aluminum (Al), and tungsten (W), or one or more front-side RDL metal portions are formed from any one or more of Cu, Al, and W, or one or more back-side RDL metal portions are formed from any one or more of Cu, Al, and W, or any combination thereof.

[0071]

[0082] Clause 7: The tunable filter according to any one of clauses 1 to 7, wherein the varactor is a III-V group varactor.

[0072]

[0083] Clause 8: The tunable filter of clause 7, wherein the varactor is a gallium arsenide (GaAs) varactor.

[0073]

[0084] Clause 9: The tunable filter of clause 7 or 8, wherein the varactor comprises a hyperabrupt junction active layer.

[0074]

[0085] Clause 10: The tunable filter according to any one of clauses 7 to 9, wherein the bias voltage of the varactor is 5V or less.

[0075]

[0086] Clause 11: The tunable filter of any one of clauses 1 to 10, wherein the capacitor is a metal-insulator-metal (MIM) capacitor.

[0076]

[0087] Clause 12: A tunable filter described in any of clauses 1 to 11, wherein the varactor / cap die further comprises one or more varactor / cap connections electrically connected to the varactor and capacitor and to at least one front side RDL metal portion.

[0077]

[0088] Clause 13: A tunable filter described in any of clauses 1 to 12, wherein the varactor / cap die further comprises a varactor / cap substrate, the varactor and capacitor being formed on a first side of the varactor / cap substrate, the second side of the varactor / cap substrate being on a lateral surface of the substrate within the (BAC), and the second side of the varactor / cap substrate being opposite the first side of the varactor / cap substrate.

[0078]

[0089] Clause 14: A tunable filter according to any one of clauses 1 to 13, further comprising another die within the BSC, the other die being fabricated from a technology different from that of the varactor / cap die.

[0079]

[0090] Clause 15: The tunable filter of clause 14, wherein the technology of the separate die is CMOS.

[0080]

[0091] Clause 16: A tunable filter according to any one of clauses 1 to 15, wherein the tunable filter is incorporated into an apparatus selected from the group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a stationary terminal, a tablet computer, a computer, a wearable device, an Internet of Things (IoT) device, a laptop computer, a server, and a device in an autonomous vehicle.

[0081]

[0092] Clause 17: A method for manufacturing a tunable filter, the method comprising: providing a substrate having a blind substrate cavity (BSC) formed therein, the BSC extending from a front side of the substrate to a depth; providing a varactor / cap die in the BSC, the varactor / cap die comprising a varactor and a capacitor; forming one or more through-substrate vias (TSVs) in the substrate, each TSV extending from the front side of the substrate to a back side of the substrate; forming one or more front-side redistribution layer (RDL) metal portions on the front side of the substrate electrically connected to the one or more TSVs, varactors, and capacitors; and forming one or more back-side RDL metal portions on the back side of the substrate electrically connected to the one or more TSVs, wherein the one or more TSVs, the one or more front-side RDL metal portions, and the one or more back-side RDL metal portions are configured to form one or more inductors.

[0082]

[0093] Clause 18: The method of clause 17, wherein the thermal conductivity of the substrate is greater than 2 W / m·k.

[0083]

[0094] Clause 19: The method of clause 17 or 18, wherein the substrate is an alumina ceramic substrate and the one or more TSVs are one or more through alumina vias (TAVs).

[0084]

[0095] Clause 20: A method according to any of clauses 17 to 19, wherein at least one inductor is a 3D inductor comprising one or more loops, each loop comprising at least one TAV electrically connected to at least one front-side RDL metal portion and at least one back-side RDL metal portion.

[0085]

[0096] Clause 21: The method of clause 20, wherein the one or more inductors comprise a plurality of 3D inductors.

[0086]

[0097] Clause 22: The method of any one of clauses 17 to 21, wherein one or more TSVs are formed from any one or more of copper (Cu), aluminum (Al), and tungsten (W), or one or more front-side RDL metal portions are formed from any one or more of Cu, Al, and W, or one or more back-side RDL metal portions are formed from any one or more of Cu, Al, and W, or any combination thereof.

[0087]

[0098] Clause 23: The method according to any one of clauses 17 to 22, wherein the varactor is a III-V group varactor.

[0088]

[0099] Clause 24: The method of clause 23, wherein the varactor is a gallium arsenide (GaAs) varactor.

[0089]

[0100] Clause 25: The method of clause 23 or 24, wherein the varactor comprises a hyperabrupt junction active layer.

[0090]

[0101] Clause 26: The method according to any one of clauses 23 to 25, wherein the bias voltage of the varactor is 5V or less.

[0091]

[0102] Clause 27: The method of any one of clauses 17 to 26, wherein the capacitor is a metal-insulator-metal (MIM) capacitor.

[0092]

[0103] Clause 28: A method as described in any of clauses 17 to 27, wherein the varactor / cap die further comprises one or more varactor / cap connections electrically connected to the varactor and capacitor and to at least one front side RDL metal portion.

[0093]

[0104] Clause 29: A method according to any of clauses 17 to 28, wherein the varactor / cap die further comprises a varactor / cap substrate, the varactor and capacitor being formed on a first side of the varactor / cap substrate, the second side of the varactor / cap substrate being on a lateral surface of the substrate within the (BAC), and the second side of the varactor / cap substrate being opposite the first side of the varactor / cap substrate.

[0094]

[0105] Clause 30: The method of any of clauses 17 to 28, further comprising providing another die within the BSC, the another die being fabricated from a technology different from that of the varactor / cap die.

[0095]

[0106] As used herein, terms such as “user equipment” (or “UE”), “user device,” “user terminal,” “client device,” “communication device,” “wireless device,” “wireless communication device,” “handheld device,” “mobile device,” “mobile terminal,” “mobile station,” “handset,” “access terminal,” “subscriber device,” “subscriber terminal,” “subscriber station,” “terminal,” etc., and variations thereof, may interchangeably refer to any suitable mobile or fixed device capable of receiving wireless communication and / or navigation signals. These terms include, but are not limited to, music players, video players, entertainment units, navigation devices, communication devices, smartphones, personal digital assistants, stationary terminals, tablet computers, computers, wearable devices, laptop computers, servers, autonomous vehicle devices in autonomous vehicles, and / or other types of portable electronic devices typically carried by a person and / or having communication capabilities (e.g., wireless, cellular, infrared, short-range radio, etc.). These terms are also intended to include a device that communicates with another device that can receive wireless communication and / or navigation signals, such as by a short-range wireless connection, an infrared connection, a wireline connection, or other connection, regardless of whether the satellite signal reception, assistance data reception, and / or location-related processing occurs in the device or in another device. Furthermore, these terms are intended to include all devices, including wireless and wireline communication devices, that can communicate with a core network via a radio access network (RAN), and through which the UE can connect to external networks, such as the Internet, and to other UEs. Of course, other mechanisms for connecting to a core network and / or the Internet are also possible for a UE, such as via a wired access network, a wireless local area network (WLAN) (e.g., based on IEEE 802.11, etc.), etc.A UE may be embodied by any of several types of devices, including, but not limited to, a printed circuit (PC) card, a compact flash device, an external or internal modem, a wireless or wireline telephone, a smartphone, a tablet, a tracking device, an asset tag, etc. A communication link through which a UE can send signals to a RAN is called an uplink channel (e.g., a reverse traffic channel, a reverse control channel, an access channel, etc.). A communication link through which a RAN can send signals to a UE is called a downlink channel or a forward link channel (e.g., a paging channel, a control channel, a broadcast channel, a forward traffic channel, etc.). As used herein, the term traffic channel (TCH) can refer to either an uplink / reverse traffic channel or a downlink / forward traffic channel.

[0096]

[0107] Wireless communication between electronic devices can be based on different technologies, such as code division multiple access (CDMA), W-CDMA, time division multiple access (TDMA), frequency division multiple access (FDMA), Orthogonal Frequency Division Multiplexing (OFDM), Global System for Mobile Communications (GSM), 3GPP Long Term Evolution (LTE), 5G New Radio, Bluetooth (BT), Bluetooth Low Energy (BLE), IEEE 802.11 (WiFi), and IEEE 802.15.4 (Zigbee / Thread), or other protocols that may be used in wireless or data communication networks. Bluetooth Low Energy (also known as Bluetooth LE, BLE, and Bluetooth Smart) is a wireless personal area networking technology designed and marketed by the Bluetooth Special Interest Group that aims to significantly reduce power consumption and cost while maintaining a similar communication range. BLE was integrated into the main Bluetooth standard in 2010 with the adoption of the Bluetooth Core Specification version 4.0 and updated in Bluetooth 5.

[0097]

[0108] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any detail described herein as "exemplary" should not be construed as advantageous over other examples. Likewise, the term "example" does not imply that all examples include the discussed features, advantages, or modes of operation. Furthermore, particular features and / or structures may be combined with one or more other features and / or structures. Moreover, at least a portion of the apparatuses described herein can be configured to perform at least a portion of the methods described herein.

[0098]

[0109] It should be noted that the terms "connected" and "coupled," or any variation thereof, mean any direct or indirect connection or coupling between elements unless the connection is expressly disclosed as being directly connected, and can encompass the presence of intermediate elements between two elements that are "connected" or "coupled" together through intermediate elements.

[0099]

[0110] Any reference herein to an element using a designation such as "first," "second," etc. is not intended to limit the quantity and / or order of those elements. Rather, these designations are used as a convenient method of distinguishing between two or more elements and / or instances of an element. Also, unless otherwise stated, a set of elements can include one or more elements.

[0100]

[0111] Those skilled in the art will appreciate that information and signals may be represented using any of a variety of different technologies and techniques. For example, the data, instructions, commands, information, signals, bits, symbols, and chips that may be referred to throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0101]

[0112] Nothing described or illustrated in this application is intended to publicly disclose any element, act, feature, benefit, advantage, or equivalent, whether or not that element, act, feature, benefit, advantage, or equivalent is claimed.

[0102]

[0113] In the above Detailed Description, it can be seen that different features are grouped together in the examples. This method of disclosure should not be interpreted as a claimed example having more features than are expressly recited in each claim. Rather, the disclosure may include fewer features than all of the individual disclosed examples. Accordingly, the following claims should be considered incorporated herein as if each claim could stand alone as a separate example. While each claim can stand alone as a separate example, it should be noted that a dependent claim may refer to one or specific combinations with one or more other claims within its scope, while other examples may also encompass or include a combination of that dependent claim with the subject matter of any other dependent claim, or with any feature of another dependent claim and an independent claim. Such combinations are suggested herein unless it is expressly stated that a specific combination is not intended. Furthermore, it is also intended that features of a claim may be included in any other independent claim even if that claim is not directly dependent on that independent claim.

[0103]

[0114] It is further noted that the methods, systems, and apparatuses disclosed in this specification or claims may be realized by a device comprising means for performing the respective acts and / or functionality of the disclosed methods.

[0104]

[0115] Furthermore, in some instances, an individual act may be subdivided into or encompass one or more sub-acts, and such sub-acts may be encompassed within and be part of the disclosure of the individual act.

[0105]

[0116] While the above disclosure sets forth illustrative examples of the present disclosure, it should be noted that various modifications and variations may be made herein without departing from the scope of the present disclosure, as defined by the appended claims. The functions and / or acts of the method claims according to the examples of the present disclosure described herein need not be performed in any particular order. Additionally, well-known elements may not be described in detail or may be omitted so as not to obscure the relevant details of the aspects and examples disclosed herein. Furthermore, although elements of the present disclosure may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.

Claims

1. a substrate having a blind substrate cavity (BSC) formed therein, the BSC extending from a front side of the substrate to a depth; a varactor / cap die in the BSC, the varactor / cap die comprising a varactor and a capacitor; one or more through-substrate vias (TSVs) in the substrate, each TSV extending from the front side of the substrate to a back side of the substrate; one or more front-side redistribution layer (RDL) metallization portions on the front side of the substrate, electrically connected to the one or more TSVs, the varactors, and the capacitors; one or more backside RDL metallizations on the backside of the substrate electrically connected to the one or more TSVs; the one or more TSVs, the one or more front-side RDL metal portions, and the one or more back-side RDL metal portions are configured to form one or more inductors. Tunable filter.

2. 2. The tunable filter of claim 1, wherein the substrate has a thermal conductivity greater than 2 W / m·k.

3. the substrate is an alumina ceramic substrate, the one or more TSVs are one or more through alumina vias (TAVs); The tunable filter of claim 1 .

4. 10. The tunable filter of claim 1, wherein at least one inductor is a 3D inductor comprising one or more loops, each loop comprising at least one TAV electrically connected to at least one front-side RDL metal portion and at least one back-side RDL metal portion.

5. The tunable filter of claim 4 , wherein the one or more inductors comprise a plurality of 3D inductors.

6. the one or more TSVs are formed from any one or more of copper (Cu), aluminum (Al), and tungsten (W); or the one or more front-side RDL metal portions are formed from any one or both of Cu, Al, and W; or the one or more backside RDL metallizations are formed from any one or both of Cu, Al, and W; or Any combination of the above The tunable filter of claim 1 .

7. 2. The tunable filter of claim 1, wherein the varactor is a III-V varactor.

8. 8. The tunable filter of claim 7, wherein the varactor is a gallium arsenide (GaAs) varactor.

9. The tunable filter of claim 7 , wherein the varactor comprises a hyperabrupt junction active layer.

10. 8. The tunable filter of claim 7, wherein the bias voltage of the varactor is 5v or less.

11. 2. The tunable filter of claim 1, wherein the capacitor is a metal-insulator-metal (MIM) capacitor.

12. the varactor / cap die The tunable filter of claim 1 further comprising one or more varactor / cap connections electrically connected to the varactor and the capacitor and to at least one front-side RDL metallization.

13. the varactor / cap die further comprising a varactor / cap substrate; the varactor and the capacitor are formed on a first side of the varactor / cap substrate; 2. The tunable filter of claim 1, wherein a second side of the varactor / cap substrate is on a lateral surface of the substrate within the (BAC), the second side of the varactor / cap substrate being opposite the first side of the varactor / cap substrate.

14. further comprising another die within the BSC; the other die is made from a technology different from that of the varactor / cap die; The tunable filter of claim 1 .

15. The tunable filter of claim 14 , wherein the technology of the other die is CMOS.

16. 10. The tunable filter of claim 1, wherein the tunable filter is incorporated into a device selected from the group consisting of a music player, a video player, an entertainment unit, a navigation device, a communication device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a stationary terminal, a tablet computer, a computer, a wearable device, an Internet of Things (IoT) device, a laptop computer, a server, and a device in an autonomous vehicle.

17. 1. A method of manufacturing a tunable filter, comprising: providing a substrate having a blind substrate cavity (BSC) formed therein, the BSC extending from a front side of the substrate to a depth; providing a varactor / cap die within the BSC, the varactor / cap die comprising a varactor and a capacitor; forming one or more through-substrate vias (TSVs) in the substrate, each TSV extending from the front side of the substrate to a back side of the substrate; forming one or more front-side redistribution layer (RDL) metallization portions on the front side of the substrate, the one or more TSVs, the varactors, and the capacitors; forming one or more backside RDL metallizations on the backside of the substrate, the backside RDL metallizations electrically connected to the one or more TSVs; the one or more TSVs, the one or more front-side RDL metal portions, and the one or more back-side RDL metal portions are configured to form one or more inductors. method.

18. 20. The method of claim 17, wherein the thermal conductivity of the substrate is greater than 2 W / m·k.

19. the substrate is an alumina ceramic substrate, the one or more TSVs are one or more through alumina vias (TAVs); 18. The method of claim 17.

20. 20. The method of claim 17, wherein the at least one inductor is a 3D inductor comprising one or more loops, each loop comprising at least one TAV electrically connected to at least one front side RDL metal portion and at least one back side RDL metal portion.

21. The method of claim 20 , wherein the one or more inductors comprise a plurality of 3D inductors.

22. the one or more TSVs are formed from any one or more of copper (Cu), aluminum (Al), and tungsten (W); or the one or more front-side RDL metal portions are formed from any one or both of Cu, Al, and W; or the one or more backside RDL metallizations are formed from any one or both of Cu, Al, and W; or Any combination of the above 18. The method of claim 17.

23. The method of claim 17, wherein the varactor is a Group III-V varactor.

24. 24. The method of claim 23, wherein the varactor is a gallium arsenide (GaAs) varactor.

25. 24. The method of claim 23, wherein the varactor comprises a hyperabrupt junction active layer.

26. 24. The method of claim 23, wherein the bias voltage of the varactor is less than or equal to 5v.

27. The method of claim 17, wherein the capacitor is a metal-insulator-metal (MIM) capacitor.

28. the varactor / cap die 20. The method of claim 17, further comprising one or more varactor / cap connections electrically connected to the varactor and the capacitor and to at least one front side RDL metallization.

29. the varactor / cap die further comprising a varactor / cap substrate; the varactor and the capacitor are formed on a first side of the varactor / cap substrate; 18. The method of claim 17, wherein a second side of the varactor / cap substrate is on a lateral surface of the substrate within the (BAC), the second side of the varactor / cap substrate being opposite the first side of the varactor / cap substrate.

30. providing another die within the BSC; the other die is made from a technology different from that of the varactor / cap die; 18. The method of claim 17.

Images