Method for preventing battery over-discharge and battery system providing the method

Abstract

The present invention relates to a method for preventing over-discharge of a battery and a battery system that provides the method. The over-discharge prevention circuit of the present invention controls the electrical connection between a battery and a converter that converts a battery voltage, which is the voltage across the battery, into a driving voltage of a predetermined magnitude and supplies the driving voltage to a control unit, and includes an under-voltage prevention unit including: (a) a low-voltage transistor connected between the battery and the converter, which is turned on in a normal mode when the battery voltage exceeds a predetermined reference voltage and turned off in an event mode when the battery voltage is equal to or lower than the reference voltage; (b) a first reference resistor connected between the positive electrode of the battery and a gate of the low-voltage transistor; and (c) a second reference resistor connected between the gate of the low-voltage transistor and ground, and the resistance values ​​of the first reference resistor and the second reference resistor are determined based on the magnitude of the reference voltage.

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit of priority based on Korean Patent Application No. 10-2022-0183567, filed December 23, 2022, and Korean Patent Application No. 10-2023-0177695, filed December 8, 2023, and all contents disclosed in the documents of said Korean patent applications are incorporated herein by reference.

[0002] The present invention relates to a method for preventing over-discharge of a battery and a battery system that provides the method. [Background technology]

[0003] A battery management system (BMS) is a system that safely manages and controls batteries under various charging, discharging, and environmental conditions to ensure the battery's lifespan. For example, a BMS monitors the battery's voltage and temperature, estimates the state of charge (SOC) and state of health (SOH), and manages and controls the battery overall, including controlling the battery's charge or discharge profile.

[0004] A battery management system (BMS) can receive driving power from a low-voltage auxiliary battery (e.g., a lead-acid battery) or a high-voltage main battery. The auxiliary battery is a power source that supplies power to various electrical components in the battery system, for example, at a voltage of 12V. The main battery is a power source that supplies power to an external device (e.g., a motor), and typically supplies high-voltage power of 400V or more to the external device, although this varies depending on the specifications of the external device. When the main battery is used as a power source for the battery management system (BMS), a DC-DC converter may be additionally used to adjust the high-voltage power of the main battery to the driving voltage of the battery management system (BMS).

[0005] However, if the main battery is used as the power source for a battery management system (BMS) for a long period of time, it may become over-discharged. Over-discharge of the main battery can lead to problems such as fire and a shortened lifespan. To prevent such problems, conventional battery management systems (BMS) have been equipped with software-based over-discharge prevention functions.

[0006] However, battery management systems (BMS) often do not have an over-discharge prevention function. In this case, when a low-voltage event occurs, a temporary solution is to turn off the converter power to prevent over-discharge of the battery. However, the battery management system (BMS) must first wake up to charge the discharged main battery with power from an external charger. In situations where there is no auxiliary battery, the battery management system (BMS) is restricted in that it cannot wake up.

[0007] Therefore, in a battery system that uses a main battery as a power source for a battery management system (BMS), a solution is needed that can prevent over-discharge of the main battery and wake up (start) the battery management system (BMS) even if the BMS is not equipped with an over-discharge prevention function and there is no auxiliary battery. Summary of the Invention [Problem to be solved by the invention]

[0008] The present invention provides a battery over-discharge prevention method for preventing over-discharge of a high-voltage battery in a battery system that uses a high-voltage battery as a power source for a battery management system (BMS), and a battery system that provides the method.

[0009] The present invention provides a method for preventing over-discharge of a battery, and a battery system that provides the method, in which even if the battery management system (BMS) is turned off due to the occurrence of a low voltage event, the user can turn on an external switch to wake up the battery management system (BMS) and enter a charging mode. [Means for solving the problem]

[0010] According to one aspect of the present invention, an over-discharge prevention circuit controls an electrical connection between a battery and a converter that converts a battery voltage, which is a voltage across the battery, into a driving voltage of a predetermined magnitude and supplies the driving voltage to a control unit. The over-discharge prevention circuit includes: (a) a low-voltage transistor connected between the battery and the converter, which is turned on in a normal mode when the battery voltage exceeds a predetermined reference voltage and turned off in an event mode when the battery voltage is equal to or lower than the reference voltage; (b) a first reference resistor connected between the positive electrode of the battery and a gate of the low-voltage transistor; and (c) a second reference resistor connected between the gate of the low-voltage transistor and ground, wherein the resistance values ​​of the first reference resistor and the second reference resistor are determined based on the magnitude of the reference voltage.

[0011] The low-voltage transistor may be a P-channel MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor), with a source connected to the positive electrode of the battery and one end of the first reference resistor, a gate connected to the other end of the first reference resistor and one end of the second reference resistor, and a drain connected to the converter.

[0012] The over-discharge prevention circuit may further include a power supply holding unit including a first holding transistor turned on by power from the control unit that is turned on by receiving the driving voltage, and a second holding transistor that is turned on by receiving power from the control unit and connects the second reference resistor to the ground when the first holding transistor is turned on.

[0013] The first holding transistor may be a P-channel MOSFET, having a source connected to the control unit and one end of a first holding resistor, a gate connected to the other end of the first holding resistor and one end of a second holding resistor, and a drain connected to one end of a third holding resistor.

[0014] The second holding transistor may be an NPN-type BJT (Bipolar Junction Transistor), and may have a base connected to the other end of the third holding resistor, a collector connected to the other end of the second reference resistor, and an emitter connected to the ground.

[0015] The over-discharge prevention circuit may further include a first external switch connected between the collector of the second holding transistor and the ground, and in the normal mode, the low-voltage transistor may be controlled to be turned on in response to a turn-on switching of the first external switch.

[0016] The over-discharge prevention circuit may further include a second external switch and an external resistor connected in series between the gate of the low-voltage transistor and the ground, and may be triggered by turn-on switching of the second external switch in the event mode to control turn-on of the low-voltage transistor.

[0017] The resistance value of the external resistor can be determined based on the magnitude of the reference voltage.

[0018] The over-discharge prevention circuit may further include a disturbance elimination unit including a disturbance transistor connected between the second holding resistor and the ground, a first disturbance resistor connected between the gate of the disturbance transistor and the ground, and a second disturbance resistor connected between the drain of the low-voltage transistor and the gate of the disturbance transistor.

[0019] The disturbance transistor may be an N-channel MOSFET, the source of which is connected to the ground, the gate of which is connected to one end of the first disturbance resistor and the other end of the second disturbance resistor, and the drain of which is connected to the other end of the second holding resistor. [Effects of the Invention]

[0020] The present invention can prevent the battery from being over-discharged by using an over-discharge prevention circuit connected between the battery and the converter.

[0021] Even if the battery management system (BMS) is turned off due to the occurrence of a low voltage event, the present invention allows the user to wake up the battery management system (BMS) by turning on an external switch connected to the over-discharge prevention circuit. [Brief explanation of the drawings]

[0022] [Figure 1] FIG. 1 is a block diagram illustrating a battery system according to one embodiment. [Figure 2] FIG. 2 is a circuit diagram illustrating in detail the over-discharge prevention circuit 31 of FIG. [Figure 3] 3 is a circuit diagram illustrating a state of the over-discharge prevention circuit 31 before the battery 10 and the converter 33 in FIG. 2 are electrically connected. [Figure 4] 3 is a circuit diagram illustrating a state of the over-discharge prevention circuit 31 after the first external switch SW_out1 of FIG. 2 is turned on to electrically connect the battery 10 and the converter 33. FIG. [Figure 5]3 is a circuit diagram illustrating a state after a control unit 37 receives a drive voltage from a converter 33 in FIG. 2 and controls to turn on a first holding transistor SW1. FIG. [Figure 6] 6 is a circuit diagram illustrating that the battery 10 and the converter 33 continue to be electrically connected by the power supply holding circuit 313 even if the first external switch SW_out1 is turned off in the state of FIG. 5. [Figure 7] 1 is a circuit diagram illustrating that a battery 10 and a converter 33 are electrically isolated when a low voltage event occurs according to one embodiment. [Figure 8] FIG. 10 is a circuit diagram illustrating how the first hold transistor SW1 and the second hold transistor SW2 are prevented from being forcibly turned on by an external factor when a low-voltage event occurs according to another embodiment. [Figure 9] 1 is a circuit diagram illustrating that when a low-voltage event occurs, the battery 10 and the converter 33 are not electrically connected even if the first external switch SW_out1 is turned on, according to an embodiment. [Figure 10] 10 is a circuit diagram illustrating that the battery 10 and the converter 33 are electrically connected when the second external switch SW_out2 is turned on in a state where a low-voltage event occurs according to yet another embodiment. [Figure 11] 11 is a circuit diagram illustrating a state in which the control unit 37, which has been woken up (activated) by the procedure of FIG. 10, turns on the first holding transistor SW1. [Figure 12] 11. This is a circuit diagram of the over-discharge prevention circuit 31, which explains that even if the second external switch SW_out2 is turned off in the state of FIG. 11, the battery 10 and the converter 33 continue to be electrically connected by the power supply holding circuit 313. DETAILED DESCRIPTION OF THE INVENTION

[0023] Hereinafter, the embodiments disclosed herein will be described in detail with reference to the accompanying drawings. Identical or similar components will be designated by the same or similar drawing numbers, and redundant descriptions thereof will be omitted. The suffixes "module" and / or "section" used in the following description for components are given solely for the convenience of writing the specification and do not have any distinguishing meaning or function. Furthermore, when describing the embodiments disclosed herein, if it is determined that a detailed description of such known technology may obscure the gist of the embodiments disclosed herein, such a detailed description will be omitted. Furthermore, the accompanying drawings are merely intended to facilitate understanding of the embodiments disclosed herein, and the accompanying drawings do not limit the technical concepts disclosed herein, and all modifications, equivalents, or alternatives within the concept and technical scope of the present invention are to be understood.

[0024] Terms including ordinal numbers such as first, second, etc. may be used to describe various components, but the components are not limited by the terms. The terms are used only to distinguish one component from another.

[0025] When a component is said to be "coupled" or "connected" to another component, it should be understood that the component may be directly coupled or connected to the other component, but that there may be other components in between. Conversely, when a component is said to be "directly coupled" or "directly connected" to another component, it should be understood that there are no other components in between.

[0026] It is to be understood that in this application, the use of terms such as "comprise" or "have" is intended to specify the presence of a feature, number, step, operation, component, part, or combination thereof stated in the specification, but does not preclude the possible presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0027] FIG. 1 is a block diagram illustrating a battery system according to an embodiment, and FIG. 2 is a circuit diagram illustrating the over-discharge prevention circuit 31 of FIG. 1 in detail.

[0028] Referring to FIG. 1, a battery system 1 includes a battery 10, a relay 20, and a BMS (Battery Management System) 30.

[0029] The battery 10 may include a plurality of battery cells Cell_1-Cell_4 electrically connected in series and in parallel. In some embodiments, the battery cells may be rechargeable secondary batteries. A predetermined number of battery cells may be connected in series to form a battery module, a predetermined number of battery modules may be connected in series to form a battery pack, or a predetermined number of battery packs may be connected in parallel to form a battery bank, thereby supplying a desired amount of power. While FIG. 1 illustrates the battery 10 having a plurality of battery cells Cell_1-Cell_4 connected in series, the present invention is not limited thereto, and the battery 10 may be configured in units of a battery module, a battery pack, or a battery bank.

[0030] Each of the plurality of battery cells Cell_1-Cell_4 is electrically connected via wiring to the BMS 30. The BMS 30 collects and analyzes various information related to the battery cells, including information related to the plurality of battery cells Cell_1-Cell_4, to control charging, discharging, and protection operations of the battery cells, and can control the operation of the relay 20.

[0031] The relay 20 controls the electrical connection between the battery system 1 and the external device. When the relay 20 is turned on, the battery system 1 and the external device are electrically connected to each other to perform charging or discharging. When the relay 20 is turned off, the battery system 1 and the external device are electrically isolated from each other. In this case, the external device may be a charger in a charging cycle that supplies power to the battery 10 to charge it, or a load in a discharging cycle that the battery 10 discharges power to the external device.

[0032] The BMS 30 includes an over-discharge prevention circuit 31 , a converter 33 , a monitoring unit 35 , and a control unit 37 .

[0033] Although FIG. 1 shows that the over-discharge prevention circuit 31 and the converter 33 are included in the BMS 30, this is not limiting, and at least one of the over-discharge prevention circuit 31 and the converter 33 may be configured as a separate device outside the BMS 30.

[0034] When a low voltage event occurs in which the voltage of the battery 10 drops below a preset reference voltage, the over-discharge prevention circuit 31 cuts off the electrical connection between the battery 10 and the converter 33 to prevent the battery 10 from being over-discharged. Referring to FIG. 2, the input terminal IN of the over-discharge prevention circuit 31 is connected to the positive electrode of the battery 10, and the output terminal OUT is connected to the converter 33.

[0035] According to an embodiment, the over-discharge prevention circuit 31 electrically connects the battery 10 and the converter 33 in response to a user's control to turn on the first external switch. Then, the control unit 37 can be turned on by receiving a driving voltage via the converter 33. According to another embodiment, when the BMS 30 is turned off due to the occurrence of a low voltage event and the user turns on the second external switch, the over-discharge prevention circuit 31 electrically connects the battery 10 and the converter 33. Then, the control unit 37 receives a driving voltage via the converter 33 to wake up (start up), and can charge the discharged battery 10 with power from an external device (e.g., a charger) to control the battery system to operate normally.

[0036] Referring to FIG. 2, the over-discharge prevention circuit 31 includes an under-voltage prevention unit 311, a power supply maintaining unit 313, a disturbance eliminator 315, a first external switch SW_out1, and a second external switch SW_out2.

[0037] The low voltage prevention unit 311 connects the battery 10 to the converter 33 when the voltage of the battery 10 exceeds a preset reference voltage. Also, when the voltage of the battery 10 is equal to or lower than the preset reference voltage, the low voltage prevention unit 311 disconnects the battery 10 from the converter 33. This prevents the voltage of the battery 10 from dropping below a limit voltage due to over-discharge of the battery 10.

[0038] The undervoltage prevention unit 311 includes a low-voltage transistor SW_U, a first reference resistor R_U1, and a second reference resistor R_U2.

[0039] The low-voltage transistor SW_U is connected in series between the battery 10 and the converter 33 and controls the electrical connection between the battery 10 and the converter 33. When the low-voltage transistor SW_U is turned on, the converter 33 and the battery 10 are electrically connected. Then, the control unit 37 receives power from the converter 33 and is turned on. When the low-voltage transistor SW_U is turned off, the converter 33 and the battery 10 are electrically isolated. Then, the power supply to the control unit 37 is cut off and the control unit 37 is turned off.

[0040] The low-voltage transistor SW_U may be configured as an electronic relay including a semiconductor switching element. The semiconductor switching element may be a metal-oxide-semiconductor field effect transistor (MOSFET). However, the present invention is not limited thereto, and the low-voltage transistor SW_U may be configured as various types of electronic relays.

[0041] 2, for example, the low-voltage transistor SW_U may be realized as a P-channel MOSFET. When a negative voltage is applied to the gate (G), the low-voltage transistor SW_U can be turned on. That is, when the gate voltage V_G is smaller than the source voltage V_S, current flows from the source S to the drain (D).

[0042] According to an embodiment, the low-voltage transistor SW_U is switched by a gate voltage V_G corresponding to the resistance division ratio of the first reference resistor R_U1 and the second reference resistor R_U2. For example, the low-voltage transistor SW_U can be turned on when the voltage of the battery 10 exceeds a preset reference voltage.

[0043] 1 and 2, the first reference resistor R_U1 has one end connected to the input terminal IN and the other end connected to the gate G of the low-voltage transistor SW_U. The second reference resistor R_U2 has one end connected to the gate G of the low-voltage transistor SW_U and the other end connected to ground GND via the diode D and the first external switch SW_out1.

[0044] According to an embodiment, the resistance values ​​of the first reference resistor R_U1 and the second reference resistor R_U2 can be determined according to a reference voltage that serves as a reference for a low-voltage event. A low-voltage event is an event in which the voltage of the battery 10 drops below the reference voltage. If an over-discharge event occurs, in which the voltage of the battery 10 drops too much below the reference voltage, stability problems such as a fire in the battery 10 may occur.

[0045] The power supply maintaining unit 313 can maintain the electrical connection between the battery 10 and the converter 33 under the control of the control unit 37. Specifically, once the battery 10 and the converter 33 are electrically connected by turning on the first external switch SW_out1, the power supply maintaining unit 313 can maintain the electrical connection between the battery 10 and the converter 33 even if the first external switch SW_out1 is subsequently turned off.

[0046] The power supply holding unit 313 may include a first holding transistor SW1, a second holding transistor SW2, a first holding resistor R1, a second holding resistor R2, and a third holding resistor R3.

[0047] The first holding transistor SW1 is connected between the base B of the second holding transistor SW2 and the auxiliary power supply VCC_M to control the electrical connection between the base B of the second holding transistor SW2 and the auxiliary power supply VCC_M. Depending on the embodiment, the auxiliary power supply VCC_M may be the control unit 37.

[0048] 2, when the low-voltage transistor SW_U is turned on and the converter 33 and the battery 10 are electrically connected, the control unit 37 receives power from the converter 33 and is turned on. Thereafter, the control unit 37 can supply a high-level voltage to the base B of the second holding transistor SW2 through the first holding transistor SW1. Then, the second holding transistor SW2 is turned on, and the second reference resistor R_U2 can be electrically connected to the ground GND through the second holding transistor SW2. In other words, the power holding unit 313 can be turned on by the control unit 37.

[0049] The first holding transistor SW1 may be configured as an electronic relay including a semiconductor switching element. The semiconductor switching element may be a metal oxide semiconductor field effect transistor (MOSFET). However, the present invention is not limited thereto, and the first holding transistor SW1 may be configured as various types of electronic relays.

[0050] 2, for example, the first holding transistor SW1 may be implemented as a P-channel MOSFET. According to an embodiment, the first holding transistor SW1 may be switched by a gate voltage V_G corresponding to a resistance division ratio of the first holding resistor R1 and the second holding resistor R2. For example, the control unit 37, which functions as the auxiliary power supply VCC_M, may supply a voltage of 0V or more to the source S of the first holding transistor SW1. Therefore, when the gate G of the first holding transistor SW1 is connected to ground GND via the second holding resistor R2 and the disturbance transistor SW_N, the first holding transistor SW1 may be turned on.

[0051] The second holding transistor SW2 is connected in series between the second reference resistor R_U2 and ground GND and controls the electrical connection between the second reference resistor R_U2 and ground GND. When the second holding transistor SW2 is turned on, the second reference resistor R_U2 is connected to ground GND. Therefore, even when the first external switch SW_out1 is turned off, the second reference resistor R_U2 remains connected to ground, and the ground-level gate voltage V_G can continue to be supplied to the gate G of the low-voltage transistor SW_U.

[0052] The second holding transistor SW2 may be configured as an electronic relay including a semiconductor switching element. The semiconductor switching element may be a bipolar junction transistor (BJT). However, the present invention is not limited thereto, and the second holding transistor SW2 may be configured as various types of electronic relays.

[0053] 2, for example, the second holding transistor SW2 may be implemented as an NPN-type BJT. When the first holding transistor SW1 is turned on and a positive voltage is supplied from the auxiliary power supply VCC_M, a forward bias voltage is applied between the base B and emitter E of the second holding transistor SW2, and a reverse bias voltage is applied between the base B and collector C of the second holding transistor SW2, thereby turning on the second holding transistor SW2. That is, the second holding transistor SW2 can be turned on by a high-level voltage applied to its base (base B). The second holding transistor SW2 can also be turned off by a low-level voltage applied to its base B.

[0054] 1 and 2, the first holding resistor R1 has one end connected to the auxiliary power supply VCC_M and the source S of the first holding transistor SW1, and the other end connected to the gate G of the first holding transistor SW1. The second holding resistor R2 has one end connected to the gate G of the first holding transistor SW1, and the other end connected to ground GND via the disturbance transistor SW_N.

[0055] The resistance values ​​of the first holding resistor R1 and the second holding resistor R2 can be determined according to the voltage value of the power supplied by the auxiliary power supply VCC_M and the voltage value between the gate G and source S for switching the first holding transistor SW1.

[0056] The third holding resistor R3 may be connected between the base B of the second holding transistor SW2 and the drain D of the first holding transistor SW1. For example, the resistance value of the third holding resistor R3 may be determined based on the value of the driving voltage supplied to the base B required to turn on the second holding transistor SW2.

[0057] The disturbance removal unit 315 cuts off the connection between the battery 10 and the converter 33 due to a disturbance when a low-voltage event occurs. For example, when a low-voltage event occurs, the battery 10 and the converter 33 should be electrically isolated. However, if the voltage supplied by the auxiliary power supply VCC_M changes to a high level due to a disturbance, the power supply holding unit 313 may be driven (i.e., turned on). This may cause a problem in which the battery 10 and the converter 33 are connected by the power supply holding unit 313 even when a low-voltage event occurs. In this case, the disturbance may include ESD (Electro Static Discharge), etc.

[0058] The disturbance eliminator 315 may include a disturbance transistor SW_N, a first disturbance resistor R_N1, and a second disturbance resistor R_N2.

[0059] The disturbance transistor SW_N is connected in series between the second holding resistor R2 and ground GND and controls the electrical connection between the second holding resistor R2 and ground GND. When the disturbance transistor SW_N is turned off, the second holding resistor R2 is isolated from ground GND. As a result, even if the voltage of the auxiliary power supply VCC_M changes to a high level due to a disturbance, the first holding transistor SW1 and the second holding transistor SW2 cannot be turned on. In other words, this solves the problem of the battery 10 and the converter 33 being connected to each other due to a disturbance when a low-voltage event occurs.

[0060] The disturbance transistor SW_N may be configured as an electronic relay including a semiconductor switching element. The semiconductor switching element may be a metal-oxide-semiconductor field effect transistor (MOSFET). However, the present invention is not limited thereto, and the disturbance transistor SW_N may be configured as various types of electronic relays.

[0061] For example, the disturbance transistor SW_N may be realized by an N-channel MOSFET. When a positive gate voltage V_G is applied to the gate G, the disturbance transistor SW_N can be turned on. That is, when the gate voltage V_G is greater than the source voltage V_S, a current flows between the drain D and the source S.

[0062] Referring to FIG. 2, the drain D of the disturbance transistor SW_N is connected to the gate G of the first holding transistor SW1 via a second holding resistor R2, the gate G of the disturbance transistor SW_N is connected to the output terminal OUT via a second disturbance resistor R_N2, and the source S of the low-voltage transistor SW_U is connected to ground GND.

[0063] The first disturbance resistor R_N1 can be connected between the gate G and source S of the disturbance transistor SW_N. For example, the resistance value of the first disturbance resistor R_N1 can be determined corresponding to the voltage difference V_GS between the gate G and source S required to turn on the disturbance transistor SW_N.

[0064] The second disturbance resistor R_N2 can be connected between the output terminal OUT and the gate G of the disturbance transistor SW_N. For example, the resistance value of the second disturbance resistor R_N2 can be determined corresponding to the difference between the gate voltage V_G value that must be supplied to the gate G of the disturbance transistor SW_N to turn on the disturbance transistor SW_N and the voltage value of the output terminal OUT.

[0065] The first external switch SW_out1 may be a switch for turning on the control unit 37 in a normal mode in which the voltage of the battery 10 exceeds a reference voltage. Referring to Fig. 2, when the first external switch SW_out1 is turned on, the battery 10 and the converter 33 are connected by the low voltage prevention unit 311, and the control unit 37 can be turned on by the driving voltage supplied by the converter 33. Thereafter, even if the first external switch SW_out1 is turned off, the battery 10 and the converter 33 can continue to be connected by the power supply maintenance unit 313.

[0066] For example, the first external switch SW_out1 may be a push button switch that is switched on by a user. When the first external switch SW_out1 is turned on by the user to electrically connect the battery 10 and the converter 33, even if the user releases the first external switch SW_out1 to turn it off, the power supply maintaining unit 313 can maintain the electrical connection between the battery 10 and the converter 33.

[0067] The second external switch SW_out2 may be a switch for turning on the control unit 37 in an event mode in which a low-voltage event occurs in which the voltage of the battery 10 is below a reference voltage. Referring to FIG. 2, when the second external switch SW_out2 is turned on, the first reference resistor R_U1 and the external resistor R_OUT are connected in series. Then, a gate voltage V_G corresponding to the resistance division ratio of the first reference resistor R_U1 and the external resistor R_OUT is applied to the gate G of the low-voltage transistor SW_U, turning on the low-voltage transistor SW_U.

[0068] For example, the second external switch SW_out2 may be a push button switch that is switched on by the user. When the second external switch SW_out2 is turned on by the user to electrically connect the battery 10 and the converter 33, even if the user releases the second external switch SW_out2 and the second external switch SW_out2 is turned off, the power supply maintaining unit 313 can maintain the electrical connection between the battery 10 and the converter 33.

[0069] The converter 33 can convert the high-voltage power of the battery 10 into low-voltage power corresponding to the drive voltage of the control unit 37. The control unit 37 can operate by receiving a drive voltage of a certain magnitude provided by the converter 33. For example, the converter 33 may be a DC-DC converter that converts the high-voltage direct current (DC) of the battery 10 into direct current (DC) of a predetermined voltage.

[0070] The monitoring unit 35 is electrically connected to the positive and negative electrodes of each of the plurality of battery cells Cell_1-Cell_4, measures the cell voltage of each of the plurality of battery cells Cell_1-Cell_4, and calculates the cell current based on the measured cell voltage. The monitoring unit 35 can transmit the cell voltage and the cell current of each of the plurality of battery cells Cell_1-Cell_4 to the control unit 37.

[0071] The control unit 37 generally controls the BMS 30 and the battery system 1. According to an embodiment, when the control unit 37 receives a driving voltage via the converter 33 and is turned on, the control unit 37 can supply power to the power supply maintaining unit 313 to maintain the electrical connection between the battery 10 and the converter 33. For example, the control unit 37 may be configured as an MCU (Micro Controller Unit).

[0072] A method for preventing over-discharge of the battery 10 due to the occurrence of a low voltage event and waking up the control unit 37 to charge the battery 10 in a low voltage state will be described in detail below.

[0073] 3 is a circuit diagram illustrating the state of the over-discharge prevention circuit 31 before the battery 10 and converter 33 in FIG. 2 are electrically connected, and FIG. 4 is a circuit diagram illustrating the state of the over-discharge prevention circuit 31 after the battery 10 and converter 33 are electrically connected by turning on the first external switch SW_out1 in FIG. 2.

[0074] 1 to 4, the battery 10 may be used as a power supply VCC_B that supplies a driving voltage to the control unit 37. A converter 33 may be connected to a stage preceding the control unit 37 in order to reduce the high voltage power of the battery 10 to the driving voltage of the control unit 37. Meanwhile, if the battery 10 is used as a power supply for the control unit 37 for a long period of time, a problem of over-discharging of the battery 10 may occur.

[0075] The battery system 1 includes an over-discharge prevention circuit 31 between the battery 10 and the converter 33, which prevents over-discharge of the battery 10 and can wake up (activate) the control unit 37 to charge the battery 10 in a low-voltage state.

[0076] 3, even if power is supplied from the battery 10, when the first external switch SW_out1 is in the off state, the second reference resistor R_U2 is in a floating state where it cannot be connected to ground. Therefore, the low-voltage transistor SW_U cannot be turned on. In the circuit diagrams of the over-discharge prevention circuit 31 shown in FIGS. 3 to 12, solid lines indicate power lines to which power is supplied, and dotted lines indicate power lines to which power is not supplied.

[0077] 4, for example, assume that the reference voltage used as a reference for a low-voltage event is 35V and the voltage of the battery 10 is 40V. When the first external switch SW_out1 is turned on by a user's physical action, the second reference resistor R_U2 is connected to ground. Then, the first reference resistor R_U1 and the second reference resistor R_U2 are connected in series between the power supply VCC_B of the battery 10 and ground, and the battery 10 voltage corresponding to the magnitude of the second reference resistor R_U2 can be supplied to the gate voltage V_G of the low-voltage transistor SW_U.

[0078] V_S=V_B (1)

[0079] Equation (1) is an equation for the source voltage V_S of the low-voltage transistor SW_U. Referring to Figure 4, the magnitude of the source voltage V_S of the low-voltage transistor SW_U corresponds to the magnitude of the battery voltage V_B, which is the voltage of the battery 10. In Figure 4, the source voltage V_S of the low-voltage transistor SW_U is 40V.

[0080] V_G=(R_U2 / (R_U1+R_U2))×V_B (2)

[0081] Equation (2) above is an equation for the gate voltage V_G of the low-voltage transistor SW_U. In FIG. 4, let's assume that the resistance values ​​of the first reference resistor R_U1 and the second reference resistor R_U2 are 10 kΩ and 220 kΩ, respectively. According to Equation (2), the magnitude of the voltage supplied to the gate voltage V_G of the low-voltage transistor SW_U is approximately 38.26 V.

[0082] V_SG=V_S-V_G>V_th (3)

[0083] Equation (3) corresponds to the threshold voltage (V_th) of the low-voltage transistor SW_U, which is a P-channel MOSFET. That is, when the voltage V_SG obtained by subtracting the gate voltage V_G from the source voltage V_S is equal to or greater than the threshold voltage V_th, the low-voltage transistor SW_U can be turned on. In FIG. 4, the gate voltage V_G is approximately 38.26V. Therefore, we assume that the voltage V_SG obtained by subtracting the gate voltage V_G from the source voltage V_S, 1.74V, is equal to or greater than the threshold voltage V_th.

[0084] In summary, if the resistances of the first and second reference resistors R_U1 and R_U2 are 10 kΩ and 220 kΩ, respectively, and the battery voltage V_B is 40 V, when the user pushes the first external switch SW_out1 to turn it on, the battery 10 and the converter 33 are connected, and a driving voltage can be supplied to the control unit 37. In other words, the control unit 37 can be turned on.

[0085] 5 is a circuit diagram illustrating the state after the control unit 37, which receives a driving voltage from the converter 33 of FIG. 2, turns on the first holding transistor SW1. FIG. 6 is a circuit diagram illustrating that the battery 10 and the converter 33 continue to be electrically connected by the power supply holding circuit 313 even if the first external switch SW_out1 is turned off in the state of FIG. 5.

[0086] 2 and 5, when the battery voltage V_B exceeds the reference voltage, the low-voltage transistor SW_U is turned on, electrically connecting the battery 10 and the converter 33 through the power line Pow_L connecting the input terminal IN and the output terminal OUT of the over-discharge prevention circuit 31. At this time, the control unit 37 is also turned on.

[0087] Referring to FIG. 5, the gate G of the disturbance transistor SW_N is connected to the output terminal OUT, and the disturbance transistor SW_N is turned on by receiving a high-level gate voltage. When the disturbance transistor SW_N is turned on, a ground-level voltage is applied to the gate G of the first hold transistor SW1. A high-level source voltage (e.g., approximately 5 V) is applied to the source S of the first hold transistor SW1 from the auxiliary power supply VCC_M. The auxiliary power supply VCC_M may be the control unit 37. The first hold transistor SW1 is then turned on, connecting the base B of the second hold transistor SW2 to the auxiliary power supply VCC_M. The second hold transistor SW2, whose base B receives a high-level voltage from the auxiliary power supply VCC_M, is also turned on. When the second hold transistor SW2 is turned on, the second reference resistor R_U2 is connected to ground GND. That is, referring to FIGS. 2 and 5, when the low-voltage transistor SW_U is turned on, the power supply holding unit 313 is also turned on.

[0088] 6, even if the first external switch SW_out1 is turned off by a user's physical action, the second reference resistor R_U2 continues to be connected to ground via the second hold transistor SW2 by the power supply hold unit 313. As a result, the low-voltage transistor SW_U can be maintained in an on state. That is, even if the first external switch SW_out1 is turned off by a user's physical action, the control unit 37 can continue to receive the drive voltage.

[0089] According to the embodiment, even if the user intentionally turns on the BMS 30, it is difficult for the user to continue pressing the first external switch SW_out1 in order to maintain the on state of the BMS 30. Even if the user controls to turn off the first external switch SW_out1, the power supply maintenance unit 313 can control the control unit 37 to continuously maintain the on state.

[0090] FIG. 7 is a circuit diagram illustrating that the battery 10 and the converter 33 are electrically isolated when a low voltage event occurs according to one embodiment.

[0091] As the discharge of the battery 10 continues, the battery voltages V_B and VCC_B decrease. When the battery voltages V_B and VCC_B decrease to the reference voltage, it is necessary to stop discharging the battery 10 and charge the battery 10. At this time, the BMS 30 can generally control the charging and discharging of the battery 10.

[0092] 7, the reference voltage used as a reference for a low-voltage event is 36V, and the battery voltage VCC_B is 35V, which is smaller than the reference voltage, so that the low-voltage transistor SW_U can be turned off when a low-voltage event occurs. Specifically, referring to equations (1) through (3), the source voltage V_S and the gate voltage V_G of the low-voltage transistor SW_U are 35V and approximately 33.478V, respectively. Then, the voltage V_SG obtained by subtracting the gate voltage V_G from the source voltage V_S, which is approximately 1.522V, becomes smaller than the threshold voltage V_th (e.g., 1.565V), so that the low-voltage transistor SW_U can be turned off.

[0093] 7, when the low-voltage transistor SW_U is turned off, the battery 10 is electrically disconnected from the converter 33. Then, power cannot be supplied to the gate G of the disturbance transistor SW_N connected to the output terminal OUT, and the disturbance transistor SW_N is turned off. Also, the control unit 37, which is in the off state, cannot function as the power supply VCC_M that supplies power to the source S of the first holding transistor SW1. As a result, the first holding transistor SW1 is turned off.

[0094] In summary, in the event mode in which a low voltage event occurs, the control unit 37 is turned off to prevent the battery 10 from being over-discharged.

[0095] FIG. 8 is a circuit diagram illustrating that, according to another embodiment, the first holding transistor SW1 and the second holding transistor SW2 are not forcibly turned on by an external factor when a low-voltage event occurs. FIG. 9 is a circuit diagram illustrating that, according to one embodiment, the battery 10 and the converter 33 are not electrically connected even if the first external switch SW_out1 is turned on when a low-voltage event occurs. FIG. 10 is a circuit diagram illustrating that, according to yet another embodiment, the battery 10 and the converter 33 are electrically connected when the second external switch SW_out2 is turned on when a low-voltage event occurs.

[0096] For example, when a low-voltage event occurs, the battery 10 and the converter 33 should be electrically isolated. However, if the voltage supplied by the auxiliary power supply VCC_M changes to a high level due to an external disturbance, the power supply holding unit 313 may be activated (i.e., turned on). This may result in a problem in which the battery 10 and the converter 33 are connected by the power supply holding unit 313 even though a low-voltage event has occurred. In this case, the external disturbance may include ESD (Electrostatic Discharge), etc.

[0097] 7 and 8, in an event mode in which an undervoltage event occurs, power is not supplied to the gate G of the disturbance transistor SW_N connected to the output terminal OUT, and the disturbance transistor SW_N is turned off. When the disturbance transistor SW_N is turned off, the second holding resistor R2 is electrically isolated from the ground GND. Even if the voltage of the auxiliary power supply VCC_M changes to a high level due to a disturbance, the first holding transistor SW1 and the second holding transistor SW2 cannot be turned on. As a result, the second reference resistor R_U2 is in a floating state in which it cannot be connected to ground, and the low-voltage transistor SW_U cannot be turned on. This solves the problem of the battery 10 and the converter 33 being connected together due to a disturbance when an undervoltage event occurs.

[0098] Referring to Figures 7 and 9, in an event mode in which a low voltage event occurs, the first external switch SW_out1 is turned on by the user, and even if the second reference resistor R_U2 is connected to ground via the first external switch SW_out1, the battery 10 and the converter 33 are not connected.

[0099] Specifically, when the first external switch SW_out1 is turned on and the second reference resistor R_U2 is connected to ground via the first external switch SW_out1, the battery 10 voltage corresponding to the magnitude of the second reference resistor R_U2 according to equation (2) is supplied to the gate voltage V_G of the low-voltage transistor SW_U.

[0100] For example, let us assume that the resistance values ​​of the first and second reference resistors R_U1 and R_U2 are 10 kΩ and 220 kΩ, respectively. As explained in FIG. 7, the voltage value V_SG obtained by subtracting the gate voltage V_G from the source voltage V_S of the low-voltage transistor SW_U is still approximately 1.522 V, which is smaller than the threshold voltage V_th (e.g., 1.565 V). In other words, the low-voltage transistor SW_U cannot be turned on.

[0101] Referring to Figures 7 and 10, in an event mode in which a low voltage event occurs, when the second external switch SW_out2 is turned on by the user and the second reference resistor R_U2 is connected to ground via the second external switch SW_out2, the battery 10 and the converter 33 can be electrically connected.

[0102] V_G=(R_OUT / (R_U1+R_OUT))×V_B (4)

[0103] Specifically, when the second external switch SW_out2 is turned on, the first reference resistor R_U1 and the external resistor R_OUT are connected in series, and the battery 10 voltage corresponding to the magnitude of the external resistor R_OUT according to Equation (4) is supplied to the gate G of the low-voltage transistor SW_U.

[0104] For example, referring to FIG. 7, assume that the resistance values ​​of the first reference resistor R_U1 and the external resistor R_OUT are 10 kΩ and 100 kΩ, respectively. The source voltage V_S of the low-voltage transistor SW_U and the gate voltage V_G of the low-voltage transistor SW_U are 35 V and approximately 31.82 V, respectively. That is, the voltage V_SG obtained by subtracting the gate voltage V_G from the source voltage V_S of the low-voltage transistor SW_U is approximately 3.182 V, which is greater than the threshold voltage V_th (e.g., 1.565 V). Then, the low-voltage transistor SW_U can be turned on.

[0105] In summary, in a battery system including the over-discharge prevention circuit 31 according to the embodiment, in an event mode in which a low-voltage event occurs, the first holding transistor SW1 and the second holding transistor SW2 are not forcibly turned on by an external disturbance. Furthermore, the first external switch SW_out1 may be configured to be a switch for turning on the control unit 37 in a normal mode in which the battery voltage VCC_B exceeds a reference voltage, and to be unable to turn on the control unit 37 in an event mode in which a low-voltage event occurs. The second external switch SW_out2 may be a switch for turning on the control unit 37 in an event mode in which a low-voltage event occurs in which the battery voltage VCC_B is equal to or lower than the reference voltage.

[0106] FIG. 11 is a circuit diagram illustrating the state in which the control unit 37, which has been woken up (activated) by the measures of FIG. 10, turns on the first holding transistor SW1, and FIG. 12 is a circuit diagram of the over-discharge prevention circuit 31 illustrating that even if the second external switch SW_out2 is turned off in the state of FIG. 11, the battery 10 and the converter 33 continue to be electrically connected by the power supply holding circuit 313.

[0107] 10 and 11, when the low-voltage transistor SW_U is turned on and the converter 33 and the battery 10 are electrically connected, the control unit 37 receives power from the converter 33 and is turned on. For example, the control unit 37, which functions as the auxiliary power supply VCC_M, can supply a voltage of 0V or more to the source S of the first holding transistor SW1. The control unit 37 can supply a high-level voltage to the base B of the second holding transistor SW2 through the first holding transistor SW1. Then, the second holding transistor SW2 is turned on, and the second reference resistor R_U2 can be electrically connected to the ground GND through the second holding transistor SW2. In other words, the power supply holding unit 313 can be turned on by the control unit 37.

[0108] 11, the control unit 37 controls the relay 20 to electrically connect the battery 10 in a low voltage state to an external device, thereby charging the battery 10 with power from the external device. As a result, the battery voltage VCC_B can rise from a voltage below the reference voltage (e.g., 35V) to a voltage above the reference voltage (e.g., 40V).

[0109] 11 and 12, even if the battery voltage VCC_B increases above the reference voltage and the second external switch SW_out2 is turned off while the power supply maintaining unit 313 is in the on state, the electrical connection between the battery 10 and the converter 33 can be maintained.

[0110] Specifically, when the second holding transistor SW2 is turned on, the second reference resistor R_U2 is connected to ground GND, and even when the second external switch SW_out2 is turned off, the second reference resistor R_U2 remains connected to ground, so that the ground-level gate voltage V_G can continue to be supplied to the gate G of the low-voltage transistor SW_U.

[0111] Referring to Figures 6 and 12, when the battery voltage VCC_B is equal to or higher than the reference voltage and the power supply holding unit 313 is in an on state, the electrical connection between the battery 10 and the converter 33 can be maintained even if the first external switch SW_out1 or the second external switch SW_out2 is turned off.

[0112] Although the embodiments of the present invention have been described in detail above, the scope of the present invention is not limited to these, and various modifications and improvements made by those skilled in the art to which the present invention pertains also fall within the scope of the present invention.

Claims

1. An over-discharge prevention circuit for controlling an electrical connection between a battery and a converter that converts a battery voltage, which is a voltage across the battery, into a driving voltage of a predetermined magnitude and supplies the driving voltage to a control unit, (a) a low-voltage transistor connected between the battery and the converter, the low-voltage transistor being turned on in a normal mode when the battery voltage exceeds a predetermined reference voltage, and being turned off in an event mode when the battery voltage is equal to or lower than the reference voltage; (b) a first reference resistor coupled between the positive terminal of the battery and the gate of the low-voltage transistor; (c) an undervoltage prevention unit including a second reference resistor connected between the gate of the low-voltage transistor and ground; The over-discharge prevention circuit includes a first reference resistor and a second reference resistor, each having a resistance value determined based on the magnitude of the reference voltage.

2. 2. The over-discharge protection circuit of claim 1, wherein the low-voltage transistor is a P-channel MOSFET (metal-oxide-semiconductor field-effect transistor), the source of the low-voltage transistor is connected to the positive electrode of the battery and one end of the first reference resistor, the gate of the low-voltage transistor is connected to the other end of the first reference resistor and one end of the second reference resistor, and the drain of the low-voltage transistor is connected to the converter.

3. 3. The over-discharge prevention circuit of claim 2, further comprising a power supply holding unit including: a first holding transistor that is turned on by power from the control unit that is turned on by receiving the driving voltage; and a second holding transistor that is turned on by receiving power from the control unit when the first holding transistor is turned on, and connects the second reference resistor to the ground.

4. 4. The over-discharge prevention circuit of claim 3, wherein the first holding transistor is a P-channel MOSFET, the source of the first holding transistor is connected to the control unit and one end of a first holding resistor, the gate of the first holding transistor is connected to the other end of the first holding resistor and one end of a second holding resistor, and the drain of the first holding transistor is connected to one end of a third holding resistor.

5. 5. The over-discharge prevention circuit of claim 4, wherein the second holding transistor is an NPN-type BJT (bipolar junction transistor), the base of the second holding transistor is connected to the other end of the third holding resistor, the collector of the second holding transistor is connected to the other end of the second reference resistor, and the emitter of the second holding transistor is connected to the ground.

6. a first external switch connected between the collector of the second holding transistor and the ground; 6. The over-discharge protection circuit according to claim 5, wherein in the normal mode, the low-voltage transistor is controlled to be turned on in response to a turn-on switching of the first external switch.

7. a second external switch and an external resistor connected in series between the gate of the low-voltage transistor and the ground; 6. The over-discharge protection circuit according to claim 5, wherein in the event mode, the low-voltage transistor is turned on by the turn-on switching of the second external switch.

8. 8. The over-discharge protection circuit according to claim 7, wherein the resistance value of the external resistor is determined based on the magnitude of the reference voltage.

9. 6. The over-discharge prevention circuit of claim 5, further comprising a disturbance elimination unit including: a disturbance transistor connected between the second holding resistor and the ground; a first disturbance resistor connected between the gate of the disturbance transistor and the ground; and a second disturbance resistor connected between the drain of the low-voltage transistor and the gate of the disturbance transistor.

10. 10. The over-discharge prevention circuit of claim 9, wherein the disturbance transistor is composed of an N-channel MOSFET (metal oxide semiconductor field effect transistor), the source of the disturbance transistor is connected to the ground, the gate of the disturbance transistor is connected to one end of the first disturbance resistor and the other end of the second disturbance resistor, and the drain of the disturbance transistor is connected to the other end of the second holding resistor.

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