A magnetic flux pump DAC using injection of multiple magnetic flux quanta

Abstract

A flux pump DAC (digital-to-analog converter) includes a ring in the Josephson transmission line (JTL) stage. The ring includes multiple injector Josephson junctions (JJs). Each injector JJ can be individually operated to inject flux into the ring in a given AC clock cycle, or can be controllably stopped to not inject flux during a given AC clock cycle. The flux pump DAC further includes a load inductor coupled to the ring JJs of the ring. The load inductor is configured to store the flux injected into the ring. Because the flux pump DAC includes multiple injector JJs arranged along the JTL ring, it can ramp up the current stored in the load inductor at a faster rate than a single-injector flux pump DAC, and the ramp speed can be precisely and variably controlled, thus improving thermal insulation.

Description

[Technical Field]

[0001] The present invention relates in general to superconducting circuits, and more particularly to a flux pump DAC (digital-to-analog converter) using the injection of multiple flux quanta. This application claims priority to U.S. Patent Application No. 18 / 315,187, filed on 10 May 2023, which is incorporated herein by reference in its entirety. [Background technology]

[0002] Superconducting digital technologies provide computing and / or communication resources that benefit from high speed, low power consumption, and low operating temperatures. Developed as an alternative to CMOS technology, superconducting digital technologies typically include superconductor-based single-flux quantum (SFQ) superconducting circuits that utilize superconducting Josephson junctions (JJs) with typical signal power of about 4 nanowatts (nW), typical data rates of 20 gigabits per second (Gb / s) or more, and operating temperatures of about 4 Kelvin. Certain superconducting circuits in which JJs are used as active elements may require a DC bias for the JJs. Some systems can provide the DC bias directly using a bias resistor network, but this can result in substantially high currents (1 ampere or more), leading to spurious magnetic fields and heat resulting from high power consumption. Power consumption in such circuits is dominated by static power consumption that occurs whether the active elements are switching or not. In contrast, reciprocal quantum logic (RQL) systems significantly reduce resistance and power consumption in low-temperature environments by providing the JJ bias primarily as an AC bias via an AC clock resonator network. [Overview of the project]

[0003] One example of a magnetic flux pump DAC includes a ring in the Josephson transmission line stage. The ring includes at least first and second injectors JJ, each of which is configured to inject magnetic flux into the ring. The magnetic flux pump DAC further includes a load inductor coupled to the ring JJ of the ring. The load inductor is configured to store the magnetic flux injected into the ring.

[0004] Another example is a method for injecting multiple flux quanta. In a single AC clock cycle, a first flux quantum is injected into the Josephson transmission line ring of a flux pump via a first injector within the Josephson transmission line ring. In the same AC clock cycle, a second flux quantum is injected into the Josephson transmission line ring via a second injector within the same Josephson transmission line ring. The accumulation of the first and second flux quanta in a load inductor coupled to the Josephson transmission line ring increases the amount of flux accumulated in the load inductor.

[0005] Another example is a method of variable-speed flux ramping using the injection of multiple flux quanta. First and second injectors are operated within a Josephson transmission line ring of a flux pump. Both the first and second injectors inject a single flux quantum into the ring during a single AC clock cycle. The injected single flux quantum is accumulated as stored flux in a load inductor coupled to the Josephson transmission line ring at a rate based on the number of activated injectors. Then, one of the injectors is stopped to slow down the flux accumulation rate in the load inductor.

[0006] Another example is a method for controlling the accumulation and emission of magnetic flux in a magnetic flux pump DAC using the injection of multiple magnetic flux quanta. Positive magnetic flux quanta are injected into the JTL ring of the magnetic flux pump via a first injector within the JTL ring. Negative magnetic flux quanta are injected into the JTL ring via a second injector within the JTL ring. The magnetic flux is accumulated in and emitted from a load inductor coupled to the JTL ring. Based on the fact that a desired amount of magnetic flux has not been accumulated in the load inductor, the injection of positive and / or negative magnetic flux quanta is repeated until a desired amount of magnetic flux is accumulated by the load inductor. [Brief explanation of the drawing]

[0007] [Figure 1] Figure 1 is a block diagram of an exemplary superconducting system equipped with a flux pump DAC using injection of multiple flux quanta. [Figure 2] Figure 2A is a circuit diagram of an exemplary flux pump DAC using multiple flux quantum injections, having two flux injectors in the pump ring, one in a 0° clock phase and the other in a 180° clock phase. [Figure 2B-2H] Figures 2B to 2H are circuit diagrams illustrating the exemplary function of the magnetic flux pump DAC shown in Figure 2A, and represent the circuit diagram in the state where one magnetic flux injector is activated. [Figure 2I-2S] Figures 2I to 2S are circuit diagrams illustrating the exemplary function of the magnetic flux pump DAC shown in Figure 2A, with the two magnetic flux injectors in operation. [Figure 2T] Figure 2T is a circuit diagram of an exemplary flux pump DAC using multiple flux quantum injections, having two flux injectors in the pump ring, one configured to store flux in a load inductor and the other to release flux. [Figure 2U-2Z]Figures 2U to 2Z are circuit diagrams illustrating the exemplary function of the magnetic flux pump DAC shown in Figure 2T. For example, one magnetic flux injector is activated, causing the other magnetic flux injector to release the magnetic flux previously stored in the load inductor. [Figure 3] Figure 3 is an illustrative graph of magnetic flux accumulation using the magnetic flux pump DAC shown in Figure 2T. [Figure 4] Figure 4 is a flowchart illustrating an exemplary method for injecting multiple magnetic flux quanta in a magnetic flux pump DAC. [Figure 5] Figure 5 is a flowchart illustrating an exemplary method of variable-speed flux ramping in the injection of multiple flux quanta in a flux pump DAC. [Figure 6] Figure 6 is a flowchart illustrating an exemplary method for controlling the accumulation and emission of magnetic flux in a magnetic flux pump DAC using the injection of multiple magnetic flux quanta. [Modes for carrying out the invention]

[0008] This invention generally relates to superconducting circuits, and more particularly to a flux pump DAC using the injection of multiple flux quanta. Flux is the time integral of voltage. For example, when flux is applied to an inductor or JJ, flux is a key operating parameter governing the function of an RQL logic circuit that may exist inside a cryogenic cold space, for example, operating at approximately 4K or below. The determined amount of flux can be introduced into the RQL circuit by a current bias source circuit operating in a warm space, for example at near room temperature (approximately 300K), and coupled to a probe in the cold space via a coaxial cable. The probe, and the RQL operating circuit of the system into which the flux is introduced by the probe, may be several meters away from the current bias source circuit. Because the probe and cable are relatively large compared to the IC, spatial requirements arise within the system. Furthermore, the probe and cable form a thermal link from the cold space to the warm space. Because RQL systems have low operating temperature and thermal isolation requirements, directly probing the determined magnetic flux amount into the integrated circuit (IC) at various points on the IC on which the RQL system is implemented can be inconvenient or, in some cases, impossible.

[0009] Therefore, it may be useful to manufacture an IC with one or more flux pump DACs, in which a single flux quantum is programmatically and controllably input into a loop of relatively large inductance, such that each flux quantum introduced into the loop increases the circulating current in the loop by an amount approximately equal to the value obtained by dividing the flux quantum by the geometric inductance of the loop. By repeatedly introducing a single flux quantum into the loop, flux is accumulated in the loop until a programmatically controlled predetermined amount of flux is accumulated in the loop, and then the flux can be supplied to a part of the RQL system that can utilize the predetermined amount of flux.

[0010] The flux pump adds flux to the load inductor by propagating flux quanta along the ring of RQL Josephson transmission line (JTL) stages. The injector circuit within the ring allows a single flux quantum to enter the ring if the data input signal supplied to the injector is logic high. Based on the data input signal being maintained logic high in the injector circuit, a flux quantum is added to the DAC in each clock cycle. The current circulating within the DAC increases by Φ0 / L C only. Here, Φ0 is the flux quantum and L LOAD is the inductance of the load inductor for all the flux quanta added to the DAC. The rate at which the current in the DAC increases is affected by the value of the load inductance L LOAD and the clock frequency f. Decreasing the load inductance L LOAD increases the current per step, thereby increasing the current ramp rate. Increasing the clock frequency f decreases the time per clock cycle, resulting in more stepwise current increases or decreases over a given amount of time.

[0011] There are physical limitations as to how much the load inductance L LOAD and the clock frequency f can be adjusted to increase the ramp rate. For example, the RQL error rate tends to be larger at higher clock frequencies. Also, in a practical implementation, it may be necessary to extend the load inductor to reach a DAC target circuit that is not located close to the DAC pump circuit on the IC. The required length of the load inductor can place an upper limit on the amount by which the load inductance L LOAD can be decreased.

[0012] The superconducting loop including the JJ and the inductor can hold a number of flux quanta equal to β L = 2πIL / Φ0. Here, I C is the critical current of the JJ, Φ0 is the flux quantum, and is approximately equal to 2.07 mA·pH. The quantity β in the loop C is the critical current of the JJ, Φ0 is the flux quantum, and is approximately equal to 2.07 mA·pH. The quantity β in the loopL If the quantity β is greater than 1, the loop can hold a single magnetic flux quantum. L If the number is 2 or more, then there are 2 or more stable flux conditions for that loop, and the number of stable flux conditions is floor(β L ) For example, to use in an RQL system, 15 or more betas L A loop is constructed having the β of the load inductor of the magnetic flux pump DAC. L This is also called the ring compliance of a magnetic flux pump (DAC).

[0013] Applying a current exceeding the critical current of the JJ to a JJ in such a loop allows an inconsistent number of flux quanta to be introduced into the loop. A flux pump is a circuit that can be programmed to take any stable flux condition for a loop by ensuring that the loop accepts only one flux quantum at a time, through a circuit known as an injector, which may include an injector JJ. A flux pump includes a ring of JTL stages. This JTL stage can be, for example, an RQL-JTL stage with different orthogonal phases of an RQL-AC clock. The RQL clock can be used to input a train of SFQ pulses through the injector JJ to trigger multiple ring JJs of the JTL stage in the ring, one at a time. Each time the input SFQ pulse completes one revolution around the ring, each ring JJ flips once, and one flux quantum is introduced into the load inductor outside the loop. The injector JJ is a JJ in the loop that is communicatively coupled to a data input. When the data input signal supplied to the data input is high, injector JJ is triggered once, accumulating flux quanta in the ring of the JTL stage. Thus, injector JJ provides a known point in the ring from which the flux quanta can begin to travel through the ring of the flux pump.

[0014] A flux pump may be configured to require one AC clock cycle to propagate the magnetic flux along the ring once. If the data input signal is high at the start of the next AC clock cycle, the magnetic flux propagates through the ring again, thereby accumulating a second flux quantum in the load inductor. Similarly, if the data input signal remains high at the start of a third AC clock cycle, a third flux quantum is supplied to the load inductor, and so on. Therefore, the state of the data input signal supplied to injector JJ during a given AC clock cycle determines whether a flux quantum is accumulated in the load inductor of the flux pump during that clock cycle.

[0015] As described herein, a flux pump for injecting multiple flux quanta can be configured as a DAC capable of accumulating two or more flux quanta in a load inductor in a single AC clock cycle by providing a ring of JTL stages with multiple injectors JJ along the ring within the flux pump. Such a configuration allows for faster flux accumulation by accumulating flux quanta in the ring in each clock cycle, which may be at least equal to the number of injectors JJ actuated in the ring, without the need to increase the clock speed of the AC clock supplied to the flux pump. By controllingly routing or specifying input data streams to the injectors JJ, the injectors JJ in the ring can be actuated or deactivated individually in each AC clock cycle, thereby providing a variable accumulation rate for the flux pump DAC, which varies the accumulation rate between the slowest ramp speed in which only a single injector JJ is actuated and the fastest ramp speed in which all injectors JJ in the ring are actuated.

[0016] Figure 1 shows an exemplary superconducting system 100 with a flux pump DAC 102 that uses injection of multiple flux quanta. The system 100 includes an IC (e.g., RQL-IC) 104 located in a cryogenic space, and one or more signal generators 106 located outside the cryogenic space and configured to generate bias signals to supply to IC 104. For example, such bias signals may include an I-clock AC bias signal 108, a Q-clock AC bias signal 110 that is 90° out of phase with the I-clock AC bias signal 108, and one or more DC bias signals 112. IC 104 may include arithmetic circuits (e.g., RQL circuits) such as multiple JTLs and logic gates (not shown). IC 104 may further include a clock resonator with taps and / or bias lines (not shown) to distribute the AC clock signals 108, 110 and / or DC bias signals 112 to the operating circuit of the entire IC 104. As an example, IC104 may be configured to include an arithmetic circuit for performing calculations using superconducting signals at a microwave clock speed determined by AC clock signals 108 and 110.

[0017] IC104 may include a flux pump DAC102. In some examples, IC104 includes multiple instances of the flux pump DAC102. The flux pump DAC102, or each instance thereof, includes a JTL stage ring 114 and a load inductor 116. The ring 114 includes multiple injectors JJ118, each configured to supply flux quanta to the ring 114 at different phases of a single AC clock cycle. Different phases of the AC clock can be generated, for example, by the resonators and taps (not shown) described above, based on an I clock signal 108 and a Q clock signal 110. For example, the 0° phase and the 180° phase of the AC clock can be generated based on the I clock signal 108. Also, the 90° phase and the 270° phase of the AC clock can be generated based on the Q clock signal 110.

[0018] Each injector JJ118 has its own data input DATA1~DATA NA different phase of the AC clock can be supplied, where N is an integer equal to the number of injectors JJ118. For each of the N injectors JJ, a different phase of the AC clock can be supplied (e.g., via different resonator and tap configurations). For example, four AC clock phases (0°, 90°, 180°, 270°) can be generated for supplying an exemplary DAC102 with N=2 injectors JJ118. Also, eight AC clock phases (0°, 45°, 90°, 135°, 180°, 225°, 270°, 315°) can be generated for supplying an exemplary DAC102 with N=4 injectors JJ118. The same applies to others.

[0019] The ring 114 and load inductor 116 are configured such that a single flux quantum circulates within the loop including the load inductor 116, with each SFQ input supplied to the ring 114 by one of several injectors JJ118. Thus, the load inductor 116 is configured such that the size of the load inductor 116, the number of injectors JJ118 N, the speed of the AC clock signals 108,110, and the input data signals DATA1~DATA N Magnetic flux is continuously "accumulated" at a rate corresponding to the routing and / or specified format.

[0020] The load inductor 116 is, for example, connected to the input data signal DATA1~DATA N The load inductor 116 can be programmed to accumulate a desired amount of magnetic flux at a linear or variable ramp speed determined by the specified format. Once the desired amount of magnetic flux is accumulated in the load inductor 116, the load inductor 116 can output the accumulated amount of magnetic flux to the magnetic flux load output 120, for example, the target RQL circuit on IC 104 (e.g., via transformer coupling or other coupling).

[0021] Figure 2A shows an exemplary circuit 200 of a flux pump DAC using injection of multiple flux quanta. Circuit 200 may correspond, for example, to the flux pump 102 in Figure 1. Circuit 200 includes a ring 202 of JTL stages. Ring 202 may correspond, for example, to ring 114 in Figure 1. In this exemplary circuit 202, four JTL stages are shown, each having rings JJ_J1, J2, J3, and J4. Each ring JTL stage in ring 202 shares its respective ring JJ with subsequent JTL stages in ring 202 via one of the ring inductors L1, L2, L3, and L4, so that when a preceding ring JJ in one ring JTL stage is triggered, flux propagates along ring 202 (for example, clockwise). When a ring JJ in a subsequent JTL stage is triggered, the loop current in the preceding stage is extinguished. Each of the rings JJ_J1, J2, J3, J4 is coupled at its first end to a loop superconducting path that includes four ring inductors L1, L2, L3, L4 in series, and at its second end to a load inductor L LOAD It is connected to ground via [a certain link]. The central electrical node of the ring connects each of the rings JJ_J1, J2, J3, and J4 to each other, as well as the load inductor L LOAD Combine.

[0022] The circuit 200 in Figure 2A further includes four ring inductors L1, L2, L3, and L4, and two injectors JJ_J placed in series on the loop superconducting path of ring 202. IN1 ,J IN2 Includes. Injector JJ_J IN1 ,J IN2 This can, for example, collectively correspond to injector JJ118 in Figure 1. Each injector JJ is communicatively coupled to its respective data input and receives its respective data input signal. First injector JJ_J IN1 It is coupled to receive the first data input signal DATA1 via the first input JTL204 and the first data input transformer 206. The second injector JJ_J IN2It is coupled to receive the second data input signal DATA2 via the second input JTL208 and the second data input transformer 210. Injector JJ_J IN1 ,J IN2 DC bias source I BIAS DC bias can be supplied via transformers 212 and 214. First and second data current sources I DATA1 ,I DATA2 In Figure 2A, it is shown as a current source element for simplification. In examples not shown, data SFQ pulses forming data input signals DATA1, DATA2 may be delivered to data inputs JTL204, 208 from one or more controllers and / or via superconducting signal switches and / or routers. The logic high signals for input signals DATA1, DATA2 may have, for example, a wavepipeline logic (WPL) format with mutual pulses where a positive pulse is followed by a negative pulse. The logic low signals of the first input signal DATA1 and the second input signal DATA2 may have a WPL format in which no SFQ pulse is present. This WPL data format may be called a return-to-zero (RZ) data format. In other examples (not shown), a phase-mode logic (PML) data format may be used. Injector JJ_J IN1 ,J IN2 It has a greater critical current than rings JJ_J1, J2, J3, and J4 (it has a higher critical current than them). For example, if rings JJ_J1, J2, J3, and J4 have a critical current of about 40 microamperes to about 80 microamperes, e.g., a critical current of about 60 microamperes, then injector JJ has a critical current of about 100 microamperes to about 180 microamperes, e.g., a critical current of about 140 microamperes.

[0023] The circuit 200 in Figure 2A further includes AC clock resonator taps AC1, AC2, AC3, and AC4 for supplying AC bias to the components of the ring 202. The direction in which magnetic flux propagation occurs along the ring 202 depends on the sequential arrangement of the bias tap phases. In the illustrated example, the first AC clock resonator tap AC1 supplies AC bias at 0° phase of the AC clock, the second AC clock resonator tap AC2 supplies AC bias at 90° phase of the AC clock, the third AC clock resonator tap AC3 supplies AC bias at 180° phase of the AC clock, and the fourth AC clock resonator tap AC4 supplies AC bias at 270° phase of the AC clock. The first ring JJ_J1 and the first injector JJ_J IN1 Both are AC biased primarily by AC bias tap AC1. The second ring JJ_J2 is AC biased primarily by AC bias tap AC2. The third ring JJ_J3 and the second injector JJ_J IN2 Both are AC biased primarily by the AC bias tap AC3. The fourth ring JJ_J4 is AC biased primarily by the AC bias tap AC4. The clockwise direction of flux propagation in the illustrated exemplary circuit 200 is due to the clockwise arrangement of the phase order of the AC clock resonator taps AC1, AC2, AC3, AC4. In other examples not shown, the direction of flux propagation can be made counterclockwise by rearranging the phases of the AC resonator taps relative to each other (e.g., reversing the order). In some examples, the injector junction DC bias I BIAS It can be adjusted to provide different circuit functionality (for example, by being set to zero or reversed).

[0024] The exemplary circuit 200 in Figure 2A has a load inductor L LOAD This further includes: Load inductor L LOAD The load inductor L is electrically coupled (directly or indirectly) at one end to the central electric node of ring 202 and at the other end to ground. When a magnetic flux quantum enters ring 202 and the magnetic flux propagates along ring 202, LOADThe current flowing through the load inductor L increases, LOAD Magnetic flux is effectively stored in the load inductor L. The stored magnetic flux can then be released from the load inductor and supplied to another circuit or system on the same IC on which circuit 200 is implemented, for example, via switches and / or routing elements (not shown). LOAD The inductance of L1 may be relatively larger than the other inductances in circuit 200. For example, if the ring inductors L1, L2, L3, L4 have inductances of the order of picohrenries (e.g., about 10 picohrenries), then the load inductor L LOAD The inductance may be on the order of nanohenries (e.g., about 1 nanohenry). The data input transformers 206,210 may have a transformation ratio greater than, for example, about 1:1 (e.g., about 2:1). For example, the primary inductor of the data input transformers 206,210 may have an inductance of about 10 picohrenries, while the secondary inductor of the data input transformers 206,210 may have an inductance of about 5 picohrenries. The DC bias transformers 212,214 may have a transformation ratio of, for example, about 1:1. For example, the primary inductor of the DC bias transformers 212,214 may have an inductance of 60 picohrenries, and similarly, the secondary inductor of the DC bias transformers 212,214 may also have an inductance of about 60 picohrenries.

[0025] Figures 2B to 2H show the first flux injector JJ_J in response to a logic high WPL-SFQ pulse input via the first input JTL204 and the first data input signal DATA1 through the first input transformer 206. IN1 The circuit 200 in Figure 2A is shown to function when magnetic flux is injected into ring 202 by only this. In the examples in Figures 2B to 2H, the second magnetic flux injector JJ_J IN2Therefore, no magnetic flux is injected into ring 202. Figure 2B shows that the superconducting loop current 216 output from the first input JTL 204 induces a loop current 218 through the first input transformer 206. When the current passing through JJ, which includes the circulating current in the superconducting loop of which JJ is part, and any superimposed bias current, exceeds the critical current of JJ, JJ is triggered. First injector JJ_J IN1 When sufficient DC and AC bias conditions are provided, the loop current 218 causes the first injector JJ_J IN1 The first injector JJ_J is triggered in the positive direction, and as shown in Figure 2C, the loop current 218 propagates into the ring 202 as the loop current 220. According to the standard notation for the phase of JJ, the dot on JJ indicates the direction of the trigger of JJ. Thus, the first injector JJ_J IN1 This is the secondary inductor of the first input transformer 206 and the first injector JJ_J IN1 While eliminating the loop current 218 circulating within the loop containing the flux quantum, one flux quantum is introduced into the ring 202.

[0026] When sufficient DC and AC bias conditions are given to the first ring JJ_J1, the loop current 220, combined with the bias from the 0° resonator tap AC1, triggers the first ring JJ_J1 in the positive direction (towards the outside of ring 202), causing the loop current 220 to advance clockwise along ring 202 as loop current 222, as shown in Figure 2D.

[0027] For approximately one-quarter of the AC clock cycles after the loop current 220 (shown in Figure 2C) has advanced along ring 202 as loop current 222 (shown in Figure 2D), the DC and AC bias conditions may be sufficient to trigger the second ring JJ_J2 in the positive direction (outward from ring 202). The loop current 222, combined with the bias from the 90° resonator tap AC2, triggers the second ring JJ_J2, causing the loop current 222 to advance along ring 202 as loop current 224, as shown in Figure 2E. Furthermore, Figure 2E shows that approximately half of the AC clock cycle after the first input signal DATA1 introduces loop current 216, thereby inducing loop current 218 through the introduction of a first SFQ pulse passing through the first input JTL204, the first input signal DATA1 can introduce loop current 226, thereby inducing loop current 228 through the introduction of a second input SFQ pulse that is opposite to the first input SFQ pulse passing through the first input JTL204. For example, if the first SFQ pulse (Figure 2B) is a positive SFQ pulse, the second mutual SFQ pulse (Figure 2D) can be a negative SFQ pulse. However, the first injector JJ_J IN1 The bias conditions at point E are not sufficient to allow loop current 228 to flow into ring 202 at point E in Figure 2. Therefore, loop currents 226 and 228 remain in place as shown in Figure F.

[0028] For approximately another quarter of the AC clock cycle, after the loop current 222 has advanced clockwise along ring 202 as loop current 224, the DC and AC bias conditions are sufficient to trigger the third ring JJ_J2 in the positive direction (outward from ring 202). The loop current 224, combined with the bias from the 180° resonator tap AC3, triggers the third ring JJ_J3, causing the loop current 224 to advance clockwise along ring 202 as loop current 230, as shown in Figure 2F.

[0029] Approximately one-quarter of an AC clock cycle later, the DC and AC bias conditions become sufficient to trigger the fourth ring JJ_J4 in the positive direction (outward from ring 202). The loop current 230, combined with the bias from the 270° resonator tap AC4, triggers the fourth ring JJ_J4, causing the loop current 230 to advance clockwise along ring 202 as loop current 232, as shown in Figure 2G. IN1 The nearly equal and opposite loop currents 232 and 228 passing through the ring cancel each other out, resulting in the circuit state shown in Figure 2H, where virtually no loop current remains in ring 202, and all rings JJ_J1, J2, J3, and J4 are set to a positive 2π radian phase.

[0030] In each of Figures 2D to 2G, as the loop currents 220, 222, 224, 230, and 232 advance through ring 202, more negative magnetic flux is generated in the load inductor L. LOAD The magnetic flux is accumulated by (the negative sign of the magnetic flux is directed from ground towards the center of ring 202 towards the load inductor L) LOAD (defined by the current flowing through it). If the first data input signal DATA1 remains logic high (for example, if the mutual SFQ pulse continues to be introduced through the first input JTL204), the cycle of flux inflow and propagation through ring 202 is repeated (as shown in Figures 2B to 2H), until more negative flux reaches compliance of ring 202 and load inductor L LOAD It is stored in the load inductor L. However, if the first data input signal DATA1 is not logically high, further magnetic flux is not accepted by the ring 202, and therefore further negative magnetic flux is not accepted by the load inductor L. LOAD It is not stored.

[0031] Therefore, using the process shown in Figures 2B to 2H, a precisely controlled amount of negative magnetic flux is applied to the load inductor L. LOAD It can be stored in the load inductor L. LOADAfter accumulating the desired amount of negative magnetic flux, for example, load inductor L to another part of the RQL circuit on the same IC as circuit 200. LOAD The load inductor L is transformed into a transformer-coupled unit. LOAD By transferring the negative magnetic flux accumulated in the load inductor L to other parts of the RQL circuit, LOAD Negative magnetic flux, accumulated to precisely the desired amount, can be released.

[0032] Figures 2I to 2S show (1) the first flux injector JJ_J in response to a logic high WPL-SFQ pulse input via the first input JTL204 and the first input transformer 206, with the first data input signal DATA1. IN1 (2) The second flux injector JJ_J responds to a logic high WPL-SFQ pulse input via the second input JTL208 and the second input transformer 210, with the second data input signal DATA2. IN2 Figure 2A illustrates the function of circuit 200 when magnetic flux is injected into ring 202 by both of these. In the illustrated example, a positive SFQ pulse is supplied by the second data input signal DATA2, delayed by approximately 1 / 2 AC clock cycle compared to the positive SFQ pulse supplied by the first data input signal DATA1.

[0033] Figure 2I shows that the superconducting loop current 234 output from the first input JTL204 induces a loop current 236 through the first input transformer 206. IN1 When sufficient DC and AC bias conditions are provided, the loop current 236 causes the first injector JJ_J IN1 The first injector JJ_J is triggered in the positive direction, and as shown in Figure 2J, the loop current 236 propagates into the ring 202 as loop current 238. IN1 This process eliminates loop currents 234 and 236 while introducing one magnetic flux quantum into ring 202.

[0034] When sufficient DC and AC bias conditions are given to the first ring JJ_J1, the loop current 238, combined with the bias from the 0° resonator tap AC1, triggers the first ring JJ_J1 in the positive direction (outward from ring 202), causing the loop current 238 to advance clockwise on ring 202 as loop current 240, as shown in Figure 2K. For approximately one-quarter of the AC clock cycles after the loop current 238 (shown in Figure 2J) has advanced on ring 202 as loop current 240 (shown in Figure 2K), the DC and AC bias conditions may be sufficient to trigger the second ring JJ_J2 in the positive direction (outward from ring 202). The loop current 240, combined with the bias from the 90° resonator tap AC2, triggers the second ring JJ_J2, causing the loop current 240 to advance clockwise on ring 202 as loop current 242, as shown in Figure 2L.

[0035] Furthermore, Figure 2K shows that approximately half of the AC clock cycle after the first input signal DATA1 introduces loop current 234, thereby inducing loop current 236 through the introduction of a first SFQ pulse passing through the first input JTL204, the first input signal DATA1 can introduce loop current 244, thereby inducing loop current 246 through the introduction of a second input SFQ pulse that is opposite to the first input SFQ pulse passing through the first input JTL204. For example, if the first SFQ pulse (Figure 2I) is a positive SFQ pulse, the second mutual SFQ pulse (Figure 2L) can be a negative SFQ pulse. However, the first injector JJ_J IN1 The bias conditions at point K are not sufficient to allow loop current 246 to flow into ring 202 at point K in Figure 2. Therefore, loop currents 244 and 246 remain in place as shown in Figures L, M, N, and O.

[0036] Figure 2K further shows that, almost simultaneously with the introduction of loop currents 244,246 by the first input signal DATA1 through a negative SFQ pulse, the second input signal DATA2 introduces loop current 248, thereby inducing loop current 250 through the introduction of a positive input SFQ pulse through the second input JTL208. If the first positive SFQ pulse introduced by the second input signal DATA2 is provided earlier, for example, almost simultaneously with the first positive SFQ pulse introduced by the first input signal DATA1 (at the time shown in Figure 2I), loop currents 248,250 will remain in place, and loop current 250 will be introduced by the second injector JJ_J IN2 The ring 202 will not accept the injection until the bias conditions in Figure 2L and Figure 2M are sufficient. Therefore, Figure 2M shows the second injector JJ_J IN2 The inflow of loop current 250 into ring 202 via a positive trigger indicates that loop current 250 is superimposed with loop current 242 to form loop current 252, which in Figure 2M is represented by two thick double lines, or what could be called a double fluxon, representing two single flux quanta corresponding to the current.

[0037] Approximately one-quarter of the AC clock cycle after the second ring JJ_J2 is triggered, the DC and AC bias conditions of the third ring JJ_J3, including the bias contribution from the 180° resonator tap AC3 and loop current 252, become sufficient to double-trigger the third ring JJ_J3 in the positive direction (outward from ring 202), causing loop current 252 to advance clockwise along ring 202 as loop current 254, as shown in Figure 2N. Note that for simplicity, Figure 2N shows the net result of several consecutive triggers of rings JJ_J3 and J4, which are not specifically illustrated.

[0038] Approximately 1 / 4 of the AC clock cycle after loop current 252 (shown in Figure 2M) has advanced clockwise along ring 202 as loop current 254 (shown in Figure 2N), the DC and AC bias conditions of the fourth ring JJ_J4, including the bias contribution from the 270° resonator tap AC4 and loop current 254, are sufficient to double-trigger the fourth ring JJ_J4 in the positive direction (towards the outside of ring 202), causing loop current 254 to advance clockwise along ring 202 as loop current 256, as shown in Figure 2O. Note that for simplicity, Figure 2O shows ring JJ_J4 and the first injector JJ_J IN1 This shows the net results of several consecutive triggers, which are not specifically illustrated.

[0039] In effect simultaneously, the loop currents 246,256 are in the first injector JJ_J IN1 This creates a bias condition favoring non-triggering (a negative trigger opposite to the initial trigger direction). Therefore, the first injector JJ_J IN1 The phase is returned from 2π radians to 0 radians. In the illustrated example, the first injector JJ_J IN1 The non-triggering results in two outcomes. One outcome is that the loop currents 246 and the corresponding loop currents 244 that induced them, which were held at each location in the circuit 200 from time point 2K in Figure 2K, disappear. The other outcome is that the single flux quantum corresponding to the current in loop current 256 also disappears, and the double-fraxon loop current 256 decreases to the single-fraxon loop current 258 shown in Figure 2P. However, the illustrated example shows a first input signal DATA1 that is kept logic high for only one AC clock cycle. In the example where the first input signal DATA1 is kept logic high for subsequent AC clock cycles as well, the double-fraxon loop current 256 continues to propagate clockwise around the ring 202 as a double-fraxon loop current without decreasing to a single-fraxon loop current at time point 2P in Figure 2P.

[0040] Approximately one-quarter of the AC clock cycles after loop current 254 (shown in Figure 2N) has advanced clockwise along ring 202 as loop current 256 (shown in Figure 2O), the DC and AC bias conditions may be sufficient to trigger the first ring JJ_J2 again in the positive direction (towards the outside of ring 202). Thus, loop current 258, combined with the bias from the 0° resonator tap AC1, triggers the first ring JJ_J1, causing the first ring JJ_J1 to be 2π radian out of phase, as shown in Figure 2Q, and causing loop current 258 to advance clockwise along ring 202 as loop current 260. Furthermore, Figure 2Q shows that approximately half of the AC clock cycle, after the second input signal DATA2 introduces a loop current 248, thereby inducing a loop current 250 through the introduction of the first SFQ pulse passing through the second input JTL208, the second input signal DATA2 introduces a loop current 262, thereby inducing a loop current 264 through the introduction of a second input SFQ pulse that is opposite to the first input SFQ pulse passing through the second input JTL208. For example, if the first SFQ pulse (Figure 2K) is a positive SFQ pulse, the second reciprocal SFQ pulse (Figure 2Q) can be a negative SFQ pulse. However, the second injector JJ_J IN2 The bias conditions at point Q are not sufficient to allow loop current 264 to flow into ring 202. Therefore, loop currents 262 and 264 remain in place as shown in Figure R.

[0041] Approximately one-quarter of the AC clock cycles after the loop current 258 (shown in Figure 2P) has advanced clockwise along ring 202 as loop current 260 (shown in Figure 2Q), the DC and AC bias conditions of the second ring JJ_J2, including the bias contribution from the 90° resonator tap AC2 and loop current 260, become sufficient to trigger the second ring JJ_J2 in the positive direction (outward from ring 202), causing the loop current 260 to advance clockwise along ring 202 as loop current 266, as shown in Figure 2R.

[0042] In effect simultaneously, loop currents 262 and 264 are transmitted to the second injector JJ_J. IN2 This creates a bias condition favoring non-triggering (a negative trigger opposite to the initial trigger direction). Therefore, the second injector JJ_J IN2 This is returned from a 2π radian phase to a 0 radian phase. In the illustrated example, the second injector JJ_J IN2 The non-triggering results in two outcomes. One outcome is that loop current 264 and the corresponding loop current 262 that induced it disappear. The other outcome is that loop current 266 also disappears, resulting in the state shown in Figure 2S. Figure 2S shows that all four rings JJ_J1, J2, J3, J4 are in phase by 2π radians with two negative flux quanta added to the load inductor loop.

[0043] As the loop currents 238, 240, 242, 252, 254, 256, 258, 260, and 266 pass through ring 202 and proceed clockwise, more magnetic flux is generated in the load inductor L. LOAD It is accumulated by the load inductor L. In the examples of Figures 2I to 2S, since both input signals DATA1 and DATA2 are logic high, the magnetic flux is accumulated at twice the speed of the examples of Figures 2B to 2H. LOAD It is accumulated in. Therefore, in the examples of Figures 2B to 2H, one injector JJ_J IN1 In contrast to the case where only the injector JJ_J accepts the magnetic flux into ring 202, in the example of Figures 2I-2S, both injectors JJ_J IN1 ,J IN2 The magnetic flux is received into ring 202. If the data input signals DATA1 and DATA2 remain logically high, the cycle of magnetic flux inflow and propagation through ring 202 is repeated until the load inductor L reaches compliance with ring 202. LOAD More magnetic flux accumulates inside. However, when one of the data input signals DATA1, DATA2 becomes logically low, the rate of magnetic flux inflow into the ring decreases, and therefore the load inductor L LOADThe rate of magnetic flux accumulation is halved compared to when both magnetic flux injectors are operating. And when both data input signals DATA1 and DATA2 go to logic low, no further magnetic flux is accepted by the ring 202 by the injectors JJ_J IN1 ,J IN2 and is not accumulated in the load inductor L LOAD .

[0044] In the above example of the function of the circuit 200, magnetic flux can be continuously injected into the ring 202 by the injectors JJ_J IN1 ,J IN2 until compliance of the ring 202 is reached. In each AC clock cycle, the rings JJ_J1, J2, J3, J4 are triggered in sequence, and one or more magnetic flux quanta travel along the ring 202 until the entire magnetic flux quantum is accumulated in the load inductor L LOAD . The load inductor L LOAD is coupled to all of the rings JJ_J1, J2, J3, J4 at the same electrical node, so that each time the ring JJ is triggered towards a phase of 2π radians, a circulating current corresponding to 1 / 4 of the magnetic flux quantum is supplied through the load inductor L LOAD . When the propagating magnetic flux forms a complete circuit along the ring 202 of the magnetic flux pump DAC circuit 200, an entire magnetic flux quantum is supplied to the load inductor L LOAD . The examples shown in FIGS. 2B to 2S show that magnetic flux is injected into the ring 202 using positive SFQ pulses for the positive phase of the AC clock and negative SFQ pulses for the negative phase of the AC clock. In other examples not shown, by adjusting the bias current I BIAS , magnetic flux can be injected into the ring 202 using only positive SFQ pulses for the positive phase of the AC clock or only negative SFQ pulses for the negative phase of the AC clock. The injection of negative SFQ pulses, which are in the negative clock phase, injects energy into the magnetic flux pump DAC circuit 200 in the same way as the injection of positive SFQ pulses, which are in the positive clock phase, and into the load inductor L LOADThis can increase the accumulated magnetic flux. In some examples not shown, logical high data signals may be supplied by both data input signals DATA1 and DATA2 to inject two magnetic flux quanta, which are 180° out of phase with each other, into the ring 202 during the same clock cycle.

[0045] The exemplary circuit 268 in Figure 2T, similar to the circuit 200 in Figure 2A, has a first input (supplying a first input signal DATA1) configured to controllably store magnetic flux in the magnetic flux pump DAC, while a second input (supplying a second input signal DATA2) is configured to controllably release magnetic flux from the magnetic flux pump DAC by reversing the input polarity of the primary side inductors of the second data input transformer 270 (corresponding to the second data input transformer 210 in circuit 200) and the second DC bias transformer 272 (corresponding to the second DC bias transformer 214 in circuit 200). In some examples, the second input may be used to controllably store magnetic flux in a load inductor, and the first input may be used to controllably release magnetic flux from the load inductor.

[0046] Figures 2U to 2Z show the second flux injector JJ_J in response to a logic high WPL-SFQ pulse input via the second input JTL208 and the second data input signal DATA2 through the second input transformer 270. IN2 The circuit 268 in Figure 2T is shown to function when the magnetic flux is injected into the ring 202 by only this. In the example in Figures 2U to 2Z, the first magnetic flux injector JJ_J IN1 Therefore, no magnetic flux is injected into ring 202. Figure 2U shows the superconducting loop current 274 output from the second input JTL208 as a result of introducing a positive SFQ pulse to the second data input DATA2. The superconducting loop current 274 induces a loop current 276 through the second input transformer 270. Second injector JJ_J IN2 When sufficient DC and AC bias conditions are provided, the loop current 276 drives the second injector JJ_J IN2is triggered in the negative direction, and as shown in FIG. 2V, the loop current 276 propagates into the ring 202 as the loop current 278. Thus, the second injector JJ_J IN2 is the secondary inductor of the second input transformer 270 and the second injector JJ_J IN2 puts one negative magnetic flux quantum into the ring 202 while extinguishing the loop current 276 circulating in the loop including it.

[0047] When sufficient DC and AC bias conditions are applied to the third ring JJ_J3, the loop current 278 is combined with the bias from the 180° resonator tap AC3 to trigger the third ring JJ_J3 in the negative direction (towards the inside of the ring 202), so that, as shown in FIG. 2W, the loop current 278 advances clockwise on the ring 202 as the loop current 280.

[0048] At approximately 1 / 4 of the AC clock cycle after the loop current 278 (shown in FIG. 2V) has advanced on the ring 202 as the loop current 280 (shown in FIG. 2W), the DC and AC bias conditions can be sufficient for the fourth ring JJ_J4 to be triggered in the negative direction (towards the inside of the ring 202). The loop current 280 is combined with the bias from the 270° resonator tap AC4 to trigger the fourth ring JJ_J4 in the negative direction, so that, as shown in FIG. 2X, the loop current 280 advances clockwise on the ring 202 as the loop current 282. Also, FIG. 2X shows that at approximately 1 / 2 of the AC clock cycle after the second input signal DATA2 has introduced the loop current 274, thereby inducing the loop current 276 through the introduction of the first SFQ pulse through the second input JTL208, the second input signal DATA2 can introduce the loop current 284, thereby inducing the loop current 286 through the introduction of the second input SFQ pulse opposite to the first input SFQ pulse through the second input JTL208. For example, if the first SFQ pulse (FIG. 2U) is a positive SFQ pulse, the second mutual SFQ pulse (FIG. 2X) can be a negative SFQ pulse. However, the second injector JJ_J IN2The bias conditions at point X are not sufficient to allow loop current 286 to flow into ring 202. Therefore, loop currents 284 and 286 remain in place as shown in Figure Y.

[0049] For approximately one-quarter of the AC clock cycle after the loop current 280 has advanced clockwise along ring 202 as loop current 282, the DC and AC bias conditions are as follows: IN2 This is sufficient to trigger in the negative direction (towards the inside of ring 202). The loop current 282, combined with the bias from the 0° resonator tap AC1, triggers the first ring JJ_J1, causing the loop current 282 to advance clockwise along ring 202 as loop current 288, as shown in Figure 2Y.

[0050] Approximately one-quarter of an AC clock cycle later, the DC and AC bias conditions become sufficient to trigger the second ring JJ_J2 in the negative direction (towards the inside of ring 202). The loop current 288, combined with the bias from the 90° resonator tap AC2, triggers the second ring JJ_J2, causing the loop current 288 to proceed clockwise along ring 202 as a loop current, but this loop current triggers the second injector JJ_J IN2 It is not shown in Figure 2Z because it is extinguished by a non-triggered (positive trigger). Also, the second injector JJ_J IN2 The non-triggered state also eliminates loop currents 286 and 284. The resulting circuit state is shown in Figure 2Z, in which case there is no substantial loop current remaining in ring 202, and all rings JJ_J1, J2, J3, and J4 are set to a negative 2π radian phase.

[0051] In each of Figures 2U to 2Z, as the loop currents 278, 280, 282, and 288 advance through ring 202, more positive magnetic flux is generated in the load inductor L. LOAD The magnetic flux is accumulated by (the positive sign of the magnetic flux is directed from the center of ring 202 toward ground towards the load inductor LLOAD (defined by the current flowing through it). If the second data input signal DATA2 remains logic high (for example, if the mutual SFQ pulse continues to be introduced through the second input JTL208), the cycle of flux inflow and propagation through ring 202 is repeated (as shown in Figures 2U to 2Z), until more positive flux reaches compliance of ring 202 and load inductor L LOAD It is stored inside. However, if the second data input signal DATA2 is not logically high, further magnetic flux is not accepted by ring 202, and therefore further positive magnetic flux is not accepted by the load inductor L LOAD It is not stored.

[0052] In some examples, the process shown in Figures 2U to 2Z is ​​performed by the process shown in Figures 2B to 2H, for example, to load the inductor L LOAD It can be used to release the negative magnetic flux that has been previously accumulated in the load inductor L. In another example, the process shown in Figures 2U to 2Z involves a precisely controlled amount of positive magnetic flux in the load inductor L. LOAD It can be used to store load inductor L. LOAD After accumulating the desired amount of positive magnetic flux, for example, load the inductor L to another part of the RQL circuit on the same IC as circuit 268. LOAD The load inductor L is transformed into a transformer-coupled unit. LOAD By transferring the positive magnetic flux accumulated in the load inductor L to other parts of the RQL circuit, LOAD A positive magnetic flux, accumulated to precisely the desired amount, can be emitted.

[0053] In some examples (not shown), by providing two second data input paths (each for storage) and a second data input transformer 210 or 270 as a triple inductor transformer that couples both the storage input and the discharge input to the magnetic flux pump DAC, for example, the circuit 200 in Figure 2A and the circuit 268 in Figure 2T can be combined.

[0054] In the exemplary circuits 200 and 268 in Figures 2A and 2U, only four ring JJs, only two injector JJs, and only four phases of the AC clock are used, respectively, with the AC clock phases separated from each other by approximately 90°. Therefore, in the exemplary circuits 200 and 268 in Figures 2A and 2U, in the illustrated example, the magnetic flux quantum is 0 to 2 in a single AC clock cycle for the load inductor L LOAD It can accumulate therein. Other exemplary flux pump DAC circuits may use five or more ring JJs, three or more injector JJs, and / or five or more phases of an AC clock, and the AC clock phases may be separated from each other by less than about 90°. For example, in a flux pump DAC (not shown) having eight ring JJs and four injector JJs, each of its ring JJs may be biased by an AC clock separated by 45° phase. Thus, in such exemplary circuits, 0 to 4 flux quanta may be injected into its rings in a single AC clock cycle. The flux quanta injected into the rings of such exemplary circuits may be separated from each other by ring JJs separated by 45° phase so that all injected flux quanta can propagate along the rings without interfering with each other.

[0055] Figure 3 shows the load inductor L in circuit 268 of Figure 2T as a function of time for an AC clock that is continuously driven from time 0 to time 10 nanoseconds using, for example, an AC clock frequency of approximately 5 gigahertz. LOAD A graph of an exemplary current flowing through the load inductor L is shown. The first input signal DATA1 is the load inductor L LOAD To precisely control and store negative magnetic flux, it is set to logic high for approximately 2.75 nanoseconds to approximately 4.25 nanoseconds. The second input signal DATA2 is the load inductor L LOAD To precisely control the emission of negative magnetic flux, it is set to logic high for approximately 5.8 nanoseconds to approximately 7.75 nanoseconds. Before approximately 2.75 nanoseconds, after approximately 7.75 nanoseconds, and between approximately 4.25 nanoseconds and approximately 7.75 nanoseconds, both input signals DATA1 and DATA2 are set to logic low. Thus, Figure 3 shows the first injector (e.g., JJ_J in Figure 2T). IN1When data is applied to the input of the DAC268, the flux pump increases by one step each clock cycle (one negative flux quantum) in its load inductor L LOAD (accumulates in), and a second injector (for example, JJ_J in Figure 2T) IN2 When data is applied to the input of the first injector and the data input to the first injector is turned off, the flux pump DAC268 drops down one step per clock cycle (one negative flux quantum) to its load inductor L LOAD This indicates that (it is emitted from). The 4-injector flux pump DAC (not shown) can operate at twice the maximum flux accumulation rate of the 2-injector flux pump DAC268, and therefore the DAC can be raised or lowered by two steps per clock cycle.

[0056] Figure 4 shows a method 400 for injecting multiple flux quanta in a flux pump DAC. During an AC clock cycle (e.g., a cycle of the AC clock in an RQL system), one flux quantum is injected into the JTL ring of the flux pump via a first injector (402). The JTL ring may include, for example, at least four JJs (e.g., the ring JJ_J1, J2, J3, J4 in Figure 2A). For example, the first injector is the first injector JJ (e.g., JJ_J in Figure 2A) into the JTL ring. IN1 ) may also be provided with associated transformer circuitry (e.g., transformer 206 in Figure 2A) and / or data supply circuitry (e.g., JTL204 in Figure 2A). In the same AC clock cycle, a second flux quantum is injected into the JTL ring via a second injector in the JTL ring (404). For example, the second injector is a second injector JJ (e.g., JJ_J in Figure 2A) into the JTL ring. IN2The system may further include an associated transformer circuit (e.g., transformer 210 in Figure 2A) and / or a data supply circuit (e.g., JTL208 in Figure 2A). The first and second injectors may be biased, for example, by different (e.g., opposite) phases of an AC clock. The injection (402, 404) provides a load inductor (e.g., load inductor L in Figure 2A) coupled to the JTL ring. LOAD A magnetic flux is accumulated (406) in the load inductor. The injection (402, 404) and flux accumulation (406) may be repeated in subsequent cycles of the AC clock until a desired amount of magnetic flux is accumulated (408) in the load inductor or until compliance of the JTL ring is reached (408). Once the desired amount of magnetic flux is accumulated or compliance of the JTL ring is reached, the magnetic flux accumulated in the load inductor may be released (410) by transformer coupling the flux to a target RQL circuit on the same IC as the magnetic flux pump JTL ring. In other exemplary methods similar to method 400 in Figure 4, additional (e.g., third, fourth, etc.) magnetic flux quanta may be injected into the JTL ring via additional (e.g., third, fourth, etc.) injectors in the JTL ring during the same clock cycle in which the first and second magnetic flux quanta are injected into the JTL ring.

[0057] A flux pump DAC that injects multiple flux quanta, as described herein, can be used to program a ramp waveform based on whether a logic high data signal is present in each of its respective injectors. The presence or absence of a logic high data signal in a given injector determines how many steps the DAC increases in a given clock cycle, thus enabling the programming of complex flux ramp waveforms using RQL logic. Thus, a flux pump DAC that injects multiple flux quanta, as described herein, can generate patterns that are not purely linear ramps and may have additional complexity that can enhance the effectiveness of the DAC in sensitive environments. Such features may be useful, for example, when using a DAC to adiabatically change the applied bias over a certain period of time. By rapidly ramping, decelerating at a critical point, and then rapidly ramping again, adiabaticity is maintained while reducing the ramp time.

[0058] Figure 5 illustrates a method 500 for variable-speed flux ramping by injecting multiple flux quanta in a flux pump DAC. In a single AC clock cycle (e.g., the AC clock cycle of an RQL system), first and second injectors in the JTL ring of the flux pump are activated (502) so that both inject a single flux quantum into the JTL ring in that AC clock cycle. This activation can be performed by supplying, for example, logic high data signals as inputs to the injectors via data inputs JTL204,208 in the exemplary circuit of Figure 2A. As a result of the activation (502) of the injectors, flux quanta are injected into the JTL ring of the flux pump, which may include, for example, at least four JJs (e.g., rings JJ_J1, J2, J3, J4 in Figure 2A). For example, the first injector injects a first injector JJ into the JTL ring (e.g., JJ_J in Figure 2A). IN1) may also be provided with associated transformer circuitry (e.g., transformer 206 in Figure 2A) and / or data supply circuitry (e.g., JTL204 in Figure 2A). For example, the second injector may be a second injector JJ (e.g., JJ_J in Figure 2A) within the JTL ring. IN2 The circuit may further include associated transformer circuits (e.g., transformer 210 in Figure 2A) and / or data supply circuits (e.g., JTL 208 in Figure 2A). The first and second injectors may be biased, for example, by different (e.g., opposite) phases of the AC clock. By injection (502), flux is accumulated (504) in a load inductor (e.g., load inductor LLOAD in Figure 2A) coupled to the JTL ring at a rate based on the number of activated injectors. In subsequent AC clock cycles, one of the injectors (e.g., the second injector) is stopped (506) to reduce the flux accumulation rate. This stopping (506) and deceleration of flux accumulation may be timed to occur at a critical point in the circuit operation, for example, to maintain or increase the adiabatic properties of the circuit. Stopping (506) can be performed, for example, by controlling the supply of a logic raw data signal as input to the injector to be stopped, via the corresponding one of the data inputs JTL204,208 in the exemplary circuit of Figure 2A. A second injector is then reactivated (508), thereby allowing flux accumulation to resume at an increased rate. Flux injection and accumulation can be repeatedly continued in subsequent cycles of the AC clock until a desired amount of flux is accumulated in the load inductor (510) or until compliance of the JTL ring is reached (510). Once the desired amount of flux is accumulated or compliance of the JTL ring is reached, the flux accumulated in the load inductor can be released (512), for example, by transformer coupling the flux to a target RQL circuit on the same IC as the flux pump JTL ring. In other exemplary methods similar to method 500 in Figure 5, additional (e.g., third, fourth, etc.) injectors can be controllably activated and stopped to allow for complex ramp shapes of flux accumulation.

[0059] Figure 6 shows a method 600 for controlling the accumulation and emission of magnetic flux in a magnetic flux pump DAC using the injection of multiple magnetic flux quanta. Positive magnetic flux quanta are injected into the JTL ring (602) via a first injector in the JTL ring of the magnetic flux pump. The JTL ring may include, for example, at least four JJs (e.g., rings JJ_J1, J2, J3, J4 in Figure 2T). For example, the first injector is the first injector JJ (e.g., JJ_J in Figure 2T) into the JTL ring. IN1 The JTL ring may also include a related transformer circuit (e.g., transformer 206 in Figure 2T) and / or a data supply circuit (e.g., JTL204 in Figure 2T). Negative flux quanta are then injected into the JTL ring (604) via a second injector in the JTL ring. For example, the second injector is a second injector JJ (e.g., JJ_J in Figure 2T) in the JTL ring. IN2 The system may further include associated transformer circuits (e.g., transformer 270 in Figure 2T) and / or data supply circuits (e.g., JTL208 in Figure 2T). The first and second injectors may be biased, for example, by different (e.g., opposite) phases of AC clocks, for example, RQL-AC clocks. By injection (602, 604), a load inductor coupled to the JTL ring (e.g., load inductor L in Figure 2T) is supplied. LOADMagnetic flux is accumulated in the load inductor and released from it. The injection (602, 604) and magnetic flux accumulation may be repeated in subsequent AC clock cycles until a desired amount of magnetic flux is accumulated in the load inductor (608) or until compliance of the JTL ring is reached (608). Once the desired amount of magnetic flux is accumulated or compliance of the JTL ring is reached, the magnetic flux accumulated in the load inductor may be released (610) by transformer coupling the magnetic flux to a target RQL circuit on the same IC as the magnetic flux pump JTL ring, for example. If the desired amount of magnetic flux is not accumulated, it may be determined whether there is too much accumulated magnetic flux. If it is determined to be too much, the injection of negative magnetic flux quanta (604) may be repeated, while if it is determined to be too little, the injection of positive magnetic flux quanta (602) may be repeated until the desired amount of magnetic flux is accumulated. In the exemplary method in Figure 6, a single magnetic flux quantum may be injected into the ring in each AC clock cycle. In other exemplary methods similar to the method in Figure 6, multiple flux quanta may be injected into the JTL ring in the same clock cycle via additional (e.g., third, fourth, etc.) injectors in the JTL ring.

[0060] As described herein, a flux pump DAC that injects multiple flux quanta, such as those shown in Figures 1, 2A, and 2T, can be used as a source for delivering a precisely programmed amount of magnetic flux to a target portion of a superconducting circuit. The flux pump DAC, such as those shown in Figures 1, 2A, or 2T, injects digital data supplied by input signals DATA1 and DATA2 into a load inductor L LOAD It can be converted into an internal circulating current. And the load inductor L LOADThe mutual inductance located between the flux pump DAC and the target circuit can supply its circulating current as flux to the target circuit on an integrated circuit, including both the flux pump DAC and the target circuit. Thus, a precisely programmed amount of flux can be supplied to the integrated circuit as a flux source, as described above, without the need to use a probe connected to a current source outside of a cryogenic space, or without the need to spatially or thermally accommodate such a probe. The flux pump DAC injecting multiple flux quanta described herein can inject flux from multiple points along its ring, and therefore can accumulate flux at a faster and more variable speed (e.g., a controllably variable speed) than a flux pump DAC having only one injection point. Thus, the flux pump DAC injecting multiple flux quanta described herein can increase the maximum current ramp speed compared to a flux pump DAC injecting a single flux quantum, even when operating at the same clock frequency with the same load inductance. The flux pump DAC injecting multiple flux quanta described herein may have, for example, a precisely controlled flux storage ramp shape to maintain or improve the thermal insulation of the circuit.

[0061] The above description is an example of the present invention. Naturally, for the purpose of illustrating the present invention, it is impossible to describe every conceivable combination of components or methods; however, those skilled in the art will recognize that many further combinations and permutations of the present invention are possible. Therefore, the present invention is intended to encompass all such changes, modifications, and variations that fall within the scope of this application, including the claims. Furthermore, where this disclosure or the claims enumerate "one," "first," or "another" element or its equivalent, it should be interpreted as including one or more such elements, and not as requiring or excluding more than one such element. As used herein, the terms "includes" and "contains" mean including but not limited to it. The term "based on" means at least partially based on it.

Claims

1. A magnetic flux pump DAC (digital-to-analog converter), A ring of a JTL (Josephson transmission line) stage, the ring of the JTL stage including first and second injectors JJ (Josephson junctions) each configured to inject magnetic flux into the ring, A load inductor is coupled to a plurality of rings JJ of the aforementioned ring and configured to store the magnetic flux injected into the ring, A magnetic flux pump DAC equipped with this.

2. The ring of the JSL stage is A first ring JJ is connected between the first outer ring node and the inner ring node, A first ring inductor coupled between the first outer ring node and the second outer ring node, A second ring JJ is coupled between the second outer ring node and the inner ring node, A second ring inductor coupled between the second outer ring node and the third outer ring node, A third ring JJ is coupled between the fourth outer ring node and the inner ring node, A third ring inductor coupled between the fourth outer ring node and the fifth outer ring node, A fourth ring JJ is coupled between the fifth outer ring node and the inner ring node, A fourth ring inductor coupled between the fifth outer ring node and the sixth outer ring node, A magnetic flux pump DAC according to claim 1, including the above.

3. The first injector JJ is coupled between the sixth outer ring node and the first outer ring node, The magnetic flux pump DAC according to claim 2, wherein the second injector JJ is coupled between the third outer ring node and the fourth outer ring node.

4. The first ring JJ is biased by a 0° phase AC clock supplied by a first bias tap coupled to the first outer ring node. The second ring JJ is biased by a 90° phase of the AC clock supplied by a second bias tap coupled to the second outer ring node. The third ring JJ is biased by a 180° phase of the AC clock supplied by a third bias tap coupled to the fourth outer ring node. The flux pump DAC according to claim 2, wherein the fourth ring JJ is biased by a 270° phase of the AC clock supplied by a fourth bias tap coupled to the fifth outer ring node.

5. The first injector JJ is coupled between the sixth outer ring node and the first outer ring node, The magnetic flux pump DAC according to claim 4, wherein the second injector JJ is coupled between the third outer ring node and the fourth outer ring node.

6. A first input transformer having a first secondary inductor coupled between the first outer ring node and the sixth outer ring node, and coupling a first input control magnetic flux to the first injector JJ, A second input transformer having a second secondary inductor coupled between the third outer ring node and the fourth outer ring node, and coupling a second input control magnetic flux to the second injector JJ, The magnetic flux pump DAC according to claim 5, further comprising the above.

7. A first input JTL is coupled to the first primary inductor of the first input transformer and configured to transmit a first input control signal to the first injector JJ, A second input JTL is coupled to the second primary inductor of the second input transformer and configured to transmit a second input control signal to the second injector JJ, The magnetic flux pump DAC according to claim 6, further comprising:

8. A first DC bias transformer having a third secondary inductor coupled between the first outer ring node and the sixth outer ring node, and configured to supply DC bias to the first injector JJ, A second DC bias transformer having a fourth secondary inductor coupled between the third outer ring node and the fourth outer ring node, and configured to supply a DC bias to the second injector JJ, The magnetic flux pump DAC according to claim 6, further comprising:

9. The magnetic flux pump DAC according to claim 8, further comprising a DC bias line having the first primary inductor of the first DC bias transformer and the second primary inductor of the second DC bias transformer in series.

10. The magnetic flux pump DAC according to claim 1, further comprising third and fourth injectors JJ within the ring, each of the third and fourth injectors JJ configured to inject magnetic flux into the ring.

11. An RQL (reciprocal quantum logic) system comprising a magnetic flux pump DAC according to claim 1, manufactured on an RQL-IC (reciprocal quantum logic integrated circuit), in an extremely low-temperature space, A target RQL circuit on the RQL-IC, which is inductively coupled to the load inductor and configured to receive the magnetic flux accumulated by the load inductor, One or more bias signal generators located outside the cryogenic low-temperature space and coupled to the RQL-IC, the one or more bias signal generators that generate a plurality of bias signals including a first clock AC bias signal, a second clock AC bias signal which is 90° out of phase with the first clock AC bias signal, and at least one DC bias signal, An RQL system equipped with [features / equipment].

12. A method for injecting multiple magnetic flux quanta, In the AC clock cycle, a first magnetic flux quantum is injected into the JTL (Josephson transmission line) ring of the magnetic flux pump via a first injector in the JTL ring. In the AC clock cycle, a second magnetic flux quantum is injected into the JTL ring via a second injector in the JTL ring, and The first and second magnetic flux quanta are accumulated in the load inductor coupled to the JTL ring, thereby increasing the amount of magnetic flux accumulated in the load inductor. A method for providing this.

13. The AC clock cycle is a first AC clock cycle, and the method is Based on the fact that the desired amount of magnetic flux has not been accumulated in the load inductor and compliance of the JTL ring has not been achieved, in the second AC clock cycle, third and fourth magnetic flux quanta are injected into the JTL ring through the first and second injectors, respectively, and The third and fourth magnetic flux quanta are accumulated in the load inductor coupled to the JTL ring, thereby increasing the amount of magnetic flux accumulated in the load inductor. The method according to claim 12, further comprising:

14. The method according to claim 13, further comprising discharging the magnetic flux accumulated in the load inductor to a target circuit based on the accumulation of the desired amount of magnetic flux in the load inductor or the achievement of compliance of the JTL ring.

15. The method according to claim 12, wherein the first and second injectors are AC biased by first and second AC clock signals that are 180° out of phase with respect to each other.

16. In the AC clock cycle, a third magnetic flux quantum is injected into the JTL ring via a third injector in the JTL ring. In the AC clock cycle, a fourth magnetic flux quantum is injected into the JTL ring via a fourth injector in the JTL ring, and The third and fourth magnetic flux quanta are accumulated in the load inductor coupled to the JTL ring, thereby increasing the amount of magnetic flux accumulated in the load inductor. The method according to claim 12, further comprising:

17. The first and second injectors are AC biased by first and second AC clock signals that are 180° out of phase with respect to each other. The method according to claim 16, wherein the third and fourth injectors are AC biased by third and fourth AC clock signals that are 180° out of phase with respect to each other.

18. A method of variable-speed magnetic flux ramping using injection of multiple magnetic flux quanta, Activating first and second injectors in a JTL (Josephson transmission line) ring of a magnetic flux pump, wherein both the first and second injectors inject a single magnetic flux quantum into the JTL ring in a single AC clock cycle. The injected single magnetic flux quantum is accumulated as magnetic flux in the load inductor coupled to the JTL ring at a magnetic flux accumulation rate based on the number of activated injectors, and To stop the second injector and slow down the magnetic flux accumulation rate of the load inductor, A method for providing this.

19. The method according to claim 18, further comprising reactivating the second injector to increase the magnetic flux accumulation rate.

20. The activation or reactivation of the first injector or the second injector is by supplying a logic-high RQL (reciprocal quantum logic) data signal containing an SFQ (single flux quantum) pulse to the corresponding one of the first and second injectors. The method according to claim 19, wherein stopping the first injector or the second injector is by supplying a logical row RQL data signal to the corresponding one of the first and second injectors.

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