Security barrier and a scalable method for forming it

Abstract

According to non-limiting embodiments, a method is provided for forming a security barrier for an electronic device (104) under protection. The method includes depositing a deformable dielectric material layer (102) on the electronic device (104) under protection, and converting a portion of the deformable dielectric material layer into at least one electrical circuit structure (110, 111) having at least one measurable electrical property. The method further includes depositing a thermally stabilized material layer (112) on the deformable dielectric material layer (102).

Description

Technical Field

[0005]

[0001] Cross - Reference to Related Applications This application claims the benefit of U.S. Application No. 18 / 315035, filed on May 10, 2023, which is hereby incorporated by reference in its entirety.

[0002] This application relates to security barriers and scalable methods for forming them.

Background Art

[0003] This disclosure relates to anti - tampering technology, and more specifically, to a protective physical barrier having measurable electrical characteristics capable of indicating unauthorized access for inspecting and / or modifying a device under protection. The inspection may include, for example, imaging aimed at forging a device under protection. The modification may include, for example, replacing components with fake components that may have inferior performance and quality. The modification may also include a device for the purpose of recording intellectual property embodied as software, firmware, or data present in a device under protection. For example, a counterfeit device equipped with malware that collects information without the product owner's knowledge may be installed. Signs of unauthorized access can be used, for example, to evaluate the integrity of a system, as evidence of theft of intellectual property, or to indicate deficiencies in the provenance of a device.

Summary of the Invention

[0004] According to non - limiting embodiments, a method for forming a security barrier for an electronic device under protection is provided. The method includes depositing a deformable dielectric material layer on the electronic device under protection and converting a target portion of the deformable dielectric material layer into at least one electrical circuit structure having at least one measurable electrical characteristic. The method further includes depositing a thermally stable material layer on the deformable dielectric material layer.

[0005] According to any of the prior embodiments, forming a security barrier involves establishing a mixing ratio of conductive nanoparticles to electrically insulating nanoparticles in a deformable dielectric material layer.

[0006] According to one of the prior embodiments, the conductive nanoparticles include silver (Ag) nanoparticles, and the electrically insulating nanoparticles include barium strontium titanate (BST) nanoparticles.

[0007] According to one of the prior embodiments, the deformable dielectric material layer is cured at 80 degrees Celsius for 15 minutes.

[0008] According to any of the prior embodiments, transforming a portion of a deformable dielectric material layer involves performing a selective laser sintering (SLS) process to irradiate the deformable dielectric material layer with laser energy to transform the portion into at least one electrical circuit structure.

[0009] According to one of the prior embodiments, laser energy melts conductive nanoparticles together to form conductive paths that define at least one electrical circuit structure.

[0010] According to one of the prior embodiments, the electrically insulating nanoparticles electrically insulate at least one electrical circuit structure from the rest of the deformable dielectric material layer.

[0011] According to one of the prior embodiments, the thermally stabilized material layer includes nanoparticles that prevent the formation of additional conductive paths within the deformable dielectric material layer.

[0012] According to any of the prior embodiments, the nanoparticles include boron nitride (BN) nanoparticles.

[0013] According to any of the prior embodiments, the thermally stabilized material layer reduces at least one of the amount and size of voids present in the deformable dielectric material layer.

[0014] According to any of the prior embodiments, reducing the amount of voids includes filling the voids with polymerized trimethylolpropaneethoxylate triacrylate.

[0015] According to one of the prior embodiments, the heat-stabilized layer is cured by ultraviolet (UV) exposure to suppress further changes to the security barrier layer at temperatures below 250 degrees Celsius.

[0016] According to non-limiting embodiments, a security barrier for an electronic device under protection is provided. The security barrier includes a deformable dielectric material layer on the electronic device under protection. The deformable dielectric material layer includes a plurality of conductive nanoparticles and a plurality of insulating nanoparticles. The security barrier further includes at least one electrical circuit structure and a thermal stabilization material layer. The at least one electrical circuit structure includes a portion of the conductive nanoparticles and has at least one measurable electrical property. The thermal stabilization material layer covers the deformable dielectric material layer, which includes the at least one electrical circuit structure.

[0017] According to any of the prior embodiments, at least one measurable electrical characteristic changes in response to a change in the electrical circuit structure.

[0018] According to any of the prior embodiments, at least one measurable electrical characteristic includes at least one of resistance, capacitance, and inductance.

[0019] According to one of the prior embodiments, at least one electrical circuit structure is located in a target portion of the deformable dielectric material layer, and insulating nanoparticles electrically insulate the at least one electrical circuit structure from the rest of the deformable dielectric material layer.

[0020] According to any of the prior embodiments, the deformable dielectric material layer includes other electrical circuit structures.

[0021] According to any of the preceding embodiments, the conductive nanoparticles include silver (Ag) nanoparticles, and the electrically insulating nanoparticles include barium strontium titanate (BST) nanoparticles.

[0022] According to any of the preceding embodiments, the thermally stabilizing material layer includes a boron nitride (BN) material and a polymerized trimethylolpropane ethoxylate triacrylate material.

[0023] According to any of the preceding embodiments, a deformable dielectric material layer and a thermally stabilizing material layer are combined to establish a composite substrate including a combination of Ag particles, BST particles, and BN particles.

[0024] Further features and advantages are realized through the technology of the present disclosure. In this specification, other embodiments and aspects are described in detail and are considered part of the disclosure recited in the claims. Refer to the description and the drawings to better understand the present disclosure with its advantages and features.

[0025] Here, to understand the present disclosure more fully, please refer to the following brief description in connection with the accompanying drawings and detailed description. Like reference numerals represent like parts.

Brief Description of the Drawings

[0026] [Figure 1A] An electronic device after deposition of a deformable dielectric material layer according to a non-limiting embodiment of the present disclosure is shown. [Figure 1B] A deformable dielectric material layer formed on the surface of an electrical device according to a non-limiting embodiment of the present disclosure is shown. [Figure 2A] The deformable dielectric material of FIG. 1 undergoing a laser sintering process applied to the deformable dielectric material layer to convert a part of the deformable dielectric material layer into an electrical circuit structure according to a non-limiting embodiment of the present disclosure is shown. [Figure 2B]Shows a deformable dielectric material layer after a laser sintering process that converts a portion of the deformable dielectric material layer into an electrical circuit structure, according to a non-limiting embodiment of the present disclosure. [Figure 2C] Shows an example of an electrical circuit structure that is a converted portion of a deformable dielectric material layer, according to a non-limiting embodiment of the present disclosure. [Figure 3A] Shows the electrical circuit structure of FIG. 2 after depositing a thermally stabilized ink on a deformable dielectric material layer having the electrical circuit structure, according to a non-limiting embodiment of the present disclosure. [Figure 3B] Shows a thermally stabilized ink deposited on a deformable dielectric material layer having an electrical circuit structure and having undergone a curing process. [Figure 4A] Shows the measurement of a converted electrical circuit structure present in an unmodified barrier layer, according to a non-limiting embodiment of the present disclosure. [Figure 4B] Shows the measurement of a converted electrical circuit structure present in a modified barrier layer, according to a non-limiting embodiment of the present disclosure. [Figure 5] Is a flowchart showing a method of manufacturing a security barrier layer, according to a non-limiting embodiment of the present disclosure.

Mode for Carrying Out the Invention

[0027] Conventional solutions for creating security barriers with measurable electrical properties can be divided into two categories: (1) attaching a pre-fabricated security barrier to an electronic assembly containing the device under protection, or (2) depositing one or more layers of material that combine to form a security barrier covering the device under protection. Solutions in the first category typically involve individually pre-fabricating physical structures containing electrical circuit elements (and possibly other functions) and then (mechanically and electrically) attaching these pre-fabricated structures to a circuit card assembly (CCA) to cover or surround the target device and interconnects. The first-category approach also typically requires customization of the design of the electronic assembly containing the device under protection in order to incorporate electrical and mechanical interfaces into the pre-fabricated cover. Practical applications of the first-category approach are currently limited to barrier structures at the CCA scale. However, applications may be extended to include barrier structures attached by three-dimensional heterogeneous integration (3DHI) fabrication methods. The usefulness of solutions in this first category may be limited by considerations of size, weight, power, and cost (SWaP-C).

[0028] Solutions in the second category typically utilize material layers (sometimes including electrical circuit elements and other functions) deposited through a fabrication or manufacturing process to cover or surround the target device and interconnects. One or more combined layers exhibit measurable electrical / mechanical properties used to form a protective barrier for the device under protection. The deposition methods used in solutions in the second category are diverse and include, for example, 3D printing of conductive or resistive inks to create circuit structures and photolithography for depositing metal layers in integrated circuit manufacturing processes.

[0029] Various non-limiting embodiments of this disclosure provide protective physical barriers and methods for manufacturing the same, having measurable electrical properties capable of indicating unauthorized access to inspect and / or modify a device under protection. The security barrier comprises, for example, a deformable or variable dielectric material, such as silver-barium-strontium-tiana (Ag-BST) ink. A sintering process is then applied to the variable dielectric material so that a selected portion of the dielectric material is converted into a conductive structure or structure having measurable electrical properties such as resistance, capacitance, or inductance, which can be incorporated into an electrical circuit. The sintering process can be achieved, for example, using laser energy. The sintering process aims to produce a conductive structure such that tampering or other unauthorized attempts to physically access a device under protection alters or damages the structure, resulting in a measurable change in the electrical properties of the structure. The electrical properties of the structure formed by the aforementioned process can be measured by various means, for example, by incorporating the structure into an electrical circuit and comparing the circuit's electrical response to its expected electrical response (established in the early stages of manufacturing). In this way, the Disclosure provides a method for fabricating a security barrier by selectively converting a portion of a dielectric material layer into a conductive structure having measurable electrical properties that change when a malicious actor attempts to access a device under protection.

[0030] The security barrier methods described herein scale to individually solve a wider range of problems than those that can be individually solved by conventionally known methods. Regarding size, for example, the material properties of the dielectric ink layer described above allow for sintering into conductive structures to fabricate security barriers for small devices such as security barriers covering the back surface of semiconductor dies, as well as security barriers for larger assemblies such as single-board computers and CCAs. One or more methods described herein are applicable to a variety of electrical devices and components, including but not limited to microelectronics manufacturing wafers, substrate-mounted dies, printed circuit board (PCB) layers, packaged (lidded) components, and CCAs, and can be used to create security barriers for off-the-shelf (COTS) devices or assemblies, as well as custom microelectronic devices or assemblies. Regarding the product lifecycle, for example, the method can be applied during microelectronics wafer processing, during PCB manufacturing steps (to form a security barrier directly beneath the device), or in a completed microelectronic assembly. Furthermore, for a single microelectronic assembly or device, the method scales to enable the creation of a single security barrier or multiple spatially distributed security barriers of different sizes. Furthermore, since the variations in the converted circuitry can be controlled through the sintering process (for example, software used by the sintering tool), component-specific variations can be achieved at the inter-component and inter-CCA levels during wafer manufacturing.

[0031] Next, moving to Figures 1A and 1B, an electronic device 100 is shown after a deformable dielectric material 102 has been deposited on a surface 104, according to an embodiment not limited to the present disclosure. As described herein, the electronic device 100 to be processed may include, but is not limited to, a microelectronics manufacturing wafer, a substrate-mounted die, a PCB layer, a packaged and / or covered component, an integrated circuit (IC) chip, and a circuit card assembly.

[0032] In Figures 1A and 1B, the deformable dielectric material 102 is shown as the "insulating phase," which is the state present before the application of the sintering process, as will be described in more detail below. Various deposition methods can be used to deposit the deformable dielectric material onto the surface 104 of the electronic device, including but not limited to direct writing and printing, spin coating, or spraying. Although a single layer of the deformable dielectric material 102 is shown, it should be understood that additional layers of deformable dielectric material can be deposited on the device 100 without departing from the scope of the present invention.

[0033] Continuing to refer to Figure 1B, the deformable dielectric material is also called a “deformable ink” or “composite functional ink.” In one or more non-limiting embodiments, the deformable dielectric material is a silver-barium-strontium-tianoate (Ag-BST) composite ink, which comprises conductive silver (Ag) nanoparticles 200 and electrically insulating barium strontium titanate (BST) nanoparticles 202 in a certain mixing ratio. According to non-limiting embodiments, the size of the Ag nanoparticles 200 may be, for example, in the range of about 75 nanometers (nm) to about 85 nm, and the size of the BST nanoparticles 202 may be, for example, in the range of about 80 nm to about 100 nm. In one or more non-limiting embodiments, the mixing ratio of Ag nanoparticles 200 to BST nanoparticles 202 may be optimized to obtain an insulating phase when the arrangement of Ag nanoparticles 200 and BST nanoparticles 202 is stabilized after initial deposition on the surface 104 and curing process (e.g., curing at 80 degrees Celsius for 15 minutes).

[0034] Looking at Figure 2A, the deformable dielectric material 102 is shown undergoing a sintering process, after which the sintered material achieves a "high-conductivity phase." The sintering process may include a selective laser sintering (SLS) process in which a selected or targeted portion of the deformable dielectric material 102 is irradiated with laser energy 106 output from a laser sintering tool 108. The laser energy 106 generates a temperature exceeding 150 degrees Celsius (approximately 300 degrees Fahrenheit) at the target point on the deformable dielectric material 102, causing the Ag nanoparticles 200 to dissolve and aggregate, thereby converting the heated portion from an electrically insulating phase to a conductive phase, as shown in Figure 2B. Thus, the selectively converted portion of the deformable dielectric material 102 forms a conductive trace 110 having various measurable electrical properties, such as resistance, capacitance, or inductance, which can be incorporated into an electrical circuit. Figure 2C shows the deformable dielectric material 102 after the laser sintering process. As shown in the figure, the targeted portion of the deformable dielectric material has been converted into a serpentine conductive trace 110 that forms a resistor.

[0035] As described herein, the measurable electrical properties of a conductive trace 110 are derived from the physical properties of the trace (e.g., line width, line thickness), and therefore, if the conductive trace 110 is altered by tampering or other damaging factors, a measurable change occurs in the electrical properties of the conductive trace 110. In this way, a security barrier is formed when a portion of the deformable dielectric material 102 is converted into a conductive trace 110 covering a device under protection using a sintering process, thereby altering the physical properties of the trace 110 due to unauthorized physical access to the device under protection, and consequently altering their electrical properties in a measurable manner. Although a single conductive trace 110 is shown, it should be understood that additional conductive traces can be formed from the deformable dielectric material 102 without departing from the scope of the invention. In addition to the conductive traces, one or more conductive pads 111 may be optionally formed using the method for forming conductive traces described herein. The conductive pads 111 can provide access to electrical measuring tools (e.g., ohmmeters) to facilitate the measurement of the electrical properties of a given trace 110. The conductive pad 111 shown herein represents an example of electrically connecting a conductive trace to another electrical or electronic device using the conductive trace forming method described herein. In one or more non-limiting embodiments, the SLS process described herein can be used to form a conductive trace, which is electrically connected to an existing pad on the substrate device 104.

[0036] In one or more non-limiting embodiments, the laser sintering tool 108 can store a design layout that controls the operation of the laser sintering tool 108. Furthermore, when forming an electrical circuit structure, the operating parameters of the laser sintering tool 108, such as laser energy power, laser wavelength, and raster speed, can be adjusted. In this way, the electrical properties of the conductive trace 110 can be adjusted to achieve the target electrical properties. Furthermore, the target area and / or design of the conductive trace 110 can be selected and formed accordingly. Thus, different types of conductive traces with different types of shapes and contours can be formed.

[0037] In one or more non-limiting embodiments, adjusting the sintering tool operating parameters allows for the formation of wider and / or thicker portions of conductive traces. Traces can be designed to create complex impedances and / or connect to individual electronic components that are part of an assembly. Furthermore, operating parameters can be adjusted to configurable line width, spacing, and trace thickness, enabling the creation of any unique barrier structures that can be used for authentication (integrity) and / or confidentiality strategies. Additionally, the sintering tool 108 can be programmed (e.g., using software) to perform a patterned laser scan, which can be dynamically modified and quickly corrected in response to variations between parts.

[0038] Next, looking at Figures 3A and 3B, the security barrier of Figure 2 is shown after the thermally stabilized ink 112 has been deposited on the deformable dielectric material 102 and the conductive trace 110. The thermally stabilized ink 112 is formed from various non-conductive thermal resistance materials, such as boron nitride (BN), and contains nanoparticles that fill most of the voids in the barrier layer containing the deformable dielectric material 102 and the conductive trace 110. The thermally stabilized ink 112 can be deposited using various deposition techniques, such as direct writing, spin coating, or spraying. After deposition, the thermally stabilized ink 112 undergoes a curing process to harden it. The curing process of the thermally stabilized ink 112 can be achieved by exposing the thermally stabilized ink 112 to ultraviolet (UV) energy. By hardening the thermally stabilized ink 112, changes in the deformable dielectric material 102 and the conductive trace 110 caused by subsequent high-temperature exposure (e.g., solder reflow) are prevented.

[0039] Referring to Figure 3B, the cured heat-stabilized ink 112 is shown in more detail. In this example, the heat-stabilized ink 112 introduces larger BN particles 206 into the voids of the deformable dielectric material 102 having conductive traces 110. After curing, the BN nanoparticles prevent further melting and aggregation of Ag nanoparticles, thereby preventing the formation of additional conductive paths that may occur, for example, due to subsequent thermal exposure, in locations not initially targeted in the initial SLS process, such as non-SLS processed areas of the deformable dielectric material 102. Thus, the combination of the heat-stabilized ink 112 and the deformable dielectric material 102 forms a composite substrate containing a combination of Ag particles 200, BST particles 202, and BN particles 206.

[0040] The UV-cured, heat-stabilized ink reduces the amount of voids present in the deformable dielectric material layer 102 by filling the voids with polymerized trimethylolpropane ethoxylate triacrylate. This minimizes the potential for an increase in the particle size of Ag nanoparticles 200 that may occur when the thermal insulating film 112 is subsequently exposed to a heat source.

[0041] As described herein, an electrical circuit structure 110 created by selectively transforming a deformable dielectric material layer has measurable electrical properties (e.g., resistance, capacitance, current output, voltage output, etc.) that change if the electrical circuit structure within the barrier layer 110 is damaged, tampered with, and / or broken. In this way, the properties of the electrical circuit structure 110 can be measured and compared with its expected electrical properties (e.g., measured during the initial manufacturing of the electrical device) to detect tampering with the electrical device 100.

[0042] In one or more non-limiting embodiments, the electrical properties or characteristics of the conductive trace 110 can be measured by connecting the trace and optionally other circuit elements to a logic device (not shown). This logic device is programmed to excite the resulting electrical circuit and measure its electrical response. Thus, the resulting subsystem can be used to compare the response measured at a point in the system's lifecycle with the measured response recorded during manufacturing.

[0043] According to another embodiment, the conductive trace 110 can be designed to detect open circuits or short circuits that were not present at the time of initial manufacture of the electronic device 100 using electrical measuring instruments (e.g., probes, ohmmeters, voltmeters, etc.). For example, Figure 4A shows an ohmmeter measurement of an undamaged conductive trace 110 present in an untampered barrier layer 102. In this example, the undamaged conductive trace 110 shows a finite resistance measurement Ω. However, Figure 4B shows an ohmmeter measurement of a conductive trace 110 damaged by a tampering event 150. In this example, the ohmmeter indicates the damaged conductive trace as an open circuit (OC). Therefore, it can be determined that unauthorized tampering and / or damage has occurred to the electrical device 100. It should be understood that damage caused by a tampering event may cause the measured resistance value to change from its original value to another finite value, or that a similar change in measurement value caused by a tampering event 150 may be obtained by a different electrical measurement method.

[0044] Turning to Figure 5, a method for manufacturing a security barrier according to a non-limiting embodiment of the present disclosure is shown. The method begins in operation 500, in operation 502, a layer of deformable dielectric material is deposited on the device under protection. As described herein, this layer is formed from a deformable Ag-BST composite ink cured at 80 degrees Celsius for about 15 minutes. In operation 504, one or more target portions of the barrier layer are converted from a dielectric insulating phase to a conductive phase by a sintering process to form a conductive trace that can be incorporated into an electrical circuit(s). As described herein, an SLS process may be performed using laser energy to precisely form the conductive trace. In operation 506, a thermally stabilized ink is deposited on the deformable dielectric material and the conductive trace. In one or more non-limiting embodiments, the thermally stabilized ink is formed from a material comprising polymerized trimethylolpropane ethoxylate triacrylate and BN particles. In operation 508, the thermally stabilized ink is cured (e.g., using UV energy) to fix the conductive trace and prevent further conversion of the deformable dielectric material to a conductive phase. The process ends with operation 510, at which point the electrical structure forms a security barrier over the protected device.

[0045] All means or step-plus-function elements in the following claims are intended to include any structures, materials, or actions for performing a function in combination with other specifically claimed elements. The descriptions in this disclosure are presented for illustrative and explanatory purposes only, and are not intended to be exhaustive or to be limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of this disclosure. The selection and description of embodiments have been made to best illustrate the principles and practical applications of this disclosure and to enable other those skilled in the art to understand the disclosure of various embodiments, along with various modifications suitable for a particular intended use.

[0046] While preferred embodiments of this disclosure have been described, those skilled in the art should understand that various improvements and enhancements, both now and in the future, may be made within the scope of the following claims. These claims should be interpreted as maintaining appropriate protection over the disclosure described initially.

Claims

1. A method for forming a security barrier for an electronic device under protection, Depositing a deformable dielectric material layer on the protected electronic device, To convert the target portion of the deformable dielectric material layer into at least one electrical circuit structure having at least one measurable electrical characteristic, Depositing a thermally stabilized material layer on the deformable dielectric material layer, The method, including the method described above.

2. The method according to claim 1, wherein forming the security barrier includes establishing a mixing ratio of conductive nanoparticles to electrically insulating nanoparticles in the deformable dielectric material layer.

3. The method according to claim 2, wherein the conductive nanoparticles include silver (Ag) nanoparticles, and the electrically insulating nanoparticles include barium strontium titanate (BST) nanoparticles.

4. The method according to claim 2, wherein the deformable dielectric material layer is cured at 80 degrees Celsius for 15 minutes.

5. The method according to claim 2, wherein transforming the target portion of the deformable dielectric material layer includes performing a selective laser sintering (SLS) process to irradiate the deformable dielectric material layer with laser energy to transform the target portion into the at least one electrical circuit structure.

6. The method according to claim 5, wherein the laser energy melts the conductive nanoparticles together to form a conductive path defining the at least one electrical circuit structure.

7. The method according to claim 6, wherein the electrically insulating nanoparticles electrically insulate the at least one electrical circuit structure from the rest of the deformable dielectric material layer.

8. The method according to claim 1, wherein the thermal stabilizing material layer includes nanoparticles that prevent the formation of additional conductive paths within the deformable dielectric material layer.

9. The method according to claim 8, wherein the nanoparticles include boron nitride (BN) nanoparticles.

10. The method according to claim 1, wherein the thermal stabilizing material layer reduces at least one of the amount and size of voids present in the deformable dielectric material layer.

11. The method according to claim 10, wherein reducing the amount of the voids is performed by filling the voids with polymerized trimethylolpropaneethoxylate triacrylate.

12. The method according to claim 11, wherein the heat-stabilizing layer is cured by ultraviolet (UV) exposure to suppress further changes to the security barrier layer at temperatures below 250 degrees Celsius.

13. A security barrier for an electronic device under protection, A deformable dielectric material layer on the protected electronic device, comprising a plurality of conductive nanoparticles and a plurality of insulating nanoparticles, A portion of the conductive nanoparticles and at least one electrical circuit structure having at least one measurable electrical property, A thermally stabilized material layer covering the deformable dielectric material layer, including at least one electrical circuit structure, The security barrier, including the security barrier.

14. The security barrier according to claim 13, wherein the at least one measurable electrical characteristic changes in response to a change in the electrical circuit structure.

15. The security barrier according to claim 14, wherein the at least one measurable electrical characteristic includes at least one of resistance, capacitance, and inductance.

16. The security barrier according to claim 13, wherein the at least one electrical circuit structure is located in a target portion of the deformable dielectric material layer, and the insulating nanoparticles electrically insulate the at least one electrical circuit structure from the rest of the deformable dielectric material layer.

17. The security barrier according to claim 16, wherein the deformable dielectric material layer includes other electrical circuit structures.

18. The security barrier according to claim 13, wherein the conductive nanoparticles include silver (Ag) nanoparticles, and the electrically insulating nanoparticles include barium strontium titanate (BST) nanoparticles.

19. The security barrier according to claim 18, wherein the thermal stabilizing material layer comprises a boron nitride (BN) material and a polymerized trimethylolpropane ethoxylate triacrylate material.

20. The security barrier according to claim 19, wherein the deformable dielectric material layer and the thermally stabilized material layer are combined to establish a composite substrate containing a combination of Ag particles, BST particles, and BN particles.

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