Links to delegated tasks

Abstract

Devices for data processing are provided. The data processing pipeline performs one or more data processing operations. An extension processing circuit associated with the data processing pipeline performs one or more delegated tasks, and an event processing circuit triggers the commencement of execution of one or more delegated tasks and / or at least one of one or more data processing operations based on an event indicated by a link instruction. The extension processing circuit performs one or more delegated tasks asynchronously with respect to the one or more data processing operations performed by the data processing pipeline.

Claims

1. A device for data processing, A data processing pipeline configured to perform one or more data processing operations, An extension processing circuit, associated with the data processing pipeline and configured to perform one or more delegated tasks, The system comprises an event processing circuit configured to cause one or more delegated tasks and / or at least one of the one or more data processing operations to start execution based on an event indicated by a link instruction, An apparatus in which the extended processing circuit is configured to perform the one or more delegated tasks asynchronously with respect to the one or more data processing operations performed by the data processing pipeline.

2. The event is the completion of a process performed by one or more data processing operations or one or more delegated tasks. The apparatus according to claim 1.

3. The one or more delegated tasks are delegated by the data processing pipeline. The apparatus according to claim 1 or 2.

4. The link instruction includes an outbound event field indicating the event, The apparatus according to any one of claims 1 to 3.

5. The decoding circuit is configured to respond to a generate link instruction as a link instruction by generating one or more signals corresponding to the occurrence of the event, causing one or more delegated tasks and / or at least one of the one or more data processing operations to begin execution. The apparatus according to any one of claims 1 to 4.

6. The decoding circuit is configured to respond as a link instruction to a triggered link instruction by generating one or more signals to cause at least one of the one or more delegated tasks and / or the one or more data processing operations to begin execution when the aforementioned event occurs. The apparatus according to any one of claims 1 to 5.

7. A decoding circuit is provided which is configured to respond to a setup command by generating one or more signals for performing the setup of one or more of the one or more data processing operations and / or the one or more delegated tasks, The setup instruction includes an inbound event field configured to indicate the event, The apparatus according to any one of claims 1 to 6.

8. The setup command includes the inbound event field and the outbound event field indicating a further event, and the occurrence of the further event is signaled when one or more data processing operations and / or one of the one or more delegated tasks is completed. The apparatus according to claim 7.

9. The setup command includes the inbound event field and the outbound event field indicating a further event, and the occurrence of the further event is signaled when one of the one or more delegated tasks is completed. The apparatus according to claim 7.

10. The setup instruction includes a register field configured to indicate one or more registers used to transfer data with respect to one or more data processing operations and / or one of the one or more delegated tasks, The apparatus according to any one of claims 7 to 9.

11. The setup instruction includes an immediate field configured to provide information about the one or more delegated tasks and / or at least one type of the one or more data processing operations, The apparatus according to any one of claims 7 to 10.

12. The setup instruction includes a position field configured to provide information about the position of at least one of the one or more delegated tasks and / or the one or more data processing operations, The apparatus according to any one of claims 7 to 11.

13. The aforementioned event is the aforementioned further event, The apparatus according to claim 8 or 9.

14. A decoding circuit is provided which is configured to respond to a synchronization instruction by generating one or more signals to trigger the generation of a merged event in response to the occurrence of multiple events. The apparatus according to any one of claims 1 to 13.

15. The synchronization instruction includes an inbound event field indicating the plurality of events and an outbound event field indicating the merged event, The apparatus according to claim 14.

16. A connection buffer is provided that is configured to pass data between a completion task of one or more delegated tasks and one of the one or more data processing operations or another delegated task of the one or more delegated tasks. The apparatus according to any one of claims 1 to 15.

17. The link instruction includes a register field indicating one or more registers used to transfer data using the connection buffer, The apparatus according to claim 15.

18. At least one of the data processing pipeline and the extended processing circuit is configured to perform multitasking of one or more data processing operations while remaining at the same exception level. The apparatus according to any one of claims 1 to 17.

19. The extended processing circuit includes a storage circuit that stores one or more event dependencies of the one or more delegated tasks and the one or more data processing operations. The apparatus according to any one of claims 1 to 18.

20. The decoding circuit is configured to respond to a reset instruction by generating one or more signals to remove the one or more event dependencies from the memory circuit. The apparatus according to claim 19.

21. A data processing method, Setting up one or more data processing operations in a data processing pipeline, Setting up one or more delegated tasks in an extension processing circuit associated with the aforementioned data processing pipeline, This includes causing at least one of the one or more delegated tasks and one or more data processing operations to begin execution based on an event indicated by a link instruction, A data processing method in which the one or more delegated tasks are executed asynchronously from the one or more data processing operations performed by the data processing pipeline.

22. A computer program for controlling a host data processing device to provide an instruction execution environment, A data processing pipeline program logic configured to perform one or more data processing operations, An extended processing program logic, associated with the aforementioned data processing pipeline program logic and configured to perform one or more delegated tasks, Includes event processing program logic configured to cause one or more delegated tasks and / or at least one of the one or more data processing operations to start execution based on an event indicated by a link instruction, A computer program in which the extended processing program logic is configured to perform the one or more delegated tasks asynchronously with respect to the one or more data processing operations performed by the data processing pipeline program logic.

23. A non-temporary computer-readable medium for storing computer-readable code for the manufacture of devices for data processing, A data processing pipeline configured to perform one or more data processing operations, An extension processing circuit, associated with the data processing pipeline and configured to perform one or more delegated tasks, The system includes an event processing circuit configured to cause one or more delegated tasks and / or at least one of the one or more data processing operations to start execution based on an event indicated by a link instruction, A non-temporary computer-readable medium wherein the extended processing circuit is configured to perform the one or more delegated tasks asynchronously with respect to the one or more data processing operations performed by the data processing pipeline.

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