Display panel and display device

Abstract

To provide a display panel and display device, capable of preventing the area of an opening from being reduced by a repair pattern.SOLUTION: In a display panel and a display device, in more detail, each of first to fourth subpixels includes first to third active patterns arranged on a substrate; the first active pattern is electrically connected to a fourth signal line; the second active pattern is electrically connected to a second signal line or a third signal line; the third active pattern is electrically connected to a first signal line; at least one of the first to third active patterns includes a cut area; and the cut areas of the first and second active patterns arranged in the first and second subpixels can improve an opening ratio by overlapping with the light emitting area.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present disclosure relates to a display panel and a display device. [Background technology]

[0002] The display device includes a thin film transistor (TFT), a plurality of conductive layers, and a light emitting element.

[0003] In the manufacturing process of such display devices, foreign matter or the like may cause bright or dark spot defects in some light-emitting regions. In order to prevent defects, some display devices undergo a repair process in which the connection between the light-emitting region where the defect occurred and the circuit region that drives it is cut off. However, this may result in problems such as a reduction in the opening of the display device and a decrease in the success rate (yield rate) of the repair process. Summary of the Invention [Problem to be solved by the invention]

[0004] An embodiment of the present disclosure relates to a display panel and a display device that can prevent or reduce a reduction in the area of ​​an opening due to a repair pattern by using a transparent active pattern that functions as wiring as a repair pattern.

[0005] An embodiment of the present disclosure relates to a display panel and a display device that prevents damage to the cathode electrode and anode electrode by a laser irradiated during a repair process by disposing at least one of a color filter, a black bank, and an overcoat layer on an active pattern.

[0006] An embodiment of the present disclosure relates to a display panel and display device that can prevent defects caused by external foreign matter, such as elements that permeate through a sealing layer arranged on the cathode electrode, by performing a repair process using a transparent active pattern as a repair pattern, thereby preventing damage to the cathode electrode because the laser cannot reach the cathode electrode. [Means for solving the problem]

[0007] An embodiment of the present disclosure can provide a display panel including a substrate including first to fourth subpixels including a light-emitting region and a non-light-emitting region surrounding the light-emitting region, and a first signal line, a second signal line, a third signal line, and a fourth signal line arranged on the substrate and spaced apart from each other, the first to fourth subpixels each including a first to third active pattern arranged on the substrate, the first active pattern being electrically connected to the fourth signal line, the second active pattern being electrically connected to the second signal line or the third signal line, and the third active pattern being electrically connected to the first signal line, at least one of the first to third active patterns including a cut region, the cut regions of the first and second active patterns arranged in the first and second subpixels overlapping with the light-emitting region, and at least one of the cut regions of the first to third active patterns arranged in the third and fourth subpixels being arranged in the non-light-emitting region.

[0008] An embodiment of the present disclosure can provide a display device including a display panel including first to fourth subpixels including a light-emitting region and a non-light-emitting region surrounding the light-emitting region, the display panel including a first signal line, a second signal line, a third signal line and a fourth signal line spaced apart from each other, the first to fourth subpixels including first to third active patterns arranged on the substrate, the first active pattern being electrically connected to the fourth signal line, the second active pattern being electrically connected to the second signal line or the third signal line, the third active pattern being electrically connected to the first signal line, at least one of the first to third active patterns including a cut region, the cut regions of the first and second active patterns arranged in the first and second subpixels overlapping with the light-emitting region, and at least one of the cut regions of the first to third active patterns arranged in the third and fourth subpixels being arranged in the non-light-emitting region. Effect of the Invention

[0009] According to an embodiment of the present disclosure, a display panel and a display device can be provided that can prevent the area of ​​an opening from being reduced by using a transparent active pattern that functions as wiring as a repair pattern.

[0010] According to an embodiment of the present disclosure, by arranging at least one of a color filter, a black bank, and an overcoat layer on an active pattern, it is possible to provide a display panel and a display device in which the cathode electrode and the anode electrode are not damaged by a laser irradiated during the repair process.

[0011] According to an embodiment of the present disclosure, by using a transparent active pattern as a repair pattern to carry out the repair process, the laser cannot reach the cathode electrode, thereby preventing damage to the cathode electrode and providing a display panel and display device that can prevent defects caused by external elements penetrating through a sealing layer arranged on the cathode electrode. [Brief description of the drawings]

[0012] [Figure 1] FIG. 1 is a system configuration diagram of a display device according to an embodiment of the present disclosure. [Diagram 2] 1 is an equivalent circuit of a subpixel of a display device according to an embodiment of the present disclosure. [Diagram 3] 2 is a plan view showing a portion of a display area of ​​a display panel according to an embodiment of the present disclosure. [Figure 4] FIG. 4 is a cross-sectional view taken along the line AB in FIG. [Diagram 5] FIG. 13 is a diagram illustrating a state in which a laser is irradiated onto an active pattern in a step of repairing a first subpixel or a second subpixel. [Figure 6] 1 is a graph showing the transmittance of a red color filter, a green color filter, and a blue color filter according to wavelength. [Figure 7] FIG. 4 is a diagram simply illustrating that a fifth cut region of a first active pattern is irradiated with a laser in a step of repairing a first sub-pixel in FIG. 3. [Figure 8] 1 is a graph showing the transmittance of a transparent bank and a black bank by wavelength. [Figure 9] FIG. 4 is a diagram simply illustrating that a third cut region of a seventh active pattern is irradiated with a laser in a step of repairing the third sub-pixel of FIG. 3. [Figure 10] 3 is a diagram showing structures of first to fourth sub-pixels included in a display panel according to an embodiment of the present disclosure. [Figure 11] FIG. 13 is a diagram simply illustrating that a first cut region of a third active pattern is irradiated with a laser in a step of repairing a first sub-pixel. [Figure 12] FIG. 11 is a diagram simply illustrating that a third cut region of a seventh active pattern is irradiated with a laser in a step of repairing the third sub-pixel of FIG. 10. [Figure 13]11 is a table comparing the aperture ratio of a display panel according to a comparative example and the aperture ratio of a display panel according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Some embodiments of the present disclosure will be described in detail below with reference to exemplary drawings. When adding reference symbols to components in each drawing, the same components may be assigned the same symbols as much as possible, even if they are displayed in other drawings. In describing the present disclosure, if it is determined that a specific description of a related publicly known configuration or function may obscure the gist of the present disclosure, the detailed description will be omitted. When "including," "having," "consisting of," and the like are used in this specification, other parts may be added unless "only" is used. When a component is expressed as a singular number, it may include a case where a plurality is included, unless otherwise explicitly stated.

[0014] In addition, in describing components of the present disclosure, terms such as first, second, A, B, (a), (b), etc. are used. These terms are used only to distinguish the components from other components, and do not limit the nature, order, sequence, number, etc. of the components.

[0015] When two or more components are described as being "coupled," "coupled," or "connected" in a description of the positional relationship of components, it should be understood that the two or more components may be directly "coupled," "coupled," or "connected," but it is also possible for the two or more components to be further "intervened" and "coupled," "coupled," or "connected" to other components. Here, the other components may be included in one or more of the two or more components that are "coupled," "coupled," or "connected" to each other.

[0016] In describing the temporal relationship of components, methods of operation, methods of production, etc., when a temporal precedence or precedence relationship or flow precedence relationship is described using, for example, "after," "following," "next to," or "before," this may also include cases where the relationship is not consecutive, unless "immediately" or "directly" is used.

[0017] On the other hand, when a numerical value or its corresponding information (e.g., level, etc.) relating to a component is mentioned, the numerical value or its corresponding information may be interpreted as including a range of error that may occur due to various factors (e.g., process factors, internal or external impacts, noise, etc.) unless otherwise explicitly stated.

[0018] Various embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings.

[0019] 1 is a system configuration diagram of a display device according to an embodiment of the present disclosure. Referring to FIG. 1, a display driving system of a display device 100 according to an embodiment of the present disclosure may include a display panel 110 and a display driving circuit for driving the display panel 110.

[0020] The display panel 110 may include a display area DA where an image is displayed, and a non-display area NDA where an image is not displayed. The display panel 110 may include a plurality of sub-pixels SP arranged on a substrate SUB for image display. For example, the plurality of sub-pixels SP may be arranged in the display area DA. In some cases, at least one sub-pixel SP may be arranged in the non-display area NDA. The at least one sub-pixel SP arranged in the non-display area NDA may also be referred to as a dummy sub-pixel.

[0021] The display panel 110 may include a plurality of signal wirings arranged on a substrate SUB to drive a plurality of sub-pixels SP. For example, the plurality of signal wirings may include data lines DL, gate lines GL, driving voltage lines, etc. For example, the plurality of signal lines may include data lines DL, gate lines GL, driving voltage lines, etc. connected to the plurality of sub-pixels SP. The signal lines are configured to supply signals such as gate signals, data signals, and power supply signals to the plurality of sub-pixels SP.

[0022] The plurality of data lines DL and the plurality of gate lines GL may cross each other. Each of the plurality of data lines DL may be arranged to extend in a first direction. Each of the plurality of gate lines GL may be arranged to extend in a direction crossing the first direction. Here, the first direction may be a column direction, and the direction crossing the first direction may be a row direction.

[0023] The display driving circuit may further include a data driving circuit 120, a gate driving circuit 130, and a controller 140 for controlling the data driving circuit 120 and the gate driving circuit 130. The data driving circuit 120 can output data signals (also called data voltages) corresponding to video signals to a plurality of data lines DL. The gate driving circuit 130 can generate gate signals and output the gate signals to a plurality of gate lines GL. The controller 140 can switch input video data input from an external host 150 according to a data signal format used by the data driving circuit 120, and supply the switched video data to the data driving circuit 120.

[0024] The data driving circuit 120 may include one or more source driver integrated circuits. For example, each source driver integrated circuit may be connected to the display panel 110 by a tape automated bonding (TAB) method, connected to a bonding pad of the display panel 110 by a chip on glass (COG) or chip on panel (COP) method, or may be realized by a chip on film (COF) method and connected to the display panel 110.

[0025] The gate driving circuit 130 may be connected to the display panel 110 using a tape automated bonding (TAB) method, may be connected to a bonding pad of the display panel 110 using a COG or COP method, may be connected to the display panel 110 according to a COF method, or may be formed in the non-display area (NDA) of the display panel 110 as a GIP (Gate In Panel) type.

[0026] The display device 100 according to the embodiment of the present disclosure may be a self-emitting display device in which the display panel 110 emits light by itself. For example, the display device 100 according to the embodiment of the present disclosure may be an organic light emitting display device in which the light emitting element is an organic light emitting diode (OLED). As another example, the display device 100 according to the embodiment of the present disclosure may be an inorganic light emitting display device in which the light emitting element is an inorganic-based light emitting diode. As yet another example, the display device 100 according to the embodiment of the present disclosure may be a quantum dot display device in which the light emitting element is a quantum dot, which is a semiconductor crystal that emits light by itself.

[0027] FIG. 2 is an equivalent circuit of a subpixel SP of the display device 100 according to an embodiment of the present disclosure.

[0028] Referring to FIG. 2, in the display device 100 according to an embodiment of the present disclosure, each subpixel SP may include a light-emitting element ED and a pixel driving circuit SPC for driving it, and the pixel driving circuit SPC may include a driving transistor DRT, a scan transistor SCT, and a storage capacitor Cst.

[0029] The driving transistor DRT may control a current flowing through the light emitting element ED to drive the light emitting element ED. The scan transistor SCT may transmit a data voltage Vdata to a first node N1, which is a gate node of the driving transistor DRT. The storage capacitor Cst may be configured to maintain a voltage for a certain period of time.

[0030] The light emitting element ED may include an anode electrode AE, a cathode electrode CE, and an emitting layer EL located between the anode electrode AE ​​and the cathode electrode CE. The anode electrode AE ​​may be electrically connected to the second node N2 of the driving transistor DRT.

[0031] A base voltage EVSS may be applied to the cathode electrode CE. The light emitting element ED may be, for example, an organic light emitting diode OLED, an inorganic-based light emitting diode LED, or a quantum dot light emitting element.

[0032] The driving transistor DRT is a transistor for driving the light emitting element ED, and may include a first node N1, a second node N2, a third node N3, etc. The first node N1 is a gate node and may be electrically connected to a source node or a drain node of the scan transistor SCT. The second node N2 is a source node or a drain node and may be electrically connected to an anode electrode AE ​​of the light emitting element ED. The third node N3 may be a drain node or a source node and may be electrically connected to a driving voltage line DVL that supplies a driving voltage EVDD. In the following, for convenience of explanation, it may be described by taking as an example that the second node N2 is a source node and the third node N3 is a drain node.

[0033] The scan transistor SCT can switch the connection between the data line DL and the first node N1 of the drive transistor DRT. The scan transistor SCT can control the connection between the first node N1 of the drive transistor DRT and a corresponding one of the multiple data lines DL in response to a scan signal SCAN supplied from a scan line SCL, which is a type of gate line GL.

[0034] The drain node or source node of the scan transistor SCT may be electrically connected to a corresponding data line DL. The source node or drain node of the scan transistor SCT may be electrically connected to a first node N1 of the drive transistor DRT. The gate node of the scan transistor SCT may be electrically connected to a scan line SCL and may be applied with a scan signal SCAN. The scan transistor SCT is turned on by a scan signal SCAN of a turn-on level voltage and may transmit a data voltage Vdata supplied from the data line DL to the first node N1 of the drive transistor DRT.

[0035] Referring to FIG. 2, a storage capacitor Cst may be configured between a first node N1 and a second node N2 of the driving transistor DRT.

[0036] 2, in the display device 100 according to the embodiment of the present disclosure, the pixel driving circuit SPC of each subpixel SP may further include a sensing transistor SENT. The sensing transistor SENT can switch a connection between the second node N2 of the driving transistor DRT and a reference voltage line RVL to which a reference voltage Vref is applied.

[0037] The sensing transistor SENT can control a connection between a second node N2 of the driving transistor DRT electrically connected to the anode electrode AE ​​of the light emitting element ED and a corresponding one of the plurality of reference voltage lines RVL in response to a scan signal SCAN supplied from the scan line SCL. In FIG. 2, the gate node of the sensing transistor SENT and the gate node of the scan transistor SCT are connected to the same scan line SCL, but this is an example for convenience of explanation, and they may be connected to different scan lines SCL.

[0038] The drain node or source node of the sensing transistor SENT may be electrically connected to the reference voltage line RVL. The source node or drain node of the sensing transistor SENT may be electrically connected to the second node N2 of the driving transistor DRT and may be electrically connected to the anode electrode AE ​​of the light emitting element ED. The gate node of the sensing transistor SENT may be electrically connected to the scan line SCL and may be applied with a scan signal SCAN.

[0039] The driving transistor DRT, the scan transistor SCT, and the sensing transistor SENT may each be an n-type transistor or a p-type transistor.

[0040] FIG. 3 is a plan view showing a portion of a display area of ​​a display panel according to an embodiment of the present disclosure.

[0041] Referring to FIG. 3, a display panel 110 according to an embodiment of the present disclosure may include a plurality of sub-pixels SP1, SP2, SP3, and SP4 arranged in a display area DA.

[0042] Each of the subpixels SP1, SP2, SP3, SP4 may include a light-emitting area EA1, EA2, EA3, EA4. For example, as shown in FIG. 3, the first subpixel SP1 may include a first light-emitting area EA1, the second subpixel SP2 may include a second light-emitting area EA2, the third subpixel SP3 may include a third light-emitting area EA3, and the fourth subpixel SP4 may include a fourth light-emitting area EA4.

[0043] The first light-emitting region EA may be a red light-emitting region, the second light-emitting region EA2 may be a blue light-emitting region, the third light-emitting region EA3 may be a white light-emitting region, and the fourth light-emitting region EA4 may be a green light-emitting region, although embodiments of the present disclosure are not limited thereto.

[0044] The display panel 110 may include a non-light-emitting area surrounding a plurality of light-emitting areas EA1, EA2, EA3, and EA4.

[0045] The multiple light emitting areas EA1, EA2, EA3, and EA4 are areas corresponding to the openings of the banks BK, and the non-light emitting areas can be areas in which the banks BK are arranged.

[0046] In the non-light-emitting area, a plurality of signal lines for driving light-emitting elements arranged in the plurality of light-emitting areas EA1, EA2, EA3, and EA4 may be arranged, and a circuit section including a plurality of transistors and a plurality of storage capacitors may also be arranged.

[0047] For example, referring to FIG. 3, in a non-light emitting region of the display panel 110, first to fifth signal lines SL1, SL2, SL3, SL4, and SL5 may be arranged.

[0048] Referring to FIG. 3, the first to fourth signal lines SL1, SL2, SL3, and SL4 may be spaced apart from one another and extend in a first direction (eg, the column direction or the vertical direction).

[0049] The first signal line SL1 may be a drive voltage line, the second and third signal lines SL2, SL3 may be data lines, and the fourth signal line SL4 may be a reference voltage line, although embodiments of the present disclosure are not limited thereto (e.g., row direction, horizontal direction).

[0050] The fifth signal line SL5 may be disposed so as to extend in a second direction that intersects with the first direction. The fifth signal line SL5 may overlap with the first to fourth signal lines SL1, SL2, SL3, and SL4.

[0051] The fifth signal line SL5 may be a scan line, although embodiments of the present disclosure are not limited thereto.

[0052] Referring to FIG. 3, the display panel 110 may include a plurality of anode electrodes AE1, AE2, AE3, and AE4 overlapping with first to fourth light emitting areas EA1, EA2, EA3, and EA4, respectively.

[0053] Specifically, the first light-emitting region EA1 of the first subpixel SP1 may overlap a part of the first anode electrode AE1, the second light-emitting region EA2 of the second subpixel SP2 may overlap a part of the second anode electrode AE2, the third light-emitting region EA3 of the third subpixel SP3 may overlap a part of the third anode electrode AE3, and the fourth light-emitting region EA4 of the fourth subpixel SP4 may overlap a part of the fourth anode electrode AE4.

[0054] 3, the first light-emitting area EA1 can overlap with the first color filter RCF, and the second light-emitting area EA2 can overlap with the second color filter BCF. Also, the third light-emitting area EA3 does not need to have a color filter disposed therein, but the embodiment of the present disclosure is not limited thereto.

[0055] In each of the first and second subpixels SP1 and SP2, a first color filter RCF and a second color filter BCF may be arranged in the light-emitting regions EA1 and EA2 as well as in a part of the non-light-emitting region. A color filter (e.g., a green color filter) may also be arranged in the fourth subpixel SP4, but it may be arranged to correspond to the fourth light-emitting region EA4 of the fourth subpixel SP4 and may not be arranged in the non-light-emitting region of the fourth subpixel SP4.

[0056] Further, referring to FIG. 3, the display panel 110 according to an embodiment of the present disclosure may include an active pattern overlapping at least one anode electrode of the plurality of anode electrodes.

[0057] For example, each of the first and second anode electrodes AE1, AE2 may overlap at least one active pattern electrically connected to a signal line.

[0058] A portion of at least one of the active patterns overlapping the first and second anode electrodes AE1, AE2 may also overlap the light emitting area EA of the display panel 110. In other words, at least one active pattern disposed in the display area DA of the display panel 110 may overlap the anode electrodes and the light emitting area.

[0059] Specifically, the first sub-pixel SP1 including the first light-emitting area EA1 may include a first active pattern 321, a second active pattern 322 and a third active pattern 323.

[0060] The circuit portion of the first subpixel SP1 may include a scan transistor SCT, a sense transistor SENT, and a drive transistor DRT (see FIG. 2).

[0061] The first active pattern 321 disposed in the first subpixel SP1 may be electrically connected to the fourth signal line SL4, the second active pattern 322 may be electrically connected to the second signal line SL2, and the third active pattern 323 may be electrically connected to the first signal line SL1.

[0062] The first active pattern 321 can be electrically connected to the sense transistor SENT of the first subpixel SP1, the second active pattern 322 can be electrically connected to the scan transistor SCAN of the first subpixel SP1, and the third active pattern 323 can be electrically connected to the drive transistor DRT of the first subpixel SP1.

[0063] Each of the first to third active patterns 321, 322, and 323 arranged in the first subpixel SP1 is connected to a signal line arranged on the substrate, and can function as a wiring.

[0064] 3, the first light-emitting area EA1 included in the first subpixel SP1 may overlap a part of the first active pattern 321 and a part of the second active pattern 322. Here, a part of the first active pattern 321 may also overlap a part of the second light-emitting area EA2.

[0065] At least one of the first active pattern 321 and the second active pattern 322 may have a cut region CL that is a portion to be irradiated with a laser during the repair process.

[0066] The cut region CL may be a portion where a laser is irradiated to repair a defective subpixel SP when a defect occurs in the subpixel SP. The cutting region CL of the active pattern is a portion where a laser light is irradiated to repair a defective subpixel SP. The defective subpixel SP is repaired by generating the cutting region CL and disconnecting the defective subpixel SP from a signal line connected to the active pattern including the cutting region CL.

[0067] When a laser is irradiated to the cut area CL of the active pattern, the active pattern in the cut area CL can be cut, and when the laser is not irradiated, the active pattern is not cut and can transmit a signal to the thin film transistor. In other words, the cut area CL can be confirmed by whether the active pattern is cut after the repair process. Also, the cut area CL is not visible in the active pattern that has not been repaired.

[0068] In a process of manufacturing a display panel included in a display device, each sub-pixel may be defective due to a foreign substance, etc. When a sub-pixel is defective, the operation of the defective sub-pixel may be stopped for repair.

[0069] The repair process may refer to a process of electrically shorting at least one of the wirings arranged in the subpixel SP. For example, the repair process can be completed by irradiating a laser to a wiring electrically connected to at least one of the first to fourth signal lines SL1, SL2, SL3, and SL4, and cutting the electrical connection to the wiring and other signal lines.

[0070] In the display panel 110 according to the embodiment of the present disclosure, the active patterns 321, 322, 331, 332, 341, 342, 351, and 352 function as wiring and also as repair patterns to which a laser is irradiated during a repair process.

[0071] For example, referring to FIG. 3, the second active pattern 322 may include at least one first cut region CL1 in an area overlapping the first anode electrode AE1 and the first light emitting region EA1.

[0072] 3, the first active pattern 321 may include at least one first cut region CL1 in an area overlapping with the second anode electrode AE2 and the second light emitting area EA2. That is, the first active pattern 321 serves as a wiring for supplying a reference voltage signal to the first sub-pixel SP1, and the first cut region CL1 may be provided in the area where the second sub-pixel SP2 is disposed.

[0073] However, the embodiments of the present disclosure are not limited to this, and the first active pattern 321 may have a first cut area CL1 in a region overlapping with the first anode electrode AE1, or in a region overlapping with the first anode electrode AE1 and the first light-emitting area EA1.

[0074] Referring to FIG. 3, the second sub-pixel SP2 including the second light-emitting area EA2 may include a fourth active pattern 331, a fifth active pattern 332 and a sixth active pattern 333.

[0075] The circuit portion of the second subpixel SP2 may also include a scan transistor SCT, a sense transistor SENT, and a drive transistor DRT (see FIG. 2).

[0076] The fourth active pattern 331 of the second subpixel SP2 may be electrically connected to the fourth signal line SL4, the fifth active pattern 332 may be electrically connected to the third signal line SL3, and the sixth active pattern 333 may be electrically connected to the first signal line SL1.

[0077] Referring to FIG. 3, the third active pattern 323 disposed in the subpixel SP1 may have a structure branched from the sixth active pattern 333, but the structure of the active pattern according to the embodiment of the present disclosure is not limited thereto.

[0078] The fourth active pattern 331 may be electrically connected to the sense transistor SENT of the second subpixel SP2, the fifth active pattern 332 may be electrically connected to the scan transistor SCAN of the second subpixel SP2, and the sixth active pattern 333 may be electrically connected to the drive transistor DRT of the second subpixel SP2.

[0079] The fourth to sixth active patterns 331, 332, and 333 arranged in the second sub-pixel SP2 are each connected to a signal line arranged on the substrate, and can function as wiring.

[0080] As shown in FIG. 3, the second anode electrode AE2 and the second light-emitting area EA2 included in the second sub-pixel SP2 may overlap with a portion of the fourth active pattern 331 and a portion of the fifth active pattern 332.

[0081] At least one of the fourth active pattern 331 and the fifth active pattern 332 may have a cut region CL that is a portion to be irradiated with a laser during the repair process.

[0082] For example, referring to FIG. 3, at least one of the fourth active pattern 331 and the fifth active pattern 332 may include at least one second cut area CL2 in an area overlapping with the second anode electrode AE2 and the second light emitting area EA2.

[0083] Referring to FIG. 3, the third sub-pixel SP3 including the third light-emitting area EA3 may include a seventh active pattern 341, an eighth active pattern 342 and a ninth active pattern 343.

[0084] The circuit portion of the third subpixel SP3 may include a scan transistor SCT, a sense transistor SENT, and a drive transistor DRT (see FIG. 2).

[0085] The seventh active pattern 341 of the third subpixel SP3 may be electrically connected to the fourth signal line SL4, the eighth active pattern 342 may be electrically connected to the third signal line SL3, and the ninth active pattern 343 may be electrically connected to the first signal line SL1.

[0086] The seventh active pattern 341 may be electrically connected to the sense transistor SENT of the third subpixel SP3, the eighth active pattern 342 may be electrically connected to the scan transistor SCAN of the third subpixel SP3, and the ninth active pattern 343 may be electrically connected to the drive transistor DRT of the third subpixel SP3.

[0087] Each of the seventh to ninth active patterns 341, 342, and 343 arranged in the third sub-pixel SP3 is connected to a signal line arranged on the substrate, and can play the role of wiring.

[0088] Referring to FIG. 3, at least a portion of each of the seventh to ninth active patterns 341, 342, and 343 may not overlap the third anode electrode AE3 and the third light emitting area EA3.

[0089] Here, the third anode electrode AE3 may be arranged in a row different from the row in which the first and second anode electrodes AE1, AE2 are arranged. For example, when the first and second anode electrodes AE1, AE2 are arranged in n rows, the third anode electrode AE3 may be arranged in n+1 rows (where n is a positive number equal to or greater than 1). The rows in which the anode electrodes are arranged may be divided based on the fifth signal line SL5.

[0090] 3, among the seventh to ninth active patterns 341, 342, and 343, at least one of the seventh and eighth active patterns 341, 342 may include at least one third cut region CL3 in an area overlapping with the bank BK. In other words, the third cut region CL3 may be disposed in a non-light-emitting area.

[0091] The third cut region CL3 provided in the seventh and eighth active patterns 341, 342 may be disposed in a non-light-emitting region of the third sub-pixel SP3.

[0092] The circuit portion of the fourth subpixel SP4 may include a scan transistor SCT, a sense transistor SENT, and a drive transistor DRT (see FIG. 2).

[0093] The tenth active pattern 351 of the fourth subpixel SP4 may be electrically connected to the fourth signal line SL4, the eleventh active pattern 352 may be electrically connected to the second signal line SL2, and the twelfth active pattern 353 may be electrically connected to the first signal line SL1.

[0094] The tenth active pattern 351 may be electrically connected to the sense transistor SENT of the fourth subpixel SP4, the eleventh active pattern 352 may be electrically connected to the scan transistor SCAN of the fourth subpixel SP4, and the twelfth active pattern 353 may be electrically connected to the drive transistor DRT of the fourth subpixel SP4.

[0095] Each of the tenth to twelfth active patterns 351, 352, and 353 arranged in the fourth sub-pixel SP4 is connected to a signal line arranged on the substrate, and can play the role of wiring.

[0096] Referring to FIG. 3, each of the tenth to twelfth active patterns 351, 352, and 353 may have a portion that does not overlap with the fourth anode electrode AE4 and the fourth light emitting area EA4.

[0097] Here, the fourth anode electrode AE4 may be arranged in a row different from the row in which the first and second anode electrodes AE1, AE2 are arranged. For example, when the first and second anode electrodes AE1, AE2 are arranged in row n, the fourth anode electrode AE4 may be arranged in row n+1.

[0098] 3, at least one of the tenth and eleventh active patterns 351, 352 among the tenth to twelfth active patterns 351, 352, 353 may include at least one fourth cut region CL4 in an area overlapping with the bank BK. In other words, the fourth cut region CL4 may be disposed in a non-light-emitting area.

[0099] For example, the tenth active pattern 351 may include at least one fourth cut region CL4 in the non-emitting region of the third subpixel SP3, and the eleventh active pattern 352 may include at least one fourth cut region CL4 in the non-emitting region of the fourth subpixel SP4, but the embodiments of the present disclosure are not limited thereto. The fourth cut region CL4 of the tenth active pattern 351 may be provided in the non-emitting region of the fourth subpixel SP4.

[0100] Referring to FIG. 3, the first to third signal lines SL1, SL2, SL3 electrically connected to the active patterns 322, 323, 332, 333 arranged in the first and second subpixels SP1, SP2 may be different signal lines from the first to third signal lines SL1, SL3, SL3 electrically connected to the active patterns 342, 343, 352, 353 arranged in the third and fourth subpixels SP3, SP4.

[0101] Also, referring to FIG. 3, the fourth signal line SL4 electrically connected to the active patterns 321, 331 arranged in the first and second sub-pixels SP1, SP2 may be the same signal line as the fourth signal line SL4 electrically connected to the active patterns 341, 351 arranged in the third and fourth sub-pixels SP3, SP4.

[0102] 3, at least one of the active patterns 321, 322, 331, 332, 341, and 351 overlapping with the first to fourth light emitting areas EA1, EA2, EA3, and EA4 may include a cut area CL. The active pattern including the cut area CL may be connected to a data line or a reference voltage line.

[0103] As described above, at least one of the first active pattern 321, the second active pattern 322, the fourth active pattern 331 and the fifth active pattern 332 arranged in the first and second sub-pixels SP1, SP2 may have at least one cut area CL in an area overlapping one anode electrode AE ​​and one light-emitting area EA.

[0104] In addition, at least one of the seventh active pattern 341, the eighth active pattern 342, the tenth active pattern 351, and the eleventh active pattern 352 arranged in the third and fourth sub-pixels SP3, SP4 may have at least one cut area CL in an area overlapping with the bank BK.

[0105] As described above, the cut areas CL provided in the active patterns 321, 322, 331, 332, 341, 342, 351, and 352 can be irradiated with a laser, and the area irradiated with the laser may be electrically disconnected from other components, so that no signal is applied to the subpixel.

[0106] The first and second cut regions CL1 and CL2 of the active patterns 321, 322, 331, and 332, which can repair the first and second sub-pixels SP1 and SP2, are arranged to overlap with the light-emitting regions EA1 and EA2, so that repair regions can be provided without reducing the aperture ratio of the display panel 110.

[0107] In addition, the third and fourth cut areas CL3 and CL4 of the active patterns 341, 342, 351, and 352, which can repair the third and fourth sub-pixels SP3 and SP4, are arranged to overlap with the bank BK, thereby preventing color mixing in areas where no color filter is arranged, and preventing the residual laser irradiated in the repair process from being absorbed by the bank BK and damaging the cathode electrode by the laser.

[0108] The structure of the active pattern including the cut region CL will be specifically considered with reference to FIGS. 4 and 5 as follows.

[0109] Fig. 4 is a cross-sectional view taken along line AB in Fig. 3. Fig. 5 is a diagram illustrating a state in which a laser is irradiated onto an active pattern in a step of repairing the first subpixel or the second subpixel.

[0110] First, referring to FIG. 4, a display panel 110 according to an embodiment of the present disclosure may include at least one thin film transistor disposed on a substrate 401 and a light emitting element ED1 disposed on the thin film transistor.

[0111] The thin film transistor can include an active layer 403 , a gate electrode 405 , a source electrode 407 , and a drain electrode 408 .

[0112] The light-emitting element ED1 may include a first anode electrode AE1, a light-emitting layer EL, and a cathode electrode CE.

[0113] In FIG. 4, the thin film transistor electrically connected to the light emitting element ED1 may be a driving transistor DRT.

[0114] Furthermore, the structure of the transistors shown in FIG. 4 may be the same as the structure of the scan transistor SCAN or the sense transistor SENT arranged in the display area DA, or may be the same as the structure of the transistors arranged in the non-display area NDA.

[0115] Referring to FIG. 4, a substrate 401 may have a write shield layer LS disposed thereon.

[0116] The light shield layer LS can serve to prevent light from entering a channel region of an active pattern arranged in each subpixel SP. The light shield layer LS can serve to prevent or at least reduce the incidence of light into a channel region of an active layer 403 arranged in the subpixel SP.

[0117] A buffer layer 402 may be disposed on the write shield layer LS.

[0118] The buffer layer 402 may include an inorganic insulating material such as silicon oxide (SiOx), silicon nitride (SiNx) or silicon oxynitride (SiON), but the invention is not limited thereto.

[0119] Although the buffer layer 402 is shown as a single layer structure in FIG. 4, the buffer layer 402 of the present invention may have a multi-layer structure.

[0120] When the buffer layer 402 has a multi-layer structure, it may have a structure in which layers containing at least two inorganic insulating materials, such as silicon oxide (SiOx), silicon nitride (SiNx), or silicon oxynitride (SiON), are alternately arranged, but the present invention is not limited thereto.

[0121] On the buffer layer 402, a thin film transistor active layer 403 and a second active pattern 322 may be disposed.

[0122] Referring to FIG. 4, the active layer 403 may include a first active layer 403a and a first auxiliary electrode 403b and a second auxiliary electrode 403c disposed on the first active layer 403a.

[0123] The first auxiliary electrode 403b and the second auxiliary electrode 403c may be arranged to be spaced apart from each other on the first active layer 403a but not overlapping with the channel region of the first active layer 403a. The channel region of the first active layer 403a may be a region overlapping with the gate electrode 405.

[0124] The second active pattern 322 can include a second pattern 322b disposed on the first pattern 322a.

[0125] The first active layer 403a and the first pattern 322a may include an oxide semiconductor material. The oxide semiconductor material is a semiconductor material in which the conductivity is controlled and the band gap is adjusted through doping of an oxide material, and may generally be a transparent semiconductor material having a wide band gap. For example, the oxide semiconductor material may include IGZO (indium gallium zinc oxide), ZnO (zinc oxide), CdO (cadmium oxide), InO (indium oxide), ZTO (zinc tin oxide), ZITO (zinc indium tin oxide), IGZTO (indium gallium zinc tin oxide), etc. When the first active layer 403a is an oxide semiconductor material, a thin film transistor including such a first active layer 403a is called an oxide thin film transistor.

[0126] The first auxiliary electrode 403b, the second auxiliary electrode 403c, and the second pattern 322b may include a conductive oxide. For example, the conductive oxide may include at least one of a transparent conductive oxide (TCO), a nitrate, and an organic material. For example, the transparent conductive oxide (TCO) may include one or more of an indium zinc oxide (IZO), an indium tin oxide (ITO), a zinc oxide (ZnO), an aluminum-doped zinc oxide (AZO), a gallium-doped zinc oxide (GZO), an antimony tin oxide (ATO), and a fluorine-doped transparent oxide (FTO). The nitrate may include zinc oxide nitride (ZnON).

[0127] The first auxiliary electrode 403b is disposed between the first active layer 403a and the drain electrode 408, and can electrically connect the first active layer 403a and the drain electrode 408. The second auxiliary electrode 403c is disposed between the first active layer 403a and the source electrode 407, and can electrically connect the first active layer 403a and the source electrode 407.

[0128] A gate insulating film 404 may be disposed on the first active layer 403a.

[0129] A gate insulating film 404 may be disposed on the channel region of the first active layer 403a.

[0130] A gate electrode 405 may be disposed on the gate insulating film 404 .

[0131] Referring to FIG. 4, an interlayer insulating film 406 may be disposed on a substrate 401 on which a gate electrode 405 is disposed.

[0132] Referring to FIG. 4, the interlayer insulating film 406 may have contact holes exposing a portion of the upper surface of each of the first auxiliary electrode 403b and the second auxiliary electrode 403c.

[0133] The drain electrode 408 is disposed on the interlayer insulating film 406, and can be in contact with a part of the upper surface of the first auxiliary electrode 403b through a contact hole. The source electrode 407 is disposed on the interlayer insulating film 406, and can be in contact with a part of the upper surface of the second auxiliary electrode 403c through a contact hole.

[0134] As described above, the first auxiliary electrode 403b may be an auxiliary electrode that mediates an electrical connection between the first active layer 403a and the drain electrode 408, and the second auxiliary electrode 403c may be an auxiliary electrode that mediates an electrical connection between the first active layer 403a and the source electrode 407.

[0135] Furthermore, referring to FIG. 4, an interlayer insulating film 406 may be disposed to surround the top and side surfaces of the second active pattern 322 .

[0136] A first color filter RCF can be disposed on such an interlayer insulating film 406. As shown in FIG. 4, the first color filter RCF can be disposed so as to overlap at least a portion of the second active pattern 322.

[0137] At least a portion of the second active pattern 322 and at least a portion of the first color filter RCF may overlap the first light-emitting area EA1.

[0138] An overcoat layer 409 may be disposed on the substrate 401 on which the first color filter RCF1 is disposed.

[0139] On the overcoat layer 409, a first anode electrode AE1 of the first light-emitting element ED1 may be disposed.

[0140] The first anode electrode AE1 may be electrically connected to the source electrode 407 of the thin film transistor through a contact hole provided in the overcoat layer 409. Although Fig. 4 shows a structure in which the first anode electrode AE1 is connected to the source electrode 407 of the thin film transistor, the structure of the display panel 110 according to the present embodiment is not limited thereto, and the first anode electrode AE1 may be connected to the drain electrode 408 of the thin film transistor.

[0141] Furthermore, referring to FIG. 4, a bank BK may be disposed on a portion of the upper surface of the overcoat layer 409 and the first anode electrode AE1.

[0142] The bank BK can be disposed so as to overlap a part of the upper surface of the first anode electrode AE1, and can be disposed so as to expose a part of the upper surface of the first anode electrode AE1.

[0143] Such a bank BK can define a light-emitting area EA and a non-light-emitting area NEA within the display area DA of the display panel 110. For example, an area in the display area DA where the bank BK is arranged can be the non-light-emitting area NEA, and an area in the display area DA where the bank BK is not arranged can be the light-emitting area EA.

[0144] The light emitting layer EL of the first light emitting element ED1 can be disposed on the first anode electrode AE1.

[0145] 4 shows a structure in which the light-emitting layer EL is a single layer, the embodiment of the present disclosure is not limited thereto. The light-emitting layer EL can be made of multiple organic layers.

[0146] A cathode electrode CE of the first light-emitting element ED1 may be disposed on the substrate 401 on which the light-emitting layer EL is disposed.

[0147] The first anode electrode AE1 may include a transparent conductive material, and the cathode electrode CE may include a reflective conductive material, although embodiments of the present disclosure are not limited thereto.

[0148] In addition, while FIG. 4 illustrates the first anode electrode AE1 and the cathode electrode CE as a single-layer structure, the embodiment of the present disclosure is not limited to this, and the first anode electrode AE1 and the cathode electrode CE may each have a multi-layer structure of two or more layers.

[0149] An encapsulation layer 430 may be disposed over the cathode electrode CE.

[0150] The encapsulation layer 430 may include a first encapsulation layer 431 disposed on the cathode electrode CE, a second encapsulation layer 432 disposed on the first encapsulation layer 431, and a third encapsulation layer 433 disposed on the second encapsulation layer 432. Here, the first and third encapsulation layers 431, 433 may include an inorganic insulating material, and the second encapsulation layer 432 may include an organic insulating material.

[0151] Referring to FIG. 4, the second active pattern 322 may include at least one first cut area CL1 in an area overlapping with the first light-emitting area EA1.

[0152] That is, in the step of repairing the first sub-pixel SP1, the first cut region CL1 of the second active pattern 322 present in the first light-emitting area EA1 can be irradiated with laser.

[0153] According to an embodiment of the present disclosure, the first and second patterns 322a, 322b of the second active pattern 322 are each made of an oxide semiconductor material and a transparent conductive material, and by using such a second active pattern 322 as a repair pattern, it is possible to provide a display panel and a display device that can prevent the area of ​​the opening from being reduced by the repair pattern.

[0154] When the repair process is performed through a metal layer (e.g., gate metal), a laser with a longer wavelength can be used than in the repair process using the second active pattern 322 disposed on the display panel 110 according to an embodiment of the present disclosure.

[0155] When a repair process is performed using a long-wavelength laser, not only the repair pattern irradiated with the laser but also other wiring and electrodes containing metals may not function properly due to the influence of the laser, resulting in bright spots, dark spots, or line defects.

[0156] Furthermore, when a metal layer is used as a repair pattern, the repair pattern has opaque characteristics and should therefore be placed in a non-light-emitting area; therefore, the area occupied by the repair pattern reduces the area of ​​the light-emitting area EA, which may result in reduced image retention performance.

[0157] As shown in FIG. 4, the display panel 110 according to an embodiment of the present disclosure utilizes a second active pattern 322 including a first pattern 322a made of an oxide semiconductor material and a second pattern 322b made of a transparent conductive material as a repair pattern. This allows the repair process to be performed using a shorter wavelength laser than when a metal layer is used as the repair pattern, thereby preventing damage to other wiring during the repair process.

[0158] In particular, since the cathode electrode CE is not damaged by the laser, it is possible to prevent secondary defects caused by external elements that may permeate through the sealing layer 430 disposed on the cathode electrode CE.

[0159] Furthermore, referring to FIG. 5, in the repair process of the first sub-pixel SP1, the second active pattern 322 may be irradiated with a laser, thereby cutting the second active pattern 322.

[0160] In the repair process, the area where the laser is irradiated to the second active pattern 322 may have a structure in which a first color filter RCF is arranged on the second active pattern 322, an overcoat layer 409 is arranged on the first color filter RCF, a first anode electrode AE1 is arranged on the overcoat layer 409, and an emitting layer EL and a cathode electrode CE are arranged on the first anode electrode AE1.

[0161] As described above, the first pattern 322a is made of an oxide semiconductor material, and the second pattern 322b is made of a transparent conductive oxide, so that the laser power during the repair process can be reduced. In other words, the repair process can be performed using a laser with a low wavelength. For example, the wavelength of the laser irradiated in the repair process may be 250 nm to 350 nm, or a laser with a wavelength of 260 nm to 270 nm may be used.

[0162] Here, the thickness of the first pattern 322a can be configured to be 200 Å to 500 Å. If the thickness of the first pattern 322a is less than 200 Å, the uniformity of the first pattern 322a may be reduced. If the thickness of the first pattern 322a is more than 500 Å, the mobility may be reduced, and the electrical characteristics of the first active pattern 321 functioning as wiring may be degraded.

[0163] The thickness of the second pattern 322b may be 70 Å to 100 Å. If the thickness of the second pattern 322b is less than 70 Å, the electrical conductivity of the first active pattern 321 including the second pattern 322b may decrease. Also, if the thickness of the second pattern 322b is more than 100 Å, the etching speed of the second pattern 322b including the transparent conductive oxide may increase, which may lengthen the time of the manufacturing process.

[0164] In the same process of forming the second active pattern 322 including the first pattern 322a and the second pattern 322b, a number of different active patterns and active layers of thin film transistors can be formed.

[0165] Even when a low-power laser is irradiated onto the second active pattern 322 including the first pattern 322a and the second pattern 322b, some of the laser may affect other structures disposed on the second active pattern 322 through the second active pattern 322.

[0166] As shown in FIG. 5, the laser irradiated to the second active pattern 322 can cut the second active pattern 322 and reach the first color filter RCF.

[0167] However, since the wavelength of the laser irradiated in the process of repairing the subpixel SP of the display panel 110 according to the embodiment of the present disclosure is 250 nm to 350 nm, it cannot be transmitted through the first color filter RCF.

[0168] This will be specifically considered with reference to FIG. 6 as follows.

[0169] FIG. 6 is a graph showing the transmittance of each of the red, green and blue color filters according to wavelength.

[0170] Referring to FIG. 6, it can be seen that the red, green and blue color filters are completely unable to transmit light with wavelengths of 350 nm or less.

[0171] Therefore, the laser irradiated to the second active pattern 322 cannot pass through the first color filter RCF, and therefore cannot reach the first anode electrode AE1 and the cathode electrode CE arranged on the first color filter RCF. That is, in the repair process of the second active pattern 322, the first anode electrode AE1 and the cathode electrode CE may not be damaged by the laser.

[0172] On the other hand, in Figures 4 and 5, an example is described in which a laser is irradiated to the first cut area CL1 of the second active pattern 322 in the process of repairing the first subpixel SP1, but the structure and effect may be applicable to both the first and second cut areas CL2 of the first subpixel SP1 and the second subpixel SP2 shown in Figure 3.

[0173] 3, the first active pattern 321 may further include a fifth cut region CL5 for repairing the first sub-pixel SP1, where the fifth cut region CL5 is provided in the first active pattern 321.

[0174] This will be discussed with reference to FIG.

[0175] FIG. 7 is a schematic diagram illustrating that a fifth cut region of a first active pattern is irradiated with a laser in the step of repairing the first sub-pixel of FIG.

[0176] 3 and 7, the fifth cut area CL5 of the first active pattern 321 used to repair the first sub-pixel SP1 may be disposed in the non-emitting area NEA.

[0177] The fifth cut region CL5 of the first active pattern 321 does not overlap the first anode electrode AE1, and may overlap the bank BK.

[0178] Specifically, referring to FIG. 7, a first color filter RCF may be arranged on a first active pattern 321 including a fifth cut region CL5, an overcoat layer 409 may be arranged on the first color filter RCF, a bank BK may be arranged on the overcoat layer 409, and an emitting layer EL and a cathode electrode CE may be arranged on the bank BK.

[0179] Here, bank BK may be a black color bank. In one embodiment, a black bank is a bank that contains a black color material, such as black ink.

[0180] The first pattern 321a (e.g., first layer) of the first active pattern 321 is made of an oxide semiconductor material, and the second pattern 321b (e.g., second layer) of the first active pattern 321 is made of a transparent conductive oxide, thereby making it possible to reduce the laser power during the repair process.

[0181] The wavelength of the laser irradiated in the repair process may be 250 nm to 350 nm, and a laser with a wavelength of 260 nm to 270 nm may be used.

[0182] As shown in FIG. 7, the laser beam irradiated to the second active pattern 322 cuts the second active pattern 3212 to separate the first subpixel SP1 from the second signal line SL2, and a part of the cut cut may reach the first color filter RCF.

[0183] As described above, the first color filter RCF cannot transmit the laser but can absorb it.

[0184] However, in the display panel 110 according to an embodiment of the present disclosure, in order to protect the cathode electrode CE arranged on the first active pattern 321, not only the first color filter RCF but also a black bank BK is arranged on the first active pattern 321 having the fifth cut area CL5 to which the laser is irradiated, so that the laser may not reach the cathode electrode CE.

[0185] This will be specifically considered with reference to FIG.

[0186] FIG. 8 is a graph showing the transmittance of a transparent bank and a black bank by wavelength.

[0187] The graph in FIG. 8 shows the transmittance of light in the visible wavelength range for a transparent bank and a black bank, each having a thickness of 1.5 μm.

[0188] Referring to FIG. 8, it can be seen that the transparent bank transmits 70% or more of light in the visible light wavelength range.

[0189] On the other hand, since black bank does not transmit light of 630 nm or less, it is understood that it cannot transmit lasers with wavelengths of 250 nm to 350 nm either.

[0190] In this way, when a laser is irradiated to the fifth cut area CL5 of the second active pattern 322 in the process of repairing the first subpixel SP1, the first color filter RCF and the bank BK arranged on the second active pattern 322 prevent the laser from reaching the cathode electrode CE, thereby preventing the cathode electrode CE from being damaged by the laser.

[0191] As described above, in the process of repairing the first and second sub-pixels SP1 and SP2, the active patterns 321, 322, 331, and 332 can be irradiated with a laser, and the cut area irradiated with the laser may be present in the light-emitting area EA or the non-light-emitting area NEA.

[0192] Specifically, when a cut area for repairing the first and second subpixels SP1, SP2 is present in an emitting area (first emitting area EA1 or second emitting area EA2), the active pattern in which the cut area is provided overlaps with a color filter (first color filter RCF or second color filter BCF), and can prevent the laser from reaching the anode electrode AE ​​and the cathode electrode CE.

[0193] Furthermore, when a cut area for repairing the first and second subpixels SP1, SP2 is present in the non-emitting area NEA, the active pattern in which the cut area is provided is overlapped with the color filter (first color filter RCF or second color filter BCF) and the bank BK, thereby preventing the laser from reaching the cathode electrode CE arranged on the bank BK.

[0194] On the other hand, the cut regions for repairing the third sub-pixel SP3 and the fourth sub-pixel SP4 do not need to overlap with the light-emitting region EA (see FIG. 3).

[0195] In other words, the cut areas for repairing the third subpixel SP3 and the fourth subpixel SP4 can be disposed only in the non-emitting area NEA, which can be considered with reference to FIG. 9 as follows.

[0196] FIG. 9 is a schematic diagram illustrating that a third cut region of a seventh active pattern is irradiated with a laser in the step of repairing the third sub-pixel shown in FIG.

[0197] 9 shows an example of a configuration in which the third cut region CL3 of the seventh active pattern 341 is irradiated with a laser to cut the seventh active pattern 341, but the eighth active pattern 342 disposed in the third subpixel SP3 can also have the same layered structure in the region where the third cut region CL3 is provided. Also, the tenth active pattern 351 and the eleventh active pattern 352 of the fourth subpixel SP4 can also have the same layered structure as in FIG. 9 in the region where the fourth cut region CL4 exists.

[0198] Referring to FIG. 9, the third cut area CL3 of the seventh active pattern 341 used to repair the third sub-pixel SP3 may be disposed in the non-emitting area NEA.

[0199] The third cut region CL3 of the seventh active pattern 341 may not overlap the third anode electrode AE3 and may overlap the bank BK.

[0200] Specifically, referring to FIG. 9, an overcoat layer 409 may be disposed on the seventh active pattern 341 including the third cut region CL3, a bank BK may be disposed on the overcoat layer 409, and an emitting layer EL and a cathode electrode CE may be disposed on the bank BK.

[0201] Here, the bank BK can be a black color bank.

[0202] The first pattern 341a of the seventh active pattern 341 is made of an oxide semiconductor material, and the second pattern 341b of the seventh active pattern 341 is made of a transparent conductive oxide, so that a laser with a short wavelength can be used in the repair process. For example, the wavelength of the laser irradiated in the repair process may be 250 nm to 350 nm, or a laser with a wavelength of 260 nm to 270 nm may be used.

[0203] As shown in FIG. 9, the laser irradiated to the seventh active pattern 341 can cut the seventh active pattern 341, and a part of the laser can reach the bank BK.

[0204] As described above, the bank BK according to the embodiment of the present disclosure does not transmit light of 630 nm or less, and therefore does not transmit lasers with wavelengths of 250 nm to 350 nm.

[0205] Therefore, when a laser is irradiated to the third cut region CL3 of the seventh active pattern 341 in the process of repairing the third subpixel SP3, the bank BK arranged on the seventh active pattern 341 prevents the laser from reaching the cathode electrode CE, thereby preventing the cathode electrode CE from being damaged.

[0206] In Figures 3 to 9, a configuration has been described in which a laser is irradiated to an active pattern electrically connected to the second signal line SL2 or the third signal line SL3, which are data lines, or an active pattern electrically connected to the fourth signal line SL4, which is a reference voltage line, in order to repair the first to fourth subpixels SP1, SP2, SP3, and SP4. However, the embodiments of the present disclosure are not limited to this.

[0207] 10 to 12, the structure of the display panel according to the embodiment of the present disclosure will be considered as follows.

[0208] Fig. 10 is a diagram showing structures of first to fourth subpixels included in a display panel according to an embodiment of the present disclosure. Fig. 11 is a diagram showing in a simplified manner that a laser is irradiated onto a first cut region of a third active pattern in a step of repairing a first subpixel. Fig. 12 is a diagram showing in a simplified manner that a laser is irradiated onto a third cut region of a seventh active pattern in a step of repairing a third subpixel of Fig. 10.

[0209] The structures of the first to fourth subpixels SP1, SP2, SP3, and SP4 shown in FIG. 10 may be substantially the same as the structures of the first to fourth subpixels SP1, SP2, SP3, and SP4 shown in FIG.

[0210] Compared to FIG. 3, FIG. 10 differs in its configuration in that at least one cut region is provided in each of the third active pattern 323 arranged in the first subpixel SP1, the sixth active pattern 333 arranged in the second subpixel SP2, the ninth active pattern 343 arranged in the third subpixel SP3, and the twelfth active pattern 353 arranged in the fourth subpixel SP4.

[0211] Specifically, referring to FIG. 10, the third active pattern 323, the sixth active pattern 333, the ninth active pattern 343, and the twelfth active pattern 353 are each connected to the first signal line SL1 and can act as wiring.

[0212] The third active pattern 323 may include a first cut region CL1 to which a laser may be irradiated in a repair process of the first subpixel SP1.

[0213] The sixth active pattern 333 may include a second cut region CL2 to which a laser may be irradiated in a repair process of the second subpixel SP2.

[0214] The ninth active pattern 343 may include a third cut region CL3 to which a laser may be irradiated in a repair process of the third subpixel SP3.

[0215] The twelfth active pattern 353 may include a fourth cut region CL4 to which a laser may be irradiated in a repair process of the fourth sub-pixel SP4.

[0216] Referring to Figure 10, each of the first cut area CL1 provided in the third active pattern 323, the second cut area CL2 provided in the sixth active pattern 333, the third cut area CL3 provided in the ninth active pattern 343, and the fourth cut area CL4 provided in the twelfth active pattern 353 may be arranged in the non-light-emitting area NEA and may not overlap with the anode electrodes AE1, AE2, AE3, and AE4.

[0217] Referring to FIG. 11, the first cut area CL1 of the third active pattern 323 used to repair the first sub-pixel SP1 may be disposed in the non-emitting area NEA.

[0218] The first cut region CL1 of the third active pattern 323 may not overlap the first anode electrode AE1 and may overlap the bank BK.

[0219] Specifically, referring to FIG. 11, an overcoat layer 409 may be disposed on the third active pattern 323 including the first cut region CL1, a bank BK may be disposed on the overcoat layer 409, and an emitting layer EL and a cathode electrode CE may be disposed on the bank BK.

[0220] The first pattern 323a of the third active pattern 323 may be made of an oxide semiconductor material, and the second pattern 323b of the third active pattern 323 may be made of a transparent conductive oxide. In the repair process, the wavelength of the laser irradiated to the first cut region CL1 of the third active pattern 323 may be 250 nm to 350 nm, or a laser with a wavelength of 260 nm to 270 nm may be used.

[0221] As shown in FIG. 11, the laser irradiated to the third active pattern 323 can cut the third active pattern 323, and a portion of the laser can reach the bank BK arranged on the third active pattern 323.

[0222] The bank BK according to the embodiment of the present disclosure does not transmit light of 630 nm or less, and therefore does not transmit lasers with wavelengths of 250 nm to 350 nm.

[0223] Therefore, when a laser is irradiated to the first cut area CL1 of the third active pattern 323 in the process of repairing the first subpixel SP1, the bank BK arranged on the third active pattern 323 prevents the laser from reaching the cathode electrode CE, thereby preventing the cathode electrode CE from being damaged.

[0224] FIG. 11 illustrates an example of a layered structure of an area in which the first cut area CL1 of the third active pattern 323 arranged in the first subpixel SP1 is provided, but the layered structures of areas in which the cut areas of the sixth active pattern 333 arranged in the second subpixel SP2, the ninth active pattern 343 arranged in the third subpixel SP3, and the twelfth active pattern 353 arranged in the fourth subpixel SP4 are provided may also be the same as the structure in FIG. 11.

[0225] Furthermore, when comparing the structure of Figure 10 with Figure 3, the positions of the third cut region CL3 provided in each of the seventh and eighth active patterns 341, 342 arranged in the third sub-pixel SP3 and the fourth cut region CL4 provided in each of the tenth and eleventh active patterns 351, 352 arranged in the fourth sub-pixel SP4 may be different.

[0226] Specifically, referring to FIG. 10, in the region where the third cut region CL3 is provided, each of the seventh and eighth active patterns 341 and 342 may not overlap with the bank BK but may overlap with the third anode electrode AE3.

[0227] 10, in the region where the fourth cut region CL4 is provided, the tenth active pattern 351 may not overlap with the bank BK but may overlap with the third anode electrode AE3. In the region where the fourth cut region CL4 is provided, the eleventh active pattern 352 may not overlap with the bank BK but may overlap with the fourth anode electrode AE4.

[0228] In other words, in the third and fourth subpixels SP4, the active patterns 341, 342, 351, 352 connected to the data line or the reference voltage line can have a structure in which they overlap with one anode electrode AE ​​in the portion where the cut region CL is located, but do not overlap with the bank BK, thereby overlapping with one light-emitting region EA.

[0229] 10, in the region where the third cut region CL3 is provided, each of the seventh and eighth active patterns 341, 342 may overlap at least a part of the third light-emitting region EA3. In addition, in the region where the fourth cut region CL4 is provided, the tenth active pattern 351 may overlap the third light-emitting region EA3, and in the region where the fourth cut region CL4 is provided, the eleventh active pattern 352 may overlap the fourth light-emitting region EA4.

[0230] In this way, in the third and fourth subpixels SP4, the cut areas CL of the active patterns 341, 342, 351, 352 connected to the data line or the reference voltage line are arranged to overlap one of the light-emitting areas EA3, EA4, so that a repair area can be provided without reducing the aperture ratio of the display panel 110.

[0231] For example, referring to FIG. 12, the third cut area CL3 of the seventh active pattern 341 used to repair the third sub-pixel SP3 may be disposed in the third light-emitting area EA3.

[0232] The third cut region CL3 of the seventh active pattern 341 overlaps the third anode electrode AE3, the light emitting layer EL, and the cathode electrode CE, but does not necessarily overlap the bank BK.

[0233] Specifically, referring to FIG. 12, an interlayer insulating film 406 and an overcoat layer 409 may be disposed on the seventh active pattern 341 including the third cut region CL3, a third anode electrode AE3 may be disposed on the overcoat layer 409, and an emitting layer EL and a cathode electrode CE may be disposed on the third anode electrode AE3.

[0234] The first pattern 341a of the seventh active pattern 341 may be made of an oxide semiconductor material, and the second pattern 341b of the seventh active pattern 341 may be made of a transparent conductive oxide. In the repair process, the wavelength of the laser irradiated to the third cut region CL3 of the seventh active pattern 341 may be 250 nm to 350 nm, or a laser with a wavelength of 260 nm to 270 nm may be used.

[0235] As shown in FIG. 12, the laser irradiated to the seventh active pattern 341 can cut the seventh active pattern 341, and a portion of the laser can reach the overcoat layer 409 disposed on the seventh active pattern 341.

[0236] As shown in FIG. 12, the laser that reaches the overcoat layer 409 may be absorbed by the overcoat layer 409, and the laser may not be able to reach the third anode electrode AE3 and the cathode electrode CE.

[0237] In this case, the thickness of the overcoat layer 409 can be ten times or more the thickness of the light-emitting layer EL including a plurality of organic layers.

[0238] FIG. 12 shows an example of the layered structure of the area in which the third cut area CL3 of the seventh active pattern 341 arranged in the third subpixel SP3 is provided, but the layered structures of the areas in which the cut areas of the eighth active pattern 342 arranged in the third subpixel SP3, the tenth active pattern 351 arranged in the fourth subpixel SP4, and the eleventh active pattern 352 arranged in the fourth subpixel SP4 are provided may also be the same as the structure in FIG. 12.

[0239] FIG. 13 is a table comparing the aperture ratio of the display panel according to the comparative example with the aperture ratio of the display panel according to the embodiment.

[0240] 13, the display panel according to the comparative example has a repair pattern made of a metal layer and disposed in a non-light emitting region, and the display panel according to the embodiment has the structure shown in FIG.

[0241] Referring to FIG. 13, it can be seen that the aperture ratio of the display panel according to the embodiment is 7.5% larger than the aperture ratio of the display panel according to the comparative example.

[0242] That is, by improving the aperture ratio of the display panel according to the embodiment, the light emitting efficiency is improved, and the display panel can be driven with low power consumption.

[0243] According to an embodiment of the present disclosure, a display panel and a display device can be provided that can prevent the area of ​​the opening from being reduced by using a transparent active pattern that functions as wiring as a repair pattern.

[0244] According to an embodiment of the present disclosure, by arranging at least one of a color filter, a black bank, and an overcoat layer on an active pattern, it is possible to provide a display panel and a display device in which the cathode electrode and the anode electrode are not damaged by a laser irradiated during the repair process.

[0245] According to an embodiment of the present disclosure, by performing the repair process using a transparent active pattern as a repair pattern, it is possible to provide a display panel and a display device that can prevent defects caused by external elements penetrating through a sealing layer arranged on the cathode electrode by preventing the laser from reaching the cathode electrode and preventing damage to the cathode electrode.

[0246] The above description is merely an illustrative example of the technical idea of ​​the present disclosure, and a person having ordinary knowledge in the technical field to which the present disclosure belongs may make various modifications and variations without departing from the essential characteristics of the present disclosure. Furthermore, the embodiments shown in the present disclosure are for the purpose of explanation and do not limit the technical idea of ​​the present disclosure, and therefore the scope of the technical idea of ​​the present disclosure is not limited by these embodiments. [Explanation of symbols]

[0247] 100 display device 110 Display Panel CL Cut Area

Claims

1. A substrate including first to fourth sub-pixels each including a light-emitting region and a non-light-emitting region surrounding the light-emitting region; a first signal line, a second signal line, a third signal line and a fourth signal line spaced apart from one another and disposed on the substrate; the first to fourth sub-pixels each include a first to third active pattern disposed on the substrate; the first active pattern is electrically connected to the fourth signal line, the second active pattern is electrically connected to the second signal line or the third signal line, and the third active pattern is electrically connected to the first signal line; At least one of the first to third active patterns is cut into two regions in a cut region; the cut regions of the first and second active patterns disposed in the first and second sub-pixels overlap with the light-emitting regions; At least one of the cut regions of the first to third active patterns arranged in the third and fourth sub-pixels is arranged in the non-light-emitting region; In a portion of the second active pattern disposed in the first sub-pixel where the cut region is provided, a first color filter is disposed on the second active pattern; an overcoat layer is disposed on the first color filter; A display panel in which a first anode electrode, a light-emitting layer, and a cathode electrode are disposed in this order on the overcoat layer.

2. A substrate including first to fourth subpixels each including a light-emitting region and a non-light-emitting region surrounding the light-emitting region; a first signal line, a second signal line, a third signal line and a fourth signal line spaced apart from one another and disposed on the substrate; the first to fourth sub-pixels each include a first to third active pattern disposed on the substrate; the first active pattern is electrically connected to the fourth signal line, the second active pattern is electrically connected to the second signal line or the third signal line, and the third active pattern is electrically connected to the first signal line; At least one of the first to third active patterns is cut into two regions in a cut region; the cut regions of the first and second active patterns disposed in the first and second sub-pixels overlap with the light-emitting regions; At least one of the cut regions of the first to third active patterns arranged in the third and fourth sub-pixels is arranged in the non-light-emitting region; In a portion of the first active pattern included in the second sub-pixel where the cut region is provided, a second color filter is disposed on the first active pattern; an overcoat layer is disposed on the second color filter; A display panel in which a second anode electrode, a light-emitting layer, and a cathode electrode are disposed in this order on the overcoat layer.

3. A substrate including first to fourth subpixels each including a light-emitting region and a non-light-emitting region surrounding the light-emitting region; a first signal line, a second signal line, a third signal line and a fourth signal line spaced apart from one another and disposed on the substrate; the first to fourth sub-pixels each include a first to third active pattern disposed on the substrate; the first active pattern is electrically connected to the fourth signal line, the second active pattern is electrically connected to the second signal line or the third signal line, and the third active pattern is electrically connected to the first signal line; At least one of the first to third active patterns is cut into two regions in a cut region; the cut regions of the first and second active patterns disposed in the first and second sub-pixels overlap with the light-emitting regions; At least one of the cut regions of the first to third active patterns arranged in the third and fourth sub-pixels is arranged in the non-light-emitting region; In a portion where the cut region of the first and second active patterns arranged in the second sub-pixel is provided, a second color filter is disposed on the first and second active patterns; an overcoat layer is disposed on the second color filter; A display panel in which a second anode electrode, a light-emitting layer, and a cathode electrode are disposed in this order on the overcoat layer.

4. A substrate including first to fourth subpixels each including a light-emitting region and a non-light-emitting region surrounding the light-emitting region; a first signal line, a second signal line, a third signal line and a fourth signal line spaced apart from one another and disposed on the substrate; the first to fourth sub-pixels each include a first to third active pattern disposed on the substrate; the first active pattern is electrically connected to the fourth signal line, the second active pattern is electrically connected to the second signal line or the third signal line, and the third active pattern is electrically connected to the first signal line; At least one of the first to third active patterns is cut into two regions in a cut region; the cut regions of the first and second active patterns disposed in the first and second sub-pixels overlap with the light-emitting regions; At least one of the cut regions of the first to third active patterns arranged in the third and fourth sub-pixels is arranged in the non-light-emitting region; In a portion of the first active pattern included in the first subpixel where the cut region is provided, a first color filter is disposed on the first active pattern; an overcoat layer is disposed on the first color filter; A black bank is disposed on the overcoat layer, A display panel in which a light-emitting layer and a cathode electrode are disposed in this order on the black bank.

5. the light-emitting region included in each of the first and second sub-pixels overlaps with a color filter; 5. The display panel according to claim 1, wherein the light-emitting region included in each of the third sub-pixels is not overlapped with a color filter.

6. the first subpixel includes a first light-emitting region, the second subpixel includes a second light-emitting region, the third subpixel includes a third light-emitting region, and the fourth subpixel includes a fourth light-emitting region; the first light-emitting regions and the second light-emitting regions are arranged in n rows, 5. The display panel according to claim 1, wherein the third light-emitting region and the fourth light-emitting region are arranged in an n+1th row.

7. The display panel according to claim 1 , wherein the cut region of the second active pattern arranged in the first sub-pixel overlaps a first light-emitting region included in the first sub-pixel.

8. The display panel of claim 2 , wherein the cut region of the first active pattern included in the first sub-pixel overlaps a second light-emitting region included in the second sub-pixel.

9. The display panel according to claim 3 , wherein the cut regions of the first and second active patterns arranged in the second sub-pixel overlap with a second light-emitting region included in the second sub-pixel.

10. The display panel of claim 4 , wherein the cut region of the first active pattern included in the first sub-pixel overlaps with the non-light-emitting region included in the first sub-pixel.

11. In a portion where the cut region of the first and second active patterns arranged in the third sub-pixel is provided, an overcoat layer is disposed on the first and second active patterns; A black bank is disposed on the overcoat layer, 5. The display panel according to claim 1, wherein a light-emitting layer and a cathode electrode are disposed in this order on the black bank.

12. The display panel of claim 11 , wherein the cut regions of the first and second active patterns arranged in the third sub-pixel overlap with the non-light-emitting region included in the third sub-pixel.

13. In the portion where the cut region of the first and second active patterns included in the fourth sub-pixel is provided, an overcoat layer is disposed on the first and second active patterns; A black bank is disposed on the overcoat layer, 5. The display panel according to claim 1, wherein a light-emitting layer and a cathode electrode are disposed in this order on the black bank.

14. the cut region of the first active pattern disposed in the fourth sub-pixel overlaps with the non-light-emitting region included in the third sub-pixel; The display panel of claim 13 , wherein the cut region of the second active pattern disposed in the fourth sub-pixel overlaps with the non-light-emitting region included in the fourth sub-pixel.

15. In a portion where the cut region of the first and second active patterns arranged in the third sub-pixel is provided, an overcoat layer is disposed on the first and second active patterns; 5. The display panel according to claim 1, further comprising a third anode electrode, a light-emitting layer, and a cathode electrode disposed in this order on the overcoat layer.

16. The display panel of claim 15 , wherein the cut regions of the first and second active patterns arranged in the third sub-pixel overlap with a third light-emitting region included in the third sub-pixel.

17. In a portion of the first active pattern included in the fourth sub-pixel where the cut region is provided, an overcoat layer is disposed on the first active pattern; 5. The display panel according to claim 1, further comprising a third anode electrode, a light-emitting layer, and a cathode electrode disposed in this order on the overcoat layer.

18. The display panel of claim 17 , wherein the cut region of the first active pattern included in the fourth sub-pixel overlaps with a third light-emitting region included in the third sub-pixel.

19. In a portion of the second active pattern disposed in the fourth sub-pixel where the cut region is provided, an overcoat layer is disposed on the second active pattern; 5. The display panel according to claim 1, further comprising a fourth anode electrode, a light-emitting layer, and a cathode electrode disposed in this order on the overcoat layer.

20. The display panel of claim 19 , wherein the cut region of the second active pattern disposed in the fourth sub-pixel overlaps with a fourth light-emitting region included in the fourth sub-pixel.

21. 5. The display panel according to claim 1, wherein the cut regions of the third active pattern arranged in each of the first to fourth sub-pixels are arranged in the non-light-emitting regions.

22. each of the first to third active patterns includes a first pattern and a second pattern disposed on the first pattern; the first pattern includes an oxide semiconductor material; 5. The display panel according to claim 1, wherein the second pattern includes a transparent conductive oxide.

23. the first signal line is a drive voltage line; the second and third signal lines are data lines; 5. The display panel according to claim 1, wherein the fourth signal line is a reference voltage line.

24. A method for repairing a display panel according to any one of claims 1 to 4, comprising: A repair method in which a laser is irradiated onto the cut region when repairing the first to third active patterns.

25. a display panel including first to fourth sub-pixels each including a light-emitting region and a non-light-emitting region surrounding the light-emitting region; a first signal line, a second signal line, a third signal line and a fourth signal line spaced apart from each other, the first signal line being disposed on a substrate of the display panel; the first to fourth sub-pixels each include a first to third active pattern disposed on the substrate; the first active pattern is electrically connected to the fourth signal line, the second active pattern is electrically connected to the second signal line or the third signal line, and the third active pattern is electrically connected to the first signal line; At least one of the first to third active patterns is cut into two regions in a cut region; the cut regions of the first and second active patterns disposed in the first and second sub-pixels overlap with the light-emitting regions; At least one of the cut regions of the first to third active patterns arranged in the third and fourth sub-pixels is arranged in the non-light-emitting region; In a portion of the second active pattern disposed in the first sub-pixel where the cut region is provided, a first color filter is disposed on the second active pattern; an overcoat layer is disposed on the first color filter; A display device in which a first anode electrode, a light-emitting layer, and a cathode electrode are disposed in this order on the overcoat layer.

26. A substrate including first to fourth subpixels each including a light-emitting region and a non-light-emitting region surrounding the light-emitting region; a first signal line, a second signal line, a third signal line and a fourth signal line spaced apart from one another and disposed on the substrate; the first to fourth sub-pixels each include a first to third active pattern disposed on the substrate; the first active pattern is electrically connected to the fourth signal line, the second active pattern is electrically connected to the second signal line or the third signal line, and the third active pattern is electrically connected to the first signal line; At least one of the first to third active patterns is cut into two regions in a cut region; the cut regions of the first and second active patterns disposed in the first and second sub-pixels overlap with the light-emitting regions; At least one of the cut regions of the first to third active patterns arranged in the third and fourth sub-pixels is arranged in the non-light-emitting region; In a portion of the first active pattern included in the second sub-pixel where the cut region is provided, a second color filter is disposed on the first active pattern; an overcoat layer is disposed on the second color filter; A display device in which a second anode electrode, a light-emitting layer, and a cathode electrode are disposed in this order on the overcoat layer.

27. ​​A substrate including first to fourth subpixels each including a light-emitting region and a non-light-emitting region surrounding the light-emitting region; a first signal line, a second signal line, a third signal line and a fourth signal line spaced apart from one another and disposed on the substrate; the first to fourth sub-pixels each include a first to third active pattern disposed on the substrate; the first active pattern is electrically connected to the fourth signal line, the second active pattern is electrically connected to the second signal line or the third signal line, and the third active pattern is electrically connected to the first signal line; At least one of the first to third active patterns is cut into two regions in a cut region; the cut regions of the first and second active patterns disposed in the first and second sub-pixels overlap with the light-emitting regions; At least one of the cut regions of the first to third active patterns arranged in the third and fourth sub-pixels is arranged in the non-light-emitting region; In a portion where the cut region of the first and second active patterns arranged in the second sub-pixel is provided, a second color filter is disposed on the first and second active patterns; an overcoat layer is disposed on the second color filter; A display device in which a second anode electrode, a light-emitting layer, and a cathode electrode are disposed in this order on the overcoat layer.

28. A substrate including first to fourth subpixels each including a light-emitting region and a non-light-emitting region surrounding the light-emitting region; a first signal line, a second signal line, a third signal line and a fourth signal line spaced apart from one another and disposed on the substrate; the first to fourth sub-pixels each include a first to third active pattern disposed on the substrate; the first active pattern is electrically connected to the fourth signal line, the second active pattern is electrically connected to the second signal line or the third signal line, and the third active pattern is electrically connected to the first signal line; At least one of the first to third active patterns is cut into two regions in a cut region; the cut regions of the first and second active patterns disposed in the first and second sub-pixels overlap with the light-emitting regions; At least one of the cut regions of the first to third active patterns arranged in the third and fourth sub-pixels is arranged in the non-light-emitting region; In a portion of the first active pattern included in the first subpixel where the cut region is provided, a first color filter is disposed on the first active pattern; an overcoat layer is disposed on the first color filter; A black bank is disposed on the overcoat layer, A display device in which a light-emitting layer and a cathode electrode are disposed in this order on the black bank.

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