Display device and method for manufacturing the same
By controlling dopant concentration and deposition angles in the organic layer of OLEDs, the display device addresses performance deterioration issues, ensuring precise layer formation and improved luminescence efficiency.
Patent Information
- Application Number
- JP2021005018
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-01-15
- Publication Date
- 2024-12-23
- Estimated Expiration
- 2041-01-15
AI Technical Summary
Existing display devices using organic light emitting diodes (OLEDs) face performance deterioration due to inaccuracies in forming the organic layer, particularly when multiple functional layers are laminated, leading to misalignment of the end face of the organic layer and reduced formation accuracy.
The display device incorporates a design where the dopant concentration of the guest material in specific regions of the organic layer is controlled, with a lower concentration in one region and a higher concentration in another, and the deposition process is adjusted to ensure precise distribution of host and guest materials through varying radiation angles.
This approach suppresses performance deterioration by minimizing carrier generation at the peripheral portions of the organic layer, reducing undesired current leakage and maintaining optimal luminescence efficiency and chromaticity.
Smart Images

Figure 0007604240000001 
Figure 0007604240000002 
Figure 0007604240000003
Abstract
Description
[Technical field]
[0001] The present embodiment relates to a display device. [Background technology]
[0002] In recent years, display devices using organic light-emitting diodes (OLEDs) as display elements have been put to practical use. The display element has an organic layer between a pixel electrode and a common electrode. The organic layer includes a light-emitting layer as well as functional layers such as a hole transport layer and an electron transport layer. Such an organic layer is formed, for example, by a vacuum deposition method.
[0003] For example, in the case of mask deposition, a fine mask having an opening corresponding to each pixel is applied. However, due to the processing accuracy of the fine mask, deformation of the opening shape, etc., the formation accuracy of the thin film formed by deposition may be reduced. For example, when forming an organic layer in which multiple functional layers are stacked, the end face of the organic layer may not be formed at the desired position, which may lead to deterioration of the performance of the display element. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] JP 2000-195677 A [Patent Document 2] JP 2004-207217 A [Patent Document 3] JP 2008-135325 A [Patent Document 4] JP 2009-32673 A [Patent Document 5] JP 2010-118191 A [Patent Document 6] International Publication No. 2019 / 026511 Summary of the Invention [Problem to be solved by the invention]
[0005] An object of the present invention is to provide a display device capable of suppressing deterioration in performance of a display element, and a method for manufacturing the display device. [Means for solving the problem]
[0006] A display device according to an embodiment includes: The semiconductor device comprises a substrate, a first insulating layer disposed on the substrate, a lower electrode disposed on the first insulating layer, a second insulating layer disposed on the first insulating layer and having an opening overlapping the lower electrode, an organic layer having a light-emitting layer and a functional layer, disposed in the opening, covering the lower electrode, and an upper electrode covering the organic layer, wherein the functional layer has a first region located between the lower electrode and the light-emitting layer, and a second region including an end face located directly above the second insulating layer, and a dopant concentration of a guest material in the second region is lower than a dopant concentration of a guest material in the first region.
[0007] A display device according to an embodiment includes: The light-emitting element comprises a substrate, a first insulating layer disposed on the substrate, a lower electrode disposed on the first insulating layer, a second insulating layer disposed on the first insulating layer and having an opening overlapping the lower electrode, an organic layer having a light-emitting layer, disposed in the opening, and covering the lower electrode, and an upper electrode covering the organic layer, wherein the light-emitting layer has a first region located between the lower electrode and the upper electrode and a second region including an end face located directly above the second insulating layer, and a dopant concentration of the light-emitting material in the second region is higher than a dopant concentration of the light-emitting material in the first region.
[0008] A method for manufacturing a display device according to an embodiment includes the steps of: A method for manufacturing a display device comprising a lower electrode, an organic layer disposed on the lower electrode, and an upper electrode disposed on the organic layer, wherein the step of forming the organic layer includes a step of forming a functional layer, the step of forming the functional layer including evaporating a host material radiated at a first radiation angle and evaporating a guest material radiated at a second radiation angle smaller than the first radiation angle.
[0009] A method for manufacturing a display device according to an embodiment includes the steps of: A method for manufacturing a display device including a lower electrode, an organic layer disposed on the lower electrode, and an upper electrode disposed on the organic layer, wherein the step of forming the organic layer includes a step of forming a light-emitting layer, and the step of forming the light-emitting layer includes a step of depositing a host material radiated at a first radiation angle, and a light-emitting material that is a guest material, at a second radiation angle larger than the first radiation angle. [Brief description of the drawings]
[0010] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a display device DSP according to this embodiment. [Diagram 2] FIG. 2 is a diagram showing an example of the configuration of the display element 20. As shown in FIG. [Diagram 3] FIG. 3 is a plan view showing an example of the pixel PX shown in FIG. [Figure 4] FIG. 4 is a cross-sectional view showing an example of the display element 20. As shown in FIG. [Diagram 5] FIG. 5 is a diagram for explaining a method of manufacturing the display element 20 shown in FIG. [Figure 6] FIG. 6 is a diagram for explaining one method for controlling the radiation angle. [Figure 7] FIG. 7 is a diagram for explaining another method for controlling the radiation angle. [Figure 8] FIG. 8 is a diagram for explaining another method for controlling the radiation angle. [Figure 9] FIG. 9 is a cross-sectional view showing another example of a display element. [Figure 10] FIG. 10 is a diagram for explaining a method of manufacturing the display elements 21 and 22 shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0011] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The disclosure is merely an example, and appropriate modifications that a person skilled in the art can easily conceive of while maintaining the gist of the invention are naturally included in the scope of the present invention. In addition, the drawings may be schematic in width, thickness, shape, etc. of each part compared to the actual embodiment in order to make the explanation clearer, but they are merely examples and do not limit the interpretation of the present invention. In this specification and each figure, components that perform the same or similar functions as those described above with respect to the previous figures are given the same reference numerals, and duplicate detailed descriptions may be omitted as appropriate.
[0012] In addition, in the drawings, an X-axis, a Y-axis, and a Z-axis that are perpendicular to each other are shown as necessary to facilitate understanding. The direction along the X-axis is called the X-direction or the first direction, the direction along the Y-axis is called the Y-direction or the second direction, and the direction along the Z-axis is called the Z-direction or the third direction. The plane defined by the X-axis and the Y-axis is called the XY plane. Viewing the XY plane is called planar view.
[0013] The display device DSP according to this embodiment is an organic electroluminescence display device having an organic light-emitting diode (OLED) as a display element, and is mounted on a television, a personal computer, a mobile terminal, a mobile phone, etc. The display element described below can be applied as a light-emitting element of a lighting device, and the display device DSP can be diverted to other electronic devices such as a lighting device.
[0014] 1 is a diagram showing an example of the configuration of a display device DSP according to this embodiment. The display device DSP includes a display unit DA that displays an image on an insulating substrate 10. The substrate 10 may be glass or a flexible resin film.
[0015] The display unit DA includes a plurality of pixels PX arranged in a matrix in a first direction X and a second direction Y. Each pixel PX includes a plurality of sub-pixels SP1, SP2, and SP3. In one example, the pixel PX includes a red sub-pixel SP1, a green sub-pixel SP2, and a blue sub-pixel SP3. The pixel PX may include four or more sub-pixels including sub-pixels of other colors such as white in addition to the above three sub-pixels.
[0016] An example of the configuration of one sub-pixel SP included in a pixel PX will be briefly described. That is, the subpixel SP includes a pixel circuit 1 and a display element 20 whose driving is controlled by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a driving transistor 3, and a capacitor 4. The pixel switch 2 and the driving transistor 3 are switching elements constituted by, for example, thin film transistors.
[0017] With respect to the pixel switch 2, the gate electrode is connected to the scanning line GL, the source electrode is connected to the signal line SL, and the drain electrode is connected to one electrode constituting the capacitor 4 and the gate electrode of the drive transistor 3. With respect to the drive transistor 3, the source electrode is connected to the other electrode constituting the capacitor 4 and the power line PL, and the drain electrode is connected to the anode of the display element 20. The cathode of the display element 20 is connected to the power supply line FL. Note that the configuration of the pixel circuit 1 is not limited to the example shown in the figure.
[0018] The display element 20 is an organic light-emitting diode (OLED) that is a light-emitting element. For example, the subpixel SP1 includes a display element that emits light corresponding to a red wavelength, the subpixel SP2 includes a display element that emits light corresponding to a green wavelength, and the subpixel SP3 includes a display element that emits light corresponding to a blue wavelength. The pixel PX includes multiple subpixels SP1, SP2, and SP3 that have different display colors, thereby realizing multi-color display.
[0019] However, the display elements 20 of the subpixels SP1, SP2, and SP3 may be configured to emit light of the same color, thereby achieving a monochromatic display.
[0020] Furthermore, when the display element 20 of each of the subpixels SP1, SP2, and SP3 is configured to emit white light, a color filter may be disposed facing the display element 20. For example, the subpixel SP1 includes a red color filter facing the display element 20, the subpixel SP2 includes a green color filter facing the display element 20, and the subpixel SP3 includes a blue color filter facing the display element 20. This makes it possible to realize a multi-color display.
[0021] Alternatively, when the display elements 20 of the subpixels SP1, SP2, and SP3 are configured to emit ultraviolet light, a light conversion layer is disposed opposite the display elements 20, thereby enabling multicolor display to be realized.
[0022] FIG. 2 is a diagram showing an example of the configuration of the display element 20. As shown in FIG. The display element 20 includes a lower electrode (first electrode) E1, an organic layer OR, and an upper electrode (second electrode) E2. The organic layer OR includes a carrier adjustment layer (first carrier adjustment layer) CA1, a light-emitting layer EL, and a carrier adjustment layer (second carrier adjustment layer) CA2. The carrier adjustment layer CA1 is located between the lower electrode E1 and the light-emitting layer EL, and the carrier adjustment layer CA2 is located between the light-emitting layer EL and the upper electrode E2. The carrier adjustment layers CA1 and CA2 include a plurality of functional layers. Here, an example will be described in which the lower electrode E1 corresponds to the anode and the upper electrode E2 corresponds to the cathode.
[0023] The carrier adjustment layer CA1 includes, as functional layers, a hole injection layer F11, a hole transport layer F12, a carrier generation layer F13, an electron blocking layer F14, etc. The hole injection layer F11 is disposed on the lower electrode E1, the hole transport layer F12 is disposed on the hole injection layer F11, the carrier generation layer F13 is disposed on the hole transport layer F12, the electron blocking layer F14 is disposed on the carrier generation layer F13, and the light-emitting layer EL is disposed on the electron blocking layer F14.
[0024] The carrier adjustment layer CA2 includes, as functional layers, a hole blocking layer F21, an electron transport layer F22, an electron injection layer F23, etc. The hole blocking layer F21 is disposed on the light-emitting layer EL, the electron transport layer F22 is disposed on the hole blocking layer F21, the electron injection layer F23 is disposed on the electron transport layer F22, and the upper electrode E2 is disposed on the electron injection layer F23.
[0025] In addition, in addition to the above-mentioned functional layers, the carrier adjustment layers CA1 and CA2 may include other functional layers as necessary, and at least one of the above-mentioned functional layers may be omitted in the carrier adjustment layers CA1 and CA2.
[0026] FIG. 3 is a plan view showing an example of the pixel PX shown in FIG. The sub-pixels SP1, SP2, and SP3 constituting one pixel PX are each formed in a substantially rectangular shape extending in the second direction Y, and are aligned in the first direction X. The outer shape of each sub-pixel corresponds to the outer shape of the light-emitting area EA in the display element 20, but is shown in a simplified form and does not necessarily reflect the actual shape. Here, it is assumed that the light-emitting area EA is formed in a rectangular shape having a short side extending in the first direction X and a long side extending in the second direction Y.
[0027] The insulating layer 12, which will be described in detail later, is formed in a lattice shape extending in the first direction X and the second direction Y in a plan view, and surrounds each of the subpixels SP1, SP2, and SP3 or the display elements 20 of each subpixel. Such an insulating layer 12 may be called a rib, a partition wall, a bank, etc. The light-emitting region EA is formed in an opening OP of the insulating layer 12, and corresponds to a region where an organic layer OR is interposed between a lower electrode E1 and an upper electrode E2.
[0028] As an example, when the display elements 20 of the subpixels SP1, SP2, and SP3 are configured to emit light of different colors, the first direction X corresponds to the direction in which the subpixels of the different display colors are arranged, and the second direction Y corresponds to the direction in which the subpixels of the same display color are arranged. Alternatively, the subpixels of the same display color may be arranged in an oblique direction different from the first direction X and the second direction Y.
[0029] FIG. 4 is a cross-sectional view showing an example of the display element 20. As shown in FIG. The pixel circuit 1 shown in FIG. 1 is disposed on a substrate 10 and covered with an insulating layer 11. In FIG. 4, only the drive transistor 3 included in the pixel circuit 1 is illustrated in a simplified manner. The insulating layer (first insulating layer) 11 corresponds to a base layer of the display element 20. The insulating layer (second insulating layer) 12 is disposed on the insulating layer 11. The insulating layers 11 and 12 are, for example, organic insulating layers.
[0030] The lower electrode E1 is disposed on the insulating layer 11. The lower electrode E1 is an electrode disposed for each sub-pixel or each display element, and is electrically connected to the drive transistor 3. Such a lower electrode E1 may be called a pixel electrode, an anode, or the like.
[0031] The lower electrode E1 is a metal electrode formed of a metal material such as silver or aluminum. The lower electrode E1 may be a transparent electrode formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The lower electrode E1 may be a laminate of a transparent electrode and a metal electrode. For example, the lower electrode E1 may be configured as a laminate in which a transparent electrode, a metal electrode, and a transparent electrode are laminated in this order, or may be configured as a laminate of three or more layers. In the top emission type display element 20, the lower electrode E1 includes a metal electrode as a reflective electrode.
[0032] The insulating layer 12 has an opening OP. The opening OP is a through-hole formed in a region overlapping the lower electrode E1 and penetrating the insulating layer 12 to the lower electrode E1. The peripheral portion of the lower electrode E1 is covered with the insulating layer 12, and the central portion of the lower electrode E1 is exposed from the insulating layer 12 at the opening OP.
[0033] The organic layer OR includes a functional layer F1 and an emitting layer EL. The organic layer OR is disposed in the opening OP and covers the lower electrode E1. The functional layer F1 is at least one layer constituting the carrier adjustment layer CA1 shown in FIG. 2, and is, for example, a hole injection layer F11 or a carrier generation layer F13. Note that in FIG. 4, illustration of other functional layers included in the organic layer OR is omitted.
[0034] The functional layer F1 has a region (first region) A1 located between the lower electrode E1 and the light-emitting layer EL, and a region A2 located between the insulating layer 12 and the light-emitting layer EL. Of the region A2, a peripheral region (second region) A2E is a region that includes an end face SS located directly above the insulating layer 12. The end face SS is an inclined surface. The thickness of the region A2E along the third direction Z is thinner toward the outside (farther away from the region A1).
[0035] The functional layer F1 is a mixed layer containing a host material and a guest material. That is, the functional layer F1 is formed by doping the host material with the guest material. When the functional layer F1 is a hole injection layer or a carrier generation layer, the functional layer F1 contains a p-type dopant as a guest material. The dopant concentration of the guest material in the region A2E is lower than the dopant concentration of the guest material in the region A1. That is, the dopant concentration of the guest material in the functional layer F1 has a concentration gradient that decreases toward the outside. Such a functional layer F1 is formed by co-evaporating the host material and the guest material, as described later. In addition, the functional layer F1 is covered with the light-emitting layer EL.
[0036] The upper electrode E2 covers the organic layer OR. The upper electrode E2 may be called a common electrode, a counter electrode, a cathode, or the like.
[0037] The upper electrode E2 is a semi-transparent metal electrode formed of a metal material such as magnesium or silver. The upper electrode E2 may be a transparent electrode formed of a transparent conductive material such as ITO or IZO. The upper electrode E2 may be a laminate of a transparent electrode and a metal electrode. The upper electrode E2 is electrically connected to a power supply line arranged in the display unit DA or a power supply line arranged outside the display unit DA.
[0038] A portion of the organic layer OR located between the lower electrode E1 and the upper electrode E2 without the insulating layer 12 can form a light-emitting region of the display element 20. In one example, the thickness of the organic layer OR along the third direction Z is set so that the peak wavelength of the emission spectrum of the light-emitting layer EL coincides with the effective optical path length between the lower electrode E1 and the upper electrode E2. This realizes a microcavity structure for obtaining a resonance effect.
[0039] Although not shown, an optical adjustment layer for improving light extraction efficiency, a sealing layer for protecting the display element 20 from moisture, etc. are provided on the upper electrode E2.
[0040] As described above, the functional layers F1, such as the hole injection layer F11 and the carrier generation layer F13, constituting the organic layer OR, are configured so that the dopant concentration of the guest material in the peripheral region A2E is extremely small. This suppresses carrier generation in the peripheral region. This suppresses undesirable current leakage between the peripheral region and the upper electrode E2. This makes it possible to suppress performance degradation of the display element 20.
[0041] FIG. 5 is a diagram for explaining a method of manufacturing the display element 20 shown in FIG. First, the substrate to be processed SUB is prepared. The substrate to be processed SUB is obtained by forming an insulating layer 11 on a base material 10, forming a lower electrode E1 on the insulating layer 11, and then forming an insulating layer 12 having an opening OP overlapping the lower electrode E1.
[0042] The substrate SUB is placed so that the insulating layer 12 and the deposition source VS face each other. After that, each layer constituting the organic layer OR is formed by deposition. The deposition of the organic layer OR is performed while the deposition source VS moves relative to the substrate SUB. That is, the deposition source VS may move relative to the fixed substrate SUB, the substrate SUB may move relative to the fixed deposition source VS, or both the substrate SUB and the deposition source VS may move. For example, in the layout of the sub-pixels shown in FIG. 2, when the display colors of the sub-pixels aligned in the second direction Y are the same, the movement direction is set to the second direction Y. When the display colors of the sub-pixels aligned in a diagonal direction different from the first direction X and the second direction Y are the same, the movement direction is set to the diagonal direction.
[0043] 5 shows a process of forming a functional layer F1 of the organic layer OR. The deposition source VS includes a crucible 50 for accommodating a host material and a crucible 60 for accommodating a guest material (p-type dopant). These crucibles 50 and 60 are heated by a heating mechanism. The vapor of the host material generated by heating the crucible 50 is radiated at a first radiation angle θ1. The vapor of the guest material generated by heating the crucible 60 is radiated at a second radiation angle θ2. At this time, the second radiation angle θ2 is smaller than the first radiation angle θ1 (θ1>θ2).
[0044] Therefore, the host material and the guest material are mixed appropriately almost in front of the deposition source VS, and the mixing ratio of the guest material to the host material decreases toward the outside. As a result, region A1 is formed as a region where the mixture of the host material and the guest material is deposited, and region A2E is formed as a region where almost no guest material is contained and where only the host material is deposited.
[0045] FIG. 6 is a diagram for explaining one method for controlling the radiation angle. In the example shown in FIG. 6, the radiation angle (or the directivity of the vapor) is controlled by the shape of the nozzle connected to the crucible. The shape of nozzle 51 connected to crucible 50 is different from the shape of nozzle 61 connected to crucible 60. Here, nozzle 51 is thicker and shorter compared to nozzle 61. When the distance L11 between nozzle 51 and the substrate SUB to be processed is the same as the distance L12 between nozzle 61 and the substrate SUB to be processed, the first radiation angle θ1 of the vapor of the host material radiated from nozzle 51 is larger than the second radiation angle θ2 of the vapor of the guest material radiated from nozzle 61 (θ1 > θ2). That is, the vapor of the host material radiated from nozzle 51 is likely to spread (has low directivity). On the other hand, the vapor of the guest material radiated from nozzle 61 is less likely to spread (has high directivity).
[0046] FIG. 7 is a diagram for explaining another method of controlling the radiation angle. Also in the example shown in FIG. 7, the shape of nozzle 51 is different from the shape of nozzle 61. Here, the opening diameter D1 of nozzle 51 is smaller than the opening diameter D2 of nozzle 61 (D1 < D2). Even in such an example, the vapor of the host material radiated from nozzle 51 is likely to spread, and the vapor of the guest material radiated from nozzle 61 is less likely to spread.
[0047] FIG. 8 is a diagram for explaining another method of controlling the radiation angle. In the example shown in FIG. 8, the temperature distribution of crucible 50 for heating the host material is different from the temperature distribution of crucible 60 for heating the guest material. For example, the heating temperature on the bottom side of crucible 50 is set higher than the heating temperature on the nozzle side, and the heating temperature on the bottom side of crucible 60 is set lower than the heating temperature on the nozzle side. In this way, by adjusting the temperature distribution of the crucible, the radiation angle of the vapor can also be controlled. In the example shown in FIG. 8, the vapor of the host material radiated from nozzle 51 is likely to spread, and the vapor of the guest material radiated from nozzle 61 is less likely to spread. The methods shown in FIGS. 6 to 8 can be appropriately combined.
[0048] FIG. 9 is a cross-sectional view showing another example of the display element. The example shown in FIG. 9 is different from the example shown in FIG. 4 in that the dopant concentration of the light-emitting material serving as a guest material contained in the light-emitting layer EL has a concentration gradient.
[0049] Here, attention is focused on two adjacent display elements. For convenience, the display element located on the left side of the figure is referred to as display element 21, and the display element located on the right side of the figure is referred to as display element 22.
[0050] The display element 21 includes a lower electrode (first lower electrode) E11, an organic layer (first organic layer) OR1, and an upper electrode E2. The organic layer OR1 includes carrier adjustment layers CA1 and CA2, and a light-emitting layer EL1. The display element 22 includes a lower electrode (second lower electrode) E12, an organic layer (second organic layer) OR2, and an upper electrode E2. The organic layer OR2 includes carrier adjustment layers CA1 and CA2, and a light-emitting layer EL2. The carrier adjustment layers CA1 and CA2 and the upper electrode E2 are common layers formed continuously across the display elements 21 and 22. The light-emitting layer EL1 is spaced apart from the light-emitting layer EL2.
[0051] The light-emitting layer EL1 has a region (first region) A11 located between the lower electrode E11 and the upper electrode E2, and a region A21 located between the insulating layer 12 and the upper electrode E2. Of the region A21, a peripheral region (second region) A21E is located directly above the insulating layer 12, and the thickness along the third direction Z becomes thinner toward the outside (farther away from the region A11). The light-emitting layer EL2 has a region (first region) A12 located between the lower electrode E12 and the upper electrode E2, and a region A22 located between the insulating layer 12 and the upper electrode E2. Of the region A22, a peripheral region (second region) A22E is located directly above the insulating layer 12, and the thickness along the third direction Z becomes thinner toward the outside (farther away from the region A12).
[0052] The light-emitting layers EL1 and EL2 are mixed layers containing a host material and a light-emitting material as a guest material. That is, the light-emitting layers EL1 and EL2 are formed by doping the host material with the light-emitting material. The light-emitting material contained in the light-emitting layer EL1 may be the same as the light-emitting material contained in the light-emitting layer EL2, or may be a different material. That is, the emission color of the light-emitting layer EL1 may be the same as the emission color of the light-emitting layer EL2, or may be different from the emission color of the light-emitting layer EL2.
[0053] The dopant concentration of the light emitting material in the region A21E is higher than the dopant concentration of the light emitting material in the region A11. That is, the dopant concentration of the light emitting material in the light emitting layer EL1 has a concentration gradient that increases toward the outside. Similarly, the dopant concentration of the light-emitting material in the region A22E is higher than that in the region A12. That is, the dopant concentration of the light-emitting material in the light-emitting layer EL2 has a concentration gradient that increases toward the outside. The regions A21E and A22E are covered with the carrier adjustment layer CA2, and the carrier adjustment layer CA2 is in contact with the carrier adjustment layer CA1 between the adjacent regions A21E and A22E.
[0054] In this way, when the carrier adjustment layer CA1 is formed as a common layer across adjacent display elements, for example, carriers that move from display element 21 to display element 22 via the carrier adjustment layer CA1 may recombine in the light-emitting layer EL2, causing undesired light emission.
[0055] Therefore, as described above, a region in which the dopant concentration of the light-emitting material is extremely high is provided in the peripheral portion of the light-emitting layer. For example, in the light-emitting layer EL1, the region A21E has a higher dopant concentration of the light-emitting material than the region A11. The region A21E has a lower threshold voltage than the region A11, but the light-emitting efficiency of the region A21E is lower than that of the region A11. Therefore, in the region A21E, recombination of carriers from the display element 21 to the display element 22 is promoted, and the carriers are consumed. This reduces the carriers that reach the display element 22 from the display element 21, and suppresses undesired light emission in the light-emitting layer EL2.
[0056] Furthermore, when the emission color of the display element 21 is different from the emission color of the display element 22, undesired emission of the adjacent display elements is suppressed, so that the desired chromaticity can be obtained.
[0057] FIG. 10 is a diagram for explaining a method of manufacturing the display elements 21 and 22 shown in FIG. First, the substrate SUB to be processed is prepared. The substrate SUB to be processed is placed so that the insulating layer 12 and the deposition sources VS1 and VS2 face each other. After that, each layer constituting the organic layer OR is formed by deposition.
[0058] 10 shows a process of forming the emitting layers EL1 and EL2 after forming the carrier adjustment layer CA1 of the organic layer OR. The deposition source VS1 includes a crucible 501 for containing a host material and a crucible 601 for containing a first emitting material which is a guest material. The deposition source VS2 includes a crucible 502 for containing a host material and a crucible 602 for containing a second emitting material which is a guest material.
[0059] The vapor of the host material generated by heating the crucible 501 is emitted at a radiation angle θ11. The vapor of the first light-emitting material generated by heating the crucible 601 is emitted at a radiation angle θ21. At this time, the radiation angle θ21 is larger than the radiation angle θ11 (θ21>θ11).
[0060] Therefore, the host material and the first light-emitting material are mixed appropriately almost in front of the deposition source VS1, and the mixing ratio of the first light-emitting material to the host material decreases toward the outside. As a result, the region A11 is formed as a region where the mixture of the host material and the first light-emitting material is deposited, and the region A21E is formed as a region where almost no host material is contained and where only the first light-emitting material is deposited.
[0061] Similarly, the vapor of the host material generated by heating the crucible 502 is emitted at a radiation angle θ12. Also, the vapor of the second light-emitting material generated by heating the crucible 602 is emitted at a radiation angle θ22. At this time, the radiation angle θ22 is greater than the radiation angle θ12 (θ22>θ12).
[0062] Therefore, the host material and the second light-emitting material are mixed appropriately almost in front of the deposition source VS2, and the mixing ratio of the second light-emitting material to the host material decreases toward the outside. As a result, the region A12 is formed as a region where the mixture of the host material and the second light-emitting material is deposited, and the region A22E is formed as a region where almost no host material is contained and where almost only the second light-emitting material is deposited.
[0063] According to the above-described embodiment, it is possible to provide a display device capable of suppressing deterioration in performance of a display element and a method for manufacturing the display device.
[0064] All display devices that can be implemented by those skilled in the art through appropriate design modifications based on the display devices described above as the embodiments of the present invention are within the scope of the present invention as long as they include the gist of the present invention.
[0065] Within the scope of the concept of the present invention, a person skilled in the art may conceive of various modifications, and such modifications are also understood to fall within the scope of the present invention. For example, those in which a person skilled in the art appropriately adds or removes components or modifies the design of the above-mentioned embodiment, or adds or omits steps or modifies conditions, are also included in the scope of the present invention as long as they include the gist of the present invention.
[0066] Furthermore, with regard to other effects and advantages brought about by the aspects described in the above-mentioned embodiments, those which are obvious from the description in this specification or which can be appropriately thought up by a person skilled in the art are naturally understood to be brought about by the present invention. [Explanation of symbols]
[0067] DSP... Display device 10... Base material 11... Insulating layer (first insulating layer) 12…insulating layer (second insulating layer) OP…opening 20...Display element E1...Lower electrode E2...Upper electrode OR...Organic layer F1…Functional layer A1…1st area A2E…2nd area EL...light-emitting layer A11...first region A21E...second region
Claims
1. A substrate; a first insulating layer disposed on the substrate; a bottom electrode disposed on the first insulating layer; a second insulating layer disposed on the first insulating layer and having an opening overlapping the lower electrode; an organic layer having a light-emitting layer and a functional layer, the organic layer being disposed in the opening and covering the lower electrode; an upper electrode covering the organic layer; the functional layer has a first region located between the lower electrode and the light emitting layer, and a second region including an end surface located directly above the second insulating layer, the end surface is an inclined surface inclined with respect to an upper surface of the second insulating layer, The thickness of the second region becomes thinner as it moves away from the first region, the light emitting layer covers the second region and has an edge above the top surface of the second insulating layer; the top electrode has an edge that overlies the top surface of the second insulating layer; A dopant concentration of the guest material in the second region is lower than a dopant concentration of the guest material in the first region.
2. The display device according to claim 1 , wherein the functional layer is a hole injection layer or a carrier generation layer, and contains a p-type dopant as a guest material.
3. A substrate; a first insulating layer disposed on the substrate; a bottom electrode disposed on the first insulating layer; a second insulating layer disposed on the first insulating layer and having an opening overlapping the lower electrode; an organic layer including a light-emitting layer, a first carrier adjustment layer, and a second carrier adjustment layer, the organic layer being disposed in the opening and covering the lower electrode; an upper electrode covering the organic layer; the first carrier adjustment layer is located between the lower electrode and the light emitting layer, the second carrier adjustment layer is located between the upper electrode and the light emitting layer, the light-emitting layer does not include a light-extinguishing layer and has a first region located between the lower electrode and the upper electrode, and a second region including an end surface located directly above the second insulating layer; the end surface is an inclined surface inclined with respect to an upper surface of the second insulating layer, The thickness of the second region becomes thinner as it moves away from the first region, the second carrier adjustment layer covers the second region and is in contact with the first carrier adjustment layer outside the second region; A dopant concentration of the light emitting material in the second region is higher than a dopant concentration of the light emitting material in the first region.
4. A lower electrode; a second insulating layer having an opening overlapping the lower electrode; an organic layer disposed on the lower electrode; and an upper electrode disposed on the organic layer, The step of forming the organic layer includes a step of forming a functional layer and a step of forming a light-emitting layer on the functional layer, The step of forming the functional layer includes depositing a host material radiated at a first radiation angle and depositing a guest material radiated at a second radiation angle smaller than the first radiation angle; forming a first region of the functional layer located between the lower electrode and the light-emitting layer as a region in which the mixture of the guest material and the host material emitted at the second radiation angle is deposited; forming a second region of the functional layer located directly above the second insulating layer as a region in which the host material radiated at the first radiation angle is deposited; A method for manufacturing a display device, wherein the thickness of the second region becomes thinner as it moves away from the first region.
5. The method for manufacturing a display device according to claim 4 , wherein a p-type dopant is vapor-deposited as the guest material.
6. A lower electrode; a second insulating layer having an opening overlapping the lower electrode; an organic layer disposed on the lower electrode; and an upper electrode disposed on the organic layer, The step of forming the organic layer includes a step of forming a light-emitting layer, The step of forming the light-emitting layer includes depositing a host material emitting light at a first radiation angle and depositing a light-emitting material serving as a guest material at a second radiation angle greater than the first radiation angle; forming a first region of the light-emitting layer as a region where a mixture of the host material and the guest material emitted at the first emission angle is deposited; forming a second region of the light emitting layer located directly above the second insulating layer as a region in which the guest material emitted at the second emission angle is deposited; A method for manufacturing a display device, wherein the thickness of the second region becomes thinner as it moves away from the first region.
7. The method for manufacturing a display device according to claim 4 , wherein a shape of the nozzle for emitting the host material is different from a shape of the nozzle for emitting the guest material.
8. The method for manufacturing a display device according to claim 4 , wherein a temperature distribution of a crucible for heating the host material is different from a temperature distribution of a crucible for heating the guest material.
Citation Information
Patent Citations
Display panel and preparation method thereof
CN111710792A
Organic el display device and its manufacture
JP2000195677A
Display device and manufacturing method of the same
JP2004207217A
Organic el display device, and manufacturing method therefor
JP2008135325A
Organic electroluminescent display device and its manufacturing method
JP2009032673A
