filter

Abstract

To provide a filter with a good Q value.SOLUTION: A filter 10 according to the present disclosure, comprises a binding capacitor electrode 17 that is formed to a layer that is different from a layer where capacitor electrodes 18 and 19C are formed, that is not connected to a resonator 11, and that is faced to a first shielding conductor 12A. A one part of the binding capacitance electrode is positioned between the first shielding conductor and a first capacitor electrode 18A. The other one part of the binding capacitor electrode is positioned between the first shielding conductor and a second capacitor electrode 18B.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to filters. [Background technology]

[0002] A resonator has been proposed that has a strip line facing a shielding conductor formed on one main surface of a dielectric substrate, and a via electrode having one end connected to a shielding conductor formed on the other main surface of the dielectric substrate and the other end connected to the strip line (Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2020-198482 A Summary of the Invention [Problem to be solved by the invention]

[0004] There is a need for technology that can achieve better filter characteristics.

[0005] The present invention aims to solve the above-mentioned problems. [Means for solving the problem]

[0006] A first aspect of the present invention includes a dielectric substrate having a first main surface and a second main surface located opposite to the first main surface, a plurality of resonators each including a first shielding electrode formed on the first main surface side of the dielectric substrate, a second shielding electrode formed on the second main surface side of the dielectric substrate, a via electrode portion formed between the first shielding conductor and the second shielding conductor, and a capacitor electrode connected to the via electrode portion, and a coupling capacitance electrode formed on a layer different from a layer on which the capacitor electrode is formed, not connected to any of the plurality of resonators, and facing the first shielding conductor, a first resonator includes a first via electrode portion among the plurality of via electrode portions and a first capacitor electrode which is the capacitor electrode connected to an end of the first via electrode portion; a second resonator among the plurality of resonators includes a second via electrode portion among the plurality of via electrode portions and a second capacitor electrode which is the capacitor electrode connected to an end of the second via electrode portion and formed in the same layer as the first capacitor electrode; a part of the coupling capacitance electrode is located between the first shielding conductor and the first capacitor electrode, and another part of the coupling capacitance electrode is located between the first shielding conductor and the second capacitor electrode. Effect of the Invention

[0007] According to the present invention, a filter with a good Q value (Quality factor) can be provided. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a perspective view showing a filter according to a first embodiment. [Diagram 2] FIG. 2 is a plan view showing the filter according to the first embodiment. [Diagram 3] FIG. 3 is a cross-sectional view showing a part of the filter according to the first embodiment. [Figure 4] FIG. 4 is a perspective view showing the filter according to the first embodiment. [Diagram 5]FIG. 5 is a perspective view showing the filter according to the first embodiment. [Figure 6] FIG. 6 is a plan view showing the filter according to the first embodiment. [Figure 7] FIG. 7 is a perspective view showing the filter according to the first embodiment. [Figure 8] FIG. 8 is a plan view showing the filter according to the first embodiment. [Figure 9] FIG. 9 is a perspective view showing the filter according to the first embodiment. [Figure 10] FIG. 10 is a plan view showing the filter according to the first embodiment. [Figure 11] FIG. 11 is a perspective view showing the filter according to the first embodiment. [Figure 12] FIG. 12 is a plan view showing the filter according to the first embodiment. [Figure 13] FIG. 13 is a perspective view showing the filter according to the first embodiment. [Figure 14] FIG. 14 is a plan view showing the filter according to the first embodiment. [Figure 15] FIG. 15 is a perspective view showing the filter according to the first embodiment. [Figure 16] FIG. 16 is a plan view showing the filter according to the first embodiment. [Figure 17] FIG. 17 is a perspective view showing a filter according to the second embodiment. [Figure 18] FIG. 18 is a plan view showing a filter according to the second embodiment. [Figure 19] FIG. 19 is a cross-sectional view showing a part of the filter according to the second embodiment. [Figure 20] FIG. 20 is a perspective view showing a filter according to the second embodiment. [Figure 21] FIG. 21 is a perspective view showing a filter according to the second embodiment. [Figure 22] FIG. 22 is a plan view showing a filter according to the second embodiment. [Diagram 23]FIG. 23 is a perspective view showing a filter according to the second embodiment. [Figure 24] FIG. 24 is a plan view showing a filter according to the second embodiment. [Diagram 25] FIG. 25 is a perspective view showing a filter according to the second embodiment. [Figure 26] FIG. 26 is a plan view showing a filter according to the second embodiment. [Figure 27] FIG. 27 is a perspective view showing a filter according to the second embodiment. [Figure 28] FIG. 28 is a plan view showing a filter according to the second embodiment. [Figure 29] FIG. 29 is a perspective view showing a filter according to the second embodiment. [Diagram 30] FIG. 30 is a plan view showing a filter according to the second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] (First embodiment) FIG. 1 is a perspective view showing a filter 10 according to the first embodiment. FIG. 2 is a plan view showing the filter 10 according to the first embodiment. FIG. 3 is a cross-sectional view showing a part of the filter 10 according to the first embodiment. A part of the cross section taken along line III-III in FIG. 2 is shown in FIG. 3. FIG. 4 is a perspective view showing the filter 10 according to the first embodiment. FIG. 5 is a perspective view showing the filter 10 according to the first embodiment. FIG. 6 is a plan view showing the filter 10 according to the first embodiment. FIG. 7 is a perspective view showing the filter 10 according to the first embodiment. FIG. 8 is a plan view showing the filter 10 according to the first embodiment. FIG. 9 is a perspective view showing the filter 10 according to the first embodiment. FIG. 10 is a plan view showing the filter 10 according to the first embodiment. FIG. 11 is a perspective view showing the filter 10 according to the first embodiment. FIG. 12 is a plan view showing the filter 10 according to the first embodiment. FIG. 13 is a perspective view showing the filter 10 according to the first embodiment. FIG. 14 is a plan view showing the filter 10 according to the first embodiment. FIG. 15 is a perspective view showing the filter 10 according to the first embodiment. Fig. 16 is a plan view showing the filter 10 according to the first embodiment. For simplification, some components are appropriately omitted in Figs. 1 to 16.

[0010] The filter 10 includes a dielectric substrate 14. The dielectric substrate 14 is formed in a rectangular parallelepiped shape, but is not limited to this. Although not shown in the drawings, the dielectric substrate 14 includes a plurality of laminated ceramic sheets. As a result, the dielectric substrate 14 has a plurality of layers formed by the plurality of ceramic sheets. The ceramic sheets are, for example, sheet-shaped dielectric ceramics.

[0011] The dielectric substrate 14 has a first main surface 14a, a second main surface 14b, and four side surfaces 14c to 14f. The first main surface 14a and the second main surface 14b each extend in the X direction and the Y direction shown in Fig. 1. The direction from the first main surface 14a to the second main surface 14b coincides with the Z direction shown in Fig. 1.

[0012] For convenience, the opposite direction to the X direction is also referred to as the -X direction in the following description. For the same reason, the opposite direction to the Y direction is also referred to as the -Y direction in the following description. For the same reason, the opposite direction to the Z direction is also referred to as the -Z direction in the following description.

[0013] The four side surfaces 14c to 14f are located between the first main surface 14a and the second main surface 14b. The direction from side surface 14c to side surface 14d corresponds to the X direction. The direction from side surface 14e to side surface 14f corresponds to the Y direction.

[0014] The dielectric substrate 14 includes a first shielding conductor 12A, a second shielding conductor 12B, a third shielding conductor 12C, a fourth shielding conductor 12D, a fifth shielding conductor 12E, and two input / output terminals 22 (22A, 22B). The third shielding conductor 12C will be described later. Note that when the individual shielding conductors (12A to 12E) are described without distinction, the reference numeral 12 is used, and when the individual shielding conductors are described with distinction, the reference numerals 12A to 12E are used.

[0015] The first shielding conductor 12A and the second shielding conductor 12B are located between the first main surface 14a and the second main surface 14b. The second shielding conductor 12B is located in the Z direction with respect to the first shielding conductor 12A. A resonator 11, a coupling capacitance electrode 17, etc., which will be described later, are disposed between the first shielding conductor 12A and the second shielding conductor 12B.

[0016] The first shielded conductor 12A and the second shielded conductor 12B are connected to each other via a plurality of electrodes 12e to 12h. The plurality of electrodes 12e to 12h extend in the Z direction. The first shielded conductor 12A, the second shielded conductor 12B, and the plurality of electrodes 12e to 12h may be formed using the same conductive material.

[0017] The fourth shielded conductor 12D is formed on the side surface 14e along the X direction and the Z direction. The fifth shielded conductor 12E is formed on the side surface 14f along the X direction and the Z direction.

[0018] The fourth shielded conductor 12D and the fifth shielded conductor 12E are connected to the first shielded conductor 12A and the second shielded conductor 12B, respectively.

[0019] The first input / output terminal 22A, which is one of the two input / output terminals 22, is formed on the side surface 14c. The second input / output terminal 22B, which is the other of the two input / output terminals 22, is formed on the side surface 14d. The position of the center of the first input / output terminal 22A in the Y direction may coincide with the position of the center C in the Y direction shown in FIG. 2 and the like, but is not limited to this. Similarly, the position of the center of the second input / output terminal 22B in the Y direction may coincide with the position of the center C in the Y direction, but is not limited to this. The center C is the center of the dielectric substrate 14 in a plan view.

[0020] The dielectric substrate 14 includes a plurality of resonators 11 (11A to 11E). Each of the plurality of resonators 11 includes a structure 16. In other words, the dielectric substrate 14 includes a plurality of structures 16 (16A to 16E).

[0021] Each of the plurality of structures 16 includes a via electrode portion 20 and a capacitor electrode 18. In other words, the dielectric substrate 14 includes a plurality of via electrode portions 20 (A to E) and a plurality of capacitor electrodes 18 (A to E).

[0022] The via electrode portion 20B is located in the Y direction relative to the via electrode portion 20A. The via electrode portion 20C is located in the X direction relative to the via electrode portion 20A and the via electrode portion 20B. The via electrode portion 20D and the via electrode portion 20E are located in the X direction relative to the via electrode portion 20C. The via electrode portion 20E is located in the Y direction relative to the via electrode portion 20D.

[0023] Preferably, the center of the via electrode part 20C coincides with the center C of the dielectric substrate 14 in a plan view. Also, preferably, the distance from the position of the center CA of the via electrode part 20A in the X direction to the position of the center C in the X direction is equal to the distance from the position of the center CE of the via electrode part 20E in the X direction to the position of the center C in the X direction. Furthermore, preferably, the distance from the position of the center CB of the via electrode part 20B in the X direction to the position of the center C in the X direction is equal to the distance from the position of the center CD of the via electrode part 20D in the X direction to the position of the center C in the X direction.

[0024] The position of the center C in the Y direction is between the position of the center CA of the via electrode portion 20A in the Y direction and the position of the center CE of the via electrode portion 20E in the Y direction (see also FIG. 2). Preferably, the distance from the position of the center CA in the Y direction to the position of the center C in the Y direction is equal to the distance from the position of the center CE in the Y direction to the position of the center C in the Y direction.

[0025] In this way, the center CA of the via electrode part 20A is not only shifted in the X direction relative to the center (C) of the via electrode part 20C, but also shifted in the Y direction relative to the center C. This allows the distance from the via electrode part 20A to the via electrode part 20C to be increased without separating the position of the via electrode part 20A in the X direction from the position of the via electrode part 20C in the X direction. Similarly, the center CE of the via electrode part 20E is not only shifted in the X direction relative to the center C, but also shifted in the Y direction relative to the center C. This allows the distance from the via electrode part 20E to the via electrode part 20C to be increased without separating the position of the via electrode part 20E in the X direction from the position of the via electrode part 20C in the X direction. In this way, since it is not necessary to separate the via electrode part 20A and the via electrode part 20E largely in the X direction from the via electrode part 20C, the dimension of the dielectric substrate 14 in the X direction can be suppressed.

[0026] The position in the Y direction of the center C of the via electrode portion 20C is between the position in the Y direction of the center CB of the via electrode portion 20B and the position in the Y direction of the center CD of the via electrode portion 20D (see also FIG. 2). Preferably, the distance from the position of the center CB in the Y direction to the position of the center C in the Y direction is equal to the distance from the position of the center CD in the Y direction to the position of the center C in the Y direction.

[0027] In this way, the center CB of the via electrode part 20B is not only shifted in the X direction relative to the center (C) of the via electrode part 20C, but also shifted in the Y direction relative to the center C. This allows the distance from the via electrode part 20B to the via electrode part 20C to be increased without separating the position of the via electrode part 20B in the X direction from the position of the via electrode part 20C in the X direction. Similarly, the center CD of the via electrode part 20D is not only shifted in the X direction relative to the center C, but also shifted in the Y direction relative to the center C. This allows the distance from the via electrode part 20D to the via electrode part 20C to be increased without separating the position of the via electrode part 20D in the X direction from the position of the via electrode part 20C in the X direction. In this way, since it is not necessary to separate the via electrode part 20B and the via electrode part 20D largely in the X direction from the via electrode part 20C, the dimension of the dielectric substrate 14 in the X direction can be suppressed.

[0028] For example, but not limited to, the position in the Y direction of the center CA of the via electrode part 20A and the position in the Y direction of the center CD of the via electrode part 20D are equal. Similarly, for example, the position in the Y direction of the center CB of the via electrode part 20B and the position in the Y direction of the center CE of the via electrode part 20E are equal.

[0029] Furthermore, the distance from the position of the center CA in the X direction to the position of the first input / output terminal 22A in the X direction is smaller than the distance from the position of the center CB in the X direction to the position of the first input / output terminal 22A in the X direction, but is not limited to this. The distance from the position of the center CA in the Y direction to the position of the first input / output terminal 22A in the Y direction and the distance from the position of the center CB in the Y direction to the position of the first input / output terminal 22A in the Y direction are, for example, equal, but are not limited to this.

[0030] Furthermore, the distance from the position of the center CD in the X direction to the position of the second input / output terminal 22B in the X direction is greater than the distance from the position of the center CE in the X direction to the position of the second input / output terminal 22B in the X direction, but is not limited to this. The distance from the position of the center CD in the Y direction to the position of the second input / output terminal 22B in the Y direction and the distance from the position of the center CE in the Y direction to the position of the second input / output terminal 22B in the Y direction are, for example, equal, but are not limited to this.

[0031] Each of the multiple via electrode portions 20 is composed of multiple via electrodes 24. Each of the multiple via electrodes 24 is embedded in a via hole formed in the dielectric substrate 14. Although not shown in the figure, the via hole is formed along the Z direction.

[0032] The multiple via electrodes 24 constituting the same via electrode portion 20 are arranged along a virtual circle 26 in a plan view (see also FIG. 2). This allows each of the multiple via electrode portions 20 to behave like a single electrode formed in a cylindrical shape. Each of the multiple via electrodes 24 has a relatively small diameter. Therefore, it is possible to reduce the amount of material to be filled in the above-mentioned via hole, compared to the case where a cylindrical via electrode having the same diameter as the virtual circle 26 is formed. In addition, it is possible to simplify the manufacturing process of the filter 10.

[0033] Each of the plurality of via electrodes 24 described above has one end (upper end) in the Z direction and the other end (lower end) in the -Z direction. The upper end can be connected to the second shielding conductor 12B. The lower end is connected to the capacitor electrode 18 described above.

[0034] The capacitor electrode 18 is a strip line formed in the dielectric substrate 14. As described above, a plurality of capacitor electrodes 18 (18A to 18E) are provided in the dielectric substrate 14. The plurality of capacitor electrodes 18 are formed in the same layer. In other words, the plurality of capacitor electrodes 18 are formed on the same ceramic sheet. One or more ceramic sheets are present between the capacitor electrode 18 and the first shielded conductor 12A. Also, one or more ceramic sheets are present between the capacitor electrode 18 and the second shielded conductor 12B.

[0035] In addition, an electrode pattern 18f and an electrode pattern 18g are further formed on the layer on which the capacitor electrode 18 is formed. The electrode pattern 18g is located in the Y direction with respect to the electrode pattern 18f. The electrode pattern 18f is connected to the fourth shielding conductor 12D. The electrode pattern 18f is connected to the fifth shielding conductor 12E. A plurality of capacitor electrodes 18 are located between the electrode pattern 18f and the electrode pattern 18g.

[0036] The multiple capacitor electrodes 18 are connected to the lower ends of different via electrode portions 20. Capacitor electrode 18A is connected to the lower end of via electrode portion 20A. Capacitor electrode 18B is connected to the lower end of via electrode portion 20B. Capacitor electrode 18C is connected to the lower end of via electrode portion 20C. Capacitor electrode 18D is connected to the lower end of via electrode portion 20D. Capacitor electrode 18E is connected to the lower end of via electrode portion 20E.

[0037] Preferably, the plurality of capacitor electrodes 18 are formed in point symmetry with the center C as the center of symmetry. More specifically, the capacitor electrodes 18A and 18E are preferably formed in point symmetry with the center C as the center of symmetry. Also, the capacitor electrodes 18B and 18D are preferably formed in point symmetry with the center C as the center of symmetry. Furthermore, the center of the capacitor electrode 18C coincides with the center C. The shape of the capacitor electrode 18C is preferably point symmetric with the center C as the center of symmetry. By forming the plurality of capacitor electrodes 18 in point symmetry, good frequency characteristics can be obtained. As described above, the center C is the center of the dielectric substrate 14 in a planar view.

[0038] As shown in FIGS. 5 and 6, the dielectric substrate 14 further includes a plurality of coupling capacitance electrodes 17 (17AB, 17AC, 17BC, 17DC, 17EC, and 17ED).

[0039] Each of the multiple coupling capacitance electrodes 17 is an electrode (plate electrode) formed in the dielectric substrate 14. The multiple coupling capacitance electrodes 17 are formed in the same layer. In other words, the multiple coupling capacitance electrodes 17 are formed on the same ceramic sheet.

[0040] The multiple coupling capacitance electrodes 17 are formed on a layer different from the layer on which the capacitor electrode 18 is formed. More specifically, the layer on which the multiple coupling capacitance electrodes 17 are formed is located between the layer on which the first shielded conductor 12A is formed and the layer on which the multiple capacitor electrodes 18 are formed (see also FIG. 3). One or more ceramic sheets are present between the coupling capacitance electrode 17 and the capacitor electrode 18. The multiple coupling capacitance electrodes 17 are not connected to any of the multiple resonators 11 and face the first shielded conductor 12A.

[0041] The coupling capacitance electrode 17AB includes a partial pattern 17AB1 and a partial pattern 17AB2. The partial patterns 17AB1 and 17AB2 are connected to each other. At least a part of the partial pattern 17AB1 and at least a part of the capacitor electrode 18A overlap each other in a planar view. At least a part of the partial pattern 17AB2 and at least a part of the capacitor electrode 18B overlap each other in a planar view.

[0042] The capacitor electrode 18A and the coupling capacitance electrode 17AB are capacitively coupled, and the capacitor electrode 18B and the coupling capacitance electrode 17AB are capacitively coupled, thereby forming a capacitive coupling structure 21 (21AB).

[0043] 6, the coupling capacitance electrode 17AC includes a partial pattern 17AC1 and a partial pattern 17AC2. The partial patterns 17AC1 and 17AC2 are connected to each other. At least a portion of the partial pattern 17AC1 and at least a portion of the capacitor electrode 18A overlap each other in a planar view. At least a portion of the partial pattern 17AC2 and at least a portion of the capacitor electrode 18C overlap each other in a planar view.

[0044] The capacitor electrode 18A and the coupling capacitance electrode 17AC are capacitively coupled, and the capacitor electrode 18C and the coupling capacitance electrode 17AC are capacitively coupled, thereby forming a capacitive coupling structure 21 (21AC).

[0045] 6, the coupling capacitance electrode 17BC includes a partial pattern 17BC1 and a partial pattern 17BC2. The partial patterns 17BC1 and 17BC2 are connected to each other. At least a portion of the partial pattern 17BC1 and at least a portion of the capacitor electrode 18B overlap each other in a planar view. At least a portion of the partial pattern 17BC2 and at least a portion of the capacitor electrode 18C overlap each other in a planar view.

[0046] The capacitor electrode 18B and the coupling capacitance electrode 17BC are capacitively coupled, and the capacitor electrode 18C and the coupling capacitance electrode 17BC are capacitively coupled, thereby forming a capacitive coupling structure 21 (21BC).

[0047] 6, the coupling capacitance electrode 17DC includes a partial pattern 17DC1 and a partial pattern 17DC2. The partial patterns 17DC1 and 17DC2 are connected to each other. At least a portion of the partial pattern 17DC1 and at least a portion of the capacitor electrode 18D overlap each other in a planar view. At least a portion of the partial pattern 17DC2 and at least a portion of the capacitor electrode 18C overlap each other in a planar view.

[0048] The capacitor electrode 18D and the coupling capacitance electrode 17DC are capacitively coupled, and the capacitor electrode 18C and the coupling capacitance electrode 17DC are capacitively coupled, thereby forming a capacitive coupling structure 21 (21DC).

[0049] 6, the coupling capacitance electrode 17EC includes a partial pattern 17EC1 and a partial pattern 17EC2. The partial patterns 17EC1 and 17EC2 are connected to each other. At least a portion of the partial pattern 17EC1 and at least a portion of the capacitor electrode 18E overlap each other in a planar view. At least a portion of the partial pattern 17EC2 and at least a portion of the capacitor electrode 18C overlap each other in a planar view.

[0050] The capacitor electrode 18E and the coupling capacitance electrode 17EC are capacitively coupled, and the capacitor electrode 18C and the coupling capacitance electrode 17EC are capacitively coupled, thereby forming a capacitive coupling structure 21 (21EC).

[0051] 6, the coupling capacitance electrode 17ED includes a partial pattern 17ED1 and a partial pattern 17ED2. The partial patterns 17ED1 and 17ED2 are connected to each other. At least a part of the partial pattern 17ED1 and at least a part of the capacitor electrode 18E overlap each other in a planar view. At least a part of the partial pattern 17ED2 and at least a part of the capacitor electrode 18D overlap each other in a planar view.

[0052] The capacitor electrode 18E and the coupling capacitance electrode 17ED are capacitively coupled, and the capacitor electrode 18D and the coupling capacitance electrode 17ED are capacitively coupled, thereby forming a capacitive coupling structure 21 (21ED).

[0053] Thus, according to this embodiment, the coupling capacitance electrode 17 is located between the layer on which the capacitor electrode 18 is formed and the layer on which the first shielding conductor 12A is formed. Therefore, according to this embodiment, it is possible to set the distance in the Z direction between the coupling capacitance electrode 17 and the capacitor electrode 18 to be sufficiently small. Therefore, according to this embodiment, a good Q value can be obtained.

[0054] In addition, it is preferable that the multiple coupling capacitance electrodes 17 are formed in point symmetry with the center C as the center of symmetry. More specifically, it is preferable that the coupling capacitance electrodes 17AB and 17ED are formed in point symmetry with the center C as the center of symmetry. It is also preferable that the coupling capacitance electrodes 17AC and 17EC are formed in point symmetry with the center C as the center of symmetry. Furthermore, it is preferable that the coupling capacitance electrodes 17BC and 17DC are formed in point symmetry with the center C as the center of symmetry. By forming these coupling capacitance electrodes 17 in point symmetry, it is possible to obtain better frequency characteristics. As described above, the center C is the center of the dielectric substrate 14 in a planar view.

[0055] As described above, the dielectric substrate 14 is provided with the third shielding conductor 12C. The layer on which the third shielding conductor 12C is formed is located in the Z direction with respect to the layer on which the capacitor electrode 18 is formed (see also FIGS. 7 and 8). In other words, the layer on which the capacitor electrode 18 is formed is located between the layer on which the third shielding conductor 12C is formed and the layer on which the coupling capacitance electrode 17 is formed. The third shielding conductor 12C is not connected to any of the via electrode portions 20.

[0056] The third shielding conductor 12C is electrically connected to the first shielding conductor 12A via the fourth shielding conductor 12D and the fifth shielding conductor 12E. The potential of the third shielding conductor 12C is equal to the potential of the first shielding conductor 12A.

[0057] As shown in Fig. 8, at least a portion (overlapping portion 23) of the multiple capacitor electrodes 18 faces the third shielding conductor 12C. More specifically, at least a portion of the capacitor electrode 18A faces the third shielding conductor 12C. At least a portion of the capacitor electrode 18B faces the third shielding conductor 12C. At least a portion of the capacitor electrode 18D faces the third shielding conductor 12C. At least a portion of the capacitor electrode 18E faces the third shielding conductor 12C. The capacitor electrode 18C does not face the third shielding conductor 12C, but may face it.

[0058] In this embodiment, the coupling capacitance electrode 17 is located between the capacitor electrode 18 and the first shielded conductor 12A. Therefore, the area of ​​the portion where the capacitor electrode 18 and the first shielded conductor 12A face each other without being separated by the coupling capacitance electrode 17 is small. However, in this embodiment, a third shielded conductor 12C is provided that overlaps a part of the capacitor electrode 18 in a plan view. The third shielded conductor 12C is electrically connected to the first shielded conductor 12A via a fourth shielded conductor 12D and a fifth shielded conductor 12E. Therefore, according to this embodiment, the electrostatic capacitance between the capacitor electrode 18 and the shielded conductor 12 can be sufficiently ensured.

[0059] As shown in FIGS. 9 and 10, the dielectric substrate 14 further includes a plurality of coupling capacitance patterns 72 (72A to 72E).

[0060] Each of the multiple coupling capacitance patterns 72 is a conductor pattern. The multiple coupling capacitance patterns 72 are formed on the same layer. In other words, the multiple coupling capacitance patterns 72 are formed on the same ceramic sheet. The layer on which the multiple coupling capacitance patterns 72 are formed is located in the Z direction with respect to the layer on which the third shielding conductor 12C is formed (see also FIG. 3). One or more ceramic sheets are present between the coupling capacitance pattern 72 and the third shielding conductor 12C.

[0061] The multiple coupling capacitance patterns 72 are connected to different via electrode portions 20. The coupling capacitance pattern 72A is connected to the via electrode portion 20A. The coupling capacitance pattern 72B is connected to the via electrode portion 20B. The coupling capacitance pattern 72C is connected to the via electrode portion 20C. The coupling capacitance pattern 72D is connected to the via electrode portion 20D. The coupling capacitance pattern 72E is connected to the via electrode portion 20E.

[0062] The coupling capacitance patterns 72 adjacent to each other are capacitively coupled. The coupling capacitance patterns 72 adjacent to each other form a capacitive coupling structure 71. In other words, a plurality of coupling capacitance patterns 72 form a plurality of capacitive coupling structures 71 (71AB, 71AC, 71BC, 71DC, 71EC, 71ED). More specifically, the coupling capacitance pattern 72A and the coupling capacitance pattern 72B form the capacitive coupling structure 71AB. The coupling capacitance pattern 72A and the coupling capacitance pattern 72C form the capacitive coupling structure 71AC. The coupling capacitance pattern 72B and the coupling capacitance pattern 72C form the capacitive coupling structure 71BC. The coupling capacitance pattern 72D and the coupling capacitance pattern 72C form the capacitive coupling structure 71DC. The coupling capacitance pattern 72E and the coupling capacitance pattern 72C form the capacitive coupling structure 71EC. The coupling capacitance pattern 72E and the coupling capacitance pattern 72D form the capacitive coupling structure 71ED.

[0063] These coupling capacitance patterns 72 are preferably formed in point symmetry with the center C as the center of symmetry. More specifically, the coupling capacitance pattern 72A and the coupling capacitance pattern 72E are preferably formed in point symmetry with the center C as the center of symmetry. Also, the coupling capacitance pattern 72B and the coupling capacitance pattern 72D are preferably formed in point symmetry with the center C as the center of symmetry. Furthermore, the center of the coupling capacitance pattern 72C coincides with the center C. The shape of the coupling capacitance pattern 72C is preferably point symmetric with the center C as the center of symmetry. By arranging the multiple coupling capacitance patterns 72 in point symmetry, good frequency characteristics can be obtained. As described above, the center C is the center of the dielectric substrate 14 in a planar view.

[0064] In the following description, the distance in the Z direction between the coupling capacitance pattern 72 and the capacitor electrode 18 is also referred to as the first distance D1 (see also FIG. 3). The distance in the Z direction between the first shielding conductor 12A and the capacitor electrode 18 is also referred to as the second distance D2. Preferably, the first distance D1 is equal to or smaller than twice the second distance D2. More preferably, the first distance D1 is equal to or smaller than the second distance D2. By setting the distance between the coupling capacitance pattern 72 and the capacitor electrode 18 to be relatively small, a good Q value can be obtained.

[0065] As shown in FIGS. 11 and 12, the dielectric substrate 14 further includes a plurality of coupling capacitance patterns 74 (74A, 74B, 74D, 74E).

[0066] Each of the multiple coupling capacitance patterns 74 is a conductor pattern. The multiple coupling capacitance patterns 74 are formed on the same layer. In other words, the multiple coupling capacitance patterns 74 are formed on the same ceramic sheet. The layer on which the coupling capacitance pattern 74 is formed is located in the Z direction with respect to the layer on which the coupling capacitance pattern 72 is formed (see also FIG. 3). One or more ceramic sheets are present between the coupling capacitance pattern 74 and the coupling capacitance pattern 72.

[0067] The coupling capacitance pattern 74B and the coupling capacitance pattern 74D are not connected to any of the via electrode portions 20. In contrast, the coupling capacitance pattern 74A is connected to the via electrode portion 20A. Moreover, the coupling capacitance pattern 74E is connected to the via electrode portion 20E.

[0068] Adjacent coupling capacitance patterns 74 are capacitively coupled to form a capacitive coupling structure 73. In other words, a plurality of coupling capacitance patterns 74 form a plurality of capacitive coupling structures 73 (73AB, 73BE, 73DA, 73ED). More specifically, the coupling capacitance pattern 74A and the coupling capacitance pattern 74B form a capacitive coupling structure 73AB. The coupling capacitance pattern 74B and the coupling capacitance pattern 74E form a capacitive coupling structure 73BE. The coupling capacitance pattern 74D and the coupling capacitance pattern 74A form a capacitive coupling structure 73DA. The coupling capacitance pattern 74E and the coupling capacitance pattern 74D form a capacitive coupling structure 73ED.

[0069] In addition, the multiple coupling capacitance patterns 74 are preferably formed in point symmetry with the center C as the center of symmetry. More specifically, the coupling capacitance pattern 74A and the coupling capacitance pattern 74E are preferably formed in point symmetry with the center C as the center of symmetry. In addition, the coupling capacitance pattern 74B and the coupling capacitance pattern 74D are preferably formed in point symmetry with the center C as the center of symmetry. By arranging the multiple coupling capacitance patterns 74 in point symmetry, good frequency characteristics can be obtained. As described above, the center C is the center of the dielectric substrate 14 in a planar view.

[0070] As shown in FIGS. 13 and 14, the dielectric substrate 14 further includes two input / output patterns 80 (80A, 80B).

[0071] Each of the two input / output patterns 80 is a conductor pattern. The two input / output patterns 80 are formed in the same layer. In other words, the two input / output patterns 80 are formed on the same ceramic sheet.

[0072] The input / output pattern 80A connects the above-mentioned first input / output terminal 22A and the via electrode portion 20A. On the other hand, the input / output pattern 80B connects the above-mentioned second input / output terminal 22B and the via electrode portion 20E.

[0073] The layer on which the two input / output patterns 80 are formed is located in the Z direction relative to the layer on which the coupling capacitance pattern 74 is formed. One or more ceramic sheets are present between the input / output pattern 80 and the coupling capacitance pattern 74. By appropriately setting the positions of the two input / output patterns 80 in the Z direction, it is possible to appropriately adjust the external Q.

[0074] As shown in FIGS. 15 and 16, the dielectric substrate 14 further includes a coupling capacitance pattern 76.

[0075] The coupling capacitance pattern 76 is a conductive pattern formed in the dielectric substrate 14. The layer on which the coupling capacitance pattern 76 is formed is located in the Z direction with respect to the layer on which the two input / output patterns 80 are formed. The coupling capacitance pattern 76 is connected to the via electrode portion 20B and the via electrode portion 20D.

[0076] Preferably, the coupling capacitance pattern 76 is formed point-symmetrically with respect to the center C. By forming the coupling capacitance pattern 76 point-symmetrically, good frequency characteristics can be obtained. As described above, the center C is the center of the dielectric substrate 14 in a plan view.

[0077] Second embodiment In the second embodiment, the description overlapping with the first embodiment will be omitted as appropriate, and the same components as those described in the first embodiment will be denoted by the same reference numerals.

[0078] FIG. 17 is a perspective view showing the filter 10 according to the second embodiment. FIG. 18 is a plan view showing the filter 10 according to the second embodiment. FIG. 19 is a cross-sectional view showing a part of the filter 10 according to the second embodiment. A part of the cross section taken along line XIX-XIX in FIG. 18 is shown in FIG. 19. FIG. 20 is a perspective view showing the filter 10 according to the second embodiment. FIG. 21 is a perspective view showing the filter 10 according to the second embodiment. FIG. 22 is a plan view showing the filter 10 according to the second embodiment. FIG. 23 is a perspective view showing the filter 10 according to the second embodiment. FIG. 24 is a plan view showing the filter 10 according to the second embodiment. FIG. 25 is a perspective view showing the filter 10 according to the second embodiment. FIG. 26 is a plan view showing the filter 10 according to the second embodiment. FIG. 27 is a perspective view showing the filter 10 according to the second embodiment. FIG. 28 is a plan view showing the filter 10 according to the second embodiment. FIG. 29 is a perspective view showing the filter 10 according to the second embodiment. FIG. 30 is a plan view showing the filter 10 according to the second embodiment. For simplification, some components are omitted as appropriate in FIGS. 17 to 30.

[0079] 17 to 21, the filter 10 includes a dielectric substrate 14. The dielectric substrate 14 includes a first shielding conductor 12A, a second shielding conductor 12B, a fourth shielding conductor 12D, a fifth shielding conductor 12E, a first input / output terminal 22A, and a second input / output terminal 22B. The dielectric substrate 14 also includes a plurality of electrodes 12e to 12f, a plurality of resonators 11 (11A to 11E), a plurality of coupling capacitance electrodes 17 (17AB, 17ED), and a plurality of coupling capacitance patterns 72 (72A, 72B, 72D, 72E).

[0080] Although omitted in this embodiment, the dielectric substrate 14 may further include a third shielding conductor 12C (see the first embodiment).

[0081] Each of the multiple resonators 11 includes a via electrode portion 20 and a capacitor electrode 18. In other words, the dielectric substrate 14 includes a multiple via electrode portion 20 (20A, 20B, 20C2, 20D, 20E), a multiple capacitor electrodes 18 (18A, 18B, 18D, 18E), and a capacitor electrode 19C.

[0082] The multiple capacitor electrodes 18 are formed on the same layer (ceramic sheet). The layer on which the multiple coupling capacitance electrodes 17 are formed is located between the layer on which the capacitor electrode 18 is formed and the layer on which the first shielding conductor 12A is formed. The layer on which the capacitor electrode 18 is formed further includes an electrode pattern 18f and an electrode pattern 18g. The electrode pattern 18f is connected to the fourth shielding conductor 12D. The electrode pattern 18g is connected to the fifth shielding conductor 12E.

[0083] 22, the coupling capacitance electrode 17AB includes a partial pattern 17AB1 and a partial pattern 17AB2. The partial patterns 17AB1 and 17AB2 are connected to each other. At least a portion of the partial pattern 17AB1 and at least a portion of the capacitor electrode 18A overlap each other in a planar view. At least a portion of the partial pattern 17AB2 and at least a portion of the capacitor electrode 18B overlap each other in a planar view.

[0084] The coupling capacitance electrode 17ED includes a partial pattern 17ED1 and a partial pattern 17ED2. The partial patterns 17ED1 and 17ED2 are connected to each other. At least a part of the partial pattern 17ED1 and at least a part of the capacitor electrode 18E overlap each other in a planar view. At least a part of the partial pattern 17ED2 and at least a part of the capacitor electrode 18D overlap each other in a planar view.

[0085] The capacitor electrode 19C is formed in a layer different from the layer in which the capacitor electrode 18 is formed. More specifically, the layer in which the capacitor electrode 19C is formed is located in the Z direction with respect to the layer in which the capacitor electrode 18 is formed (see also FIGS. 19 and 23).

[0086] 23 and 24, the capacitor electrode 19C is formed, for example, in the same layer as the multiple coupling capacitance patterns 72. The capacitor electrode 19C is capacitively coupled to the multiple coupling capacitance patterns 72.

[0087] The capacitor electrode 19C is connected to the via electrode portion 20C2. A plurality of coupling capacitance patterns 60, which will be described later, are connected to the lower end of the via electrode portion 20C2. The via electrode portion 20C2 will be described in more detail later.

[0088] Preferably, the capacitor electrodes 19C are formed in point symmetry with respect to the center C. The center C is the center of the dielectric substrate 14 in a planar view. By forming the capacitor electrodes 19C in point symmetry, good frequency characteristics can be obtained.

[0089] Each of the multiple coupling capacitance patterns 60 (60AD, 60EB) is a conductor pattern formed in the dielectric substrate 14. The layer on which the multiple coupling capacitance patterns 60 are formed is located between the layer on which the capacitor electrode 18 is formed and the layer on which the capacitor electrode 19C is formed (see also FIG. 19). The coupling capacitance pattern 60EB is located in the Y direction with respect to the coupling capacitance pattern 60AD (see also FIGS. 21 and 22).

[0090] A coupling capacitance pattern 60AD, which is one of the multiple coupling capacitance patterns 60, includes a partial pattern 60AD1 and a partial pattern 60AD2. The partial pattern 60AD1 and the partial pattern 60AD2 are connected to each other.

[0091] At least a part of the partial pattern 60AD1 and at least a part of the capacitor electrode 18A face each other. This causes the capacitor electrode 18A and the coupling capacitance pattern 60AD to be capacitively coupled. At least a part of the partial pattern 60AD2 and at least a part of the capacitor electrode 18D face each other. This causes the capacitor electrode 18D and the coupling capacitance pattern 60AD to be capacitively coupled.

[0092] The coupling capacitance pattern 60EB, which is the other of the multiple coupling capacitance patterns 60, includes a partial pattern 60EB1 and a partial pattern 60EB2. The partial pattern 60EB1 and the partial pattern 60EB2 are connected to each other.

[0093] At least a part of the partial pattern 60EB1 and at least a part of the capacitor electrode 18E face each other. This allows the capacitor electrode 18E to be capacitively coupled to the coupling capacitance pattern 60EB. At least a part of the partial pattern 60EB2 and at least a part of the capacitor electrode 18B face each other. This allows the capacitor electrode 18B to be capacitively coupled to the coupling capacitance pattern 60EB.

[0094] Preferably, the multiple coupling capacitance patterns 60 are formed in point symmetry with the center C as the center of symmetry. More specifically, the coupling capacitance pattern 60AD and the coupling capacitance pattern 60EB are preferably formed in point symmetry with the center C as the center of symmetry. By forming the multiple coupling capacitance patterns 60 in point symmetry, good frequency characteristics can be obtained. As described above, the center C is the center of the dielectric substrate 14 in a planar view.

[0095] The via electrode portion 20C2 is formed in a via hole (not shown) formed along the Z direction. The via electrode portion 20C2 has a first partial electrode portion 20Ca and a second partial electrode portion 20Cb.

[0096] The second partial electrode portion 20Cb is located in the Y direction with respect to the first partial electrode portion 20Ca. This shortens the distance from the first partial electrode portion 20Ca to the fourth shielding conductor 12D, and shortens the distance from the second partial electrode portion 20Cb to the fifth shielding conductor 12E. As a result, it is possible to increase the coupling capacitance between the first partial electrode portion 20Ca and the fourth shielding conductor 12D, and to increase the coupling capacitance between the second partial electrode portion 20Cb and the fifth shielding conductor 12E.

[0097] The -Z direction end (lower end) of the first partial electrode portion 20Ca is connected to the above-mentioned coupling capacitance pattern 60AD (see also Figs. 21 and 22). The -Z direction end (lower end) of the second partial electrode portion 20Cb is connected to the above-mentioned coupling capacitance pattern 60EB. The Z direction end (upper end) of the first partial electrode portion 20Ca and the Z direction end (upper end) of the second partial electrode portion 20Cb may be connected to the second shielding conductor 12B (see also Fig. 19).

[0098] Each of the first partial electrode portion 20Ca and the second partial electrode portion 20Cb is composed of a plurality of via electrodes 24. As shown in FIG. 24, the plurality of via electrodes 24 constituting the first partial electrode portion 20Ca are arranged along a virtual arc 27a. In contrast, the plurality of via electrodes 24 constituting the second partial electrode portion 20Cb are arranged along a virtual arc 27b. The curvature of the virtual arc 27a and the curvature of the virtual arc 27b are equal to, for example, the curvature of the virtual circle 26 described in the first embodiment, but are not limited thereto. The first partial electrode portion 20Ca and the second partial electrode portion 20Cb are formed in point symmetry with the center C of the dielectric substrate 14 in a plan view as the center of symmetry, but are not limited thereto. The via electrode portion 20C2 may be formed by a plurality of via electrodes 24 arranged along a virtual circle 26, similar to the other via electrode portions 20A, 20B, etc.

[0099] As shown in FIGS. 25 to 30, the dielectric substrate 14 further includes a plurality of coupling capacitance patterns 74 (74A, 74B, 74D, 74E), two input / output patterns 80 (80A, 80B), and a coupling capacitance pattern 76. The layer on which the coupling capacitance pattern 74 is formed is located in the Z direction with respect to the layer on which the coupling capacitance pattern 60 is formed (see also FIG. 19). The layer on which the input / output pattern 80 is formed is located in the Z direction with respect to the layer on which the coupling capacitance pattern 74 is formed. The layer on which the coupling capacitance pattern 76 is formed is located in the Z direction with respect to the layer on which the input / output pattern 80 is formed.

[0100] According to this embodiment, similarly to the first embodiment, the coupling capacitance electrode 17 is located between the layer on which the capacitor electrode 18 is formed and the layer on which the first shielding conductor 12A is formed. Therefore, according to this embodiment, it is possible to set the distance in the Z direction between the coupling capacitance electrode 17 and the capacitor electrode 18 to be sufficiently small. Therefore, according to this embodiment, a good Q value can be obtained.

[0101] Also, by shortening the distance between the layer on which the coupling capacitance pattern 72 is formed and the layer on which the capacitor electrode 18 is formed, a good Q value can be obtained. In this regard, according to the present embodiment, the layer on which the coupling capacitance electrode 17 is formed is located between the layer on which the capacitor electrode 18 is formed and the layer on which the first shielding conductor 12A is formed. Therefore, the coupling capacitance electrode 17 does not prevent the distance between the layer on which the coupling capacitance pattern 72 is formed and the layer on which the capacitor electrode 18A is formed from being shortened.

[0102] Furthermore, by shortening the distance between the layer on which the capacitor electrode 19C is formed and the layer on which the capacitor electrode 18 is formed, a good Q value can be obtained. In this regard, according to this embodiment, the capacitor electrode 19C is further formed on the layer on which the coupling capacitance pattern 72 is formed. As described above, the coupling capacitance electrode 17 does not prevent the distance between the layer on which the coupling capacitance pattern 72 is formed and the layer on which the capacitor electrode 18 is formed from being shortened. Therefore, according to this embodiment, a better Q value can be obtained.

[0103] The following supplementary notes are further disclosed regarding the above embodiment.

[0104] (Appendix 1) A filter (10) according to the present disclosure comprises: a dielectric substrate (14) having a first main surface (14a) and a second main surface (14b) located opposite to the first main surface; a first shielding conductor (12A) formed on the first main surface side of the dielectric substrate; a second shielding conductor (12B) formed on the second main surface side of the dielectric substrate; a plurality of resonators (11) each including a via electrode portion (20) formed between the first shielding conductor and the second shielding conductor and a capacitor electrode (18, 19C) connected to the via electrode portion; and a coupling capacitance electrode (17) formed in a layer different from a layer in which the capacitor electrode is formed, not connected to any of the plurality of resonators, and facing the first shielding conductor. A first resonator (11A) of the resonators includes a first via electrode portion (20A) of the plurality of via electrode portions and a first capacitor electrode (18A) that is the capacitor electrode connected to an end of the first via electrode portion, and a second resonator (11B) of the plurality of resonators includes a second via electrode portion (20B) of the plurality of via electrode portions and a second capacitor electrode (18B) that is the capacitor electrode connected to an end of the second via electrode portion and formed in the same layer as the first capacitor electrode, and a part (17AB1) of the coupling capacitance electrode is located between the first shielding conductor and the first capacitor electrode, and another part (17AB2) of the coupling capacitance electrode is located between the first shielding conductor and the second capacitor electrode. This makes it possible to obtain a good Q value.

[0105] (Appendix 2) In the filter described in Supplementary Note 1, a third resonator (11C) of the plurality of resonators includes a third via electrode portion (20C) of the plurality of via electrode portions and a third capacitor electrode (18C) which is the capacitor electrode connected to an end of the third via electrode portion, a part of a first coupling capacitance electrode (17) of the plurality of coupling capacitance electrodes is located between the first shielding conductor and the first capacitor electrode, another part of the first coupling capacitance electrode is located between the first shielding conductor and the second capacitor electrode, a part (17BC1) of a second coupling capacitance electrode (17) of the plurality of coupling capacitance electrodes is located between the first shielding conductor and the second capacitor electrode, and another part (17BC2) of the second coupling capacitance electrode is located between the first shielding conductor and the third capacitor electrode. This makes it possible to obtain a good Q value.

[0106] (Appendix 3) The filter described in Supplementary Note 1 may further include a first coupling capacitance pattern (72A) connected to the first via electrode portion, and a second coupling capacitance pattern (72B) connected to the second via electrode portion, formed in the same layer as the first coupling capacitance pattern, and capacitively coupled to the first coupling capacitance pattern. This makes it possible to obtain a good Q value.

[0107] (Appendix 4) In the filter described in Supplementary Note 3, a first distance (D1) between the first coupling capacitance pattern and the first capacitor electrode may be equal to or less than twice the second distance (D2) between the first shielding conductor and the first capacitor electrode. By setting the first distance short, a better Q value can be obtained. The coupling capacitance electrode does not prevent the first distance from being set short.

[0108] (Appendix 5) In the filter according to Supplementary Note 4, the first distance may be equal to or less than the second distance, thereby making it possible to obtain a good Q value.

[0109] (Appendix 6) The filter according to any one of Supplementary Notes 1 to 5 further includes a third shielding conductor (12C) formed between the first shielding conductor and the second shielding conductor, the layer on which the capacitor electrode is formed is located between the layer on which the third shielding conductor is formed and the layer on which the coupling capacitance electrode is formed, and a part of the capacitor electrode may face a part of the third shielding conductor, thereby making it possible to obtain a coupling capacitance according to an area of ​​an overlapping portion between the third shielding conductor and the capacitor electrode.

[0110] (Appendix 7) In the filter described in Supplementary Note 1, a third resonator (11C) of the plurality of resonators includes a third via electrode portion (20C2) of the plurality of via electrode portions, and a third capacitor electrode (19C) that is the capacitor electrode that is connected to the third via electrode portion and formed in a layer different from the second capacitor electrode, and may further include a third coupling capacitance pattern (60EB) that is connected to the third via electrode portion and capacitively couples with the second capacitor electrode. This makes it possible to obtain a good Q value.

[0111] (Appendix 8) The filter described in Supplementary Note 7 may further include a second coupling capacitance pattern (72B) connected to the second via electrode portion, formed in the same layer as the third capacitor electrode, and capacitively coupled to the third capacitor electrode, and a first coupling capacitance pattern (72A) connected to the first via electrode portion, formed in the same layer as the second coupling capacitance pattern, and capacitively coupled to the second coupling capacitance pattern. This makes it possible to obtain a good Q value.

[0112] The present invention is not limited to the above disclosure, and various configurations may be adopted without departing from the gist of the present disclosure. [Explanation of symbols]

[0113] 10. Filter 11...Resonator (1st resonator, 2nd resonator, 3rd resonator) 14...Dielectric substrate 17...Coupling capacitance electrode (first coupling capacitance electrode, second coupling capacitance electrode) 18...Capacitor electrodes (first capacitor electrode, second capacitor electrode, third capacitor electrode) 19C…Third capacitor electrode 20... Via electrode portion (first via electrode portion, second via electrode portion, third via electrode portion) 12A...First shielded conductor 12B...Second shielded conductor 12C...Third shielding conductor 14a...First principal surface 14b…Second main surface 60…Third coupling capacitance pattern 72…First coupling capacitance pattern, second coupling capacitance pattern D1…First distance D2…Second distance

Claims

1. a dielectric substrate having a first main surface and a second main surface opposite to the first main surface; a first shielding conductor formed on the first main surface side of the dielectric substrate; a second shielding conductor formed on the second main surface side of the dielectric substrate; a plurality of resonators each including a via electrode portion formed between the first shielding conductor and the second shielding conductor and a capacitor electrode connected to the via electrode portion; a coupling capacitance electrode formed in a layer different from a layer in which the capacitor electrode is formed, not connected to any of the plurality of resonators, and facing the first shielding conductor; Equipped with a first resonator of the plurality of resonators includes a first via electrode portion of the plurality of via electrode portions and a first capacitor electrode that is the capacitor electrode connected to an end portion of the first via electrode portion; a second resonator of the plurality of resonators includes a second via electrode portion of the plurality of via electrode portions and a second capacitor electrode that is connected to an end of the second via electrode portion and is the capacitor electrode formed in the same layer as the first capacitor electrode; a portion of the coupling capacitance electrode is located between the first shielding conductor and the first capacitor electrode, and another portion of the coupling capacitance electrode is located between the first shielding conductor and the second capacitor electrode.

2. 2. The filter of claim 1, a third resonator among the plurality of resonators includes a third via electrode portion among the plurality of via electrode portions and a third capacitor electrode that is the capacitor electrode connected to an end portion of the third via electrode portion, a portion of a first coupling capacitance electrode of the plurality of coupling capacitance electrodes is located between the first shielding conductor and the first capacitor electrode, and another portion of the first coupling capacitance electrode is located between the first shielding conductor and the second capacitor electrode; a portion of a second coupling capacitance electrode of the plurality of coupling capacitance electrodes is located between the first shielding conductor and the second capacitor electrode, and another portion of the second coupling capacitance electrode is located between the first shielding conductor and the third capacitor electrode.

3. 2. The filter of claim 1, a first coupling capacitance pattern connected to the first via electrode portion; a second coupling capacitance pattern that is connected to the second via electrode portion, is formed in the same layer as the first coupling capacitance pattern, and is capacitively coupled to the first coupling capacitance pattern; The filter further comprises:

4. 4. The filter of claim 3, A filter, wherein a first distance between the first coupling capacitance pattern and the first capacitor electrode is less than or equal to twice a second distance between the first shielding conductor and the first capacitor electrode.

5. 5. The filter of claim 4, The first distance is less than or equal to the second distance.

6. A filter according to any one of claims 1 to 5, a third shielded conductor formed between the first and second shielded conductors; the layer on which the capacitor electrode is formed is located between the layer on which the third shielding conductor is formed and the layer on which the coupling capacitance electrode is formed; A filter, wherein a portion of the capacitor electrode faces a portion of the third shielded conductor.

7. 2. The filter of claim 1, a third resonator among the plurality of resonators includes a third via electrode portion among the plurality of via electrode portions, and a third capacitor electrode that is connected to the third via electrode portion and is the capacitor electrode formed in a layer different from that of the second capacitor electrode, the filter further comprising a third coupling capacitance pattern connected to the third via electrode portion and capacitively coupled to the second capacitor electrode.

8. 8. The filter of claim 7, a second coupling capacitance pattern connected to the second via electrode portion, formed in the same layer as the third capacitor electrode, and capacitively coupled to the third capacitor electrode; the filter further comprising a first coupling capacitance pattern connected to the first via electrode portion, formed in the same layer as the second coupling capacitance pattern, and capacitively coupled to the second coupling capacitance pattern.

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