Electro-optical device, manufacturing method thereof, and electronic device

By employing a plug with an embedded part to fill recesses and a second plug for electrical contact, the issues of recess-induced defects and poor connections in electro-optical devices are mitigated, enhancing display quality.

JP7619013B2Active Publication Date: 2025-01-22SEIKO EPSON CORP
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Patent Information

Application Number
JP2020190883
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2020-11-17
Publication Date
2025-01-22
Estimated Expiration
2040-11-17

AI Technical Summary

Technical Problem

The presence of recesses and voids in plugs within electro-optical devices can lead to adverse effects on wiring, resulting in defective film formation and poor connections, which degrade display quality.

Method used

The implementation of a first plug with a recess and an embedded part that fills the recess, along with a second plug that contacts the side surface of the contact hole, ensures electrical connectivity and reduces the impact of surface steps, using materials like silicon oxide for insulation and tungsten for conductivity.

Benefits of technology

This configuration suppresses defects in film formation and connection failures, thereby improving display quality by maintaining consistent electrical contact and reducing surface irregularities.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide an electro-optical device that can prevent a reduction in display quality, a method for manufacturing an electro-optical device, and an electronic apparatus.SOLUTION: An electro-optical device comprises: a first substrate; a second substrate; and an electro-optical layer that is arranged between the first substrate and the second substrate and whose optical characteristics change according to an electric field. One or both of the first substrate and the second substrate has a first conductive part, a second conductive part, an insulating film that is arranged between the first conductive part and the second conductive part, a plug that is arranged in the insulating layer, electrically connects the first conductive part and the second conductive part with each other, and has a concave part at the center of a surface facing the second conductive part, and an embedded part that fills the inside of the concave part.SELECTED DRAWING: Figure 5
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Description

[Technical field]

[0001] The present invention relates to an electro-optical device, a method for manufacturing an electro-optical device, and electronic equipment. [Background technology]

[0002] 2. Description of the Related Art Electronic devices such as projectors use devices such as liquid crystal display devices in which the optical characteristics can be changed for each pixel.

[0003] The device described in Patent Document 1 has a lower layer wiring, an interlayer insulating film covering the lower layer wiring, a middle layer wiring formed on the interlayer insulating film, and a plug connecting the lower layer wiring and the middle layer wiring. The plug is formed to fill a through hole formed in the interlayer insulating film. This makes it highly likely that a cavity will be formed inside the plug, and a recess will be formed on the surface of the plug. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2001-237312 A Summary of the Invention [Problem to be solved by the invention]

[0005] If there is a step due to a recess on the surface of the plug, it may adversely affect the wiring on the plug, which may result in poor film formation of the wiring and poor connection between the wiring and the plug, resulting in a deterioration of display quality. [Means for solving the problem]

[0006] One aspect of the electro-optical device of the present invention includes a first conductive portion, a second conductive portion, an insulating film disposed between the first conductive portion and the second conductive portion and having a contact hole, and a recess disposed within the contact hole, electrically connecting the first conductive portion and the second conductive portion, the recess being formed by a portion formed along a side surface of the contact hole being in contact with the second conductive portion on the side opposite to the first conductive portion in the contact hole. A part of the portion formed along the side surface of the contact hole is in contact with the second conductive portion. A first plug and a filling portion filling the recess and a second plug arranged to be in contact with another portion of the first plug formed along the side surface of the contact hole and to be in contact with the second conductive portion and the buried portion.

[0007] One aspect of a method for manufacturing an electro-optical device of the present invention includes the steps of forming a first conductive portion, forming an insulating film on the first conductive portion, forming a contact hole in the insulating film, and forming a conductive film on a side surface of the contact hole opposite to the first conductive portion in the contact hole. The first forming a first plug having a recess provided on a second conductive portion side; forming a buried portion in the recess; and forming the second conductive portion, which contacts a part of the portion of the first plug formed along the side surface of the contact hole on the side opposite to the first conductive portion in the contact hole and is electrically connected to the first conductive portion via the first plug; and forming a second plug, which contacts another part of the portion of the first plug formed along the side surface of the contact hole and contacts the second conductive portion and the buried portion; Includes.

[0008] An electronic device according to an aspect of the present invention includes the electro-optical device described above, and a control unit that controls the operation of the electro-optical device. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a plan view of an electro-optical device according to a first embodiment. [Diagram 2] 2 is a cross-sectional view of the electro-optical device shown in FIG. 1 taken along line AA. [Diagram 3] 2 is an equivalent circuit diagram showing an electrical configuration of the first substrate in FIG. 1. [Figure 4] FIG. 3 is a cross-sectional view that illustrates a schematic view of a first substrate in FIG. [Diagram 5] 5 is a cross-sectional view showing the contact portion shown in FIG. 4. [Figure 6] 5 is a cross-sectional view showing another contact portion shown in FIG. 4. [Figure 7]5A to 5C are diagrams illustrating a flow of a manufacturing method for the electro-optical device according to the first embodiment. [Figure 8] 1A to 1C are views for explaining a plug forming step. [Figure 9] 1A to 1C are views for explaining a plug forming step. [Figure 10] 11A to 11C are diagrams for explaining a buried portion forming step. [Figure 11] 11A to 11C are diagrams for explaining a buried portion forming step. [Figure 12] FIG. 11 is a cross-sectional view showing a buried portion in a second embodiment. [Figure 13] 11A to 11C are views for explaining a buried portion forming step and a second conductive portion forming step. [Figure 14] FIG. 1 is a perspective view showing a personal computer as an example of an electronic device. [Figure 15] FIG. 1 is a plan view showing a smartphone as an example of an electronic device. [Figure 16] FIG. 1 is a schematic diagram illustrating a projector as an example of an electronic device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. Note that the dimensions or scale of each part in the drawings may differ from the actual dimensions, and some parts are shown diagrammatically to facilitate understanding. Furthermore, the scope of the present invention is not limited to these embodiments unless otherwise specified in the following description to the effect that the present invention is limited thereto.

[0011] 1. Electro-optical device 1A. First embodiment 1Aa. Basic configuration FIG. 1 is a plan view of an electro-optical device 100 according to a first embodiment. FIG. 2 is a cross-sectional view of the electro-optical device 100 shown in FIG. 1 taken along line AA. In FIG. 1, the second substrate 3 is omitted. In the following description, for convenience, the X-axis, Y-axis, and Z-axis, which are orthogonal to each other, are appropriately used. In addition, one direction along the X-axis is referred to as the X1 direction, and the direction opposite to the X1 direction is referred to as the X2 direction. Similarly, one direction along the Y-axis is referred to as the Y1 direction, and the direction opposite to the Y1 direction is referred to as the Y2 direction. In the following description, a direction along the Z-axis is referred to as the Z1 direction, and the direction opposite to the Z1 direction is referred to as the Z2 direction. In addition, a view in the Z1 direction or Z2 direction is referred to as a "planar view."

[0012] The electro-optical device 100 shown in Fig. 1 and Fig. 2 is a transmissive liquid crystal device of an active matrix driving system. As shown in Fig. 2, the electro-optical device 100 has a first substrate 2 having light-transmitting properties, a second substrate 3 having light-transmitting properties, a frame-shaped seal member 4, and a liquid crystal layer 5. The first substrate 2, the liquid crystal layer 5, and the second substrate 3 are arranged in this order in the Z1 direction. The electro-optical device 100 shown in Fig. 1 has a rectangular shape in a plan view, but may have a circular shape, for example. Note that "light-transmitting properties" refers to transparency to visible light, and preferably refers to a visible light transmittance of 50% or more.

[0013] The first substrate 2 shown in FIG. 2 is a light-transmitting element substrate having a plurality of TFTs (Thin Film Transistors) to be described later. The first substrate 2 has a first base 21, a wiring section 20, a plurality of pixel electrodes 24, and a first alignment film 29, which are arranged in this order toward the liquid crystal layer 5. The first base 21 is composed of a flat plate having light-transmitting and insulating properties. The first base 21 is formed of, for example, glass or quartz. The wiring section 20 includes a plurality of electrodes and a plurality of wirings. The plurality of pixel electrodes 24 are electrodes for applying an electric field to the liquid crystal layer 5. Each pixel electrode 24 is composed of a transparent conductive material such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). The first alignment film 29 aligns the liquid crystal molecules of the liquid crystal layer 5. Examples of materials for the first alignment film 29 include polyimide and silicon oxide. Although not shown, the first substrate 2 has a plurality of dummy pixel electrodes surrounding the plurality of pixel electrodes 24 in a plan view. The first substrate 2 will be described in detail later.

[0014] The second substrate 3 is a translucent opposing substrate disposed opposite the first substrate 2. The second substrate 3 has a second base 31, an insulating film 32, a common electrode 33, and a second alignment film 34, which are disposed in this order toward the liquid crystal layer 5. The second base 31 is composed of a flat plate having translucency and insulation. The second base 31 is formed of, for example, glass or quartz. The insulating film 32 is formed of, for example, a silicon-based inorganic material having translucency and insulation, such as silicon oxide. The common electrode 33 is an opposing electrode disposed with respect to the plurality of pixel electrodes 24 via the liquid crystal layer 5. The common electrode 33 is an electrode for applying an electric field to the liquid crystal layer 5. The common electrode 33 is formed of, for example, a transparent conductive material such as ITO or IZO. The second alignment film 34 aligns the liquid crystal molecules of the liquid crystal layer 5. Examples of the material of the second alignment film 34 include polyimide and silicon oxide.

[0015] Although not shown, the second substrate 3 has a light-shielding partition surrounding the plurality of pixel electrodes 24 in a plan view. "Light-shielding property" means light-shielding property against visible light, and preferably means that the transmittance of visible light is less than 50%, and more preferably 10% or less.

[0016] The seal member 4 is disposed between the first substrate 2 and the second substrate 3. The seal member 4 is formed of an adhesive or the like containing various curable resins such as epoxy resin. The seal member 4 contains a gap material made of an inorganic material such as glass in order to control the distance between the first substrate 2 and the second substrate 3. The distance between the first substrate 2 and the second substrate 3 may be controlled by disposing a spacer that is a separate member from the seal member 4.

[0017] The liquid crystal layer 5 is disposed within the region surrounded by the first substrate 2, the second substrate 3, and the seal member 4. The liquid crystal layer 5 is disposed between the first substrate 2 and the second substrate 3, and is an electro-optical layer whose optical properties change in response to an electric field. The liquid crystal layer 5 contains liquid crystal molecules having positive or negative dielectric anisotropy. The orientation of the liquid crystal molecules changes in response to a voltage applied to the liquid crystal layer 5.

[0018] 1, a plurality of scanning line driving circuits 11, a signal line driving circuit 12, and a plurality of external terminals 13 are arranged on the first substrate 2. Some of the plurality of external terminals 13 are connected to wiring (not shown) drawn from the scanning line driving circuit 11 or the signal line driving circuit 12. The plurality of external terminals 13 also include a terminal to which a common potential is applied. This terminal is electrically connected to a common electrode 33 of the second substrate 3 via wiring and a conductive material (not shown).

[0019] The electro-optical device 100 has a display region A10 for displaying an image, and a peripheral region A20 located outside the display region A10 in a planar view. A plurality of pixels P arranged in a matrix are provided in the display region A10. A plurality of pixel electrodes 24 are arranged in a one-to-one relationship for the plurality of pixels P. The above-mentioned common electrode 33 is provided in common to the plurality of pixels P. The peripheral region A20 surrounds the display region A10 in a planar view. A scanning line driving circuit 11 and a signal line driving circuit 12 are arranged in the peripheral region A20. Although not shown, the peripheral region A20 also includes a dummy pixel region in which a plurality of dummy pixel electrodes are arranged.

[0020] In this embodiment, the electro-optical device 100 is a transmissive type. In this embodiment, the light incident on the second substrate 3 is modulated while it is being emitted from the first substrate 2, thereby displaying an image. Note that the light incident on the first substrate 2 may be modulated while it is being emitted from the second substrate 3, thereby displaying an image. The electro-optical device 100 may also be a reflective type. In this case, for example, the common electrode 33 has translucency, and the pixel electrode 24 has reflectivity. In the case of the reflective type, the light incident on the second substrate 3 is reflected by the pixel electrode 24, and is modulated while it is being emitted from the second substrate 3 again, thereby displaying an image. Furthermore, in the case of the reflective type, the first substrate 2 does not need to have translucency, and may be, for example, a silicon substrate in which elements and the like can be built in.

[0021] The electro-optical device 100 is also applied to a display device that performs color display, such as a personal computer and a smartphone, which will be described later. When applied to such a display device, a color filter is appropriately used for the electro-optical device 100. The electro-optical device 100 is also applied to a projection-type projector, which will be described later. In this case, the electro-optical device 100 functions as a light valve. In this case, the color filter is omitted for the electro-optical device 100.

[0022] 1Ab. Electrical configuration of the first substrate 2 Fig. 3 is an equivalent circuit diagram showing the electrical configuration of the first substrate 2 in Fig. 1. As shown in Fig. 3, the first substrate 2 has a plurality of transistors 23, n scanning lines 244, m signal lines 242, and n first constant potential lines 245. n and m are each an integer of 2 or more. The transistors 23 are arranged corresponding to each intersection of the n scanning lines 244 and the m signal lines 242. Each transistor 23 is, for example, a TFT that functions as a switching element. Each transistor 23 includes a gate, a source, and a drain.

[0023] Each of the n scanning lines 244 extends in the X1 direction, and the n scanning lines 244 are arranged at equal intervals in the Y2 direction. Each of the n scanning lines 244 is electrically connected to the gates of the corresponding transistors 23. The n scanning lines 244 are electrically connected to the scanning line driving circuit 11 shown in Fig. 1. Scanning signals G1, G2, ..., and Gn are supplied line-sequentially to the 1st to nth scanning lines 244 from the scanning line driving circuit 11.

[0024] Each of the m signal lines 242 shown in Fig. 3 extends in the Y2 direction, and the m signal lines 242 are arranged at equal intervals in the X1 direction. Each of the m signal lines 242 is electrically connected to the sources of the corresponding transistors 23. The m signal lines 242 are electrically connected to the signal line drive circuit 12 shown in Fig. 1. Image signals S1, S2, ..., and Sm are supplied in parallel to the 1 to m signal lines 242 from the signal line drive circuit 12.

[0025] 3 are electrically insulated from each other and arranged in a lattice pattern in plan view. An area surrounded by two adjacent scanning lines 244 and two adjacent signal lines 242 corresponds to a pixel P. Each pixel electrode 24 is electrically connected to the drain of a corresponding transistor 23.

[0026] Each of the n first constant potential lines 245 extends in the X1 direction, and the n first constant potential lines 245 are arranged at equal intervals in the Y2 direction. The n first constant potential lines 245 are electrically insulated from the m signal lines 242 and the n scanning lines 244, and are arranged at intervals from these lines. A fixed potential such as a ground potential is applied to each of the n first constant potential lines 245. Each of the n first constant potential lines 245 is electrically connected to a corresponding plurality of storage capacitors 25. Each storage capacitor 25 is a capacitance element for holding the potential of the pixel electrode 24. The plurality of storage capacitors 25 are electrically connected to the plurality of pixel electrodes 24 in a one-to-one relationship. The plurality of storage capacitors 25 are electrically connected to the drains of the plurality of transistors 23 in a one-to-one relationship.

[0027] When the scanning signals G1, G2, ..., and Gn are successively activated and n scanning lines 244 are successively selected, the transistor 23 connected to the selected scanning line 244 is turned on. Then, image signals S1, S2, ..., and Sm having a magnitude corresponding to the gradation to be displayed are taken into the pixel P corresponding to the selected scanning line 244 via m signal lines 242 and applied to the pixel electrode 24. As a result, a voltage corresponding to the gradation to be displayed is applied to the liquid crystal capacitance formed between the pixel electrode 24 and the common electrode 33 in FIG. 2, and the orientation of the liquid crystal molecules changes according to the applied voltage. The applied voltage is held by the storage capacitance 25. Such a change in the orientation of the liquid crystal molecules modulates light, enabling gradation display.

[0028] 1Ac. First substrate 2 Fig. 4 is a cross-sectional view that illustrates a schematic view of the first substrate 2 in Fig. 2. Fig. 4 focuses on one pixel P. The configuration of the wiring section 20 illustrated in Fig. 4 is an example. Therefore, the configuration of the wiring section 20 may be any configuration other than the example illustrated in Fig. 4.

[0029] As shown in FIG. 4, the first base 21 has a recess for a light shielding body in which a light shielding body 241 having light shielding properties and electrical conductivity is disposed. The recess for a light shielding body is formed, for example, by a damascene method. Examples of materials for the light shielding body 241 include metals such as tungsten (W), titanium (Ti), chromium (Cr), iron (Fe), and aluminum (Al), metal nitrides, and metal silicides. Among these, tungsten is preferable. Among various metals, tungsten has excellent heat resistance, and its OD (Optical Density) value is unlikely to decrease even by heat treatment during manufacturing. Therefore, when the light shielding body 241 contains tungsten, the light shielding body 241 can particularly effectively prevent light from entering the transistor 23.

[0030] The wiring section 20 is disposed between the first substrate 21 and the pixel electrode 24. The wiring section 20 has an insulating laminate 22, and various electrodes and wirings shown in Fig. 2. Each laminate 22 has insulating layers 221, 222, 223, 224, 225, 226, 227, 228, and 229 arranged in this order toward the pixel electrode 24. These layers are each a silicon oxide film formed by, for example, thermal oxidation or a CVD (chemical vapor deposition) method.

[0031] 2, the various electrodes and wirings arranged in the laminate 22 include a transistor 23, a scanning line 244, a signal line 242, and a first constant potential line 245, as well as a drain wiring 243, a source wiring 246, a second constant potential line 248, and a connection wiring 247. In addition, contact parts 271, 272, 273, 274, 275, 276, 277, 278, 279, 281, 282, and 283 are arranged in the laminate 22.

[0032] Between the insulating layer 221 and the insulating layer 222, the semiconductor layer 231 of the transistor 23 is disposed. Between the insulating layer 222 and the insulating layer 223, the gate electrode 232 of the transistor 23 is disposed. Between the insulating layer 223 and the insulating layer 224, the source wiring 246, the drain wiring 243, and the scanning line 244 are disposed. Between the insulating layer 224 and the insulating layer 225, the first constant potential line 245 is disposed. Between the insulating layer 225 and the insulating layer 226, the first capacitance 251 of the storage capacitance 25 is disposed. Between the insulating layer 226 and the insulating layer 227, the second capacitance 252 of the storage capacitance 25 is disposed. Between the insulating layer 227 and the insulating layer 228, the signal line 242 is disposed. Between the insulating layer 228 and the insulating layer 229, the second constant potential line 248 and the connection wiring 247 are disposed.

[0033] The transistor 23 has a semiconductor layer 231, a gate electrode 232, and a gate insulating film 233. The semiconductor layer 231 has a source region 231a, a drain region 231b, a channel region 231c, a first LDD (Lightly Doped Drain) region 231d, and a second LDD region 231e. The semiconductor layer 231 is formed by depositing, for example, polysilicon, and an impurity that increases conductivity is doped in the region other than the channel region 231c. The impurity concentration in the first LDD region 231d and the second LDD region 231e is lower than the impurity concentration in the source region 231a and the drain region 231b. At least one of the first LDD region 231d and the second LDD region 231e, particularly the first LDD region 231d, may be omitted.

[0034] The gate electrode 232 overlaps with the channel region 231c of the semiconductor layer 231 in a plan view. The gate electrode 232 is formed, for example, by doping polysilicon with an impurity that enhances electrical conductivity. The gate electrode 232 may be formed using a material having electrical conductivity, such as a metal, a metal silicide, or a metal compound. A gate insulating film 233 is interposed between the gate electrode 232 and the channel region 231c. The gate insulating film 233 is made of silicon oxide formed, for example, by thermal oxidation or a CVD method.

[0035] The source region 231a of the transistor 23 is connected to the source wiring 246 through a contact portion 271 that penetrates the insulating layer 222 and the insulating layer 223. The source wiring 246 is connected to the signal line 242 through a contact portion 275 that penetrates the insulating layers 224, 225, 226, and 227. The drain region 231b is connected to the drain wiring 243 through a contact portion 272 that penetrates the insulating layers 222 and 223. The drain wiring 243 is connected to the second capacitance 252 of the storage capacitance 25 through a contact portion 276 that penetrates the insulating layers 224, 225, and 226. The gate electrode 232 is connected to the scanning line 244 through a contact portion 273 that penetrates the insulating layer 223. In addition, the scanning line 244 is connected to the light shield 241 described above through a contact portion 274 that penetrates the insulating layers 221, 222, and 223. The light shield 241 may function as a gate electrode together with the gate electrode 232 of the transistor 23 .

[0036] A shield section 270 is connected to the first constant potential line 245. A fixed potential is supplied to the shield section 270 from the first constant potential line 245. The shield section 270 functions as a shield that suppresses the influence of a leakage electric field from the scanning line 244 on the transistor 23 and the drain wiring 243, and as a light shielding section for the semiconductor layer 231. For this purpose, the shield section 270 passes between the first constant potential line 245 and the scanning line 244 and the drain wiring 243, and extends halfway in the thickness direction of the insulating layer 223. In addition, the shield section 270 overlaps with the second LDD region 231e in a plan view.

[0037] The storage capacitor 25 has a first capacitor 251 and a second capacitor 252. The first capacitor 251 has a pair of capacitor electrodes 2511 and 2512 and a dielectric layer 2513. The dielectric layer 2513 is disposed between the capacitor electrodes 2511 and 2512. The capacitor electrode 2511 is connected to the first constant potential line 245 via a contact portion 277 that penetrates the insulating layer 225. The capacitor electrode 2512 is connected to the connection wiring 247 via a contact portion 279 that penetrates the insulating layers 226, 227, and 228. The connection wiring 247 is connected to the pixel electrode 24 via a contact portion 283 that penetrates the insulating layer 229.

[0038] The second capacitor 252 has a portion overlapping with the first capacitor 251 in a plan view. The second capacitor 252 has a pair of capacitance electrodes 2521 and 2522 and a dielectric layer 2523. The dielectric layer 2523 is disposed between the capacitance electrodes 2521 and 2522. The capacitance electrode 2521 is connected to the capacitance electrode 2512 of the first capacitor 251 via a contact portion 278 that penetrates the insulating layer 226. The capacitance electrode 2522 is connected to the first constant potential line 245 via a contact portion 281 that penetrates the insulating layers 225 and 226. In addition, the capacitance electrode 2522 is connected to the second constant potential line 248 via a contact portion 282 that penetrates the insulating layers 227 and 228.

[0039] A fixed potential such as a ground potential is applied to the second constant potential line 248, similarly to the first constant potential line 245. The fixed potential supplied to the first constant potential line 245 and the fixed potential supplied to the second constant potential line 248 are the same potential. Furthermore, the connection wiring 247 is arranged in the same layer as the second constant potential line 248, but in a different layer from the signal line 242. By not arranging the signal line 242 and the connection wiring 247 in the same layer, adjacent coupling between them is suppressed.

[0040] The materials of the above-mentioned source wiring 246, drain wiring 243, scanning line 244, first constant potential line 245, signal line 242, connection wiring 247, second constant potential line 248, capacitance electrode 2511, capacitance electrode 2512, capacitance electrode 2521, and capacitance electrode 2522 include metals such as tungsten, titanium, chromium, iron, and aluminum, metal nitrides, and metal silicides. Specifically, for example, each of the capacitance electrodes 2511, 2512, 2521, and 2522 is made of a titanium nitride film. Also, for example, each of the source wiring 246, drain wiring 243, scanning line 244, first constant potential line 245, signal line 242, connection wiring 247, and second constant potential line 248 is made of a laminate of, for example, a titanium nitride film, an aluminum film, and a titanium nitride film. By including an aluminum film, it is possible to achieve a lower resistance compared to a case where the electrodes are made of only a titanium nitride film.

[0041] Also, examples of the materials of the contact parts 271-279, 281-283 and the shield part 270 include metal materials such as metals such as tungsten, cobalt (Co) and copper, metal nitrides and metal silicides. Among these, it is preferable to mainly contain tungsten. By containing tungsten, highly precise columnar contact parts can be easily formed. Also, since the contact parts 271-279, 281-283 and the shield part 270 are each columnar in shape, the arrangement space of the contact parts 271-279, 281-283 and the shield part 270 can be made smaller than when they are so-called trench-shaped. Therefore, the decrease in the aperture ratio can be suppressed.

[0042] Furthermore, each of the contact portions 271-279, 281-283 and the shield portion 270 may be a single layer or multiple layers. For example, each of the contact portions 271-279, 281-283 and the shield portion 270 may have a laminated structure of a layer mainly made of tungsten and a layer containing tungsten nitride.

[0043] 1Ad. Configuration of contact portion 275 and its vicinity 5 is a cross-sectional view showing the contact portion 275 shown in FIG. 4. In the following, a case where the contact portion 275 is an example of a "plug" will be described. In this case, the source wiring 246 is an example of a "first conductive portion", and the signal line 242 is an example of a "second conductive portion". In this case, the insulating layers 224 to 227 are examples of an "insulating film" disposed between the source wiring 246 and the signal line 242.

[0044] 5, the contact portion 275 is disposed in the insulating layers 224 to 227. Specifically, the contact portion 275 penetrates the insulating layers 224 to 227. More specifically, a contact hole H1, which is a through hole penetrating the insulating layers 224 to 227, is formed in the insulating layers 224 to 227, and the contact portion 275 is disposed in the contact hole H1.

[0045] The contact portion 275 electrically connects the source wiring 246 and the signal line 242. In the illustrated example, the contact portion 275 is directly connected to each of the source wiring 246 and the signal line 242. The contact portion 275 has a surface 2752 on the source wiring 246 side and a surface 2751 on the signal line 242 side. The surface 2752 is a contact surface with the source wiring 246, and the surface 2751 is a contact surface with the signal line 242.

[0046] A surface 2751 of the contact portion 275 has a recess 2750 in its center. The recess 2750 is a depression formed in the surface 2751. A void V1 is formed inside the contact portion 275. In the illustrated example, the void V1 does not communicate with the inside of the recess 2750, but it may communicate with the inside of the recess 2750.

[0047] If the contact portion 275 is formed so as to fill the contact hole H1, there is a high possibility that a void V1 will be formed inside the contact portion 275. In addition, a recess 2750 is formed in the surface 2751 of the contact portion 275. If such a recess 2750 exists, an excessively large step is generated on the surface 2751. The step may adversely affect the signal line 242 arranged on the contact portion 275. Specifically, for example, there is a risk of film formation failure of the signal line 242. As a result, there is a risk of connection failure between the contact portion 275 and the signal line 242.

[0048] In order to suppress the occurrence of such adverse effects, in this embodiment, the embedded portion 261 is disposed in the recess 2750. Specifically, the embedded portion 261 fills the recess 2750. By providing the embedded portion 261, the influence of the step of the surface 2751 of the contact portion 275 on the signal line 242 can be reduced compared to the case where the embedded portion 261 is not provided. Therefore, the adverse effect of the recess 2750 of the contact portion 275 on the signal line 242 can be suppressed. Specifically, the occurrence of film formation defects of the signal line 242 and connection defects between the contact portion 275 and the signal line 242 can be suppressed. Therefore, the deterioration of the display quality can be suppressed.

[0049] For example, a method of reducing the width of the contact hole H1 is conceivable so that the void V1 and the recess 2750 are not formed in the contact portion 275. However, depending on the device for forming the contact hole H1, it is difficult to sufficiently reduce the width of the contact hole H1. Also, for example, a method of increasing the thickness of the contact portion 275 is conceivable so that the void V1 and the recess 2750 are not formed in the contact portion 275. However, there is a problem that the thicker the contact portion 275 is, the more likely the contact portion 275 is to be damaged. Therefore, by using the embedded portion 261 as in this embodiment, the adverse effect on the wiring caused by the recess 2750 of the contact portion 275 can be easily suppressed.

[0050] Each of the embedded portion 261 and the contact portion 275 is in contact with the signal line 242. A surface 2611 of the embedded portion 261 facing the signal line 242 and a surface 2751 of the contact portion 275 are contact surfaces that are in contact with the signal line 242. By providing the embedded portion 261 so as to be in contact with the signal line 242, it is possible to reduce the influence of a step on the surface 2751 of the contact portion 275 on the signal line 242, compared to a case in which the embedded portion 261 is not in contact with the signal line 242.

[0051] Although not shown, in plan view, the portion of the surface 2751 of the contact portion 275 other than the recess 2750 surrounds the surface 2611 of the embedded portion 261. The embedded portion 261 is located in the center of the contact portion 275 in plan view.

[0052] The surface 2611 which is the contact surface of the embedded portion 261 with the signal line 242, the surface 2751 which is the contact surface of the contact portion 275 with the signal line 242, and the surface 2271 which is the contact surface of the insulating layer 227 with the signal line 242 are continuous without any steps. That is, the surfaces 2751, 2611, and 2271 form a flat surface. By forming a flat surface with the surfaces 2751, 2611, and 2271, it is possible to reduce the influence of the step of the surface 2751 of the contact portion 275 on the signal line 242 compared to the case where a step surface is formed with the surfaces 2751, 2611, and 2271. The flat surface means that there is substantially no step.

[0053] Moreover, the material of the embedded portion 261 is, for example, an inorganic material having insulating properties. Specifically, the material of the embedded portion 261 is, for example, a silicon-based inorganic material such as silicon oxide and silicon oxynitride. Since the embedded portion 261 is made of this material, the embedded portion 261 that fills the recess 2750 can be easily formed by using a so-called touch-up CMP (chemical mechanical polishing) method, for example, before forming the signal line 242. The touch-up CMP method is a method of forming the embedded portion 261 that fills the recess 2750 by forming a film that becomes the embedded portion 261 before forming the signal line 242 and removing a part of the film by the CMP method.

[0054] When the embedded portion 261 has insulating properties, as shown in FIG. 5, the embedded portion 261 is not in contact with the insulating layer 227. Specifically, the embedded portion 261 is not disposed between the insulating layer 227 and the signal line 242. Therefore, the embedded portion 261 is not disposed between the signal line 242 and a portion of the surface 2751 of the contact portion 275 excluding the recess 2750. Note that, when the embedded portion 261 is provided on the entire surface 2751 of the contact portion 275, the contact portion 275 and the signal line 242 are not electrically connected. Therefore, when the embedded portion 261 has insulating properties, it is preferable that the embedded portion 261 is not disposed between the insulating layer 227 and the signal line 242.

[0055] Also, for example, the embedded portion 261 may not be insulating but may be conductive. When the embedded portion 261 is conductive, in addition to direct conduction between the signal line 242 and the contact portion 275, conduction between the signal line 242 and the contact portion 275 via the embedded portion 261 is possible. Therefore, when the embedded portion 261 is conductive, it is possible to more effectively prevent the occurrence of connection failure between the contact portion 275 and the signal line 242, compared to when the embedded portion 261 is insulating.

[0056] When the embedded portion 261 is conductive, the material of the embedded portion 261 may be, for example, a metal material such as metals such as tungsten, cobalt, and copper, metal nitrides, and metal silicides. Among these, the embedded portion 261 preferably contains tungsten. By containing tungsten, the recess 2750 can be filled easily and precisely. In addition, when the material of the contact portion 275 contains tungsten, the material of the embedded portion 261 is tungsten or titanium nitride, so that the adhesion between the embedded portion 261 and the contact portion 275 can be increased.

[0057] When the embedded portion 261 is conductive, a part of the embedded portion 261 may be disposed between the insulating layer 227 and the signal line 242 .

[0058] Although the above description has been given taking the example of the contact portion 275 being a "plug," any of the other contact portions 271-279, 281, 282, and 283 may correspond to a "plug." In this case, one of the two wirings or electrodes connected to the "plug" corresponds to a "first conductive portion," and the other corresponds to a "second conductive portion." Furthermore, the layer of the laminate 22 in which the "plug" is disposed corresponds to an "insulating film." Furthermore, the "plug" has a "recess," and a "buried portion" is formed to fill the "recess."

[0059] 1Ae. Configuration of contact parts 281, 282 and their vicinity FIG. 6 is a cross-sectional view showing other contact parts 281 and 282 shown in FIG. 4. In the following, a case where the contact part 281 is an example of a "first plug" will be described. In this case, the contact part 282 is an example of a "second plug". Furthermore, the first constant potential line 245 is an example of a "first conductive part", and the capacitance electrode 2522 of the second capacitance 252 is an example of a "second conductive part". Furthermore, in this case, the insulating layers 225 and 226 are an example of an "insulating film" disposed between the source wiring 246 and the signal line 242.

[0060] 6, contact portion 281 is disposed in insulating layers 225 and 226. Specifically, contact portion 281 penetrates insulating layers 225 and 226. More specifically, contact hole H2, which is a through hole penetrating insulating layers 225 and 226, is formed in insulating layers 225 and 226, and contact portion 281 is disposed in contact hole H2.

[0061] The contact portion 281 electrically connects the first constant potential wire 245 and the capacitive electrode 2522. The contact portion 281 has a surface 2812 on the first constant potential wire 245 side and a surface 2811 on the capacitive electrode 2522 side. The surface 2812 is a contact surface with the first constant potential wire 245, and the surface 2811 is a contact surface with the capacitive electrode 2522.

[0062] A surface 2811 of the contact portion 281 has a recess 2810 in its center. The recess 2810 is a depression formed in the surface 2811. A void V2 is formed inside the contact portion 281. In the illustrated example, the void V2 does not communicate with the inside of the recess 2810, but there are also cases where the void V2 communicates with the inside of the recess 2810.

[0063] Moreover, the embedded portion 262 is disposed in the recess 2810. Specifically, the embedded portion 262 fills the recess 2810. By providing the embedded portion 262, it is possible to reduce adverse effects on the capacitance electrode 2522 caused by steps on the surface 2811 of the contact portion 281, compared to a case in which the embedded portion 262 is not provided. Specifically, it is possible to suppress the occurrence of film formation defects of the capacitance electrode 2522 and connection defects between the contact portion 281 and the capacitance electrode 2522. Therefore, it is possible to suppress a decrease in display quality.

[0064] 6, the contact portion 282 is disposed in the insulating layers 227 and 228. Specifically, the contact portion 282 penetrates the insulating layers 227 and 228. More specifically, a contact hole H3 that is a through hole penetrating the insulating layers 227 and 228 is formed in the insulating layers 227 and 228, and the contact portion 282 is disposed in the contact hole H3.

[0065] The contact portion 282 electrically connects the capacitance electrode 2522 of the second capacitance 252 and the second constant potential line 248. In addition, the contact portion 282 has a surface 2822 on the capacitance electrode 2522 side and a surface 2821 on the second constant potential line 248 side. The surface 2822 is a contact surface with the capacitance electrode 2522, and the surface 2821 is a contact surface with the second constant potential line 248.

[0066] A surface 2821 of the contact portion 282 has a recess 2820 in its center. The recess 2820 is a depression formed in the surface 2821. A void V3 is formed inside the contact portion 282. In the illustrated example, the void V3 does not communicate with the inside of the recess 2820, but there are also cases where the void V3 communicates with the inside of the recess 2820.

[0067] Moreover, the embedded portion 263 is disposed in the recess 2820. Specifically, the embedded portion 263 fills the recess 2820. By providing the embedded portion 263, it is possible to reduce adverse effects on the second constant potential line 248 caused by steps on the surface 2821 of the contact portion 282, compared to a case in which the embedded portion 263 is not provided. Specifically, it is possible to suppress the occurrence of film formation defects of the second constant potential line 248 and connection defects between the contact portion 282 and the second constant potential line 248. Therefore, it is possible to suppress a decrease in display quality.

[0068] The contact portion 282 may not have the recess 2820 and the void V3. In this case, the filling portion 263 is omitted.

[0069] Furthermore, contact portion 282 is directly connected to contact portion 281. Therefore, a part of contact portion 282 contacts a part of contact portion 281. In other words, contact portion 282 is a so-called half stack in which a part of contact portion 282 overlaps contact portion 281. Furthermore, in the illustrated example, specifically, a part of contact portion 282 contacts a part of contact portion 281 and a part of embedded portion 262.

[0070] 6, when two contact portions 281 and 282 are directly stacked on top of each other, the provision of embedded portion 262 can reduce the effect of recess 2810 of contact portion 281 on contact portion 282. Specifically, poor connection between contact portion 281 and contact portion 282 can be suppressed.

[0071] Contact portion 282 may be a so-called full stack in which the entire area of ​​surface 2822 overlaps contact portion 281. In this case, surface 2822 of contact portion 282 contacts contact portion 281 and embedded portion 262. When contact portion 282 is a so-called full stack, having embedded portion 262 can provide a particularly remarkable effect of suppressing connection defects between contact portion 281 and contact portion 282.

[0072] 1Af. Method for manufacturing electro-optical device 100 7 is a diagram showing the flow of the manufacturing method of the electro-optical device 100 according to the first embodiment. In FIG. 7, of the manufacturing steps of the electro-optical device 100, the manufacturing steps of the contact portion 275 and its vicinity are representatively shown.

[0073] 7, the manufacturing method of the electro-optical device 100 includes a first conductive portion forming step S11, an insulating film forming step S12, a plug forming step S13, a buried portion forming step S14, and a second conductive portion forming step S15. In the following, a representative example of the "plug" will be described as the contact portion 275.

[0074] Although not shown, in the first conductive portion forming step S11, a source wiring 246 is formed as a "first conductive portion". The source wiring 246 is formed, for example, by forming a metal film by a sputtering method or a vapor deposition method, and then etching the metal film using a resist mask. Also, in the insulating film forming step S12, insulating layers 224-227 are formed as an "insulating film". The insulating layers 224-227 are formed, for example, by thermal oxidation or a vapor deposition method such as a CVD method. Also, although not shown, in the insulating film forming step S12, a contact hole H1 penetrating the insulating layers 224-227 is formed, for example, by etching.

[0075] 8 and 9 are diagrams for explaining the plug forming step S13. In the plug forming step S13, for example, as shown in FIG. 8, a conductive material layer 275x is formed, and then, as shown in FIG. 9, a contact portion 275 is formed as a "plug" from the conductive material layer 275x. The contact portion 275 is formed so as to fill the inside of a contact hole H1 penetrating the insulating layers 224 to 227. The contact portion 275 is formed by depositing a metal material in the contact hole H1 by, for example, a sputtering method or a deposition method such as a CVD method. Specifically, as shown in FIG. 8, a conductive material layer 275x made of tungsten or the like is formed in the contact hole H1 and on the insulating layer 227. Thereafter, the conductive material layer 275x is polished by a CMP method or the like, so that a portion of the conductive material layer 275x on the insulating layer 227 is removed. As a result, the contact portion 275 filling the inside of the contact hole H1 is formed as shown in FIG. In addition, an annealing process is appropriately performed in the formation of the contact portion 275.

[0076] 8, when the contact portion 275 is formed in a columnar shape so as to fill the contact hole H1, a void V1 is formed inside the contact portion 275, and a recess 2750 is formed on the contact portion 275. The recess 2750 is formed in the center of a surface 2751 of the contact portion 275.

[0077] 10 and 11 are diagrams for explaining the embedded portion forming step S14. In the embedded portion forming step S14, the embedded portion 261 is formed. First, as shown in FIG. 10, a material layer 261a of the embedded portion 261 is formed on the contact portion 275 and the insulating layer 228 by, for example, a CVD (chemical vapor deposition) method.

[0078] Next, a part of the material layer 261a is removed by a so-called touch-up CMP method, thereby forming the buried portion 261 filling the recess 2750, as shown in FIG. 11. Specifically, before forming the signal line 242, the material layer 261a is formed on the insulating layer 227, and a part of the material layer 261a is removed by a CMP method to form the buried portion 261 filling the recess 2750. By performing such a touch-up CMP method, the buried portion 261 can be formed easily and reliably. Even if it is difficult to fill the recess 2750 by simply thickening the conductive material layer 275x, the buried portion 261 filling the recess 2750 can be formed easily and reliably by forming the buried portion 261 filling the recess 2750 with the material layer 261a. In addition, by performing the touch-up CMP method, the surface 2611 of the buried portion 261, the surface 2751 of the contact portion 275, and the surface 2271 of the insulating layer 227 can be formed into flat surfaces. In addition, by using the touch-up CMP method, it is possible to efficiently remove unnecessary oxide layers and foreign matter that may be formed on the material layer 261a. By using the touch-up CMP method, it is possible to reduce the connection resistance between the contact portion 275 and the signal line 242. In other words, by using the touch-up CMP method, it is possible to obtain a good resistance between the contact portion 275 and the signal line 242.

[0079] Next, although not shown in the figure, in a second conductive portion forming process S15, the signal line 242 is formed. The signal line 242 is formed, for example, by forming a metal film by a sputtering method or a vapor deposition method, and then etching the metal film using a resist mask.

[0080] As described above, the manufacturing method of the electro-optical device 100 includes a first conductive portion forming step S11, an insulating film forming step S12, a plug forming step S13, a buried portion forming step S14, and a second conductive portion forming step S15. By this method, the source wiring 246, the contact portion 275, the buried portion 261, and the signal line 242 are obtained. Then, by forming the buried portion 261 that fills the recess 2750 of the contact portion 275, it is possible to suppress film formation defects of the signal line 242 formed on the contact portion 275. Therefore, it is possible to obtain an electro-optical device 100 in which deterioration of display quality is suppressed.

[0081] 1B. Second embodiment A second embodiment will be described. In the following examples, elements having the same functions as those in the first embodiment will be designated by the same reference numerals as those in the first embodiment, and detailed descriptions thereof will be omitted as appropriate.

[0082] 12 is a cross-sectional view showing the embedded portion 261A in the second embodiment. In this embodiment, the embedded portion 261A is used instead of the embedded portion 261. In the following, the embedded portion 261A will be described in terms of differences from the embedded portion 261 in the first embodiment, and descriptions of similar points will be omitted as appropriate.

[0083] As shown in FIG. 12, a part of the embedded portion 261A is disposed between the insulating layer 227 and the signal line 242. Specifically, the embedded portion 261A has a first portion 2615A and a second portion 2616A. The first portion 2615A is a portion disposed in the recess 2750. The second portion 2616A is a flat portion disposed between the signal line 242 and a portion of the surface 2751 other than the recess 2750. In addition, the surface 2611A on the signal line 242 side of the embedded portion 261A contacts the signal line 242. Note that the surface 2751 of the contact portion 275 and the surface 2271 of the insulating layer 227 do not contact the signal line 242.

[0084] Moreover, the embedded portion 261A has electrical conductivity. The embedded portion 261A also serves as a part of the signal line 242. Since the embedded portion 261A has electrical conductivity, even if the embedded portion 261A has the second portion 2616A, electrical continuity between the signal line 242 and the contact portion 275 via the embedded portion 261A is possible. Therefore, the occurrence of poor connection between the contact portion 275 and the signal line 242 can be further suppressed.

[0085] Moreover, the embedded portion 261A is formed as follows: In this embodiment, part of the embedded portion forming step S14 and part of the second conductive portion forming step S15 are performed in parallel with each other.

[0086] 13 is a diagram for explaining the buried portion forming step S14 and the second conductive portion forming step S15. For example, a material layer 261Aa that becomes the buried portion 261A is formed by a deposition method such as a CVD method. Then, the surface of the material layer 261Aa is planarized by a CMP method. By forming the conductive material layer 261a before forming the signal line 242, the buried portion 261A that fills the recess 2750 can be easily and reliably formed.

[0087] 13, a metal film 242a to be the signal line 242 is formed by sputtering or vapor deposition on the material layer 261Aa that has been subjected to the CMP method. That is, the signal line 242 is formed after the material layer 261Aa is subjected to the CMP method. Thereafter, the metal film 242a and the material layer 261a are etched using a resist mask to form the signal line 242 and the embedded portion 261A shown in FIG.

[0088] Similarly to the first embodiment, the second embodiment described above also suppresses the deterioration of display quality more than the conventional one.

[0089] 2. Variations The above-described embodiment may be modified in various ways. Specific modified aspects that may be applied to the above-described embodiment are illustrated below. Two or more aspects selected from the following examples may be combined as appropriate to the extent that they are not mutually inconsistent.

[0090] In the above-described embodiments, the transistor 23 is a TFT, but may be, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET).

[0091] In each of the above-described embodiments, the electro-optical device 100 is an active matrix type, but the driving method of the electro-optical device 100 is not limited to this, and may be, for example, a passive matrix type or the like.

[0092] The driving method of the "electro-optical device" is not limited to the vertical electric field method, and may be a horizontal electric field method. In the first embodiment, the pixel electrodes 24 are provided on the first substrate 2, and the common electrode 33 is provided on the second substrate 3, but an electrode for applying an electric field to the liquid crystal layer 5 may be provided on only one of the first substrate 2 or the second substrate 3. Note that, for example, an IPS (In Plane Switching) mode is an example of the horizontal electric field method. Also, examples of the vertical electric field method include a TN (Twisted Nematic) mode, a VA (Vertical Alignment), a PVA mode, and an OCB (Optically Compensated Bend) mode.

[0093] In the above-described embodiments, the first substrate 2 has a "plug", but the second substrate 3 may have a "plug".

[0094] 3.Electronic equipment The electro-optical device 100 can be used in various electronic devices.

[0095] 14 is a perspective view showing a personal computer 2000, which is an example of an electronic device. The personal computer 2000 has an electro-optical device 100 that displays various images, a main body 2010 on which a power switch 2001 and a keyboard 2002 are installed, and a control unit 2003. The control unit 2003 includes, for example, a processor and a memory, and controls the operation of the electro-optical device 100.

[0096] 15 is a plan view showing a smartphone 3000 as an example of an electronic device. The smartphone 3000 has an operation button 3001, an electro-optical device 100 that displays various images, and a control unit 3002. The screen content displayed on the electro-optical device 100 changes in response to an operation of the operation button 3001. The control unit 3002 includes, for example, a processor and a memory, and controls the operation of the electro-optical device 100.

[0097] 16 is a schematic diagram showing a projector, which is an example of an electronic device. The projection display device 4000 is, for example, a three-plate projector. The electro-optical device 1r is an electro-optical device 100 corresponding to a red display color, the electro-optical device 1g is an electro-optical device 100 corresponding to a green display color, and the electro-optical device 1b is an electro-optical device 100 corresponding to a blue display color. That is, the projection display device 4000 has three electro-optical devices 1r, 1g, and 1b corresponding to red, green, and blue display colors, respectively. The control unit 4005 includes, for example, a processor and a memory, and controls the operation of the electro-optical device 100.

[0098] The illumination optical system 4001 supplies a red component r of light emitted from an illumination device 4002, which is a light source, to an electro-optical device 1r, a green component g to an electro-optical device 1g, and a blue component b to an electro-optical device 1b. Each of the electro-optical devices 1r, 1g, and 1b functions as an optical modulator such as a light valve that modulates each monochromatic light supplied from the illumination optical system 4001 according to a display image. The projection optical system 4003 combines the light emitted from each of the electro-optical devices 1r, 1g, and 1b and projects the combined light onto a projection surface 4004.

[0099] The above electronic devices include the electro-optical device 100 described above and the control unit 2003, 3002, or 4005. The electro-optical device 100 suppresses degradation of display quality. Therefore, by including the electro-optical device 100, it is possible to improve the display quality of the personal computer 2000, the smartphone 3000, or the projection display device 4000.

[0100] Note that electronic devices to which the electro-optical device of the present invention can be applied are not limited to the exemplified devices, and examples thereof include PDAs (Personal Digital Assistants), digital still cameras, televisions, video cameras, car navigation devices, in-vehicle displays, electronic organizers, electronic paper, calculators, word processors, workstations, videophones, and POS (Point of Sale) terminals, etc. Furthermore, examples of electronic devices to which the present invention can be applied include printers, scanners, copiers, video players, and devices equipped with touch panels, etc.

[0101] Although the present invention has been described based on the preferred embodiment, the present invention is not limited to the above embodiment. Furthermore, the configuration of each part of the present invention can be replaced with any configuration that exhibits the same function as the above embodiment, and any configuration can be added.

[0102] In the above description, a liquid crystal device has been described as an example of the electro-optical device of the present invention, but the electro-optical device of the present invention is not limited thereto. For example, the electro-optical device of the present invention can also be applied to an image sensor or the like. In addition, the present invention can be applied to a display panel using light-emitting elements such as organic EL (electro luminescence), inorganic EL, or light-emitting polymers in the same manner as in the above-described embodiment. In addition, the present invention can be applied to an electrophoretic display panel using microcapsules containing a colored liquid and white particles dispersed in the liquid in the same manner as in the above-described embodiment. [Explanation of symbols]

[0103] 2...first substrate, 3...second substrate, 4...sealing member, 5...liquid crystal layer, 11...scanning line driving circuit, 12...signal line driving circuit, 13...external terminal, 20...wiring section, 21...first base, 22...laminated body, 23...transistor, 24...pixel electrode, 25...storage capacitance, 29...first alignment film, 31...second base, 32...insulating film, 33...common electrode, 34...second alignment film, 100...electro-optical device, 221-119...insulating layer, 231...semiconductor layer, 231a...source region, 231b...drain region, 231c...channel region, 231d...first LDD region, 231e...second LDD region, 232...gate electrode, 233...gate Insulating film, 241...light shield, 242...signal line, 242a...metal film, 243...drain wiring, 244...scanning line, 245...first constant potential line, 246...source wiring, 247...connection wiring, 248...second constant potential line, 251...first capacitor, 252...second capacitor, 261...embedded portion, 270...shield portion, 271-279, 281-283...contact portions, 2511...capacitive electrode, 2512...capacitive electrode, 2513...dielectric layer, 2521...capacitive electrode, 2522...capacitive electrode, 2523...dielectric layer, A10...display area, A20...peripheral area, H1, H2, H3...contact holes, V1, V2, V3...voids.

Claims

1. A first conductive portion; A second conductive portion; an insulating film disposed between the first conductive portion and the second conductive portion and having a contact hole; a first plug that is disposed in the contact hole, electrically connects the first conductive portion and the second conductive portion, has a recess formed by a portion formed along a side surface of the contact hole contacting the second conductive portion on the side opposite to the first conductive portion in the contact hole, and a portion of the portion formed along the side surface of the contact hole contacts the second conductive portion; A filling portion that fills the recess; a second plug arranged to contact another portion of the first plug formed along the side of the contact hole and to contact the second conductive portion and the buried portion.

2. The electro-optical device according to claim 1 , wherein a contact surface of the buried portion with the second conductive portion, a contact surface of the first plug with the second conductive portion, and a contact surface of the insulating film with the second conductive portion are continuous.

3. 3. The electro-optical device according to claim 1, wherein the material of the buried portion is an inorganic material having insulating properties.

4. The electro-optical device according to claim 3 , wherein the buried portion is not in contact with the insulating film.

5. The electro-optical device according to claim 1 , wherein the buried portion is conductive.

6. The electro-optical device according to claim 5 , wherein the buried portion also serves as a part of the second conductive portion.

7. forming a first conductive portion; forming an insulating film on the first conductive portion; forming a contact hole in the insulating film; forming a first plug having a recess formed along a side surface of the contact hole and provided on a second conductive portion side opposite to the first conductive portion side in the contact hole; forming a filling portion in the recess; forming, on the insulating film, the second conductive portion that contacts a part of a portion of the first plug formed along a side surface of the contact hole on a side opposite to the first conductive portion in the contact hole, and is electrically connected to the first conductive portion via the first plug; forming a second plug in contact with another portion of the first plug formed along the side surface of the contact hole and in contact with the second conductive portion and the buried portion; A method for manufacturing an electro-optical device, comprising:

8. In the step of forming the buried portion, The method for manufacturing an electro-optical device according to claim 7 , wherein the buried portion is formed by forming a material layer on the insulating film and removing a part of the material layer by a CMP method.

9. The electro-optical device according to claim 1 , and a control unit for controlling an operation of the electro-optical device.

Citation Information

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