Densification of dielectric films with oxygen radical assistance

Abstract

Embodiments herein provide oxygen radical-based treatment of silicon-containing material layers deposited using a flowable chemical vapor deposition (FCVD) process. The oxygen radical-based treatment of FCVD-deposited silicon-containing material layers desirably increases the number of stable Si--O bonds, removes undesirable hydrogen and nitrogen impurities, and provides further densification and superior film quality to the treated silicon-containing material layer. Embodiments include methods and apparatus for fabricating semiconductor devices, including contacting a flowable layer of silicon-containing material disposed on a substrate with a plurality of oxygen radicals under conditions sufficient to anneal and densify the flowable layer of silicon-containing material.

Description

[Technical field]

[0001] TECHNICAL FIELD Embodiments of the present disclosure relate generally to the field of electronic device manufacturing, and specifically to altering the properties of dielectric layers. [Background technology]

[0002] Dielectric materials are widely used in the semiconductor industry to produce electronic devices of ever-decreasing size. Typically, dielectric materials are used as gap-fill films, shallow trench isolation (STI), via fills, masks, gate dielectrics, or other electronic device features.

[0003] The dielectric material typically comprises a silicon-containing material such as silicon dioxide (SiO2), and can be formed from a precursor into a flowable material using a flowable chemical vapor deposition (FCVD) process. The silicon-containing material layer deposited using a flowable silicon-containing material process, for example, a (FCVD) process, generally provides improved gap-filling performance of high aspect ratio features when compared with the silicon-containing material layer deposited using conventional methods. However, the inventors have found that the silicon-containing material layer typically provided by the FCVD process problematically contains Si-H, Si-NH and carbon bonds, which makes the film density of the silicon oxide layer lower or insufficient when forming a silicon oxide material.

[0004] Although the flowable silicon-containing material can be further processed after its deposition, the inventors have found that the processing methods run the risk of damaging underlying features and materials on the substrate due to ion bombardment or are otherwise inappropriate for processing silicon-containing materials disposed in high aspect ratio openings. For example, high temperature annealing can induce film shrinkage and stress, resulting in cracking, delamination, or both, preventing the formation of dielectric films in deep trenches and through fill applications.

[0005] Therefore, there is a need for improved methods for processing deposited flowable silicon-containing materials to achieve desired density and / or other desired material properties. Summary of the Invention

[0006] Provided herein is a method and apparatus for manufacturing a semiconductor device, comprising processing a flowable silicon-containing material. In some embodiments, the method for manufacturing a semiconductor device comprises contacting a flowable layer of silicon-containing material disposed on a substrate with a plurality of oxygen radicals under conditions sufficient to anneal and increase the density of the flowable layer of silicon-containing material.

[0007] In some embodiments, a method of manufacturing a semiconductor device includes depositing a flowable layer of silicon-containing material over one or more features on a substrate; and injecting or incorporating oxygen radicals into substantially the entire flowable layer of silicon-containing material to anneal and increase the density of the flowable layer of silicon-containing material.

[0008] In some embodiments, an apparatus for manufacturing an electronic device includes a process chamber including a pedestal for holding a substrate including a flowable layer of silicon-containing material on the substrate; an oxygen radical source coupled to the process chamber; and a processor coupled to the process chamber and the oxygen radical source, the processor configured to provide conditions in the process chamber sufficient to anneal and increase the density of the flowable layer of silicon-containing material.

[0009] Other and further embodiments of the present disclosure are described below.

[0010] Embodiments of the present disclosure, briefly summarized above and described in more detail below, can be understood by reference to the exemplary embodiments thereof as illustrated in the accompanying drawings, which, however, illustrate only typical embodiments of the present disclosure, since the present disclosure may admit of other equally effective embodiments, and therefore should not be considered as limiting in scope. [Brief description of the drawings]

[0011] [Figure 1] 1 is a schematic cross-sectional view of a processing chamber for use in the method of the present disclosure. [Figure 2A] 1 is a side view of a semiconductor substrate for processing according to the present disclosure; [Figure 2B] A side view of a flowable layer deposited over a feature of a semiconductor substrate according to an embodiment of the present disclosure. [Figure 2C] FIG. 1 illustrates oxygen radicals contacting a flowable layer according to an embodiment of the present disclosure. [Figure 2D] FIG. 1 illustrates the injection or incorporation of oxygen radicals into a flowable layer according to an embodiment of the present disclosure. [Diagram 3] 1 is a flow diagram for manufacturing a semiconductor device according to some embodiments of the present disclosure. [Figure 4] 1 is a flow diagram of an embodiment for manufacturing a semiconductor device according to some embodiments of the present disclosure. [Diagram 5] FIG. 1 is a perspective view of a tri-gate transistor structure according to an embodiment of the present disclosure; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] To facilitate understanding, the same reference numbers are used, where possible, to designate identical elements common to the figures. The figures are not drawn to scale and may be simplified for clarity. Elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.

[0013] The embodiments described herein generally relate to a method for oxygen radical-based treatment of a silicon-containing material layer disposed on a substrate surface, for example, a method for oxygen radical-based treatment of a silicon-containing material layer deposited using a flowable chemical vapor deposition (FCVD) process. For example, a flowable silicon-containing material process, such as a silicon oxide layer deposited using a (FCVD) process, generally provides improved gap-fill performance of high aspect ratio features when compared to a silicon-containing material layer deposited using a conventional method. However, the inventors have found that contacting a flowable layer of silicon-containing material with a plurality of oxygen radicals can be performed under conditions sufficient to anneal the flowable layer of silicon-containing material and increase its density. Oxygen radicals are reactive and suitable for deep penetration of the flowable layer of silicon-containing material, resulting in improvement in film quality by reduction or removal of Si-H, Si-NH, or carbon bonds. Furthermore, the inventors have observed that the risk of damaging underlying features and materials on the substrate by conventional processes such as ion bombardment or high temperature annealing can be reduced or eliminated.

[0014] 1 is a schematic cross-sectional view of a processing chamber suitable for use in the methods of the present disclosure. In some embodiments, the processing chamber 100 includes a chamber lid assembly 101, one or more sidewalls 102, and a chamber base 104 that collectively define a processing volume 120. The chamber lid assembly 101 includes a chamber lid 103, a showerhead 112, and an electrically insulating ring 105 that defines a plenum 122 disposed between the chamber lid 103 and the showerhead 112. A gas inlet 114 disposed through the chamber lid 103 is fluidly coupled to a gas source 106. In some embodiments, the gas inlet 114 is further fluidly coupled to a remote plasma source 107. The showerhead 112, with a plurality of openings 118 disposed therebetween, is used to uniformly distribute processing gas or oxygen radicals from the plenum 122 through the plurality of openings 118 into the processing volume 120.

[0015] In some embodiments, a power source 142, such as an RF or VHF power source, is electrically coupled to the chamber lid via a switch 144 when the switch is placed in a first position (as shown). When the switch is placed in a second position (not shown), the power source 142 is electrically coupled to the showerhead 112. When the switch is in the first position, the power source 142 is used to ignite and maintain a first plasma remote from the substrate 115, such as a remote plasma 128 disposed in the plenum 122. The remote plasma 128 is comprised of process gases that flow into the plenum and are maintained as a plasma by capacitive coupling of power from the power source 142. When the switch is in the second position, the power source 142 is used to ignite and maintain a second plasma (not shown) in the process volume 120 between the showerhead 112 and a substrate 115 disposed on a substrate support 127.

[0016] In some embodiments, the process volume 120 is fluidly coupled to a vacuum source, such as one or more dedicated vacuum pumps, via a vacuum outlet 113 that maintains the process volume 120 at subatmospheric pressure and exhausts process and other gases therefrom. A substrate support 127 disposed within the process volume 120 is disposed on a support shaft 124 that extends sealingly through the chamber base 104, such as surrounded by a bellows (not shown) in the area below the chamber base 104. The support shaft 124 is coupled to a controller 140 that controls a motor for raising and lowering the support shaft 124 and the substrate support 127 disposed thereon to support and transport the substrate 115 in and out of the process chamber 100 during processing.

[0017] The substrate 115 is loaded into the process volume 120 through an opening 126 in one of the one or more side walls 102, which is sealed by a door or valve (not shown) during processing of the substrate 115. The substrate 115 is then transferred to or from the surface of the substrate support 127 using a conventional lift pin system (not shown) including a plurality of lift pins (not shown) movably arranged through the substrate support. Typically, the plurality of lift pins are moved such that a lift pin hoop (not shown) contacts from below and extends above the surface of the substrate support 127 to lift the substrate 115 therefrom and allow access by a robotic handler. When the lift pin hoop (not shown) is in a lowered position, the tops of the plurality of lift pins are flush with or below the surface of the substrate support 127 on which the substrate rests. The substrate support is movable between a lowered position below the opening 126 for placing a substrate thereon or removing the substrate 115 therefrom, and an elevated position for processing the substrate 115. In some embodiments, the substrate support 127 and the substrate 115 disposed thereon are maintained at a desired processing temperature using resistive heating elements 129 and / or one or more cooling channels 137 disposed in the substrate support. Typically, the cooling channels 137 are fluidly coupled to a cooling medium source 133, such as a modified water source or refrigerant source having a relatively high electrical resistance. In some embodiments, the substrate is disposed in a rapid thermal processing chamber in which lamps are configured to rapidly heat the substrate. In some embodiments, the rapid thermal processing chamber is configured to perform a method according to the present disclosure, such as contacting a flowable layer of silicon-containing material disposed on the substrate with a plurality of oxygen radicals under conditions sufficient to anneal and increase the density of the flowable layer of silicon-containing material. Non-limiting examples of rapid thermal processing chambers suitable for configuration according to the present disclosure include processing chambers suitable for heating a substrate to a predetermined temperature in a short period of time. In some embodiments, the heating system includes a light source, such as a lamp, disposed such that light energy emitted by the light source contacts and heats a material surface of the substrate.In some embodiments, the substrate is placed in a processing chamber, such as a CENTURA® RADIANCE® RTP chamber available from Applied Materials, Inc., Santa Clara, Calif., and exposed to an annealing process according to the present disclosure. In embodiments, the annealing chamber can be configured to allow the substrate to be annealed without exposure to the ambient environment.

[0018] In some embodiments, the processing chamber 100 is further coupled to a remote plasma source 107 to provide oxygen radicals to the processing volume 120. Typically, the remote plasma source (RPS) includes an inductively coupled plasma (ICP) source, a capacitively coupled plasma (CCP) source, or a microwave plasma source. In some embodiments, the remote plasma source is a stand-alone RPS unit. In other embodiments, the remote plasma source is a second processing chamber in fluid communication with the processing chamber 100. In other embodiments, the remote plasma source is a remote plasma 128 that is ignited and maintained in a plenum 122 between the chamber lid 103 and the showerhead 112. In some other embodiments, the gaseous processing radicals are provided to the processing chamber from a non-plasma-based radical source, such as a UV source that uses UV radiation to photodissociate a first gas into its radical species, or from a hot-wire source, such as a hot-wire CVD (HWCVD) chamber that uses pyrolysis to dissociate a first gas into its radical species.

[0019] 2A is a side view of an electronic device structure 200 according to the present disclosure. In an embodiment, the electronic device structure 200 includes a substrate 201. In some embodiments, the substrate 201 includes a semiconductor material, such as silicon (Si), germanium (Ge), silicon germanium (SiGe), III-V material based materials, or any combination thereof. In one embodiment, the substrate 201 includes metallization interconnect layers for integrated circuits. In one embodiment, the substrate 201 includes electronic devices, such as transistors, memories, capacitors, resistors, optoelectronic devices, switches, and any other active and passive electronic devices separated by electrically insulating layers, such as interlayer dielectrics, trench isolation layers, or any other insulating layers known to those skilled in the art of electronic device manufacturing. In at least some embodiments, the substrate 201 includes interconnects, such as vias, configured to connect the metallization layers. In one embodiment, the substrate 201 includes a bulk lower substrate, an intermediate insulating layer, and an upper single crystal layer, Silicon-on-insulator The top single crystal layer may comprise any of the materials listed above, such as silicon.

[0020] In some embodiments, device layer 202 is deposited on substrate 201. In some embodiments, device layer 202 includes multiple features, such as features 203, 204, and 205. As shown in FIG. 2A, multiple trenches, such as trench 131, are formed between features on substrate 201. In an embodiment, trench has a bottom 232 and opposing sidewalls 233 and 234. Bottom 232 is the exposed portion of substrate 201 between features 204 and 205. Sidewall 233 is the sidewall of feature 205, and sidewall 234 is the sidewall of feature 204. In some embodiments, device layer 202 includes one or more semiconductor fins formed on substrate 201. In some embodiments, features, such as 203, 204, and 205, are fin structures to form an array of tri-gate transistors including multiple transistors, such as the tri-gate transistor (transistor 500) shown in FIG.

[0021] In some embodiments, the height of features 203, 204, and 205 is approximately in the range of about 30 nm to about 500 nm (nanometers). In some embodiments, the distance between features 203 and 204 is about 2 nm to about 100 nm.

[0022] In some embodiments, the device layer 202 includes one or more layers deposited on the substrate 201 using one or more deposition techniques, such as, but not limited to, chemical vapor deposition (CVD), e.g., plasma enhanced chemical vapor deposition (PECVD), physical vapor deposition (PVD), molecular beam epitaxy (MBE), metalorganic chemical vapor deposition (MOCVD), atomic layer deposition (ALD), or other deposition techniques known to those skilled in the art of electronic device manufacturing. In some embodiments, one or more layers of the device layer 202 are patterned and etched using patterning and etching techniques known to those skilled in the art of electronic device manufacturing to form features, such as features 203, 204, and 205. In one embodiment, each of the features of the device layer 202 is a stack of one or more layers. In one embodiment, the features of the device layer 202 are features of electronic devices, such as, for example, transistors, memories, capacitors, resistors, optoelectronic devices, switches, and any other active and passive electronic devices.

[0023] In some embodiments, the features of the device layer 202 include conductive layers. In one embodiment, the features of the device layer 202 include a metal, such as copper (Cu), aluminum (Al), indium (In), tin (Sn), lead (Pb), silver (Ag), antimony (Sb), bismuth (Bi), zinc (Zn), cadmium (Cd), gold (Au), ruthenium (Ru), nickel (Ni), cobalt (Co), chromium (Cr), iron (Fe), manganese (Mn), titanium (Ti), hafnium (Hf), tantalum (Ta), tungsten (W), vanadium (V), molybdenum (Mo), vanadium (Pd), gold (Au), platinum (Pt), polysilicon, other conductive layers known to those skilled in the art of electronic device manufacturing, or any combination thereof.

[0024] As shown in FIG. 2A, a protective layer 215 is optionally deposited over the features of the device layer 202. In an embodiment, the protective layer 215 covers the tops, such as tops 216, of each of the features of the device layer 202, as shown in FIG. 2A. In some embodiments, the protective layer 215 is deposited to protect the features of the device layer 202 from processing at a subsequent stage. In some embodiments, the features of the device layer 202 are silicon features. In some embodiments, the protective layer 215 is a hard mask layer. In some embodiments, the protective layer covers the tops and sidewalls, such as sidewalls 217 and 218, of each of the features of the device layer 202. In some embodiments, the protective layer 215 is a nitride layer, such as, for example, silicon nitride, titanium nitride, an oxide layer, such as, for example, a boron oxide layer, a boron-doped glass layer, a silicon oxide layer, another protective layer, or any combination thereof. In some embodiments, the thickness of the protective layer 215 is from about 2 nm to about 50 nm.

[0025] In some embodiments, the protective layer 215 is formed by a process such as, but not limited to, chemical vapor deposition (CVD), such as plasma enhanced chemical vapor deposition (PECV). D ), physical vapor deposition (PVD), molecular beam epitaxy (MBE), metalorganic chemical vapor deposition (MOCVD), atomic layer deposition (ALD), or other deposition techniques known to those skilled in the art of electronic device manufacturing.

[0026] FIG. 2B illustrates a side view of an electronic device structure 210 according to the present disclosure. In an embodiment, the electronic device structure 210 includes a substrate 201. FIG. 2B illustrates the device after a flowable layer 206 has been deposited over features of the device layer 202. In some embodiments, the flowable layer 206 covers an optional protective layer 215 that has been deposited over the tops, sidewalls, and bottoms of trenches, such as bottom 232, of the features of the device layer. In some embodiments, the flowable layer 206 is deposited directly over the tops and sidewalls of the features of the device layer 202 without the protective layer 215. In some embodiments, the flowable layer 206 is deposited on a portion of the substrate 201 and fills the spaces between the features of the device layer 202. In one embodiment, the flowable layer 206 is a dielectric layer. In some embodiments, the as-deposited density of the flowable layer 206 is, for example, about 1.5 g / cm. 3 In some embodiments, the density of the flowable layer 206 can be increased by the methods of the present disclosure to, for example, 1.5 g / cm 3 The density of a material increases to an amount exceeding 1 / 2. Generally, the density of a material is the mass of the material per unit volume (mass divided by volume). In some embodiments, the flowable layer 206 has pores (not shown). In some embodiments, pores in a material refer to regions that contain something other than the material under consideration (e.g., air, vacuum, liquid, solid, or gas or gaseous mixture), such that the density of the flowable layer varies with position.

[0027] In some embodiments, the flowable layer 206 is an oxide layer, such as, for example, a silicon oxide (e.g., SiO), aluminum oxide (AlO), or other oxide layer; a nitride layer, such as, for example, a silicon nitride (e.g., SiN), or other nitride layer; a carbide layer (e.g., carbon, SiOC), or other carbide layer; an oxynitride layer (e.g., SiON), or any combination thereof.

[0028] In some embodiments, the flowable layer 206 is a flowable CVD film developed for flowable layers of silicon-containing materials, where the as-deposited film typically contains Si--H, Si--N, and --NH bonds. The film is then converted to a Si--O network in an oxidizing environment by curing and annealing in accordance with the present disclosure.

[0029] In one embodiment, the flowable layer 206 is deposited using one or more flowable chemical vapor deposition (FCVD) deposition techniques developed by Applied Materials, Inc. of Santa Clara, Calif., or other FCVD deposition techniques known to those skilled in the art of electronic device manufacturing. In some embodiments, the thickness of the flowable layer 206 is from about 30 nm to about 500 nm. In some embodiments, the thickness of the flowable layer 206 is from about 40 nm to about 100 nm.

[0030] In some embodiments, the flowable layer 206 functions as a gap fill layer. In some embodiments, the flowable layer 206 functions as a gap fill layer on some portions of the substrate and as a hard mask layer on other portions of the substrate. In some embodiments, the flowable layer 206 functions as a gap fill layer in high aspect ratio (height to width) features, such as 5:1 or 20:1, where the features have widths less than 20 nanometers.

[0031] Referring now to FIG. 2C, oxygen radicals (O . ) 211 is in contact with the flowable layer 206 according to some embodiments of the present disclosure. In some embodiments, the flowable layer of silicon-containing material disposed on the substrate is subjected to radicals (O .) 211. Non-limiting silicon-containing materials include an oxide layer, a nitride layer, a carbide layer, an oxynitride layer, or a combination thereof. In some embodiments, the flowable layer of silicon-containing material includes silicon oxide (SiO2), silicon oxynitride (SiON), silicon nitride (Si3N4), or silicon oxycarbide (SiOC). In some embodiments, the flowable layer of silicon-containing material contacts the plurality of oxygen radicals at a pressure of 10 mTorr to 20 Torr. In some embodiments, the flowable layer of silicon-containing material contacts the plurality of oxygen radicals at a temperature of 100 degrees Celsius to 700 degrees Celsius. In some embodiments, the flowable layer of silicon-containing material contacts the plurality of oxygen radicals for a time period of up to 10 minutes, such as 10 seconds to 10 minutes. In some embodiments, the plurality of oxygen radicals permeate the top and bottom of the flowable layer of silicon-containing material and are incorporated into the flowable layer of silicon-containing material. In some embodiments, the flowable layer 206 is a layer of oxygen radicals (O . ) to form insulating regions between features of the device layer 202. In some embodiments, the flowable layer 206 is oxidized by oxygen radicals (O . ) to form shallow trench isolation (STI) regions. In some embodiments, the flowable layer of silicon-containing material 206 is treated with oxygen radicals (O ) under conditions sufficient to anneal and densify the flowable layer of silicon-containing material. . ) 211 on the substrate 201.

[0032] In some embodiments, the oxygen radicals are disposed in a reaction gas that includes one or more of oxygen (O2), hydrogen (H2), or nitrogen (N2). For example, the reaction gas may include a mixture of hydrogen mixed with oxygen, or hydrogen mixed with nitrogen. In embodiments, the reaction gas that includes the oxygen radicals further includes up to 95% hydrogen.

[0033] Referring to FIG. 2D, oxygen radicals (O . 2D, a plurality of oxygen radicals, such as oxygen radicals (O ) 211, are injected into the flowable layer 206 according to an embodiment of the present disclosure.. A plurality of oxygen radicals, such as oxygen radicals (O . In an embodiment, the oxygen radicals (O ) 211 are present in the top third, top half, or top two thirds of the flowable layer 206. . In some embodiments, multiple oxygen radicals such as 211 permeate or are incorporated into the surface. ,acid Elementary radical (O . )211 Multiple oxygen radicals such as is provided under conditions sufficient to permeate throughout the flowable layer 206. In some embodiments, oxygen radicals (O . A plurality of oxygen radicals, such as oxygen radicals 211, are provided under conditions sufficient to be injected and incorporated throughout the flowable layer 206.

[0034] In some embodiments ,acid Elementary radical (O . )211 Multiple oxygen radicals such as is provided under conditions sufficient to increase the density of the flowable layer 206. In some embodiments, oxygen radicals (O . ) 211 is provided in an amount sufficient and under suitable conditions to increase the density of the flowable layer 206. In some embodiments, the density can be measured by techniques known in the art, including proxies such as Wet Etch Rate Ratio (WERR) that indicate the change in density. In some embodiments, in accordance with the present disclosure, a treated flowable layer of silicon-containing material is formed having a Wet Etch Rate Ratio (WERR) of about 9, or about 10, or about 9-10 in dilute HF after an etch duration of 0-2 minutes. In embodiments, the Wet Etch Rate Ratio is measured for a thermal silicon oxide film using dilute HF (e.g., 1:100 HF).

[0035] Referring now to FIG. 3, a flow diagram of a method for fabricating a semiconductor device according to some embodiments of the present disclosure is shown. In an embodiment, the method 300 includes a process sequence 302 that includes contacting a flowable layer of silicon-containing material disposed on a substrate with a plurality of oxygen radicals under conditions sufficient to anneal and / or increase the density of the flowable layer of silicon-containing material. In some embodiments, the method includes contacting a silicon nitride layer with gaseous oxygen radicals. Although not shown in the method 300, the method may optionally include positioning the substrate on a substrate support that is disposed in a processing volume of a processing chamber, such as the processing chamber shown in FIG. 1. In some embodiments, the substrate features a silicon nitride layer deposited on its surface. In some embodiments, the process is performed at a temperature of 100 degrees Celsius to 700 degrees Celsius and a pressure of 10 mTorr to 20 Torr for a time period of up to 10 minutes. In an embodiment, the plurality of oxygen radicals are applied in an amount and under conditions suitable to penetrate the top and bottom of the flowable layer of silicon-containing material. In some embodiments, contacting the flowable layer of silicon-containing material with a plurality of oxygen radicals is performed in a rapid thermal processing chamber. In some embodiments, the plurality of oxygen radicals are disposed in a reactive gas, the reactive gas comprising one or more of oxygen, hydrogen, nitrogen, or a combination thereof.

[0036] In some embodiments, the silicon-containing material is at least partially disposed in a plurality of openings formed in the surface of the substrate. In some embodiments, the plurality of openings have an aspect ratio (depth to width ratio) of more than 2:1, for example, more than 5:1, more than 10:1, more than 20:1, for example, more than 25:1. In some embodiments, the width of the opening is less than about 22 nm, for example, less than about 16 nm, or between about 1 nm and about 20 nm, for example, between about 10 nm and about 20 nm.

[0037] 4, a flow diagram of a method 400 for fabricating a semiconductor device according to some embodiments of the present disclosure is shown. In a process sequence 402, a flowable layer of a silicon-containing material is deposited over one or more features on a substrate. In some embodiments, the silicon nitride layer, e.g., a polysilazane layer, is deposited using a flowable chemical vapor deposition (FCVD) process. In some embodiments, the FCVD process is performed in the same process chamber as the radical-based treatment of the silicon-containing material layer. In some embodiments, the FCVD process is performed in a different process chamber than the process chamber used for the radical-based treatment of the silicon-containing material.

[0038] In some embodiments, the processing sequence 402 may include a FCVD process, such as flowing one or more silicon precursors into the processing volume, exposing the substrate to the one or more silicon precursors, providing one or more co-reactants in the processing volume, and exposing the substrate to the one or more co-reactants. In some embodiments, exposing the substrate to the one or more silicon precursors and exposing the substrate to the one or more co-reactants are performed sequentially, simultaneously, or a combination thereof.

[0039] In some embodiments, FCVD is performed and the pressure of the process volume is desirably maintained between about 10 mTorr and about 10 Torr, such as less than about 6 Torr, such as less than about 5 Torr, or between about 0.1 Torr and about 4 Torr, such as between about 0.5 Torr and about 3 Torr. In some embodiments, the substrate is desirably maintained at a temperature between about 0 degrees Celsius and about 400 degrees Celsius, or less than about 200 degrees Celsius, or between about -10 degrees Celsius and about 75 degrees Celsius.

[0040] In some embodiments, the one or more silicon precursors are silane compounds, such as silane (SiH), disilane (SiH), trisilane (SiH), and tetrasilane (SiH). 10), or a combination thereof. In some other embodiments, the silicon precursor comprises a silazane compound having at least one Si--N--Si functional group, such as N,N' disilyltrisilazane (A), other silazane compounds, such as silazane compounds, such as trisilylamine (TSA), or a combination thereof. In some embodiments, the silicon precursor comprises a combination of one or more silane compounds and one or more silazane compounds.

[0041] In some FCVD embodiments, a capacitively coupled plasma is formed from gases that are ignited and maintained in a process volume between the showerhead and the chamber lid, such as the remote plasma 128 ignited and maintained in the plenum 122 described in FIG. 1. In some embodiments, the FCVD process described above desirably provides a flowable silicon oxide or silicon nitride film that enables bottom-up filling of high aspect ratio openings formed in the surface of a substrate. For example, the FCVD process can be used to fill openings having widths less than 20 nm and aspect ratios greater than about 10:1. In some embodiments, the substrate is maintained at a temperature less than about 200 degrees Celsius.

[0042] In process sequence 404, method 400 includes injecting oxygen radicals into substantially the entire flowable layer of silicon-containing material to anneal and / or densify the flowable layer of silicon-containing material. In some embodiments, process sequence 404 includes exposing the FCVD-deposited silicon flowable layer to oxygen radicals to form a treated silicon layer. In some embodiments, the FCVD deposition of the silicon layer and the exposure of the FCVD-deposited silicon layer to oxygen radicals are performed in the same process chamber.

[0043] In some embodiments, the method 400 includes depositing at least a portion of a flowable layer of silicon-containing material until a desired thickness of the silicon-containing material is reached, and then continuously repeating the oxygen radical-based treatment of the at least partially deposited silicon-containing material. Typically, the continuous repetition promotes more uniform densification and stoichiometry of the resulting treated silicon-containing material compared to depositing the silicon-containing material to a desired thickness and then performing the radical-based treatment.

[0044] In some embodiments, the present disclosure relates to a method of manufacturing a semiconductor device, comprising contacting a flowable layer of silicon-containing material disposed on a substrate with a plurality of oxygen radicals under conditions sufficient to anneal and increase the density of the flowable layer of silicon-containing material. In some embodiments, the flowable layer of silicon-containing material comprises an oxide layer, a nitride layer, a carbide layer, or an oxynitride layer. In some embodiments, the flowable layer of silicon-containing material comprises silicon oxide (SiO2), silicon oxynitride (SiON), silicon nitride (Si3N4), or silicon oxycarbide (SiOC). In some embodiments, contacting the flowable layer of silicon-containing material with a plurality of oxygen radicals is performed at a pressure of 10 mTorr to 20 Torr. In some embodiments, contacting the flowable layer of silicon-containing material with a plurality of oxygen radicals is performed at a temperature of 100 degrees Celsius to 700 degrees Celsius. In some embodiments, contacting the flowable layer of silicon-containing material with a plurality of oxygen radicals is performed for a time period of up to 10 minutes. In some embodiments, the oxygen radicals penetrate the top and bottom of the flowable layer of silicon-containing material. In some embodiments, the contacting of the flowable layer of silicon-containing material with the oxygen radicals is carried out in a rapid thermal processing chamber. In some embodiments, before contacting the flowable layer of silicon-containing material with the oxygen radicals, the flowable layer of silicon-containing material is contacted with ozone and water.

[0045] 5, a perspective view of a tri-gate transistor structure according to an embodiment of the present disclosure is shown. In some embodiments, a fin layer including fin 502 is formed on a substrate 501. In some embodiments, the fin layer represents a cross-sectional view of fin 502 along the A-A1 axis. In one embodiment, the tri-gate transistor (transistor 500) is part of an array of tri-gate transistors including a plurality of tri-gate transistors. In some embodiments, a flowable dielectric layer modified by implantation of oxygen radical species is formed on the substrate 501 adjacent to the fin 502 to provide a field isolation (e.g., STI) region that isolates one electronic device from another device on the substrate 501, as described above with respect to FIGS. 2A-2D. In some embodiments, the fin 502 protrudes from a top surface of the substrate 501. The fin 502 can be formed of any well-known semiconductor material. In some embodiments, a gate dielectric layer (not shown) is deposited on three sides of the fin 502. In some embodiments, the gate dielectric layer is formed on both sidewalls and on the top surface of the fin 502. A gate electrode 506 is deposited on the gate dielectric layer of the fin 502, as shown in Figure 5. The gate electrode 506 is fanned out on and around the gate dielectric layer of the fin 502, as shown in Figure 5. In some embodiments, a drain region 505 and a source region 503 are formed on either side of the gate electrode 506 in the fin 502, as shown in Figure 5.

[0046] In some embodiments, the present disclosure relates to a method of manufacturing a semiconductor device, comprising depositing a flowable layer of silicon-containing material over one or more features on a substrate; and injecting or incorporating oxygen radicals into substantially the entire flowable layer of silicon-containing material to anneal and densify the flowable layer of silicon-containing material. In some embodiments, the flowable layer of silicon-containing material comprises silicon oxide (SiO2), silicon oxynitride (SiON), silicon nitride (Si3N4), silicon oxycarbide (SiOC), or combinations thereof. In some embodiments, injecting oxygen radicals is performed at a pressure of 10 mTorr to 20 Torr. In some embodiments, injecting oxygen radicals is performed at a temperature of 100 degrees Celsius to 700 degrees Celsius. In some embodiments, injecting oxygen radicals is performed for a time period of up to 10 minutes. In some embodiments, the oxygen radicals penetrate throughout the entire flowable layer of silicon-containing material. In some embodiments, injecting oxygen radicals into the flowable layer of silicon-containing material is performed in a rapid thermal processing chamber. In some embodiments, prior to injecting oxygen radicals into the flowable layer of silicon-containing material, the flowable layer of silicon-containing material is contacted with ozone and water.

[0047] In some embodiments, the present disclosure relates to an apparatus for manufacturing electronic devices, comprising a process chamber including a pedestal for holding a substrate including a flowable layer of silicon-containing material on the substrate; an oxygen radical source coupled to the process chamber; and a processor coupled to the oxygen radical source, the processor configured to provide the process chamber with conditions sufficient to anneal and densify the flowable layer of silicon-containing material. In some embodiments, the flowable layer of silicon-containing material includes silicon oxide (SiO2), silicon oxynitride (SiON), silicon nitride (Si3N4), silicon oxycarbide (SiOC), or combinations thereof. In some embodiments, the conditions include a temperature of 100 degrees Celsius to 700 degrees Celsius for a time period of up to 10 minutes, and a pressure of 10 mTorr to 20 Torr.

[0048] In some embodiments, the present disclosure relates to a non-transitory computer readable medium having stored thereon instructions that, when executed, cause a processing chamber to perform a method of manufacturing a semiconductor device comprising contacting a flowable layer of silicon-containing material disposed on a substrate with a plurality of oxygen radicals under conditions sufficient to anneal and increase the density of the flowable layer of silicon-containing material.

[0049] In some embodiments, the present disclosure relates to a method of treating a flowable layer of silicon-containing material comprising contacting a flowable layer of silicon-containing material disposed on a substrate with a plurality of oxygen radicals under conditions sufficient to anneal and increase the density of the flowable layer of silicon-containing material.

[0050] In some embodiments, the present disclosure relates to a non-transitory computer readable medium having stored thereon instructions that, when executed, cause a processing chamber to perform a method of processing a flowable layer of silicon-containing material comprising contacting the flowable layer of silicon-containing material disposed on a substrate with a plurality of oxygen radicals under conditions sufficient to anneal and increase the density of the flowable layer of silicon-containing material.

[0051] While the forgoing is directed to embodiments of the present disclosure, other and further embodiments of the present disclosure may be devised without departing from the basic scope thereof.

Claims

1. 1. A method for manufacturing a semiconductor device, comprising: contacting a flowable layer of silicon-containing material disposed on a substrate in a processing chamber with a plurality of oxygen radicals under conditions sufficient to anneal and increase the density of the flowable layer of silicon-containing material; Including, the plurality of oxygen radicals are provided by a radical source disposed in a reactive gas and coupled to the processing chamber via a gas inlet of the processing chamber; the reactive gas is supplied by a gas source independent of the radical source through the gas inlet of the processing chamber; The gas source includes one or more of oxygen (O2), hydrogen (H2), or nitrogen (N2); method.

2. The method of claim 1 , wherein the flowable layer of silicon-containing material comprises an oxide layer, a nitride layer, a carbide layer, an oxynitride layer, or a combination thereof.

3. The method of claim 2, wherein the reaction gas contains up to 95% hydrogen.

4. contacting the flowable layer of silicon-containing material with the plurality of oxygen radicals; Pressure from 10 mTorr to 20 Torr; Temperatures between 100 degrees Celsius and 700 degrees Celsius; or Maximum 10 minutes The method according to claim 1 , wherein the method is carried out in at least one of the following steps:

5. 4. The method of claim 1, wherein the plurality of oxygen radicals penetrates the top and bottom of the flowable layer of the silicon-containing material.

6. 4. The method of claim 1, wherein contacting the flowable layer of silicon-containing material with a plurality of oxygen radicals is carried out in a rapid thermal processing chamber.

7. The method of claim 1, wherein the reaction gas comprises a mixture of oxygen and hydrogen, or a mixture of nitrogen and hydrogen.

8. and depositing the flowable layer of silicon-containing material over one or more features of a substrate, wherein contacting the flowable layer of silicon-containing material disposed on a substrate with a plurality of oxygen radicals comprises injecting oxygen radicals into substantially the entirety of the flowable layer of silicon-containing material to anneal and densify the flowable layer of silicon-containing material.

4. The method according to any one of claims 1 to 3.

9. Injecting oxygen radicals Pressure from 10 mTorr to 20 Torr; Temperatures between 100 degrees Celsius and 700 degrees Celsius; or Up to 10 minutes The method of claim 8 , wherein the method is performed in at least one of the following steps:

10. 10. The method of claim 8, wherein the oxygen radicals permeate throughout the flowable layer of the silicon-containing material.

11. 10. The method of claim 8, wherein injecting oxygen radicals into the flowable layer of silicon-containing material is performed in a rapid thermal processing chamber.

12. 10. The method of claim 8, wherein the flowable layer of silicon-containing material is contacted with ozone and water prior to injecting oxygen radicals into the flowable layer of silicon-containing material.

13. 1. An apparatus for manufacturing an electronic device, comprising: a processing chamber including a pedestal for supporting a substrate including a flowable layer of silicon-containing material thereon; a source of oxygen radicals coupled to the processing chamber via a gas inlet of the processing chamber; a gas source coupled to the processing chamber via the gas inlet of the processing chamber and independent of the oxygen radical source, the gas source including one or more of oxygen (O 2 ), hydrogen (H 2 ), or nitrogen (N 2 ); and a processor coupled to the processing chamber and the oxygen radical source, the processor configured to provide conditions in the processing chamber sufficient to anneal and densify the flowable layer of silicon-containing material.

13. An apparatus comprising:

14. The flowable layer of silicon-containing material is silicon oxide (SiO ２ ), silicon oxynitride (SiON), silicon nitride (Si ３ N ４ 14. The apparatus of claim 13, wherein the substrate comprises a silicon oxycarbide (SiOC), or a combination thereof, and the conditions comprise a temperature of from 100 degrees Celsius to 700 degrees Celsius for a time period of up to 10 minutes, and a pressure of from 10 mTorr to 20 Torr.

15. The apparatus of claim 13, comprising a computer-readable medium comprising instructions that, when executed by the processor, control operation of the apparatus to perform a method of manufacturing a semiconductor device, the method being the method of any one of claims 1 to 12.

16. A computer readable medium having stored thereon instructions that, when executed, cause a process chamber to perform a method for manufacturing a semiconductor device, the method being the method of any one of claims 1 to 12.

17. The method of claim 1, further comprising depositing a flowable layer of the silicon-containing material onto the substrate, the substrate including one or more features and a protective layer overlying the one or more features.

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