Semiconductor processing apparatus and method

Abstract

A plate for semiconductor processing equipment is provided, which includes a first electrode and a second electrode, the first electrode being selectively connected to a first ground side via a first switch, and the second electrode being selectively connected to a second ground side via a second switch, and the first electrode and the second electrode being electrically isolated from each other.

Description

[Technical field]

[0001] The present invention relates generally to semiconductor processing equipment, and more particularly to semiconductor processing equipment having tunable radio frequency circuits. [Background technology]

[0002] Plasma processing is used, for example, in the manufacture of integrated circuits, photomasks, plasma displays, and solar energy technology. In the manufacture of integrated circuits, wafers are processed by plasma chamber processing, such as etching, plasma enhanced chemical vapor deposition (PECVD) or physical vapor deposition (PEPVD). For integrated circuits with finer dimensions, more precise control of process parameters is required, such as plasma energy spectrum, plasma energy radial distribution, plasma density, and plasma density radial distribution. In particular, plasma density determines the deposition rate and etching rate at the wafer surface. In particular, plasma density radial distribution and plasma energy radial distribution affect the uniformity of deposition and etching. In conventional semiconductor processing equipment, one upper electrode and one lower electrode are provided, between which plasma can be generated. However, in conventional configurations, it is not easy to achieve these precise controls, which limits the freedom of adjusting the plasma. Summary of the Invention [Problem to be solved by the invention]

[0003] Therefore, there is a need to develop semiconductor processing equipment or radio frequency components that can provide different radio frequency control strategies to satisfy the process design freedom. [Means for solving the problem]

[0004] In one aspect, the present invention provides a plate for semiconductor processing equipment, comprising a first electrode and a second electrode, the first electrode being selectively coupled to a first ground side via a first switch, the second electrode being selectively coupled to a second ground side via a second switch, and the first electrode and the second electrode being electrically isolated from each other.

[0005] In some embodiments, the plate further comprises a wafer mounting surface for mounting a wafer, the first electrode and the second electrode being located below the mounting surface.

[0006] In some embodiments, the first electrode is defined by a first radius and the second electrode is defined by a second radius and a third radius, the third radius being greater than the first radius and the second radius, and the first electrode and the second electrode are located in the same or different planes.

[0007] In some embodiments, the first electrode is defined by a first radius and the second electrode is defined by a second radius, the first electrode and the second electrode being in a different plane. According to one embodiment of the invention, the first radius and the second radius are approximately equal.

[0008] In some embodiments, the first electrode and the second electrode are arranged concentrically, while in some other embodiments, at least one of the first electrode and the second electrode is a segment of a circular or donut-shaped electrode, the circular or donut-shaped electrode including a plurality of segments.

[0009] In some embodiments, at least one of the first electrode and the second electrode comprises a mesh structure.

[0010] In another aspect, the present invention provides a semiconductor processing apparatus including a plate according to any of the embodiments described herein, the semiconductor processing apparatus further including a second plate including a third electrode electrically coupled to a radio frequency generator / matcher.

[0011] In some embodiments, the semiconductor processing device further includes a first feedback component arranged to provide a first feedback signal to the radio frequency generator and matcher based on a signal received from the first electrode, and a second feedback component arranged to provide a second feedback signal to the radio frequency generator and matcher based on a signal received from the second electrode.

[0012] In another aspect, the present invention provides a method for manufacturing a ground electrode for semiconductor processing equipment, comprising the steps of: providing a plate base; and (1) sintering the first electrode and the second electrode into the plate base, respectively; or (2) knitting or combining the first electrode and the second electrode into the plate base together by pressing them into the plate base, thereby forming a first electrode and a second electrode in the plate base that are electrically isolated from each other.

[0013] In some embodiments, sintering the first electrode and the second electrode to the plate body includes sintering the first electrode and the second electrode to the same plane on the plate body, while in other embodiments, sintering the first electrode and the second electrode to the plate body includes sintering the first electrode and the second electrode to the plate body to different planes on the plate body.

[0014] In yet another aspect, the invention provides a method of operating a semiconductor processing apparatus according to any of the embodiments of the invention, comprising controlling the first switch to couple the first electrode to the first ground for a first process, and controlling the second switch to couple the second electrode to the second ground for a second process. In some embodiments, the method further comprises controlling the first switch and the second switch to couple the first electrode and the second electrode to the first ground and the second ground, respectively, for a third process.

[0015] The details of one or more embodiments of the present invention are set forth in the accompanying drawings and the description that follow. Other features, objects, and advantages will become apparent from the written description, the accompanying drawings, and the claims. [Brief description of the drawings]

[0016] The disclosure herein includes and includes the following figures: [Figure 1] FIG. 1 illustrates a block schematic diagram of exemplary radio frequency components according to an embodiment of the present invention. [Figure 1A] FIG. 1A illustrates a structural schematic diagram of an exemplary feedback / control device according to an embodiment of the present invention. [Diagram 2] FIG. 2 shows a schematic diagram of an exemplary ground electrode arrangement according to an embodiment of the present invention. [Figure 2A] FIG. 2A shows a schematic diagram of an exemplary circular electrode according to an embodiment of the present invention. [Figure 2B] FIG. 2B illustrates a schematic diagram of an exemplary donut-shaped electrode according to an embodiment of the present invention. [Diagram 3] FIG. 3 shows a schematic diagram of an exemplary semiconductor processing apparatus according to an embodiment of the present invention. [Figure 4] FIG. 4 illustrates a schematic diagram of another exemplary semiconductor processing apparatus in accordance with an embodiment of the present invention. [Diagram 5] FIG. 5 illustrates a flow diagram of an exemplary method for fabricating a ground electrode for semiconductor processing equipment in accordance with an embodiment of the present invention. [Figure 6] FIG. 6 illustrates a flow diagram of an exemplary method of operating semiconductor processing equipment in accordance with an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0017] By common practice, the drawings are merely illustrative and are not intended to be limiting or exhaustive. Elements in the drawings are not necessarily to actual size, and features illustrated in the drawings may not be drawn to scale. Thus, features may be arbitrarily enlarged or reduced in size for clarity. Also, implementations illustrated in the drawings may be simplified for clarity. Thus, the drawings may not show all of the components of a given device or apparatus. Finally, like reference numerals may be used throughout the specification and drawings to indicate like features.

[0018] The present invention will be described in more detail below with reference to the drawings, and certain embodiments and specific examples will be shown by way of example. However, since the subject matter of the claims can be specifically implemented in various ways, the establishment of the subject matter of the claims included or applied is not limited to any of the embodiments and specific examples disclosed in the present specification, and the embodiments and specific examples are merely illustrative. Similarly, the present invention provides a reasonable and wide scope for the subject matter of the claims applied or applied. In addition, for example, the subject matter of the claims can be specifically implemented as a method, an apparatus, or a system. Thus, the specific embodiment can take the form of, for example, hardware, software, firmware, or any combination thereof (not considered to be software).

[0019] As used herein, the terms "in one embodiment" or "according to one embodiment" do not necessarily refer to the same specific embodiment, nor do the claimed inventions necessarily include all features set forth in an embodiment, and as used herein, "in another (or some) embodiments" or "according to another (or some) embodiments" do not necessarily refer to different specific embodiments, the intent being, for example, that the claimed subject matter includes all or some of the aspects or combinations of the specific embodiments.

[0020] The terms "including" and "including" are used in the present specification in an open format and should be interpreted to mean "including, but not limited to." It should be understood that the term "connected" in the present specification includes "direct connection" and "connection via one or more intermediate members." The terms "upper" and "lower" in the present specification are not limited to the relationship shown directly in the drawings, but should include descriptions with clear corresponding relationships, such as "left" and "right," or the inversion of "upper" and "lower." It should be understood that the term "wafer" in the present specification can be used interchangeably with terms such as "wafer," "wafer," "substrate," "base," "silicon wafer," and "substrate." It is obvious to one skilled in the art that certain terms are used to designate certain system components in the present specification and that different companies may designate the system components by different names.

[0021] FIG. 1 shows a schematic diagram of a radio frequency component 100 according to some embodiments of the present invention. The radio frequency component 100 includes a first electrode 101 located in one chamber (e.g., a processing chamber, not shown) of a semiconductor processing apparatus, a plurality of second electrodes 102, 103, and a radio frequency generating and matching device 104. Although one first electrode and two second electrodes are shown in FIG. 1, it will be apparent to one skilled in the art that the radio frequency component 100 can include more first electrodes and / or more second electrodes. FIG. 1 is merely an exemplary illustration and is not intended to limit the actual size, shape, or relative position of each component.

[0022] In the example of FIG. 1, the radio frequency generating and matching device 104 is electrically connected (e.g., connected by a coaxial cable) to the first electrode 101 to provide a radio frequency signal. The second electrodes 102, 103 are electrically connected to the radio frequency generating and matching device 104 via feedback / control devices 105, 106, respectively. The feedback / control devices 105, 106 are arranged to receive one or more induced signals from the second electrodes 102, 103, respectively, generate corresponding feedback signals thereon, and provide the feedback signals to the radio frequency generating and matching device 104. The feedback / control devices 105, 106 may further be arranged as switches to selectively electrically connect the second electrodes 102, 103 to or disconnect them from the corresponding grounds. The grounds to which the second electrodes 102, 103 are connected may be the same or different grounds. In the present invention, the first electrode 101 is also called a "radio frequency electrode" and the second electrodes 102 and 103 are also called "ground electrodes".

[0023] In some embodiments, the first electrode 101 may be an upper electrode and the second electrodes 102, 103 may be lower electrodes. In some other embodiments, the first electrode 101 may be a lower electrode and the second electrodes 102, 103 may be upper electrodes. Typically, the upper electrode is located at the top of the chamber. Although FIG. 1 does not show the structure of the chamber, typically, the chamber includes a chamber defined by a top, a bottom, and a wall. The top usually includes a complex intake manifold, gas dispensers, gas passages, and a showerhead. In a typical arrangement, the upper electrode is included in the structure of the showerhead. The top of the chamber or the showerhead is electrically coupled to a radio frequency generator and matcher 104 such that the upper electrode receives a signal from a radio frequency source.

[0024] The lower electrode is disposed on a wafer support pedestal. Although not shown in FIG. 1, a typical wafer support pedestal is connected to the bottom of the chamber so as to support the wafer at a constant height in the chamber. A plasma region can be formed between the upper electrode and the wafer support pedestal including the lower electrode. The wafer support pedestal includes a mounting surface for mounting the wafer, and the lower electrode is located below the mounting surface.

[0025] Although not shown, the radio frequency generator and matching circuit 104 may include a radio frequency generator and a radio frequency matching circuit. In one embodiment, the radio frequency generator in the radio frequency generator and matching circuit 104 may include a low frequency radio frequency source, a high frequency radio frequency source, or a combination of both, and the radio frequency matching circuit in the radio frequency generator and matching circuit 104 may include a matching network dedicated to low frequencies, a matching network dedicated to high frequencies, or a combination of both. The matching network includes one or more capacitors, inductors, and some electronic components, and the description of the specific composition thereof is omitted. The operation of selecting low frequency or high frequency radio frequency by different processes is known, so the description is also omitted here. The RF generator and matcher 104 is configured to receive one or more feedback signals provided by feedback / controllers 105, 106 and adjust the output frequency of the low or high RF source and / or one or more variable electronic components in the matching network, such as variable capacitors or other variable elements in the RF circuit components, based thereon to control characteristics of the plasma in the chamber. In some embodiments, the RF generator and matcher 104 may be configured to receive one or more feedback signals from the first electrode 101. In some other embodiments, one or more of the feedback / controllers 105, 106 do not provide feedback signals to the RF generator and matcher 104.

[0026] In addition, for some purposes, the feedback / control device of the present invention may be used to determine operations associated with the second electrode, such as whether to ground the second electrode, adjust associated variable electronics or the power applied to the second electrode, etc.

[0027] FIG. 1A illustrates a structural schematic diagram of an exemplary feedback / control device 115 according to an embodiment of the present invention. The feedback / control device 115 may be an example of the feedback / control device 105 or 106 in FIG. 1. The feedback / control device 115 may include a feedback component 116 and a switch 118. The feedback component 116 generates a feedback signal based on a signal received from the ground electrode 112 (e.g., the second electrode 102 or 103 shown in FIG. 1) and provides the feedback signal to the radio frequency generator and matching device 114 (e.g., the radio frequency generator and matching device 104 shown in FIG. 1). In some embodiments, the feedback component 116 provides the signal received from the ground electrode 112 directly to the radio frequency generator and matching device 114. In some embodiments, the feedback / control device 115 does not include the feedback component 116. That is, the feedback / control device 115 does not provide a feedback signal to the radio frequency generator and matching device 114.

[0028] The switch 118 receives a control signal S C Under the control of the control signal S, the ground electrode 112 is selectively connected to or disconnected from the ground side. C may be based at least in part on signals received from the ground electrode 112, or may be based at least in part on signals received from other ground electrodes or radio frequency electrodes, or may be based at least in part on the process requirements of the process that is or will be performed. Cmay be generated by hardware or software. A method for generating a control signal based on a signal or parameter is well known to those skilled in the art, and will not be described here. In some embodiments, an impedance network consisting of elements such as one or more resistors, one or more capacitors, and one or more inductors may be included between the ground electrode 112 and the ground side, and the impedance network can provide a constant impedance or a variable impedance (e.g., by a variable capacitor) in the radio frequency circuit.

[0029] 2 shows a schematic diagram of an exemplary ground electrode arrangement (without feedback / control devices) according to an embodiment of the present invention. The schematic diagram shows a top view of the ground electrodes. It should be appreciated by those skilled in the art that although a certain number of electrodes are shown in FIG. 2, the ground electrode arrangement of the present invention may include fewer or more electrodes.

[0030] The ground electrode shown in this embodiment is arranged to have a first electrode 201, a second electrode 202, and a third electrode 203. In some embodiments, the first electrode 201, the second electrode 202, and the third electrode 203 are arranged concentrically. The first electrode 201 is a circular electrode and is defined by a first radius R1. The second electrode 202 is defined by at least a second radius R2. The third electrode 203 is defined by at least a third radius R3, where the second radius R2 is greater than the first radius R1 but less than the third radius R3. In one embodiment, the second electrode 202 is a circular electrode, while in another embodiment, the second electrode 202 is a donut-shaped electrode defined by a first inner radius and a second radius R2, where the first inner radius can be greater than, equal to, or less than the first radius R1. In one embodiment, the third electrode 203 is a circular electrode, while in another embodiment, the third electrode 203 may be another donut-shaped electrode defined by a second inner diameter and a third radius R3, where the second inner diameter may be greater than, equal to, or less than the second radius R2.

[0031] In some embodiments, the first electrode 201, the second electrode 202, and the third electrode 203 are located on the same horizontal plane (i.e., located on the same plane). In these embodiments, the second electrode 202 and the second electrode 203 are donut-shaped electrodes, and the inner diameter of the second electrode 202 is greater than or equal to the first radius R1, and the inner diameter of the third electrode 203 is greater than or equal to the second radius R2. In some other embodiments, the first electrode 201, the second electrode 202, and the third electrode 203 may be located on different horizontal planes (i.e., located on different planes), as exemplified below. The first electrode 201, the second electrode 202, and the third electrode 203 are electrically isolated from each other (e.g., by an insulating material between each electrode, or by each electrode being spaced apart from each other). For example, as shown, each of the first electrode 201, the second electrode 202, and the third electrode 203 can be selectively connected to ground (feedback / control device omitted).

[0032] In the example of FIG. 2, the ground electrode may be a circular electrode or a doughnut-shaped electrode. In other embodiments, the ground electrode may be a segment of a circular or doughnut-shaped electrode. FIGS. 2A and 2B respectively show schematic diagrams of an exemplary circular electrode 210 and a doughnut-shaped electrode 220, each of which is made up of multiple segments, according to an embodiment of the present invention. Although FIGS. 2A and 2B show a certain number of segments divided in a certain manner, it will be apparent to one skilled in the art that the circular electrode 210 and the doughnut-shaped electrode 220 may include fewer or more segments divided in other manners.

[0033] The circular electrode 210 includes segments 212, 214, 216, and 218. The donut-shaped electrode 220 includes segments 222, 224, 226, and 228. In some embodiments, the segments 212, 214, 216, and 218 are electrically isolated from one another by insulating material, and therefore can be grounded independently. Similarly, in some embodiments, the segments 222, 224, 226, and 228 are electrically isolated from one another by insulating material, and therefore can be grounded independently. By way of example, the second electrode 202 shown in FIG. 1 can be segment 212, and the third electrode 203 can be segment 214, another circular or donut-shaped electrode, or a segment of another circular or donut-shaped electrode.

[0034] FIG. 3 shows a schematic diagram of an exemplary semiconductor processing apparatus according to an embodiment of the present invention. In the example of FIG. 3, the ground electrode is a lower electrode and is disposed on a wafer support. Although a processing chamber is not shown, it will be understood that the wafer support is mounted in the processing chamber. Here, the wafer support includes a plate 300, which has a wafer mounting surface 301 for mounting a wafer to be processed. The upper electrode 302 is disposed on the upper part of the chamber. In one embodiment, the upper electrode 302 is included in a showerhead disposed on the upper part of the chamber. For example, the upper electrode 302 may be a showerhead cover or a housing. The upper electrode 302 is electrically connected to a radio frequency generator and matching box 303 to receive a radio frequency source, and the circuit composition is the same as, for example, the radio frequency generator and matching box 104 shown in FIG. 1 described above, so that a duplicated description will be omitted. The radio frequency generator and matching box 303 may be disposed on the upper part of the chamber or outside the chamber. Optionally, the radio frequency generator and matching box 303 is electrically connected to one or more lower electrodes. Alternatively, in a possible embodiment, the radio frequency generator and matcher 303 may be electrically connected to the upper electrode and the lower electrode at the same time. The composition and combination of the radio frequency generator and matcher may vary and are not limited to those described herein. In some embodiments, the plate 300 may further include one or more heating elements.

[0035] The wafer support pedestal shown in FIG. 3 has a plurality of lower electrodes. In this embodiment, two lower electrodes are embedded in the plate 300, which are a first lower electrode 304 and a second lower electrode 305. Both electrodes are located under the wafer mounting surface 301 and are structurally independent from each other (i.e., they are not in contact with each other and are not electrically connected). The first lower electrode 304 is located under the wafer mounting surface 301 but above the second lower electrode 305. The first lower electrode 304 and the second lower electrode 305 have approximately the same diameter and extend to an area corresponding to the wafer mounting surface 301. In other embodiments, the first lower electrode 304 may have a larger or smaller diameter than the second lower electrode 305. The first lower electrode 304 and the second lower electrode 305 are arranged concentrically. Here, the first lower electrode 304 and the second lower electrode 305 are mesh electrodes, which can be formed in the plate 300 by a manufacturing means of sintering and pressing. The grid densities of the first bottom electrode 304 and the second bottom electrode 305 may be the same or different. It should be understood that the first bottom electrode 304 and the second bottom electrode 305 may have other structures, and the first bottom electrode 304 may have the same or different structure as the second bottom electrode 305.

[0036] The first lower electrode 304 and the second lower electrode 305 are electrically coupled to a first feedback / controller 306 and a second feedback / controller 307, respectively. The first feedback / controller 306 is arranged to have a suitable circuit configuration for receiving an induced signal from the first lower electrode 304 and generating a first feedback signal based thereon. Similarly, the second feedback / controller 307 is arranged to have a suitable circuit configuration for receiving an induced signal from the second lower electrode 305 and generating a second feedback signal based thereon. The induced signal is related to the radio frequency power received by each lower electrode (304, 305) from the upper electrode 302, so that the feedback signal can reflect the characteristics of the plasma in the chamber. The first feedback / controller 306 is communicatively coupled to the radio frequency generator and matcher 303 via a first feedback path 308, thereby providing the first feedback signal to the radio frequency generator and matcher 303. Similarly, the second feedback / control device 307 is communicatively connected to the radio frequency generating and matching device 303 via a second feedback path 309, thereby providing a second feedback signal to the radio frequency generating and matching device 303. Furthermore, the first feedback / control device 306 and the second feedback / control device 307 are arranged to selectively electrically connect the first lower electrode 304 and the second lower electrode 305 to the corresponding ground sides. Although not shown, the first feedback path 308 and the second feedback path 309 may be electrically connected to low frequency and high frequency control parts in the radio frequency generating and matching device 303, respectively, to realize different processes corresponding to low frequency and high frequency.

[0037] The radio frequency generator and matching unit 303 is configured to receive the first feedback signal and / or the second feedback signal and adjust the plasma based on the feedback signal. The radio frequency generator and matching unit 303 may further include a controller for processing and outputting signals. In a possible embodiment, the radio frequency generator (e.g., high frequency generator or low frequency generator) in the radio frequency generator and matching unit 303 can adjust its radio frequency output frequency according to a command from the controller. Optionally, the radio frequency matcher (e.g., high frequency matcher or low frequency matcher) in the radio frequency generator and matching unit 303 can adjust a value of a variable capacitance according to a command from the controller to obtain a suitable matching impedance.

[0038] In some possible embodiments, the radio frequency generator and matching circuit 303 may further include other circuit modules, for example, an impedance controller consisting of a bandpass filter and / or a notch filter, which may be connected to one or more capacitors, inductors, and variable capacitors. The impedance controller may be arranged to be included in the feedback / control device (306, 307), the radio frequency generator and matching circuit 303, the controller, or may be arranged to be included in a circuit independent of these components. One or more impedance controllers may be arranged to be electrically coupled to the first lower electrode 304 or the second lower electrode 305 and / or the upper electrode 302. Thereby, the controller controls the radio frequency generator, the radio frequency matching circuit, and / or the impedance controller based on a first feedback signal or a second feedback signal to achieve the purpose of adjusting the plasma.

[0039] The ground electrodes provided by the present invention may have different dimensions, shapes, materials, embedment depths or mesh densities. FIG. 4 shows a schematic diagram of another exemplary semiconductor processing apparatus according to an embodiment of the present invention. The difference from the embodiment of FIG. 3 is the arrangement of the lower electrodes, and the same components as those in FIG. 3 are given the same reference numerals, and therefore, the repeated description will be omitted here. The example of FIG. 4 includes a first lower electrode 401 and a second lower electrode 402. The two are structurally independent of each other, in which the first lower electrode 401 is located below the wafer mounting surface 301, but is located above the second lower electrode 402. Although only a cross-sectional view is shown, the first lower electrode 401 is a circular lower electrode defined by a first radius R1, and the second lower electrode 402 is a donut-shaped lower electrode defined by a second radius R2 and a third radius R3, and the sum of the areas of the two electrodes is approximately equivalent to the effective area of ​​the wafer mounting surface 301. However, the third radius R3 is larger than the first radius R1 and the second radius R2, and the second radius R2 may be smaller, equal, or larger than the first radius R1. With the arrangement of FIG. 4, the plasma near the wafer center can be adjusted based on at least the first lower electrode 401, and the plasma located at the wafer edge can be adjusted based on at least the second lower electrode 402. In other possible embodiments, the positions of the first lower electrode 401 and the second lower electrode 402 may be exchanged. In other possible embodiments, the lower electrode closest to the wafer mounting surface 301 may be arranged to have electrostatic adsorption capability. The number of lower electrodes may be greater. The lower electrodes may be asymmetric, i.e., the lower electrodes have different shapes, and some of the lower electrodes are non-rotationally symmetric. For example, the lower electrodes may be different sector shapes.

[0040] In summary, the semiconductor processing apparatus provided by the present invention has a plate in which a plurality of ground electrodes, which are electrically isolated from each other, are embedded, and each of these ground electrodes is selectively connected to a corresponding ground side through a switch. Therefore, according to the process performed in the semiconductor processing apparatus, different combinations of ground electrodes can be selected and connected to the ground side, and different radio frequency circuits can be configured to adjust the plasma density near different electrode positions, and thus the thickness of the deposited film or the uniformity of the etching can be controlled.

[0041] FIG. 5 illustrates a flow diagram of an exemplary method 500 for manufacturing a ground electrode for a semiconductor processing apparatus (e.g., each of the ground electrodes in the embodiments described herein) according to an embodiment of the present invention. As shown in FIG. 5, in step 502, a plate blank formed, for example, by pressing an aluminum nitride material, is provided. In step 504, a first electrode and a second electrode that are electrically isolated from each other are formed on the plate blank. In some embodiments, the first electrode and the second electrode can be formed by sinter pressing, respectively. The first electrode and the second electrode can be sintered on the same plane or different planes on the plate blank. In some other embodiments, the first electrode and the second electrode can be collectively molded and pressed into the plate blank by knitting and combining.

[0042] 6 illustrates a flow diagram of an exemplary method 600 of operating a semiconductor processing apparatus (e.g., the semiconductor processing apparatus shown in FIG. 3 and FIG. 4) according to an embodiment of the present invention. According to an embodiment of the present invention, the semiconductor processing apparatus includes at least a first ground electrode and a second ground electrode, such as the lower electrodes 304 and 305 shown in FIG. 3 and the lower electrodes 401 and 402 shown in FIG. 4. The first ground electrode is selectively coupled to a first ground side via a first switch, and the second ground electrode is selectively coupled to a second ground side via a second switch, and the first ground electrode and the second electrode are electrically isolated from each other.

[0043] In step 602, for a first process performed in the semiconductor processing equipment, the first switch is controlled to couple the first ground electrode to the first ground side, i.e., the radio frequency circuit of the first process includes at least the first ground electrode. In step 604, for a second process performed in the semiconductor processing equipment, the second switch is controlled to couple the second ground electrode to the second ground side, i.e., the radio frequency circuit of the second process includes at least the second ground electrode. The method 600 may further include controlling the first switch and the second switch to couple the first ground electrode and the second ground electrode to the first ground side and the second ground side, respectively, for a third process, i.e., the radio frequency circuit of the third process includes at least both the first ground electrode and the second ground electrode.

[0044] The description herein is provided to enable any person skilled in the art to make or use the invention. Obviously, those skilled in the art can readily make various modifications to the invention, and the general principles defined herein can be applied to other variations without departing from the spirit or scope of the invention. Thus, the present invention is not limited to the examples and designs shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A first electrode which is a circular electrode; a second electrode which is a donut-shaped electrode; a mounting surface for mounting a wafer, the first electrode and the second electrode being positioned below the mounting surface and completely covered by the mounting surface, and the first electrode and the second electrode being spaced apart from the mounting surface; the first electrode is selectively coupled to a first ground side via a first switch, the second electrode is selectively coupled to a second ground side via a second switch, and the first electrode and the second electrode are electrically isolated from each other; the first electrode and the second electrode are disposed on different planes, and an inner edge of the second electrode is disposed adjacent to an outer edge of the first electrode and is partially covered by the outer edge of the first electrode; Plates for semiconductor processing equipment.

2. 2. The plate of claim 1, wherein the first electrode is defined by a first radius and the second electrode is defined by a second radius and a third radius, the third radius being greater than the first radius and the second radius.

3. The plate of claim 1 , wherein the first electrode is configured to condition a plasma near a center of the plate and the second electrode is configured to condition a plasma near an outer edge of the plate.

4. The plate of claim 1 , wherein the first electrode and the second electrode are arranged concentrically.

5. The plate described in claim 1, wherein the first electrode, which is a circular electrode, or the second electrode, which is a donut-shaped electrode, is composed of a plurality of compartments.

6. The plate of claim 1 , wherein at least one of the first electrode and the second electrode comprises a mesh structure.

7. A plate according to any one of claims 1 to 6, a second plate including a third electrode electrically coupled to the radio frequency generating and matching box; 13. A semiconductor processing apparatus comprising:

8. a first feedback component configured to provide a first feedback signal to the radio frequency generating and matching device based on a signal received from the first electrode; a second feedback component configured to provide a second feedback signal to the radio frequency generating and matching device based on a signal received from the second electrode; and The semiconductor processing apparatus of claim 7 further comprising:

9. Providing a plate blank; sintering a first electrode and a second electrode into the plate body, respectively; or The first electrode and the second electrode are molded and pressed into the plate base material at once by knitting and combining the first electrode and the second electrode. forming a first electrode and a second electrode on the plate substrate, the first electrode and the second electrode being electrically isolated from each other; Including, the first electrode is a circular electrode and the second electrode is a donut-shaped electrode; 1. A method for manufacturing a ground electrode for semiconductor processing equipment, wherein the first electrode and the second electrode are disposed on different planes of the plate substrate, and an inner edge of the second electrode is disposed adjacent to and partially covered by an outer edge of the first electrode.

10. 10. The method of claim 9, wherein sintering the first electrode and the second electrode to the plate body includes sintering the first electrode and the second electrode to the same plane on the plate body.

11. 10. The method of claim 9, wherein sintering the first electrode and the second electrode to the plate body includes sintering the first electrode and the second electrode to different planes on the plate body.

12. controlling the first switch to couple the first electrode to the first ground for a first process; controlling the second switch to couple the second electrode to the second ground for a second process; 8. A method of operating semiconductor processing equipment according to claim 7, comprising:

13. For a third process, controlling the first switch and the second switch to connect the first electrode and the second electrode to the first ground side and the second ground side, respectively; The method of claim 12 further comprising:

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