Metal Etching in High Aspect Ratio Features

Abstract

An exemplary etching method may include flowing a fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber. The secondary gas may be or include oxygen or nitrogen. A flow ratio of the fluorine-containing precursor to the secondary gas may be about 1:1 or greater. The method may include contacting a substrate with the fluorine-containing precursor and the secondary gas. The substrate may include exposed metal. The substrate may define high aspect ratio structures. The method may include etching the exposed metal in the high aspect ratio structures.

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit of and priority to U.S. Non-provisional Application No. 17 / 307,636, entitled “METAL ETCH IN HIGH ASPECT-RATIO FEATURES,” filed May 4, 2021, the entire contents of which are incorporated herein by reference for all purposes.

[0002] The present technology relates to semiconductor processes and semiconductor equipment, and more particularly to etching in high aspect ratio features. [Background technology]

[0003] Integrated circuits are made possible by processes that create intricate patterns of layers of materials on a substrate surface. Creating patterned materials on a substrate requires a controlled method for removing exposed material. Chemical etching is used for a variety of purposes, including transferring a pattern in a photoresist into an underlying layer, thinning a layer, or thinning the lateral dimensions of features already present on a surface. It is often desirable to have an etching process that etches one material more quickly than another, for example, to facilitate the pattern transfer process. Such an etching process is said to be selective to the first material. As a result of the diversity of materials, circuits, and processes, etching processes have been developed to be selective to a variety of materials.

[0004] Etching processes can be called wet or dry based on the materials used in the process. Wet HF etching preferentially removes silicon oxide over other dielectrics and materials. However, wet processes can have difficulty penetrating some constrained trenches and sometimes deform the remaining material. Dry etches performed in a local plasma formed within the substrate processing region can penetrate more constrained trenches and cause less deformation of the fragile remaining structures. However, local plasmas can damage the substrate due to the generation of arcs when the local plasma discharges.

[0005] Thus, there is a need for improved systems and methods that can be used to create high quality devices and structures. The present technology addresses these and other needs. Summary of the Invention

[0006] An exemplary etching method may include flowing a fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber. The secondary gas may be or include oxygen or nitrogen. A flow ratio of the fluorine-containing precursor to the secondary gas may be about 1:1 or greater. The method may include contacting a substrate with the fluorine-containing precursor and the secondary gas. The substrate may include exposed metal. The substrate may define high aspect ratio structures. The method may include etching the exposed metal in the high aspect ratio structures.

[0007] In some embodiments, the method may include forming a plasma of the fluorine-containing precursor and the secondary gas. The temperature in the processing region may be maintained at or below about 500° C. The high aspect ratio structure may be or include a memory hole in a 3D NAND structure. The exposed metal may extend laterally into a recess formed perpendicular to the memory hole. The method may include purging the processing region of the semiconductor processing chamber after etching the exposed metal. The method may include forming a plasma of an oxygen-containing precursor. The method may include contacting the exposed metal with plasma effluents of the oxygen-containing precursor to create a metal oxide. The fluorine-containing precursor may be a first fluorine-containing precursor. The method may include flowing a second fluorine-containing precursor into the processing region. The method may include contacting the metal oxide with the second fluorine-containing precursor. The processing region may be maintained plasma-free while contacting the metal oxide with the second fluorine-containing precursor. The method may be performed at a chamber operating pressure between about 1 Torr and about 50 Torr. The method can include flowing a chlorine-containing precursor into the treatment region after etching the exposed metal. The chlorine-containing precursor can remove residual fluorine. After etching the exposed metal in the high aspect ratio structures, a top to bottom loading value can be about 1.5 or less.

[0008] Some embodiments of the present technology may include an etching method. The method may include flowing a first fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber. The method may include contacting a substrate with the first fluorine-containing precursor and the secondary gas. The substrate may include an exposed metal. The substrate may define a memory hole in a 3D NAND structure. The exposed metal may extend laterally into a recess formed perpendicular to the memory hole. The method may include etching the exposed metal in the memory hole. The method may include forming a plasma of an oxygen-containing precursor. The method may include contacting the exposed metal with plasma effluents of the oxygen-containing precursor to create a metal oxide. The method may include flowing a second fluorine-containing precursor into a processing region of a semiconductor processing chamber. The method may include removing the metal oxide.

[0009] In some embodiments, the secondary gas may include oxygen or nitrogen. A flow ratio of the first fluorine-containing precursor to the secondary gas may be about 1:1 or greater. The method may include forming a plasma of the first fluorine-containing precursor and the secondary gas. The temperature in the semiconductor processing chamber may be maintained between about 200° C. and about 500° C. The pressure in the semiconductor processing chamber may be maintained between about 1 Torr and about 50 Torr. While flowing the second fluorine-containing precursor into the processing region of the semiconductor processing chamber, the processing region may be maintained plasma-free. The method may include flowing a chlorine-containing precursor into the processing region after etching the exposed metal. The chlorine-containing precursor may remove residual fluorine from the exposed metal.

[0010] Some embodiments of the present technology may include an etching method. The method may include flowing a first fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber. The secondary gas may include oxygen or nitrogen. The method may include contacting a substrate with the first fluorine-containing precursor and the secondary gas. The substrate may include exposed metal, and the substrate may define high aspect ratio structures. The method may include etching the exposed metal in the high aspect ratio structures. The method may include contacting the exposed metal with an oxygen-containing precursor to create a metal oxide. The method may include flowing a second fluorine-containing precursor into a processing region of a semiconductor processing chamber. The method may include removing the metal oxide. The method may be performed at a chamber operating temperature of about 500° C. or less.

[0011] Such techniques may provide many advantages over conventional systems and techniques. For example, the process may allow for metal removal from high aspect ratio features. Additionally, the process may result in a variety of sidewall profiles during the etching process. These and other embodiments, as well as many of their advantages and features, are described in more detail in conjunction with the following description and accompanying figures.

[0012] A further understanding of the nature and advantages of the disclosed technology may be realized by reference to the remaining portions of the specification and the drawings. [Brief description of the drawings]

[0013] [Figure 1] FIG. 1 illustrates a top view of an embodiment of an exemplary processing system in accordance with some embodiments of the present technique. [Figure 2A] 1 is a schematic cross-sectional view of an exemplary processing chamber in accordance with some embodiments of the present technique. [Figure 2B] FIG. 2B is a detailed view of a portion of the processing chamber shown in FIG. 2A in accordance with some embodiments of the present technique. [Diagram 3] FIG. 1 illustrates a bottom view of an exemplary showerhead in accordance with some embodiments of the present technique. [Figure 4] 1 illustrates example operations in a method according to some embodiments of the present technology. [Diagram 5] 1A-1D are cross-sectional views of a substrate during processing in accordance with some embodiments of the present technique. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] Some of the figures are included as schematic diagrams. It is understood that the figures are for illustrative purposes and should not be considered to scale unless specifically stated to be to scale. Additionally, as schematic diagrams, the figures are provided to aid in understanding and do not include all aspects or information as compared to realistic representations and may include exaggerated material for illustrative purposes.

[0015] In the accompanying figures, similar components and / or features may have the same reference label. Furthermore, various components of the same type may be distinguished by the reference label followed by a letter that distinguishes between the similar components. If only a first reference label is used in the specification, the description is applicable to any of the similar components having the same first reference label, regardless of the letter.

[0016] In the transition from 2D NAND to 3D NAND, many process operations are changed from vertical to horizontal operations. Additionally, as the number of cells formed in the 3D NAND structure increases, the aspect ratio of the memory holes and other structures increases, sometimes dramatically. During 3D NAND processing, stacks of placeholder layers and dielectric materials may form inter-electrode dielectric layers or IPD layers. In these placeholder layers, various operations may be performed to position the structures before completely removing the material and replacing it with metal. Metallization may be performed, in which metal is formed along the structures and between the dielectric layers as part of the memory cells. The metal may extend into the recessed portions along the sidewalls of the memory holes, and a subsequent etch may be performed to separate the individual cells in the memory hole structure.

[0017] Many conventional techniques utilize etching processes to create these structures that may not be able to perform adequately at future process nodes. For example, as the number of cells in a structure increases to hundreds of cells, memory holes may be formed to a depth of several microns. Due to the aggressive etching of wet etches, the wet etch may begin to etch features near the top of the structure well before the bottom of the structure is accessed by the etchant. Additionally, wet etching of small form factor structures may result in collapse or distortion of the pattern due to the surface tension of the etchant. The use of wet etchants may also require a subsequent operation to remove residues formed within the trenches or holes. Dry etching techniques may also be performed, but may have similar loading issues. For example, it takes time to access deep within a trench, so etching may have already occurred near the top of the structure. The ratio of the amount of metal etched at the top of the structure to the amount of metal etched at the bottom of the structure is known as the top-to-bottom loading value, and in some cases may be about 4 or more. Thus, the top features may be over-etched before the etch is complete or before the cells are separated near the bottom of the structure.

[0018] The present technology overcomes these problems by implementing a dry etching process that can allow for control of top to bottom loading values ​​by incorporating a protective gas into the etchant used. The protective gas can occupy the entire site of the metal being etched, limiting or reducing etching near the top of the structure while the etchant penetrates the high aspect ratio structure. This allows for a tunable etching profile to be formed along the structure, providing additional control over the etch that can increase the uniformity of the process regardless of the depth of the structure.

[0019] While the remaining disclosure will routinely identify particular etching processes utilizing the disclosed technology, it will be readily understood that the systems and methods are equally applicable to deposition and cleaning processes that may be performed in the described chambers. Thus, the technology should not be considered limited to use with only etching processes or chambers. Additionally, while an exemplary chamber is described to provide a foundation for the technology, it should be understood that the technology may be applied to virtually any semiconductor processing chamber capable of enabling the described operations.

[0020] FIG. 1 illustrates a top view of one embodiment of a deposition, etch, bake, and cure chamber processing system 100, according to an embodiment. In the figure, a pair of front-opening unified pods 102 supply substrates of various sizes, which are received by a robot arm 104 and placed in a low pressure holding area 106 before being placed into one of the substrate processing chambers 108a-108f located in tandem sections 109a-109c. A second robot arm 110 may be used to transfer substrate wafers from the holding area 106 to the substrate processing chambers 108a-108f and vice versa. Each substrate processing chamber 108a-108f may be equipped to perform several substrate processing operations, including cyclic layer deposition, atomic layer deposition, chemical vapor deposition, physical vapor deposition, etching, precleaning, degassing, orientation, and other substrate processes, as well as dry etching processes described herein.

[0021] The substrate processing chambers 108a-108f may include one or more system components for depositing, annealing, curing and / or etching a dielectric film on a substrate wafer. In one configuration, two pairs of processing chambers, e.g., 108c-108d and 108e-108f, may be used to deposit a dielectric material on a substrate, and a third pair of processing chambers, e.g., 108a-108b, may be used to etch the deposited dielectric. In another configuration, all three pairs of chambers, e.g., 108a-108f, may be configured to etch a dielectric film on a substrate. Any one or more of the described processes may be performed in one or more chambers separate from the illustrated fabrication system in different embodiments. It will be understood that additional configurations of deposition, etching, annealing and curing chambers for dielectric films are contemplated by the system 100.

[0022] 2A shows a cross-sectional view of an exemplary process chamber system 200 having a plasma generation region partitioned within a processing chamber, which may be configured to perform processes described further below. During etching of films including titanium nitride, tantalum nitride, tungsten, silicon, polysilicon, silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, or other materials, process gases may be flowed through a gas inlet assembly 205 into a first plasma region 215. A remote plasma system 201 may optionally be included in the system to process a first gas, which then travels through the gas inlet assembly 205. The inlet assembly 205 may include two or more separate gas supply channels, and if a second channel is included, the second channel may bypass the remote plasma system unit 201.

[0023] Shown are cooling plate 203, face plate 217, ion suppressor 223, showerhead 225, and substrate support 265 on which substrate 255 is disposed, each of which may be included according to an embodiment. Pedestal 265 may have heat exchange channels through which a heat exchange fluid flows to control the temperature of the substrate, and the heat exchange channels may operate to heat and / or cool the substrate or wafer during processing operations. The wafer support platter of pedestal 265 may comprise aluminum, ceramic, or a combination thereof, and may be resistively heated using embedded resistive heater elements to achieve relatively high temperatures, such as from about 100° C. or less to about 1100° C. or more.

[0024] The face plate 217 may be pyramidal, conical, or of another similar structure with a narrow top widening to a wider bottom. The face plate 217 may also be flat as shown and may include a number of through channels used to distribute process gases. For more uniform delivery to the first plasma region 215, plasma generating gases and / or plasma excited species, depending on the use of RPS 201, may pass through a number of holes in the face plate 217, as shown in FIG. 2B.

[0025] An exemplary configuration may include having a gas inlet assembly 205 opening into a gas feed region 258 partitioned by the faceplate 217 from the first plasma region 215 such that gas / species flow through holes in the faceplate 217 into the first plasma region 215. Structural and operational features may be selected to prevent significant backflow of plasma from the first plasma region 215 into the feed region 258, the gas inlet assembly 205, and the fluid feed system 210. The faceplate 217, i.e., the conductive top of the chamber, and the showerhead 225 are shown with an insulating ring 220 disposed between those features, which allows an AC potential to be applied to the faceplate 217 relative to the showerhead 225 and / or ion suppressor 223. The insulating ring 220 may be located between the faceplate 217 and the showerhead 225 and / or ion suppressor 223, thereby allowing a capacitively coupled plasma to form in the first plasma region. Additionally, baffles may be disposed within or otherwise coupled to the first plasma region 215 to affect the flow of fluid into the region through the gas inlet assembly 205. In some embodiments, additional plasma sources, including inductively coupled plasma sources that extend around the periphery of the chamber or are in fluid communication with the chamber, and additional plasma generation systems may be utilized.

[0026] The ion suppressor 223 may comprise a plate or other geometry that defines a plurality of apertures throughout the structure, the apertures configured to suppress the movement of ionic charged species out of the first plasma region 215 while allowing uncharged neutral or radical species to pass through the ion suppressor 223 and into the activated gas delivery region between the suppressor and the showerhead. In an embodiment, the ion suppressor 223 may comprise a perforated plate having various aperture configurations. These uncharged species may include highly reactive species that are transported through the apertures with a less reactive carrier gas. As noted above, the movement of ionic species through the apertures may be reduced and in some cases completely suppressed. Controlling the amount of ionic species passing through the ion suppressor 223 may advantageously improve control over the gas mixture in contact with the underlying wafer substrate, which in turn may improve control over the deposition and / or etching characteristics of the gas mixture. For example, adjusting the ion concentration of the gas mixture may significantly change its etch selectivity, e.g., SiNx:SiOx etch ratio, Si:SiOx etch ratio, etc. In alternative embodiments in which deposition is performed, the balance between conformal and flow-type deposition of the dielectric material may also be shifted.

[0027] The plurality of apertures in the ion suppressor 223 may be configured to control the passage of the activated gas, i.e., ionic, radical, and / or neutral species, through the ion suppressor 223. For example, the aspect ratio of the apertures, i.e., diameter to length of the aperture, and / or the geometry of the apertures may be controlled to reduce the flow of ionic charged species in the activated gas passing through the ion suppressor 223. The apertures in the ion suppressor 223 may include a tapered portion facing the plasma excitation region 215 and a cylindrical portion facing the showerhead 225. The cylindrical portion may be shaped and sized to control the flow of ionic species passing to the showerhead 225. An adjustable electrical bias may be applied to the ion suppressor 223 as an additional means to control the flow of ionic species through the suppressor.

[0028] The ion suppressor 223 may function to reduce or eliminate the amount of ionic charged species that travel from the plasma generating region to the substrate. Uncharged neutral and radical species may further pass through the openings of the ion suppressor to react with the substrate. It should be noted that in embodiments, complete removal of ionic charged species in the reaction region around the substrate may not be performed. In certain cases, the ionic species are intended to reach the substrate to perform an etching and / or deposition process. In such cases, the ion suppressor may help control the concentration of ionic species in the reaction region at a process-supportive level.

[0029] Combining the showerhead 225 with the ion suppressor 223 can prevent the plasma present in the first plasma region 215 from directly exciting gases in the substrate processing region 233 while allowing excited species to migrate from the chamber plasma region 215 into the substrate processing region 233. In this way, the chamber can be configured to prevent the plasma from contacting the substrate 255 being etched. This can advantageously protect various intricate structures and films patterned on the substrate that may be damaged, displaced, or distorted if directly contacted by the generated plasma. Furthermore, if the plasma is allowed to contact the substrate or approach the substrate level, the rate at which oxide species etch can increase. Thus, if the exposed area of ​​material is an oxide, this material can be further protected by keeping the plasma away from the substrate.

[0030] The processing system may further include a power supply 240 electrically coupled to the processing chamber for supplying power to the faceplate 217, the ion suppressor 223, the showerhead 225, and / or the pedestal 265 to generate a plasma in the first plasma region 215 or the processing region 233. The power supply may be configured to deliver an adjustable amount of power to the chamber depending on the process being performed. Such a configuration may allow for the use of a tunable plasma in the process being performed. Unlike remote plasma units that often present an on or off function, a tunable plasma may be configured to deliver a specific amount of power to the plasma region 215. This may allow for the development of specific plasma characteristics such as precursors being dissociated in a specific way to enhance the etching profile created by these precursors.

[0031] A plasma may be ignited either in the chamber plasma region 215 above the showerhead 225 or in the substrate processing region 233 below the showerhead 225. For example, a plasma may exist in the chamber plasma region 215 to create radical precursors from an inflow of fluorine-containing precursors or other precursors. To ignite a plasma in the chamber plasma region 215 during deposition, an AC voltage, typically in the radio frequency ("RF") range, may be applied between a conductive top portion of the processing chamber, such as the faceplate 217, and the showerhead 225 and / or ion suppressor 223. The RF power source may generate a high RF frequency of 13.56 MHz, but may generate other frequencies alone or in combination with the 13.56 MHz frequency.

[0032] 2B shows a detailed view 253 of features that affect the distribution of process gas through the face plate 217. As shown in FIGS. 2A and 2B, the face plate 217, the cooling plate 203, and the gas inlet assembly 205 intersect to define a gas delivery region 258 into which process gas may be delivered from the gas inlets 205. Gas may fill the gas delivery region 258 and flow through apertures 259 in the face plate 217 to the first plasma region 215. The apertures 259 may be configured to direct the flow substantially in one direction such that process gas may flow into the processing region 233, but backflow into the gas delivery region 258 after traversing the face plate 217 is partially or completely prevented.

[0033] Gas distribution assemblies such as showerhead 225 used in processing chamber section 200 may be referred to as dual channel showerheads and are described in further detail in the embodiment depicted in Figure 3. The dual channel showerhead may provide an etching process that allows separation of etchants outside of the processing region 233, resulting in limited interaction with chamber parts and each other before being delivered into the processing region.

[0034] The showerhead 225 may include an upper plate 214 and a lower plate 216. The plates may be coupled together to define a volume 218 between the plates. The coupling of the plates may provide a first fluid channel 219 through the upper and lower plates and a second fluid channel 221 through the lower plate 216. The formed channels may be configured to provide fluid access from the volume 218 through the lower plate 216 only via the second fluid channel 221, and the first fluid channel 219 may be fluidically isolated from the volume 218 between the plates and the second fluid channel 221. The volume 218 may be fluidically accessible through a side of the gas distribution assembly 225.

[0035] 3 is a bottom view of a showerhead 325 for use in a processing chamber, according to an embodiment. The showerhead 325 may correspond to the showerhead 225 shown in FIG. 2A. The through-holes 365, which represent the first fluid channels 219, may have a number of shapes and configurations to control and affect the flow of precursors through the showerhead 225. The small holes 375, which represent the second fluid channels 221, may be substantially uniformly distributed over the surface of the showerhead, even among the through-holes 365, and may help provide a more uniform mixing of the precursors as they exit the showerhead, as compared to other configurations.

[0036] The aforementioned chambers may be used in performing the exemplary method, including the etching method, although any number of chambers may be configured to perform one or more aspects used in the embodiments of the present technology. Referring to FIG. 4, an exemplary operation in a method 400 according to an embodiment of the present technology is shown. The method 400 may include one or more operations, including front-end processing, deposition, etching, polishing, cleaning, or any other operation that may be performed before the beginning of the method, prior to the described operations. The method may include a number of optional operations that may or may not be particularly related to some embodiments of the method according to the embodiments of the present technology. For example, many of the operations are described to provide a broader scope of the processes performed, but are not essential to the technology and may be performed by alternative methods that are further described below. The method 400 may describe the operations shown generally in FIGS. 5A-5C, and the illustrations of FIGS. 5A-5C are described in conjunction with the operations of the method 400. It should be understood that the figures illustrate only partial schematic views, and the substrate may include any number of additional materials and features having various properties and aspects as shown in the figures.

[0037] Method 400 may or may not include optional operations to develop the semiconductor structure for a particular manufacturing operation. It is understood that method 400 may be performed on any number of semiconductor structures or substrates 505, including an exemplary structure on which a metal material removal operation may be performed, as shown in FIG. 5A. As shown in FIG. 5A, substrate 505 may have multiple stacked layers overlying the substrate, which may be silicon, silicon germanium, or other substrate materials. The layers may include an IPD layer, with alternating layers of dielectric material 510, which may be silicon oxide, and placeholder material 520, which may be, for example, silicon nitride or polysilicon. Placeholder material 520 may be or include material that is removed to create individual memory cells in subsequent operations. Although shown with only seven layers of material, it is understood that the exemplary structure may include any number of layers, including hundreds of layers of material, and the figure is merely a schematic diagram to illustrate aspects of the present technology. The trench 530 may be a memory hole or aperture and may be defined through the stack structure down to the level of the substrate 505. The trench 530 may be defined by sidewalls that may be comprised of alternating layers of dielectric material 510 and placeholder material 520. For example, the sidewalls may be the radius of the aperture or memory hole. Although only a single memory hole structure is shown, it should be understood that the exemplary substrate may include any number of memory structures throughout the substrate.

[0038] After the recesses may be formed in the placeholder material, a metal material 540 may be formed or deposited on the structure. The metal 540 may extend around the structure and into the memory holes and each recess formed in the placeholder material as shown. The metal may be molybdenum, tungsten, or some other metal that may be used in 3D NAND or other semiconductor structures. The substrate may then be placed in a processing chamber, such as chamber 200 described above, and method 400 may be performed to etch the metal in the high aspect ratio features. For example, features according to the present technique may feature any aspect ratio or height-to-width ratio of the structure, but in some embodiments, the material may feature a larger aspect ratio, which may not be able to be adequately etched using the conventional techniques or methods described above. For example, in some embodiments, the aspect ratio of exemplary structures such as, by way of non-limiting example, memory holes can be about 10:1 or greater, about 20:1 or greater, about 30:1 or greater, about 40:1 or greater, about 50:1 or greater, about 100:1 or greater, or greater.

[0039] Method 400 may be performed to etch or otherwise remove portions of metal 540, which may isolate the metal into recessed portions of the structure as shown. The method may be performed to facilitate control of the overall structure profile as well as improve etch characteristics, such as surface smoothness, of the metal within the recessed sections of the structure. For example, method 400 may include flowing a fluorine-containing precursor and a secondary gas, such as a protective gas, into a processing region of a chamber in which a substrate is held, in operation 405. The fluorine-containing precursor and secondary gas may contact the substrate, in operation 410, and etch the metal within the high aspect ratio structure, in operation 415. As shown in FIG. 5B, metal 540 may be recessed into trenches along the sidewalls of the memory holes and along the top surface of the entire structure. While conventional techniques can result in a top-to-bottom load similar to a V-profile, with more material etched at the top of the structure as described above, the present techniques can result in substantially or essentially straight profiles and inverted V-profiles, where material further within the structure can be etched more than the material at the top of the structure, which can allow for the formation of a range of top-to-bottom load values.

[0040] To provide this control, the present technique may utilize a secondary gas that may help limit or reduce the etching or etching rate at the top of the structure. For example, the fluorine-containing precursor and secondary gas may access the metal 540 along the outer top surface where the memory hole is formed before contacting the metal in the feature. In the absence of the secondary gas, which may be a protective gas, etching may begin at the top of the structure well before etching begins near the bottom of the structure. However, incorporating a secondary gas may allow the secondary gas molecules to occupy surface areas or sites along the metal 540, which may slow the etching rate. For example, fluorine may continue to bond with the metal in inconspicuous locations, but these locations may be at least partially blocked by the secondary gas. Exemplary metals such as molybdenum or tungsten may not have one-to-one removal characteristics with fluorine, and instead may incorporate three, four, or six fluorine atoms before removal of the metal atoms. Thus, utilizing a protective gas may control, reduce, or limit these interactions between fluorine and the metal, which may facilitate control of the etch rate.

[0041] However, as the flow rate ratio of the secondary gas increases relative to the fluorine-containing precursor, the etching rate may continue to decrease, and eventually the secondary gas molecules will interrupt the etching process at each location and prevent further etching.Therefore, in some embodiments, the flow rate ratio of the fluorine-containing precursor to the secondary gas may be maintained at about 1:1 or more, which may ensure that some etching proceeds at the top of the structure. For example, the flow ratio of the fluorine-containing precursor to the secondary gas can be maintained at about 1.2:1 or greater, and can be maintained at about 1.4:1 or greater, about 1.6:1 or greater, about 1.8:1 or greater, about 2.0:1 or greater, about 2.2:1 or greater, about 2.4:1 or greater, about 2.6:1 or greater, about 2.8:1 or greater, about 3.0:1 or greater, about 4.0:1 or greater, about 5.0:1 or greater, about 6.0:1 or greater, about 7.0:1 or greater, about 8.0:1 or greater, about 9.0:1 or greater, about 10.0:1 or greater, or greater. Additionally, a first flow ratio can be used and as the etching process progresses, the first flow ratio can be adjusted to a second flow ratio that is different from the first flow ratio as the etching process progresses. In some embodiments, during flow operation, any of the ratios described, or any ratio encompassed within the recited ranges, may be used for either the first flow ratio or the second flow ratio.

[0042] In some embodiments, the fluorine-containing precursor and / or secondary gas may be plasma enhanced before contacting the metal on the substrate. The plasma may be formed in a remote area of ​​the processing chamber or may be formed locally. A substrate-level plasma may be created, but in some embodiments, the plasma may be a remote plasma that may protect the exposed substrate material from ion bombardment that may be generated by the substrate-level plasma. Whether plasma enhanced or not, the material may contact the metal 540 at the top of the structure and then flow through the structure into the memory holes. The etching process may continue until the metal is removed toward the recesses that extend laterally and perpendicular to the direction of the memory holes. The process may continue to further recess the metal into each recess to separate the cells through the memory holes, but in some embodiments, the method 400 may include a secondary etching process to completely separate the cells and etch laterally within the recesses. Because the memory holes may extend to a depth of several micrometers, the etchant may lose energy flowing deeper into the structure and flowing laterally into the recessed features, which may slow the etch even further and reduce selectivity to the exposed surface of the dielectric material exposed on some sides. Thus, in the second operation, the etchant may be adjusted to perform a second recessing operation.

[0043] For example, the processing region may or may not be purged following the first etching operation. Then, in optional operation 420, a plasma may be formed from an oxygen-containing precursor and flowed to the substrate. Again, the plasma may be formed in a remote portion of the processing chamber or locally at the substrate level. In optional operation 425, the exposed metal previously opened in the first etching process may be contacted with the plasma effluent of the oxygen-containing precursor. After the metal is oxidized, in optional operation 430, a second fluorine-containing precursor may be flowed into the processing chamber. In some embodiments, the plasma may be extinguished before delivery of the second fluorine-containing precursor, and the processing chamber may be maintained plasma-free during delivery of the second fluorine-containing precursor. The second fluorine-containing precursor may be the same or different from the first fluorine-containing precursor, but in some embodiments, the second precursor may more readily donate fluorine under process conditions. The second fluorine-containing precursor may contact the oxidized material and, in optional operation 435, remove the oxidized metal. As shown in FIG. 5C, metal 540 may be fully separated between cells and recessed in the access locations along the vertical memory holes.

[0044] In some embodiments, residual fluorine may be incorporated into the remaining metal after either the first etching process and / or the second etching process. Thus, in some embodiments, in optional operation 440, a post-treatment operation may be performed following the first etching process, such as after operation 415, following the second etching process, such as operation 440, or after each etching process. For example, a chlorine-containing precursor, such as boron trichloride, may be flowed into the processing chamber. The chlorine-containing precursor may or may not be plasma-enhanced in embodiments, and if plasma-enhanced, the plasma may be generated remotely or in situ in the processing chamber. In some embodiments of the present technology, the chlorine-containing precursor may contact the substrate and interact with the surface of the remaining metal to remove residual fluorine.

[0045] Exemplary fluorine-containing precursors may include one or more of fluorine or chlorine in some embodiments, and any other halogen. Some exemplary precursors that may be utilized may include halides, including hydrogen fluoride, nitrogen trifluoride, or any organic fluoride, diatomic fluorine, bromine trifluoride, chlorine trifluoride, sulfur hexafluoride, xenon difluoride, boron trichloride, tungsten pentachloride, tungsten hexachloride, or any other fluorine-containing precursor. A chlorine-containing precursor may be included in the fluorine-containing precursor or may be used in place of the fluorine-containing precursor, and boron trichloride, diatomic chlorine, or other chlorine-containing precursors may be used. Precursors may also be flowed together in various combinations. For example, as previously described, the second fluorine-containing precursor may more readily donate fluorine compared to the first fluorine-containing precursor. As a non-limiting example of precursors, the first fluorine-containing precursor can be or include nitrogen trifluoride, and the second fluorine-containing precursor can be or include tungsten hexafluoride or sulfur hexafluoride.

[0046] The precursor may also be flowed with any number of additional precursors or carrier gases, including diatomic hydrogen, or hydrogen-containing precursors, nitrogen, argon, helium, or any number of additional materials, although in some embodiments, the precursor may be limited to control side reactions or other aspects that may affect selectivity. The secondary gas provided during the etching process may include oxygen-containing precursors and / or nitrogen-containing precursors. For example, non-limiting oxygen-containing precursors may include diatomic oxygen, ozone, water, alcohol, hydrogen peroxide, nitrous oxide, nitric oxide, or any other oxygen-containing material. Non-limiting nitrogen-containing precursors may include, for example, diatomic nitrogen, or any oxygen-containing precursor that also contains nitrogen.

[0047] Process conditions may also affect the operations performed in method 400. Although each operation of method 400 may be performed during a constant temperature in embodiments, in some embodiments, the temperature may be adjusted during different operations. For example, the temperature of the substrate, pedestal, or chamber during method 400 may be maintained at about 150° C. or higher, about 200° C. or higher, about 250° C. or higher, about 300° C. or higher, about 350° C. or higher, about 400° C. or higher, about 450° C. or higher, about 500° C. or higher, or higher. However, at higher temperatures, further dissociation of fluorine-containing materials may occur and more fluorine radicals may be created. As the amount of fluorine radicals increases, the protective gas may not be able to adequately control the reaction. Thus, in some embodiments, the temperature may be maintained at about 700° C. or lower, about 650° C. or lower, about 600° C. or lower, about 550° C. or lower, about 500° C. or lower, or lower.

[0048] In some embodiments, the process may be performed at a variety of pressures, which may facilitate operation in any of a number of process chambers. For example, the process may be performed in a chamber capable of providing a pressure that may be maintained at about 1 Torr or greater, and a chamber capable of providing a pressure that may be maintained at about 2 Torr or greater, about 5 Torr or greater, about 10 Torr or greater, about 50 Torr or greater, about 100 Torr or greater, about 200 Torr or greater, or higher. Utilizing a pressure of about 1 Torr or greater may facilitate delivery of the etchant through the high aspect ratio structures. While a plasma may be utilized in one or more operations as described above, in some embodiments, no plasma may be used and the entire method may be performed while maintaining a plasma-free environment in the semiconductor processing chamber. If plasma effluents are utilized during one or more operations, the plasma power may be maintained below about 500 W. By maintaining a lower plasma power, sputtering may be controlled and interactions may be limited to more controlled chemical reactions, which may better limit the extent of etching through the metal, such as near the top of the structure. This may facilitate better control of the profile along the memory hole, for example. As a result, in some embodiments, the plasma power can be maintained at about 450 W or less, about 400 W or less, about 350 W or less, about 300 W or less, about 250 W or less, about 200 W or less, about 150 W or less, about 100 W or less, or even lower.

[0049] By utilizing precursors and processes as described throughout the present technology, metals used in 3D NAND and other semiconductor structures may be more uniformly etched from between sections of dielectric materials such as silicon oxide while limiting damage or removal of the silicon oxide and maintaining an improved profile or top-to-bottom load value. For example, in some embodiments of the present technology, after either the first etching process or the second etching process, the top-to-bottom load value may be maintained at about 2:1 or less, and may be maintained at about 1.8:1 or less, about 1.6:1 or less, about 1.5:1 or less, about 1.4:1 or less, about 1.3:1 or less, about 1.2:1 or less, about 1.1:1 or less, or about 1.0:1, which indicates comparable etching at locations near the top of the structure as well as near the bottom of the structure. By using the term "about," the present disclosure is intended to encompass the limitations of measurements in the form factors described throughout the present technology, where the conditions generally specified are understood but may not provide perfect accuracy in the measurements. Additionally, in some embodiments, the etching process may be further adjusted to create either a V-shaped profile or an inverted V-shaped profile, as discussed above, in which case the top to bottom loading value may be maintained at about 0.9:1 or less, and may be maintained at about 0.8:1 or less, about 0.7:1 or less, about 0.6:1 or less, about 0.5:1 or less, or even lower.

[0050] In the above description, for purposes of explanation, numerous details are set forth in order to provide an understanding of various embodiments of the present technology. However, it will be apparent to one skilled in the art that particular embodiments may be practiced without some of these details or with additional details.

[0051] Although several embodiments have been disclosed, those skilled in the art will appreciate that various modifications, alternative structures, and equivalents may be used without departing from the spirit of the embodiments. Moreover, some well-known processes and elements have not been described to avoid unnecessarily obscuring the present technology. Thus, the above description should not be interpreted as limiting the scope of the present technology. Furthermore, although a method or process may be described sequentially or stepwise, it should be understood that the operations may be performed simultaneously or in a different order than listed.

[0052] Where a range of values ​​is provided, unless the context clearly indicates otherwise, it is understood that each intervening value between the upper and lower limits of that range is specifically disclosed to the smallest fraction of the unit of the lower limit. Any narrower range between any stated value or unstated intervening value in a stated range and any other stated or intervening value in that stated range is also included. The upper and lower limits of these smaller ranges may be singly included or excluded within the range, and each of the ranges in which either limit is included, neither limit is included, or both limits are included within the technology, subject to any specifically excluded limit in the stated range. Where a stated range includes one or both limits, ranges excluding either or both of the included limits are also included.

[0053] As used in this specification and the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to "a precursor" includes a plurality of such precursors, reference to "the layer" includes reference to one or more layers and equivalents thereof known to those skilled in the art, and so forth.

[0054] Additionally, the terms "comprise," "comprising," "contain," "containing," "include," and "including," when used in this specification and the claims that follow, are intended to specify the presence of stated features, integers, components, or operations, but do not exclude the presence or addition of one or more other features, integers, components, operations, acts, or groups.

Claims

1. flowing a fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber, the secondary gas comprising oxygen or nitrogen, and a flow ratio of the fluorine-containing precursor to the secondary gas being 1.2:1 or greater; contacting a substrate with the fluorine-containing precursor and the secondary gas, the substrate defining high aspect ratio structures, the high aspect ratio structures being defined with an aspect ratio of 10:1 or greater, the substrate including exposed metal within the high aspect ratio structures; Etching the exposed metal within the high aspect ratio structures. A method comprising: The method is an etching method, wherein the method is carried out at a chamber operating pressure between 1 Torr and 50 Torr.

2. The etching method of claim 1 further comprising forming a plasma of the fluorine-containing precursor and the secondary gas.

3. 10. The etching method of claim 1, wherein the temperature in the processing region is maintained at or below 500[deg.]C.

4. 2. The etching method of claim 1, wherein the high aspect ratio structure comprises a memory hole in a 3D NAND structure, and the exposed metal extends laterally into a recess formed perpendicular to a depth direction of the memory hole.

5. purging the processing region of the semiconductor processing chamber after etching the exposed metal; forming a plasma of an oxygen-containing precursor; contacting the exposed metal with plasma effluents of the oxygen-containing precursor to form a metal oxide; The etching method of claim 1 further comprising:

6. the fluorine-containing precursor is a first fluorine-containing precursor, the method comprising: flowing a second fluorine-containing precursor into the processing region; contacting the metal oxide with the second fluorine-containing precursor; The etching method of claim 5 further comprising:

7. 7. The etching method of claim 6, wherein the processing area is maintained plasma-free while contacting the metal oxide with the second fluorine-containing precursor.

8. 10. The etching method of claim 1, further comprising flowing a chlorine-containing precursor into the processing region after etching the exposed metal, the chlorine-containing precursor removing residual fluorine.

9. 10. The etching method of claim 1, wherein after etching the exposed metal in the high aspect ratio structures, a top to bottom loading value is 1.5 or less.

10. flowing a first fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber; contacting a substrate with the first fluorine-containing precursor and the secondary gas, the substrate including exposed metal, the substrate defining a memory hole in a 3D NAND structure, the exposed metal extending laterally into a recess formed perpendicular to a depth direction of the memory hole; Etching the exposed metal in the memory holes; forming a plasma of an oxygen-containing precursor; contacting the exposed metal with plasma effluents of the oxygen-containing precursor to form a metal oxide; flowing a second fluorine-containing precursor into the processing region of the semiconductor processing chamber; removing said oxidized metal; An etching method comprising:

11. The etching method of claim 10 , wherein the secondary gas comprises oxygen or nitrogen.

12. 11. The etching method of claim 10, wherein a flow ratio of the first fluorine-containing precursor to the secondary gas is 1:1 or greater.

13. The etching method of claim 10, further comprising forming a plasma of the first fluorine-containing precursor and the secondary gas.

14. 11. The etching method of claim 10, wherein the temperature in the semiconductor processing chamber is maintained between 200°C and 500°C.

15. 11. The etching method of claim 10, wherein a pressure in the semiconductor processing chamber is maintained between 1 Torr and 50 Torr.

16. 11. The etching method of claim 10, wherein the processing region of the semiconductor processing chamber is maintained plasma-free while a second fluorine-containing precursor is flowed into the processing region.

17. 11. The etching method of claim 10, further comprising flowing a chlorine-containing precursor into the processing region after etching the exposed metal.

18. 20. The etching method of claim 17, wherein the chlorine-containing precursor removes residual fluorine from the exposed metal.

19. flowing a first fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber, the secondary gas comprising oxygen or nitrogen; contacting a substrate with the first fluorine-containing precursor and the secondary gas, the substrate including exposed metal, the substrate defining high aspect ratio structures; Etching the exposed metal in the high aspect ratio structures; contacting the exposed metal with an oxygen-containing precursor to form a metal oxide; flowing a second fluorine-containing precursor into the processing region of the semiconductor processing chamber; removing said oxidized metal; 13. An etching method comprising:

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