Susceptor

The sassepta design with differently positioned RF electrodes addresses plasma control issues by ensuring uniform plasma distribution and deposition uniformity, enhancing semiconductor manufacturing processes.

JP7627334B2Active Publication Date: 2025-02-05SAMSUNG ELECTRONICS CO LTD +1
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Patent Information

Application Number
JP2023515305
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-09-09
Filing Date
2020-09-15
Publication Date
2025-02-05
Estimated Expiration
2040-09-15

AI Technical Summary

Technical Problem

Conventional sassepta designs with a double-layered structure face limitations in controlling plasma density due to differing dielectric thicknesses between inner and outer RF electrodes, requiring separate frequency adjustments and additional parts to prevent wafer sliding, which complicates uniform plasma processing.

Method used

A sassepta design with inner and outer RF electrodes positioned on different planes, maintaining similar dielectric layer thicknesses and electrode gaps, allowing for uniform plasma distribution and preventing wafer floating during processing.

Benefits of technology

The design enables controlled uniform plasma distribution, improving deposition uniformity and film formation near the wafer edge, while simplifying the structure to accommodate various plasma processing needs.

✦ Generated by Eureka AI based on patent content.

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Abstract

A susceptor that enables uniform plasma processing over the entire surface of a wafer and a method for manufacturing the same are disclosed. [Solution] A susceptor is provided which includes a dielectric plate having an upper surface for mounting a wafer and an opposing lower surface, and an inner RF electrode and an outer RF electrode embedded in the dielectric plate, wherein the height of a first plane in which the inner RF electrode is embedded relative to the lower surface is lower than the height of a second plane in which the outer RF electrode is embedded.
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Description

[Technical field]

[0001] The present invention relates to a susceptor and a manufacturing method thereof, and more particularly to a susceptor that enables uniform plasma processing over the entire surface of a wafer and a manufacturing method thereof. [Background technology]

[0002] In the manufacturing process of semiconductor devices, various processes such as film formation and etching are performed on the semiconductor wafers to be processed. In semiconductor manufacturing equipment that processes such semiconductor wafers, a susceptor is used to support the semiconductor wafers. In the susceptor, conductors such as radio frequency (RF) electrodes, clamp electrodes, and / or resistance heating elements are formed inside or on the surface of a base made of a ceramic material such as aluminum nitride, and the susceptor functions as a heater and / or electrostatic chuck.

[0003] FIG. 1 is a diagram showing a schematic diagram of an example of a conventional susceptor.

[0004] 1, the susceptor 1 includes a plate 10 that supports a wafer. The plate 10 may be made of a dielectric material such as aluminum nitride. RF electrodes 12A, 12B and a heating element 14 may be provided inside the dielectric plate 10.

[0005] 1 includes an inner circular RF electrode 12A located near the surface of a dielectric plate, and an outer annular RF electrode 12B located farther from the surface of the plate. The circular RF electrode 12A and the annular RF electrode 12B are provided with terminals and lead wires 16A, 16B, and 16C for power supply. According to the structure of FIG. 1, the annular RF electrode 12B is disposed below the circular RF electrode 12A to eliminate interference between the terminals, and the potential in the RF electrode is made uniform to suppress the occurrence of plasma density deviation.

[0006] However, in the conventional multi-layer susceptor shown in Fig. 1, the outer RF electrode is located below the inner RF electrode in order to apply the outer RF power source. Due to such structural problems, the design and layer configuration of the inner and outer RF electrodes are limited.

[0007] In particular, when manufacturing a pocket type susceptor, the upper dielectric thickness (UDT) of the inner RF electrode is different from the upper dielectric thickness UDT of the outer RF electrode, making it difficult to control the plasma. For example, in order to achieve the same plasma density, it is necessary to take measures such as applying separate frequencies to each RF electrode.

[0008] To solve these problems, susceptors with a design that increases the height of the susceptor's wafer mounting surface are being developed. However, these susceptors are only applicable to special designs that provide a step on the wafer mounting surface, and furthermore, they necessarily require the attachment of additional parts to the outside of the ceramic heater to prevent wafer sliding. Summary of the Invention [Problem to be solved by the invention]

[0009] SUMMARY OF THE PRESENT EMBODIMENT In order to solve the above-mentioned problems of the prior art, an object of the present invention is to provide a susceptor capable of controlling uniform plasma.

[0010] Another object of the present invention is to provide a susceptor that prevents the edge of a wafer from lifting due to gas flow during processing, thereby improving deposition uniformity on the wafer.

[0011] Another object of the present invention is to provide a pocket-type susceptor having an RF electrode with a multi-layer structure.

[0012] Another object of the present invention is to provide an electrode structure suitable for a pocket-type susceptor structure.

[0013] Another object of the present invention is to provide a method for producing the above-mentioned susceptor. [Means for solving the problem]

[0014] In order to achieve the above-mentioned technical objectives, the present invention provides a susceptor comprising: a dielectric plate having an upper surface for mounting a wafer and an opposing lower surface; and an inner RF electrode and an outer RF electrode embedded in the dielectric plate, wherein a height of a first plane in which the inner RF electrode is embedded relative to the lower surface is lower than a height of a second plane in which the outer RF electrode is embedded.

[0015] In the present invention, it is preferable that the upper surface includes a first surface for mounting a wafer and a second surface surrounding the first surface, and the height of the first surface relative to the lower surface is lower than the height of the second surface.

[0016] In this case, a first upper dielectric layer thickness udt1 from the first plane to the first surface may be substantially equal to a second upper dielectric layer thickness udt2 from the second plane to the second surface.

[0017] Alternatively, a first upper dielectric layer thickness udt1 from the first plane to the first surface and a second upper dielectric layer thickness udt2 from the second plane to the second surface may satisfy the relationship -0.5<(udt1-udt2) / udt1<0.5.

[0018] In the present invention, the electrode gap δ is defined as the difference between the inner circumferential radius r3 of the outer RF electrode and the radius r1 of the inner RF electrode, with respect to the radius r1 of the inner electrode, and is expressed as follows: 0.9 It is preferable that the relationship ≦r3 / r1≦1.0 is satisfied.

[0019] In the present invention, the inner RF electrode and the outer RF electrode are preferably either a sheet type or a mesh type.

[0020] The present invention may also include a connecting member for supplying power to the outer RF electrode, wherein the connecting member is preferably either a sheet type or a rod type.

[0021] The susceptor of the present invention may further include a heating element within the dielectric plate. Additionally or alternatively, the susceptor of the present invention may further include a clamp electrode within the dielectric plate.

[0022] In the present invention, the height difference between the first plane and the second plane is preferably 0.1 to 2.0 mm. Effect of the Invention

[0023] According to the present invention, it is possible to provide a susceptor capable of controlling uniform plasma.

[0024] In addition, the present invention provides a susceptor that prevents the edge of a wafer from lifting due to gas flow during processing, thereby improving deposition uniformity on the wafer.

[0025] Furthermore, the present invention can provide a multi-layered RF electrode structure suitable for a pocket-type susceptor. [Brief description of the drawings]

[0026] [Figure 1] 1 is a diagram illustrating a schematic diagram of an example of a conventional susceptor. [Figure 2A] 1 is a cross-sectional view showing a schematic diagram of an electrode structure of a susceptor according to an embodiment of the present invention. [Figure 2B] FIG. 2 is a plan view showing a schematic diagram of an electrode structure of a susceptor according to an embodiment of the present invention. [Diagram 3] FIG. 2 is a schematic diagram showing a cross section of a pre-sintered susceptor precursor according to one embodiment of the present invention. [Figure 4]4 is a schematic diagram showing a cross section of a susceptor precursor in a state in which a green body is laminated on the presintered body of FIG. 3. FIG. [Diagram 5] FIG. 4 is a schematic diagram showing a cross section of a susceptor precursor presintered according to another embodiment of the present invention. [Figure 6] 6 is a schematic diagram showing a cross section of a susceptor precursor in a state in which a green body is laminated on the presintered body of FIG. 5. FIG. [Figure 7A] 4 is a diagram for explaining in detail an example of a process for producing the laminated sintered body of FIG. 3 according to one embodiment of the present invention. [Figure 7B] 4 is a diagram for explaining in detail an example of a process for producing the laminated sintered body of FIG. 3 according to one embodiment of the present invention. [Figure 7C] 4 is a diagram for explaining in detail an example of a process for producing the laminated sintered body of FIG. 3 according to one embodiment of the present invention. [Figure 7D] 4 is a diagram for explaining in detail an example of a process for producing the laminated sintered body of FIG. 3 according to one embodiment of the present invention. [Figure 7E] 4 is a diagram for explaining in detail an example of a process for producing the laminated sintered body of FIG. 3 according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. In this case, the same components in each drawing are denoted by the same reference numerals as much as possible. Also, detailed description of functions and / or configurations that are already known will be omitted. The contents disclosed below will be described with a focus on parts necessary for understanding the operation according to various embodiments, and description of elements that may obscure the gist of the description will be omitted. Furthermore, some components in the drawings may be exaggerated, omitted, or shown in a simplified manner. The size of each component does not entirely reflect the actual size, and therefore the contents described herein are not limited by the relative size or spacing of the components shown in each drawing.

[0028] In the present invention, the term "laminated" is used to define the relative positional relationship of each layer. The expression "layer B on layer A" expresses the relative positional relationship between layers A and B, and layers A and B do not necessarily need to be in contact with each other, and a third layer can be interposed between them. Similarly, the expression "layer C is interposed between layers A and B" does not exclude the case where a third layer is interposed between layers A and C, or between layers B and C.

[0029] 2A and 2B are a cross-sectional view and a plan view, respectively, that diagrammatically show an electrode structure of a susceptor according to one embodiment of the present invention.

[0030] 2A and 2B, the susceptor 100 includes a plate 110 having a pocket-shaped wafer mounting surface 116. The plate 110 may be made of a dielectric material such as AlN. The dielectric plate 110 includes an upper surface that supports a wafer and a lower surface that faces the upper surface.

[0031] The upper surface has at least two sides including a first side, a mounting surface 116, on which a wafer is mounted, and a second side, a peripheral surface 118, adjacent to and surrounding the wafer mounting surface.

[0032] An inner RF electrode 120A and an outer RF electrode 120B are provided inside the susceptor. In the present invention, the RF electrodes 120A and 120B are preferably embedded in a dielectric plate, but are not necessarily limited to this. In the present invention, the inner RF electrode 120A and the outer RF electrode 120B may be of a mesh type or a sheet type.

[0033] A connecting member 142 and / or a lead 140 may be provided for power supply to the upper inner RF electrode 120A. A connecting member 130 and / or a lead 132 may be provided for power supply to the outer RF electrode 120B. The connecting member and the leads 130, 132 may be connected to a power supply means by passing through the inside of the support member 150. Although FIG. 2A illustrates an example in which one connecting member 130 is formed on the outer RF electrode 120B, a plurality of connecting members may be formed on the outer RF electrode 120B.

[0034] In the present invention, the inner RF electrode 120A may have a shape whose outer periphery corresponds to the shape of the wafer or the wafer mounting surface. Preferably, the outer periphery of the inner RF electrode 120A is circular in plan view. The inner RF electrode 120A may have a circumferential shape as a whole, but may be divided into a plurality of regions, with each divided segment having an arc shape with a predetermined angle.

[0035] In the present invention, the outer RF electrode 120B may have an annular shape with a width of w2 in a plan view. In the present invention, the width of the outer RF electrode 120B is preferably a constant value along the periphery, but is not limited to this.

[0036] Meanwhile, as shown in Fig. 2B, the inner RF electrode and the outer RF electrode may be arranged in a concentric structure. In addition, although the drawing shows that the inner RF electrode and the outer RF electrode do not overlap in a plane, the present invention is not limited thereto. Depending on the required plasma distribution, the inner RF electrode and the outer RF electrode may be present on different planes within the plate, and therefore may overlap in a plane. Therefore, in the present invention, the expressions "inner" and "outer" may be defined by the size of the outer circumferential radius r1, r2 of each electrode in the concentric circle.

[0037] In the present invention, the difference value between the inner peripheral radius r3 of the outer electrode and the radius r1 of the inner electrode can be defined as the electrode gap δ. When the outer electrode and the inner electrode are not concentric, the electrode gap can be defined as an average value. The electrode gap in the present invention can have a positive value or a negative value.

[0038] In the present invention, with respect to the radius r1 of the inner electrode Inner radius of outer electrode r3 can be appropriately designed. When allowing the electrodes to overlap, preferably 0.8 ≦ r3 / r1 ≦ 1.0, more preferably 0.9 ≦ r3 / r1 ≦ 1.0. When the electrodes do not overlap, preferably 1 < r3 / r1 < 1.2, more preferably 1 ≦ r3 / r1 < 1.1. It is preferable that r1 does not exceed r2.

[0039] In the present invention, the inner RF electrode 120A and the outer RF electrode 120B are arranged on different planes. Specifically, the plane on which the outer RF electrode is arranged is δh higher (δh > 0) than the plane on which the inner RF electrode is arranged. In the present invention, δh is preferably 0.1 to 2.0 mm.

[0040] Meanwhile, the vertical arrangement relationship between the inner and outer RF electrodes may be defined by an upper dielectric layer thickness udt, which means the distance from a plane on which the electrodes are located to the surface of the upper dielectric plate 110. The planar distance between the plane on which the inner RF electrode is located and the mounting surface 116 may be expressed as udt1, and the planar distance between the plane on which the outer RF electrode is located and the outer peripheral surface 118 may be expressed as udt2. In the present invention, the difference between udt1 and udt2 is limited to have a value within a predetermined range, but it is preferable that the difference between udt1 and udt2 is close to zero. Preferably, udt1 and udt2 satisfy the relationship -1<(udt1-udt2) / udt1<1, -0.9<(udt1-udt2) / udt1<0.9, -0.8<(udt1-udt2) / udt1<0.8, -0.7<(udt1-udt2) / udt1<0.7, -0.6<(udt1-udt2) / udt1<0.6, -0.5<(udt1-udt2) / udt1<0.5, -0.4<(udt1-udt2) / udt1<0.4, -0.3<(udt1-udt2) / udt1<0.3, -0.2<(udt1-udt2) / udt1<0.2, or -0.1<(udt1-udt2) / udt1<0.1.

[0041] By making the thickness of the upper dielectric layer substantially uniform in this manner, the plasma can be uniformly distributed on the outer peripheral surface, which provides various advantages, such as uniform deposition of a film on the susceptor near the edge of the wafer.

[0042] Meanwhile, although not specifically described, the susceptor of the present invention may further include a heating element and / or a clamp electrode inside the plate. The heating element and the clamp electrode may be disposed at appropriate positions above or below the RF electrode.

[0043] A method for implementing a susceptor according to an embodiment of the present invention will now be described with reference to the drawings.

[0044] Various methods can be applied to form two RF electrodes on different planes, as an example of which, Figures 3 and 4 are diagrams illustrating a manufacturing process of a susceptor using pre-sintering.

[0045] FIG. 3 is a schematic diagram showing a cross section of the pre-sintered susceptor precursor 200, and FIG. 4 is a schematic diagram showing a cross section of the susceptor precursor 200 in a state in which a green body is layered on the pre-sintered body.

[0046] 3, the susceptor precursor 200 has a structure in which a lower pre-sintered body 212A and an upper pre-sintered body 212B are stacked, and an inner RF electrode 220A is formed on the lower pre-sintered body 212A, and an outer RF electrode 220B is formed on the upper pre-sintered body 212B. The inner RF electrode and the outer RF electrode are provided with electrode connection members 230A and 240A for power supply. Such a susceptor precursor 200 has an advantage that the height of the RF electrode can be adjusted according to the thickness of the pre-sintered body.

[0047] Fig. 4 shows a state where green bodies 213 and 214 are laminated on the upper and lower parts of the laminated pre-sintered bodies 212A and 212B of Fig. 3. A part or all of the green bodies 213 and 214 can be replaced with a green powder. The raw powder in the laminated state shown in Fig. 4 is manufactured into a sintered body through a sintering process such as hot pressing, and the susceptor shown in Figs. 2A and 2B can be finally manufactured by carrying out a subsequent processing process.

[0048] While the inter-electrode distance is ensured by using a multi-layer or multi-stage pre-sintered body with reference to Figs. 3 and 4, the present invention can be realized by other methods.

[0049] A manufacturing process according to another embodiment of the present invention will be described with reference to FIG. 5 and FIG. 6. FIG. 5 is a schematic diagram showing a cross section of a pre-sintered susceptor precursor 200, and FIG. 6 is a schematic diagram showing a cross section of the susceptor precursor 200 in a state where a compact is stacked on the pre-sintered body. Unlike FIG. 3, the susceptor precursor 200 in FIG. 5 is composed of a single pre-sintered body 212C. An inner RF electrode is embedded inside the single pre-sintered body 212C, and an outer RF electrode is provided on the upper part. In addition, connecting members 230B and 240B for applying power to the RF electrodes may be provided. The terminals may be manufactured by inserting terminals made of a metal material after processing the pre-sintered body, or may be manufactured by various methods such as a process of embedding a connecting member made of a metal material before manufacturing the pre-sintered body and then pre-sintering.

[0050] Next, as shown in FIG. 6, a green compact (or green compact powder; 213, 214) is laminated on the upper and lower parts of the pre-sintered body 212C, and then a hot pressing process is performed to manufacture a susceptor.

[0051] 7A to 7E are diagrams for explaining in detail an example of a process for producing the pre-sintered laminate of FIG. 3 according to an embodiment of the present invention.

[0052] First, referring to Fig. 7A, a lower pre-sintered body 212A is provided. The lower pre-sintered body 212A has a plurality of stepped surface structures 213, 215, and 217. The central groove 217 corresponds to the formation position of the inner RF electrode, and the upper surface of the molded body 213 and the middle groove 215 function as a fixing frame for stacking the upper pre-sintered bodies.

[0053] The above-mentioned stepped surface structures 213, 215, and 217 can be obtained by processing the surface of the pre-sintered body in an appropriate manner. Meanwhile, the lower pre-sintered body 212A is provided with holes 232 for connecting members for the outer RF electrode. Although not shown, holes for connecting members for the inner RF electrode may be provided.

[0054] 7B, an inner RF electrode is formed in the central groove 217. The inner RF electrode can be formed by various methods, such as a method of placing a metal electrode processed according to the shape of the central groove 217, or a printing method such as screen printing using a slurry of conductive metal particles.

[0055] Next, as shown in Fig. 7C, the upper pre-sintered body 212B is laminated on the lower pre-sintered body 212A. The upper pre-sintered body 212B is provided with a groove 218 corresponding to the position where the outer RF electrode is to be formed. The pre-sintered body 212B is also formed with an extended hole 232 for the outer RF electrode connecting member. The above method of forming the hole 232 for the outer RF electrode connecting member is merely illustrative. The connecting member hole 232 may be formed after the upper and lower pre-sintered bodies are laminated.

[0056] 7D, a metal member processed into a U-shape is inserted into the outer RF electrode hole 232 to form the connecting member 230. At this time, the connecting member 230 may be a thin and long plate processed into a U-shape, or may be a rod having a circular or polygonal cross section. After being inserted into the electrode hole 232, the connecting member 230 is bent at the outer RF electrode forming groove 218.

[0057] Next, as shown in FIG. 7E, a processed metal electrode is placed in the electrode hole 232, or an outer RF electrode is formed by a printing method such as screen printing using a slurry of conductive metal particles, thereby manufacturing a susceptor precursor as shown in FIG. 3.

[0058] <Example> A film formation test was carried out using a ceramic heater of the following specifications.

[0059] A. RF electrode and heating element electrode of the susceptor

[0060] RF electrode: Mesh type, thickness 0.6mm

[0061] Heating electrode: Coil type, wire thickness 0.6 mm

[0062] B.CVD process conditions

[0063] Film thickness target: 1800 Å

[0064] Heater target temperature: 550℃

[0065] Pressure: 7200mTorr

[0066] RF power: 1600W

[0067] Gas and flow rate: N2 500sccm, C3H6 1000sccm, Ar 300sccm, He 800sccm

[0068] Table 1 shows the specifications of the RF electrodes and the film formation results when the udt of each RF electrode is the same, and Table 2 shows the specifications of the RF electrodes and the film formation results when the udt of the RF electrodes is different.

[0069] [Table 1]

[0070] [Table 2]

[0071] As described above, the present invention has been described with reference to specific examples and drawings that are limited to specific elements such as specific components, but these are merely provided to aid in a more general understanding of the present invention, and the present invention is not limited to the above examples, and various modifications and variations are possible within the scope of the essential characteristics of the present invention if one has ordinary knowledge in the field to which the present invention belongs. Therefore, the idea of ​​the present invention should not be limited to the described examples, and all technical ideas that are equivalent or have equivalent modifications to the scope of the claims, as well as the claims that will be described later, should be interpreted as being included in the scope of the present invention. [Industrial Applicability]

[0072] The present invention is applicable to ceramic heaters and / or susceptors such as electrostatic chucks used in semiconductor manufacturing and the like. [Explanation of symbols]

[0073] 1,100 susceptor 10, 110 Plate 12A circular RF electrode 12B Circular RF electrode 14 Heating element 16A, 16B, 16C Lead Wires 116 Wafer mounting surface 118 Outer surface 120A, 220A inner RF electrode 120B, 220B outer RF electrode 130, 142 Connecting member 132, 140 Lead 150 Support member 200 Susceptor precursor 212A Lower temporary sintered body 212B Upper temporary sintered body 212C Temporary sintered body 213, 214 Molded body 215, 217, 218 groove 230, 230B, 240B connecting members 230A, 240A Electrode connecting member 232 holes

Claims

1. a dielectric plate including an upper surface for mounting a wafer and an opposing lower surface; an inner RF electrode and an outer RF electrode embedded in the dielectric plate; the dielectric plate includes a first plane in which the inner RF electrode is embedded, a second plane in which the outer RF electrode is embedded, and a third plane below the first plane, a height of the first plane in which the inner RF electrode is embedded based on the lower surface is lower than a height of the second plane in which the outer RF electrode is embedded, a connecting member having a U-shape that connects the outer RF electrodes at the third plane;

2. 2. The susceptor of claim 1, wherein the upper surface includes a first surface for mounting a wafer and a second surface surrounding the first surface, and the height of the first surface relative to the lower surface is lower than the height of the second surface.

3. The susceptor of claim 2, wherein a thickness udt1 of a first upper dielectric layer from the first plane to the first surface is substantially the same as a thickness udt2 of a second upper dielectric layer from the second plane to the second surface.

4. The susceptor of claim 2, wherein a first upper dielectric layer thickness udt1 from the first plane to the first surface and a second upper dielectric layer thickness udt2 from the second plane to the second surface satisfy a relationship of -0.5<(udt1-udt2) / udt1<0.

5.

5. 5. The susceptor according to claim 3, wherein an electrode gap δ defined as a difference between an inner peripheral radius r3 of the outer RF electrode and a radius r1 of the inner RF electrode with respect to a radius r1 of the inner electrode satisfies the relationship: 0.9≦r3 / r1≦1.

0.

6. The susceptor of claim 1 , wherein the inner and outer RF electrodes are either a sheet type or a mesh type.

7. The susceptor according to claim 1 , wherein the connecting member is either a sheet type or a rod type.

8. The susceptor of claim 1 further comprising a heating element within the dielectric plate.

9. The susceptor of claim 1 further comprising a clamping electrode within said dielectric plate.

10. 2. The susceptor according to claim 1, wherein a height difference between the first plane and the second plane is 0.1 to 2.0 mm.

Citation Information

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