Compressed Picture-in-Picture Signaling

JP7629469B2Active Publication Date: 2025-02-13TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
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Patent Information

Application Number
JP2022564214
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-04-22
Filing Date
2021-03-24
Publication Date
2025-02-13
Estimated Expiration
2041-03-24

Smart Images

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Abstract

A method is provided for decoding a position and size for a sub-picture (SP) in a picture from a bitstream. The method includes decoding a coding tree unit (CTU) size from a first syntax element S1 in the bitstream. The method includes obtaining a scale factor value F, where F is greater than 1. The method further includes deriving a scaled position value for the sub-picture SP, where deriving the scaled position value includes: i) obtaining the position value based on information in the bitstream; and ii) setting the scaled position value equal to the product of the position value and F. The method includes deriving a size of the sub-picture based on the scaled position value.
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Description

[Technical field]

[0001] SUMMARY OF THE DISCLOSURE Embodiments relating to picture-in-picture signaling are disclosed. [Background technology]

[0002] 1. HEVC and VVC

[0003] High Efficiency Video Coding (HEVC) is a block-based video codec standardized by ITU-T and MPEG that utilizes both temporal and spatial prediction. Spatial prediction is achieved using intra (I) prediction from within the current picture. Temporal prediction is achieved using unidirectional (P) or bidirectional inter (B) prediction at the block level from a previously decoded reference picture. At the encoder, the difference between the original and predicted pixel data, called the residual, is transformed to the frequency domain, quantized, and then entropy coded before being transmitted along with the necessary prediction parameters, such as the prediction mode and motion vectors, which are also entropy coded. The decoder performs entropy decoding, inverse quantization, and inverse transform to obtain the residual, which is then added to the intra or inter prediction to reconstruct the picture.

[0004] MPEG and ITU-T are working on a successor to HEVC within the Joint Video Exploratory Team (JVET). The name of this video codec under development is Versatile Video Coding (VVC). At the time of writing, the current version of the VVC draft specification is JVET-Q2001-vD.

[0005] 2. Ingredients

[0006] A video (aka video sequence) consists of a series of pictures, where each picture (aka image) consists of one or more components. Each component can be described as a two-dimensional rectangular array of sample values. A picture in a video sequence typically consists of three components: one luma component Y, whose sample values ​​are luma values, and two chroma components Cb and Cr, whose sample values ​​are chroma values. Also, the dimensions of the chroma components are typically 1 / 2 smaller in each dimension than the luma components. For example, the luma component of an HD picture would have a size of 1920x1080, and the chroma components would each have dimensions of 960x540. The components are sometimes called color components.

[0007] 3. Blocks and Units

[0008] A block is a two-dimensional array of samples. In video coding, each component is split into blocks, and the coded video bitstream consists of a series of coded blocks. In video coding, an image is typically split into units that cover a certain area of ​​the image. Each unit consists of all blocks from all components that make up that particular area, and each block belongs entirely to one unit. A macroblock in H.264 and a coding unit (CU) in HEVC are examples of units.

[0009] In VVC, a picture is partitioned into coding tree units (CTUs), and a coded picture in the bitstream consists of a set of coded CTUs such that all CTUs in the picture are coded. The scan order of the CTUs depends on how the picture is partitioned by higher level partitioning tools, such as slices and tiles, described below. A VVC CTU consists of one luma block and optionally (but typically) two spatially co-located chroma blocks. The size of the luma blocks of a CTU is square, and the size is configurable and is signaled by a syntax element in the bitstream. When the decoder is decoding the bitstream, it decodes the syntax element to derive the size of the luma block of the CTU size to use for decoding. This size is usually called the CTU size.

[0010] 4. Parameter Set

[0011] HEVC and VVC specify three types of parameter sets: Picture Parameter Set (PPS), Sequence Parameter Set (SPS), and Video Parameter Set (VPS). A PPS contains data that is common to an entire picture, an SPS contains data that is common to a Coded Video Sequence (CVS), and a VPS contains data that is common to multiple CVSs, e.g., data for multiple layers in a bitstream.

[0012] 5. Decoding Capability Information (DCI)

[0013] The DCI specifies information that may not change during a decoding session and that the decoder may be good to know, such as the maximum number of sub-layers allowed. The information in the DCI is not necessary for the operation of the decoding process. In previous drafts of the VVC specification, the DCI was called the Decoding Parameter Set (DPS).

[0014] The decoding capability information also contains a set of general constraints on the bitstream that give the decoder information on what to expect from the bitstream in terms of coding tools, types of NAL units, etc. In the current version of VVC, the general constraint information can also be signaled in the VPS or SPS.

[0015] 6. Picture Header

[0016] In the current version of VVC, a coded picture contains a picture header, which contains syntax elements that are common for all slices of the associated picture.

[0017] 7. Slice

[0018] Slices divide a picture into independently coded slices, where the decoding of one slice in a picture is independent of other slices of the same picture. One purpose of slices is to allow resynchronization in case of data loss.

[0019] In the current version of VVC, a picture can be partitioned into either raster scan slices or rectangular slices. A raster scan slice consists of several complete tiles in raster scan order. A rectangular slice consists of a group of tiles that together occupy a rectangular area in a picture or a consecutive number of CTU rows inside one tile. Each slice has a slice header that comprises syntax elements. The decoded slice header values ​​from these syntax elements are used when decoding the slice. In VVC, a slice is a set of CTUs.

[0020] 8. Tile

[0021] The draft VVC video coding standard includes a tool called tiles that divides a picture into rectangular spatially independent regions. Tiles in the draft VVC coding standard are similar to tiles used in HEVC. Using tiles, a picture in VVC can be partitioned into rows and columns of CTUs, where a tile is the intersection of a row and a column. Figure 1A shows an example of tile partitioning using four tile rows and five tile columns, resulting in a total of 20 tiles for a picture.

[0022] The tile structure is signaled in a Picture Parameter Set (PPS) by specifying the row thickness and column width. Individual rows and columns can have different sizes, but the partitions always span the entire picture, from left to right and top to bottom, respectively.

[0023] There are no decoding dependencies between tiles of the same picture. This includes intra prediction, context selection for entropy coding, and motion vector prediction. One exception is that in-loop filtering dependencies are generally allowed between tiles.

[0024] In the rectangular slice mode in VVC, a tile can be further split into multiple slices, where each slice is a consecutive number of CTU rows within a tile. Figure 1B shows an example of tile partitioning and rectangular slice partitioning using tile partitioning in VVC.

[0025] 9. Subpicture

[0026] Sub-pictures are supported in the current version of VVC. A sub-picture is defined as a rectangular region of one or more rectangular slices in a picture, such that the sub-picture contains one or more slices that collectively cover the rectangular region of the picture. In the current version of the VVC specification, the sub-picture location and size are signaled in the SPS. Table 1 shows the sub-picture syntax in the SPS in the current version of VVC. TIFF0007629469000001.tif93170

[0027] Table 2 below contains the corresponding semantics in the VVC draft text. TIFF0007629469000002.tif100170

[0028] In summary, a rectangular slice consists of an integer number of CTUs, a sub-picture consists of an integer number of CTUs, and therefore a sub-picture also consists of an integer number of CTUs.

[0029] In the VVC standardization proposal, JVET-R0135-v4, a method was proposed for more efficient signaling of the information shown in Table 1. The method consists of signaling the width and height of the subpicture unit, which is then used as the granularity for signaling the subpic_ctu_top_left_x[i], subpic_ctu_top_left_y[i], subpic_width_minus1[i], and subpic_height_minus1[i] syntax elements. Summary of the Invention

[0030] Currently, there are several challenges. For example, one problem with the solution in JVET-R0135-v4 is that the method only works when the picture width and height are multiples of subpicture units. This significantly reduces the usefulness of the method, as it cannot be applied to many picture sizes and subpicture layouts.

[0031] Therefore, this disclosure introduces one or more scale factors similar to the sub-picture unit described in JVET-R0135-v4. The position of the top-left corner of the sub-picture is also calculated similarly to the JVET-R0135-v4 method.

[0032] However, in contrast to the JVET-R0135 method, the proposed method disclosed herein first calculates an initial width value for the subpicture by multiplying the decoded scale factor value with the decoded subpicture width value. Then, if the initial width value for the subpicture plus the horizontal position of the top-left corner position of the subpicture is greater than the picture width in number of CTUs, the subpicture width is set equal to the picture width minus the horizontal position of the top-left corner. Otherwise, the subpicture width is set equal to the initial width value for the subpicture. The proposed method can also be used to derive the subpicture height using the picture height and using either the same decoded scale factor value or another decoded scale factor value. An advantage is that this method can be applied to subpicture layouts where the picture width or height is not a multiple of the subpicture unit or scale factor.

[0033] According to a first aspect of the present disclosure, a method is provided for decoding a position for a sub-picture (SP) in a picture from a bitstream. The method includes decoding a CTU size from a first syntax element S1 in the bitstream. The method includes obtaining a scale factor value F, where F is greater than 1. The method includes deriving a scaled position value for the sub-picture SP, where deriving the scaled position value includes: i) obtaining a position value based on information in the bitstream; and ii) setting the scaled position value equal to a product of the position value and F.

[0034] According to a second aspect of the present disclosure there is provided a computer program comprising instructions which, when executed by a processing circuit, cause the processing circuit to perform the method according to the first aspect.

[0035] According to a third aspect of the present disclosure there is provided a carrier comprising a computer program according to the second aspect, the carrier being one of an electronic signal, an optical signal, a radio signal and a computer readable storage medium.

[0036] According to a fourth aspect of the present disclosure there is provided an apparatus, the apparatus adapted to perform the method according to the first aspect.

[0037] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate various embodiments. [Brief description of the drawings]

[0038] [Figure 1A] FIG. 1 shows an example of a tiling partition using four tile rows and five tile columns. [Figure 1B] FIG. 1 is a diagram showing an example of tile partitioning and rectangular slice partitioning using the tile partitioning in VVC. [Diagram 2] FIG. 1 illustrates a system according to an exemplary embodiment. [Diagram 3] FIG. 2 is a schematic block diagram of an encoder according to one embodiment. [Figure 4] FIG. 2 is a schematic block diagram of a decoder according to one embodiment. [Diagram 5] 1 is a flowchart illustrating a process according to one embodiment. [Figure 6] FIG. 2 is a block diagram of an apparatus according to one embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0039] 2 illustrates a system 200 according to an example embodiment. The system 200 includes an encoder 202 in communication with a decoder 204 via a network 210 (e.g., the Internet or other network).

[0040] FIG. 3 is a schematic block diagram of an encoder 202 for encoding a block (hereinafter "block") of pixel values ​​in a video frame (picture) of a video sequence according to one embodiment. A current block is predicted by performing motion estimation by a motion estimator 350 from an already provided block in the same frame or in a previous frame. The result of the motion estimation is a motion vector or a displacement vector relative to a reference block in case of inter prediction. The motion vector is utilized by a motion compensator 350 to output an inter prediction of the block. An intra predictor 349 calculates an intra prediction of the current block. The output from the motion estimator / compensator 350 and the output from the intra predictor 349 are input into a selector 351 which selects either an intra prediction or an inter prediction for the current block. The output from the selector 351 is input into an error calculator in the form of an adder 341, which also receives the pixel values ​​of the current block. The adder 341 calculates and outputs a residual error as the difference in pixel values ​​between the block and the prediction of that block. The error is transformed in a transformer 342, such as by a discrete cosine transform, and quantized by a quantizer 343, followed by coding in an encoder 344, such as by an entropy encoder. In inter-coding, the estimated motion vector is also provided to the encoder 344 to generate a coded representation of the current block. The transformed and quantized residual error for the current block is also provided to an inverse quantizer 345 and an inverse transformer 346 to retrieve the original residual error. This error is added by an adder 347 to the block prediction output from the motion compensator 350 or the intra predictor 349 to create a reference block that can be used in predicting and coding the next block. This new reference block is first processed by a deblocking filter unit 330, according to an embodiment, to perform deblocking filtering to eliminate any blocking artifacts.The processed new reference block is then temporarily stored in the frame buffer 348 , where it is available to the intra predictor 349 and the motion estimator / compensator 350 .

[0041] 4 is a corresponding schematic block diagram of the decoder 204 according to some embodiments. The decoder 204 comprises a decoder 461, such as an entropy decoder, for decoding the coded representation of the block to obtain a set of quantized and transformed residual errors. These residual errors are dequantized in an inverse quantizer 462 and inverse transformed by an inverse transformer 463 to obtain a set of residual errors. These residual errors are added to pixel values ​​of a reference block in an adder 464. The reference block is determined by a motion estimator / compensator 467 or an intra predictor 466 depending on whether inter or intra prediction is performed. Thereby, a selector 468 is interconnected to the adder 464, the motion estimator / compensator 467 and the intra predictor 466. The resulting decoded block output from the adder 464 is input to a deblocking filter unit 330 according to an embodiment for deblocking filtering any blocking artifacts. The filtered block is output from the decoder 504 and is preferably also temporarily provided to a frame buffer 465 where it may be used as a reference block for subsequent blocks to be decoded. The frame buffer 465 is thereby connected to a motion estimator / compensator 467 to make the stored block of pixels available to the motion estimator / compensator 467. The output from the adder 464 is also preferably input to an intra predictor 466 for use as an unfiltered reference block.

[0042] Embodiment

[0043] In the following description, various embodiments are described that solve one or more of the problems described above. It should be understood by those skilled in the art that two or more embodiments, or parts of the embodiments, may be combined to form a new solution that is still covered by the present disclosure.

[0044] In the embodiments described below, the method is applied to signaling the layout of a picture or the partitioning of a picture into sub-pictures, where a sub-picture may consist of a set of rectangular slices, which may consist of CTUs, which may consist of tiles, which may consist of CTUs.

[0045] The method in the embodiment may be used to signal any type of picture partition, such as slices, rectangular slices or any other segmentation of a picture into tiles or segments, i.e., any partition may be signaled using a list or set of partitions, where each partition is signaled by the spatial location of one corner location, such as the upper-left corner of the partition, and the height and width of the partition.

[0046] A CTU may be any type of rectangular picture unit that is smaller or equal to a sub-picture. Examples of picture units other than a CTU include a coding unit (CU), a prediction unit, and a macroblock (MB).

[0047] Alternative form 1

[0048] In a first embodiment, a picture consists of at least two sub-pictures: a first sub-picture and a second sub-picture. For each sub-picture, the spatial layout of the sub-picture is conveyed in the bitstream to the decoder 204 by information specifying the position of the top-left corner of the sub-picture plus the width and height of the sub-picture.

[0049] A decoder 204 that decodes a coded picture from a bitstream first decodes the CTU size to be used to decode the picture from one or more syntax elements in the bitstream. A CTU is considered to be a square, and therefore the CTU size here is a single number that represents the length of one side of the luma plane of the CTU. This is referred to as the 1-D CTU size in this disclosure.

[0050] The decoder further decodes one or more scale factor values ​​from the bitstream. The scale factor is preferably a positive integer value greater than 1. The same CTU size value and scale factor are used to decode the spatial locations for all sub-pictures of a picture. In this first embodiment, a single scale factor is used.

[0051] The decoder 204 decodes the spatial locations for at least two sub-pictures by performing the steps listed below for each sub-picture.

[0052] Step 1: Derive a scaled horizontal position value (H) for the subpicture by decoding a syntax element in the bitstream, thereby obtaining a horizontal position value, and multiplying the horizontal position value by a scale factor to produce a scaled horizontal position value (H).

[0053] Step 2: Derive a scaled vertical position value (V) of the subpicture by decoding another syntax element in the bitstream, thereby obtaining a vertical position value, and multiplying the vertical position value by a scale factor, thereby producing a scaled vertical position value (V).

[0054] Step 3: Derive a first width value for the subpicture by decoding a specific syntax element, and calculate an initial width value by multiplying the obtained first width value by a scale factor. Then, a value equal to the initial width value + scaled horizontal position value (H) is compared with the picture width. If this value (i.e., initial width + scaled horizontal position) is greater than the picture width, the subpicture width is set equal to the picture width - scaled horizontal position (H) so that the rightmost subpicture border is aligned with the right picture border, otherwise the subpicture width is set equal to the initial width.

[0055] Similar steps are taken to derive the sub-picture height.

[0056] First, a first height value for the subpicture is derived by decoding the syntax element. Then, an initial height value is calculated by multiplying the first height value by a scale factor. Then, a value equal to the initial height value plus a scaled vertical position value (V) is compared to the picture height. If this value (i.e., the initial height plus the scaled vertical position (V)) is greater than the picture height, the subpicture height is set equal to the picture height minus the scaled vertical position (V) so that the bottom subpicture border aligns with the bottom picture border; otherwise, the subpicture height is set equal to the initial height.

[0057] Therefore, the following steps may be performed by the decoder 204 to decode the position and size for the sub-picture SP in a picture from the bitstream. Decoding a one-dimensional CTU size from syntax element S1 in the bitstream; decoding one or more scale factor values ​​F from one or more syntax elements S3 in the bitstream, where the scale factor value F is greater than one; deriving the horizontal position H of the sub-picture SP in units of the CTU size by: o decoding a syntax element S4 in the bitstream, the value of which represents a horizontal position in number of unit sizes, the unit size being equal to a scale factor value F multiplied by the CTU size; and set the horizontal position H to the value of syntax element S4 multiplied by a scale factor value F; deriving the vertical position V of the sub-picture SP in units of the CTU size by: o decoding a syntax element S5 in the bitstream, the value of which represents a vertical position in number of unit sizes; and set the vertical position V to the value of syntax element S5 multiplied by a scale factor value F; Deriving the width of the sub-picture SP in units of the CTU size by: o decoding a syntax element S6 in the bitstream, the value of which represents a width value in number of unit sizes; calculating the initial width Iw of the sub-picture SP as the value of the syntax element S6 multiplied by a scale factor value F; and o If the initial width Iw+horizontal position H of the sub-picture SP is greater than the picture width in units of the CTU size, then set the width of the sub-picture SP equal to the picture width in units of the CTU size minus the horizontal position H in units of the CTU size. Otherwise, set the width of the sub-picture SP equal to the initial width Iw. Deriving the height of the sub-picture SP in units of the CTU size by: o decoding a syntax element S7 in the bitstream, the value of which represents a height value in number of unit sizes; Calculating the initial height Ih of the sub-picture SP as the value of the syntax element S7 multiplied by a scale factor value F, and o If the initial height Ih plus vertical position V of the sub-picture SP is greater than the picture height in units of the CTU size, then set the height of the sub-picture SP equal to the picture height in units of the CTU size minus the vertical position V in units of the CTU size. Otherwise, set the height of the sub-picture SP equal to the initial height Ih.

[0058] A sub-picture here consists of an integer number of one or more complete slices, whereby a sub-picture comprises coded data covering a rectangular area of ​​a picture, where that area is not necessarily the entire picture.

[0059] In a preferred version of the embodiment, syntax elements S1, S3, S4, S5, S6 and S7 are decoded from the SPS. In other versions of this embodiment, one or more of syntax elements S1, S3, S4, S5, S6 and S7 may be decoded from the PPS, the picture header, the slice header, or from the decoding capability information (DCI).

[0060] Decoding a syntax element to derive a value may involve a "plus 1" operation, such that the value represented in the bitstream is increased by a value of 1 when the value is decoded. This is commonly used in VVC and is indicated by the "minus1" suffix used in the name of the syntax element. As used herein, a syntax element may or may not undergo a +1 operation.

[0061] Alternative form 2

[0062] In another embodiment, two scale factors are used instead of one, which means that two different scale factors are decoded from the bitstream: one for deriving horizontal values, such as the horizontal position and width of the subpicture, and one for deriving vertical values, such as the vertical position and height of the subpicture.

[0063] 6 is a block diagram of an apparatus 600 for implementing the decoder 204 and / or the encoder 202, according to some embodiments. When the apparatus 600 implements a decoder, the apparatus 600 may be referred to as a "decoding apparatus 600," and when the apparatus 600 implements an encoder, the apparatus 600 may be referred to as an "encoding apparatus 600." As shown in FIG. 6, the apparatus 600 includes a processing circuit (PC) 602, which may include one or more processors (P) 655 (e.g., a general-purpose microprocessor and / or one or more other processors, such as an application specific integrated circuit (ASIC), field programmable gate array (FPGA), etc.), which may be co-sited in a single housing or in a single data center or may be geographically distributed (i.e., the apparatus 600 may be a distributed computing device), and at least one network interface 648, which may be configured to communicate with the apparatus 600 via the network interface 648. The PC 602 may comprise at least one network interface 648, which may include one or more non-volatile storage devices and / or one or more volatile storage devices, and a storage unit (a.k.a. "data storage system") 608, which may include a transmitter (Tx) 645 and a receiver (Rx) 647 for enabling the PC 602 to transmit data to and receive data from other nodes connected to the network 110 (e.g., an Internet Protocol (IP) network) to which it is connected (directly or indirectly) (e.g., the network interface 648 may be wirelessly connected to the network 110, in which case the network interface 648 is connected in an antenna configuration). In an embodiment in which the PC 602 includes a programmable processor, a computer program product (CPP) 641 may be provided. The CPP 641 includes a computer readable medium (CRM) 642, which stores a computer program (CP) 643 comprising computer readable instructions (CRI) 644.The CRM 642 may be a non-transitory computer readable medium, such as a magnetic medium (e.g., a hard disk), an optical medium, a memory device (e.g., a random access memory, a flash memory), etc. In some embodiments, the CRI 644 of the computer program 643, when executed by the PC 602, is configured such that the CRI causes the device 600 to perform steps described herein (e.g., steps described herein with reference to a flowchart). In other embodiments, the device 600 may be configured to perform steps described herein without the need for code. That is, for example, the PC 602 may simply consist of one or more ASICs. Thus, features of the embodiments described herein may be implemented in hardware and / or software.

[0064] Although various embodiments have been described herein, it should be understood that the embodiments have been presented by way of example only, and not by way of limitation. Thus, the breadth and scope of the present disclosure should not be limited by any of the exemplary embodiments described above. Moreover, unless otherwise indicated herein or clearly contradicted by context, any combination of the above-described elements in all possible variations thereof is encompassed by the present disclosure.

[0065] Additionally, while the processes described above and illustrated in the Figures have been shown as a sequence of steps, this has been done for purposes of illustration only, and it is therefore contemplated that some steps may be added, some steps may be omitted, the order of the steps may be rearranged, and some steps may be performed in parallel.

Claims

1. A method (500) for decoding a position and size for a sub-picture (SP) in a picture from a bitstream, the method comprising: decoding a coding tree unit (CTU) size from a first syntax element S1 in the bitstream; obtaining a scale factor value F, where F is greater than 1; deriving a scaled position value for the sub-picture (SP) in units of the CTU size, the deriving of the scaled position value comprising: i) obtaining a position value based on information in the bitstream, the position value being in number of unit sizes, the unit size being equal to the scale factor value F multiplied by the CTU size; ii) setting the scaled position value equal to the product of the position value and F; deriving scaled position values ​​including: deriving a size of the sub-picture based on the scaled position values; The method (500).

2. i) the position value is a horizontal position value h, the scaled position value is a scaled horizontal position value H=h×F, and the size of the sub-picture is a width Wsp of the sub-picture; and ii) the position value is a vertical position value v, the scaled position value is a scaled vertical position value V=v×F, and the size of the sub-picture is a height Hsp of the sub-picture; The method of claim 1 , wherein the at least one of

3. Deriving the size of the sub-picture includes deriving a width Wsp of the sub-picture based on H, and deriving Wsp based on H includes: i) obtaining a first width value w1 based on information in the bitstream; ii) obtaining an initial width value Iw by calculating Iw=(w1)×(F); iii) comparing (Iw+H) with Pw, where Pw specifies the width of the picture; iv) if (Iw+H>Pw), then set Wsp equal to (Pw-H); otherwise, set Wsp equal to Iw. The method of claim 2 , comprising:

4. Deriving the size of the sub-picture includes deriving a height Hsp of the sub-picture based on V, and deriving Hsp based on V includes: i) obtaining a first height value h1 based on information in the bitstream; ii) obtaining an initial height value Ih by calculating Ih=(h1)×(F); iii) comparing (Ih+V) with Ph, where Ph specifies the height of the picture; iv) if (Ih+V>Ph), then set Hsp equal to (Ph-V); otherwise, set Hsp equal to Ih. The method of claim 2 , comprising:

5. Obtaining the horizontal position value h based on information in the bitstream comprises: decoding a syntax element S4 in the bitstream to obtain h, the value of the syntax element S4 representing a horizontal position in number of unit sizes; The method according to any one of claims 2 to 4, comprising:

6. Obtaining the vertical position value v based on information in the bitstream comprises: decoding a syntax element S5 in the bitstream to obtain v, the value of the syntax element S5 representing a vertical position in number of unit sizes; The method according to any one of claims 2 to 5, comprising:

7. Two separate scale factor values ​​F1 and F2 having different values ​​are obtained; one scale factor value F1 is used as a scale factor value F for deriving at least one of the horizontal position value of the sub-picture and the width of the sub-picture; the other scale factor value F2 is used as a scale factor value F for deriving at least one of the vertical position value of the sub-picture and the height of the sub-picture; 7. The method according to any one of claims 2 to 6.

8. The method of claim 1 , wherein one or more of the syntax elements are decoded from a sequence parameter set (SPS).

9. The method according to claim 1 , wherein one or more of the syntax elements are decoded from a picture parameter set (PPS), a picture header, a slice header, or from decoding capability information (DCI).

10. A computer program (643) comprising instructions (644) which, when executed by a processing circuit (602), cause the processing circuit (602) to perform a method according to any one of claims 1 to 9.

11. A computer readable storage medium containing the computer program of claim 10.

12. An apparatus (600) adapted to perform the method according to any one of claims 1 to 9.

13. An apparatus (600), comprising: A processing circuit (602); Memory (642) 10. An apparatus (600) comprising: a memory including instructions (644) executable by the processing circuitry, whereby the apparatus is operable to perform a method according to any one of claims 1 to 9.

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