CONTROL DEVICE AND METHOD FOR CONTROLLING DEVICE SUBSTRATE
Patent Information
- Application Number
- JP2021040994
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-03-15
- Publication Date
- 2025-02-18
- Estimated Expiration
- 2041-03-15
AI Technical Summary
【0007】 本発明によれば、素子基板のメモリに対して生じる残電荷による意図されていないアクセス生じることを抑え、正しく情報を記憶させることが可能になる。
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Abstract
Description
[Technical field]
[0001] The present invention relates to a control device and a method for controlling an element substrate. [Background technology]
[0002] As disclosed in Patent Document 1, the print head of an inkjet printing apparatus has an element substrate equipped with fuses as memory for storing information about the print head, in addition to heaters for ejecting ink. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2006-15736 A Summary of the Invention [Problem to be solved by the invention]
[0004] However, depending on the configuration of the memory mounted on the element substrate, it is possible that unintended access to the memory may occur due to residual charges, which may result in information not being stored correctly.
[0005] The present invention has been made in consideration of the above, and has an object to correctly store information on an element substrate. [Means for solving the problem]
[0006] The present invention is a control device comprising: a fuse memory that stores information by applying a voltage; an element substrate having a first switch that switches whether or not current is passed through the fuse memory; a resistive element; a second switch that switches whether or not current is passed through the resistive element; a first node connected to the fuse memory and the resistive element; and a second node that supplies external power to the first node; and a control unit that switches the first switch to store information in the fuse memory and read information from the fuse memory, wherein the control unit discharges any charge remaining in the first node by enabling current to pass from the first node to the resistive element using the second switch before enabling current to pass through the fuse memory using the first switch. Effect of the Invention
[0007] According to the present invention, it is possible to prevent unintended access caused by residual charges generated in the memory of the element substrate, and to store information correctly. [Brief description of the drawings]
[0008] [Figure 1] 1 is a perspective view showing a schematic configuration of mainly a recording unit of an image recording apparatus according to an embodiment; [Diagram 2] FIG. 2 is an explanatory diagram of a recording head according to the embodiment. [Diagram 3] FIG. 1 is a block diagram showing a configuration of a recording apparatus according to an embodiment. [Figure 4] 4 is a flowchart showing a flow of control processing according to the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0009] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.
[0010] FIG. 1 is a perspective view showing the internal configuration of an inkjet recording device according to an embodiment. In FIG. 1, the inkjet recording device 100 includes an automatic feed unit 101, a transport unit 103, and a recovery unit 108. The automatic feed unit 101 automatically feeds recording media such as paper into the device body. The transport unit 103 guides the recording media, which are sent out one by one from the automatic feed unit 101, to a predetermined recording position by a roller, and also guides the recording media from the recording position to a discharge unit 102. The recovery unit 108 performs a recovery process on the recording unit, which performs a desired recording on the recording medium transported to the recording position. The recording unit includes a carriage 105 supported by a carriage shaft 104 so as to be movable in the main scanning direction of the arrow X, and a recording head 201 detachably mounted on the carriage 105.
[0011] The carriage 105 is provided with a carriage cover 106 that engages with the carriage 105 to guide the recording head 201 to a predetermined mounting position on the carriage 105, and a head set lever 107. The head set lever 107 engages with a tank holder of the recording head 201 and presses the recording head 201 to set it in a predetermined mounting position. A head set plate (not shown) that is spring-biased is provided at the engagement portion with the recording head 201 and is rotatably provided on the head set lever shaft on the upper portion of the carriage 105. The head set lever 107 is configured to mount the recording head 201 on the carriage 105 while pressing the recording head 201 by the force of the spring.
[0012] 2 is an explanatory diagram of a print head 201 according to this embodiment. The print head 201 engages with the carriage 105 to perform printing. The print head 201 is used in the form of a unit having a printing element array corresponding to each liquid ink stored in an ink cartridge 202. The ink cartridge 202 stores ink such as black (Bk), cyan (C), magenta (M), and yellow (Y) individually, and each storage chamber is integrally formed.
[0013] The print head 201 according to this embodiment has a print element array 203 corresponding to each of the above-mentioned colors on the side facing the print medium (array A in the figure). Here, only print element arrays for one color are shown for convenience. The print element array 203 is provided on a print element substrate of the print head 201 formed of a material such as silicon. The X direction in the figure is the "main scanning direction" same as the arrow X in FIG. 1, and the Y direction is the "sub-scanning direction" intersecting the X direction, which is the direction in which the conveying unit 103 in FIG. 1 conveys the print medium. The print element array 203 has a plurality of print elements 204 arranged in the Y direction as elements that generate energy used to eject liquid. The print elements 204 are electrothermal transducers and are arranged along the Y direction. Bubbles are generated in the ink by the heat of the electrothermal transducers, and the ink is ejected from the ejection openings corresponding to the print elements 204 onto the print medium. The print element array 203 provided on the print head 201 is used to print one color component. The print head 201 performs printing on the print medium by ejecting ink in accordance with the movement timing while moving in the X direction.
[0014] FIG. 3 is a block diagram showing the electrical configuration of the inkjet recording apparatus and the recording head according to the embodiment. In the main controller 380, which is the control unit of the inkjet recording apparatus 100, in addition to a CPU 381 that executes a program read from a ROM 382, a RAM 383 that temporarily stores information, various circuits and interfaces are provided. From the HB driving circuit 385, a clock signal (CLK), a data signal (DATA), and a latch signal (LATCH) for driving the circuits and elements in the recording element substrate 300 are sent to the main controller 353 of the recording element substrate 300 via a connection portion. The operation of the antifuse, which will be described later, can also be performed using these signals. In addition, these signals include a signal for driving the recording element 204 generated in the recording apparatus based on input image data. In addition, the recording element substrate 300 is supplied with a power supply voltage of 24 V from the inkjet recording apparatus 100 via a terminal. Furthermore, as will be described later, the inkjet recording apparatus 100 also functions as a control device for the recording element substrate 300 for performing a write operation for storing information in the antifuse and a read operation for the stored information.
[0015] The recording element substrate 300 is also provided with the recording elements described above with reference to FIG. 2, but these are omitted in FIG.
[0016] Further, the recording element substrate 300 of the recording head 201 is provided with antifuses as fuse memories (hereinafter referred to as fuse memories). The antifuses are implemented as elements having capacitance. The antifuses 341 and 342 are devices that are electrically open in the initial state and have a resistance value equivalent to infinity, and the resistance value decreases when a voltage is applied to the antifuses 341 and 342. Applying a charge to the antifuses to reduce the resistance value in order to store information is called a write operation, and an operation of checking the resistance value of the antifuses to read information is called a read operation. The information stored in the antifuses is, for example, information related to the recording head 201, and is used as a parameter for the inkjet recording apparatus 100 to control the recording head 201.
[0017] The antifuses 341 and 342 are provided with corresponding SW331 (switch 331, hereinafter "SW" refers to switch), SW351, SW332, and 352. These switches can be used to switch whether or not current can be passed through the antifuses.
[0018] When performing a read operation on the antifuse, a signal for serial communication generated by the HB driving circuit 385 is used to serially communicate with the CONTROLLER 353 in the print head 201, according to a command from the CPU 381 in the main controller 380 of the inkjet recording apparatus 100. The contents received by the CONTROLLER 353 include information to start the read operation mode and information to select the antifuse to perform the read operation. If the selected antifuse is the antifuse 341, the CPU 381 turns on the SW331 by serial communication. Next, the CPU 381 turns on the SW351. In this embodiment, the DATA signal and the SW351 are connected in the read operation mode. When the SW321 is turned on in this state, a charge is generated in the node 312, which is the wiring from the SW321 to the SW331, SW332, etc., due to the current of the constant current source 322. The comparator 323, which compares this charge with a reference charge, outputs information on whether the resistance value of the selected antifuse 341 is larger or smaller than a specified resistance value. The CPU 381 in the main controller 380 can obtain the signal output from the comparator 323 as a binary value via the GPIO 384, which is the output destination connected by a signal line. After the read operation is completed, the CPU 381 performs serial communication and turns off the SW 351. The CPU 381 also performs serial communication and turns off the SW 331.
[0019] When performing a write operation on the antifuse, serial communication is performed to the CONTROLLER 353 in the recording element substrate 300 using a signal for serial communication generated by the HB driving circuit 385 from the main controller 380. The contents received by the CONTROLLER 353 include information that a write operation mode is to be started and information to select an antifuse to perform the write operation. If the selected antifuse is the antifuse 342, the CPU 381 turns on the SW332 by the antifuse selection signal. Next, the CPU 381 turns on the SW311 to supply power required for the write operation to the node 312 from outside the recording element substrate 300 via the node 313. If the SW352 is turned on while power is being supplied to the node 312, the resistance value of the antifuse 342 can be reduced. In this embodiment, the DATA signal and the SW352 are connected in the write operation mode. If it is expected that the antifuse 342 will not have a desired resistance value by turning on the SW352 only once, the operation of turning the SW352 from on to off and off to on is repeated multiple times. After the write operation is completed, the CPU 381 turns off the switch 352. The CPU 381 also performs serial communication and turns off the switch 332.
[0020] The combination of antifuse 341, node side SW331, and controller side SW351 is arranged in a plurality of arrangements in addition to the combination of antifuse 342, node side SW332, and controller side SW352.
[0021] A resistive element 340 is provided which is connected to SW330 which is connected to the node 312 and connected to SW350 on the controller side. This is used to discharge the charge at the node 312. SW350 is also connected to the ground. This resistive element 340 is also used for measuring the resistance value of the resistive element in the print element substrate 300 to inspect it.
[0022] Fig. 4 is a flowchart showing the flow of processing of a read operation and a write operation using the inkjet recording apparatus according to the embodiment shown in Fig. 3. The following description will be given with reference to Figs. 3 and 4. The processing shown in Fig. 4 is set to be executed at a predetermined timing. For example, the processing is executed when the inkjet recording apparatus 100, which has not been connected to a power source, is connected to an AC power source, and is executed at a timing when it is necessary to access the antifuse after the power source is connected.
[0023] 4, the CPU 381 determines whether or not to discharge the node 312. This step 450 is performed, for example, when the inkjet recording apparatus 100 is connected to an AC power source for the first time, in which case the CPU 381 determines to discharge and the determination is Yes. On the other hand, if the antifuse has already been accessed multiple times after the AC power source is connected and it is determined that discharging is not necessary, the process proceeds to step 400.
[0024] If the answer is Yes in step 450, the process proceeds to step 451, where the CPU 381 turns on SW330 and SW350. This causes the charge at node 312 to be discharged by the action of the resistance element 340. Since the charge at the node is not output to the outside of the recording element substrate 300, for example, if the power supply to the recording device is cut off while a voltage from the power supply is applied to node 312, the charge at node 312 remains there as a residual charge without being consumed. However, if the charge at node 312 is discharged in this manner, for example, when SW331 and SW351 are turned on, the residual charge at node 312 flows into the selected antifuse 341, and it is possible to prevent an unintended write operation from being executed.
[0025] Next, the process proceeds to step 452, where a predetermined time is waited since discharging takes time depending on the parasitic capacitance and the resistance value of the resistive element 340.
[0026] Next, in step 453, CPU 381 turns off SW 330 and SW 350. Through the above operations, the discharge of node 312 is completed, the potential is made equal to the ground potential, and the node can be reset to the initial state.
[0027] In steps 400 and 402, the CPU 381 in the main controller 380 issues a command to serially communicate with the CONTROLLER 353 in the recording element substrate 300 using a signal for serial communication generated by the HB driving circuit 385. The information received by the CONTROLLER 353 includes information to start the read operation mode and information to select the antifuse that will perform the read operation. In this way, the CPU 381 selects the antifuse and turns on SW31X (X is an integer) connected to the selected fuse. Here, it is assumed that the selected antifuse is the antifuse 341, and the CPU 381 turns on SW331 by serial communication (step 400), and furthermore, as described above, the CPU 381 selects the read operation mode, and the information received by the CONTROLLER 353 includes information to start the read operation mode (step 402).
[0028] In the case of a read operation, the process proceeds to step 421, and next the CPU 381 turns on SW35X (X is an integer), here S351. In this embodiment, in the read operation mode, the DATA signal and SW351 are connected.
[0029] Next, in step 422, when SW321 is turned on, a current from the constant current source 322 generates an electric charge in node 312 which is the wiring from SW321 to SW331, SW332, . . .
[0030] In step 423, comparator 323, which compares the charge at node 312 with a reference charge, outputs information on whether the resistance value of selected antifuse 341 is larger or smaller than a specified resistance value. CPU 381 in main controller 380 receives the signal output from comparator 323 via GPIO 384, which is an output destination connected by a signal line, and acquires this output result as a binary value.
[0031] In step 424, the CPU 381 performs serial communication and turns off the SW 321. Then, in step 403, the CPU 381 performs serial communication again and turns off the SW 331. Furthermore, turn off SW351.
[0032] In step 400, the antifuse 342 is selected, and in step 420, when a write operation is selected, the CPU 381 performs serial communication with the CONTROLLER 353 in the recording element substrate 300 using a signal for serial communication generated by the HB driving circuit 385. The contents received by the CONTROLLER 353 include information for starting the write operation mode and information for selecting the antifuse for the write operation. If the selected antifuse is the antifuse 342, the SW 332 is turned on by the information for selecting the antifuse from the CPU 381.
[0033] In step 411, the CPU 381 turns on the SW 311 to apply to the node 312 the voltage Vcut required for the write operation. Next, in step 412, the CPU 381 turns on the switch 352. Then, in step 413, the resistance of antifuse 342 is reduced. Next, in step 403, SW331 is turned off.
Claims
1. an element substrate provided with a fuse memory that stores information by applying a voltage thereto, a first switch that switches whether or not a current is passed through the fuse memory, a resistive element, a second switch that switches whether or not a current is passed through the resistive element, a first node that is connected to the fuse memory and the resistive element, and a second node that supplies a power source from an external source to the first node; a control unit that switches the first switch to store information in the fuse memory and read information from the fuse memory; the control unit enables current to flow from the first node to the resistance element via the second switch before enabling current to flow to the fuse memory via the first switch, thereby discharging any charge remaining in the first node.
2. 2. The control device according to claim 1, wherein the charge at the first node is not output to the outside of the element substrate when all the switches surrounding the first node are turned off.
3. 3. The control device according to claim 1, wherein the resistive element is connected to ground when the charge remaining in the first node is discharged.
4. 4. The control device according to claim 1, wherein the element substrate is provided with a plurality of the fuse memories and the first switches corresponding to the plurality of fuse memories.
5. 5. The control device according to claim 1, wherein the resistive element is also used for measuring a resistance value of the resistive element.
6. 6. The control device according to claim 1, wherein the element substrate is a recording element substrate provided with recording elements that generate energy used to eject liquid, the recording elements being provided in correspondence with liquid ejection ports.
7. 7. The control device according to claim 6, wherein the control section sends a signal based on input image data for driving the recording elements to the recording element substrate.
8. a fuse memory that stores information by applying a voltage to the fuse memory, a first switch that switches whether or not a current is passed through the fuse memory, a resistive element, a second switch that switches whether or not a current is passed through the resistive element, a first node that is connected to the fuse memory and the resistive element, and a second node that supplies a power source from an external source to the first node, A method for controlling an element substrate, comprising: enabling current to flow from the first node to the resistance element by the second switch before enabling current to flow to the fuse memory by the first switch, thereby discharging any charge remaining in the first node.
Citation Information
Patent Citations
Head substrate, recording head, head cartridge, recorder and information input-output method
JP2006015736A
Recording element substrate, liquid ejection head and recording apparatus
JP2020104479A