Radio frequency amplifier implementing an input baseband enhancement circuit and process for implementing said radio frequency amplifier - Patents.com
Patent Information
- Application Number
- JP2022574743
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-06-05
- Filing Date
- 2021-05-27
- Publication Date
- 2025-02-19
- Estimated Expiration
- 2041-05-27
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Figure 0007633281000001 
Figure 0007633281000002 
Figure 0007633281000003
Abstract
Description
[Technical field]
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. patent application Ser. No. 16 / 893,913, filed Jun. 5, 2020, entitled “Radio Frequency Amplifier Implementing an Input Baseband Enhancement Circuit and a Process of Implementing the Same,” which is incorporated herein by reference in its entirety.
[0002] The present disclosure relates to a radio frequency amplifier implementing an input baseband enhancement circuit and a process for implementing the radio frequency amplifier. More particularly, the present disclosure relates to a radio frequency amplifier implementing an input baseband enhancement circuit for improving baseband impedance and a process for implementing the radio frequency amplifier. Furthermore, the present disclosure relates to a radio frequency amplifier implementing an input baseband enhancement circuit for improving baseband impedance and digital predistortion and a process for implementing the radio frequency amplifier. [Background technology]
[0003] Radio Frequency (RF) power circuits are used in a variety of applications, such as base stations for wireless communication systems. Signals amplified by RF power circuits often include signals having a high frequency modulated carrier, with frequencies ranging from 400 Megahertz (MHz) to 6 Gigahertz (GHz). Signals amplified by RF power circuits often include baseband signals that typically modulate a carrier at a relatively low frequency, which in some applications may be up to 300 MHz or higher.
[0004] RF power circuits can typically include transistor dies that amplify RF signals. Examples of transistor dies used in RF applications include metal-oxide semiconductor field-effect transistors (MOSFETs), laterally-diffused metal-oxide semiconductor (LDMOS) devices, and high electron mobility transistor (HEMT) devices. These devices typically have a relatively low characteristic impedance (e.g., 2 ohms or less).
[0005] Input and output impedance matching circuits are typically used to match the RF power circuit to an external transmission line that provides the RF signal to and from the RF power transistor. This external transmission line has a characteristic impedance that is typically about 50 ohms. However, the characteristic impedance can be any value as determined by the designer and required for the particular application and / or system, etc.
[0006] The input and output matching circuits typically include inductive and capacitive elements used to achieve impedance matching between the input and output of an RF power transistor. The input and output matching circuits achieve impedance matching for signal frequencies amplified by the RF power transistor, such as signal frequencies in the range of 400 MHz to 6 GHz.
[0007] The operation of RF power circuits can be improved by terminating the RF signal as much as possible at baseband frequencies below the fundamental frequency, and by terminating the higher harmonics of the fundamental signal above the fundamental frequency range as much as possible. However, there are still resonances at the baseband termination of the amplifier that can interfere with the ability of the digital predistortion (DPD) operation to be linear over a given band.
[0008] Therefore, there is a need to implement an RF power amplifier (RFPA) with baseband impedance enhancement circuitry and / or other baseband impedance refinements configured to improve baseband impedance, improve digital predistortion (DPD) operation, correct and / or improve linearity over a given band. Summary of the Invention
[0009] One embodiment includes an amplifier including an input matching network, at least one transistor, an input lead coupled to the at least one transistor, a ground terminal coupled to the transistor, an output lead coupled to the at least one transistor, an output matching circuit coupled to the output lead and the at least one transistor, and a baseband impedance enhancement circuit having at least one reactive element coupled to the input matching network, wherein the baseband impedance enhancement circuit is configured to reduce resonance of a baseband termination.
[0010] One aspect includes a process of implementing an amplifier comprising: providing an input matching network; providing at least one transistor; coupling an input lead to the at least one transistor; coupling a ground terminal to the transistor; coupling an output lead to the at least one transistor; coupling an output matching circuit to the output lead and the at least one transistor; and coupling a baseband impedance enhancement circuit having at least one reactive element to the input matching network, wherein the baseband impedance enhancement circuit is configured to reduce resonance of a baseband termination.
[0011] One aspect includes an amplifier including an input matching network, at least one transistor, an input lead coupled to the at least one transistor, a ground terminal coupled to the transistor, an output lead coupled to the at least one transistor, an output matching circuit coupled to the output lead and the at least one transistor, and a baseband impedance enhancement circuit having at least one reactive element coupled to the input matching network, wherein the input matching network includes at least one reactive element coupled to the at least one reactive element of the baseband impedance enhancement circuit, and the baseband impedance enhancement circuit is configured to reduce resonance of a baseband termination.
[0012] In this regard, the present disclosure helps to add circuitry, such as an integrated passive device (IPD), to the input side of a device, such as a GaN device, to improve the baseband impedance of the amplifier and improve digital predistortion (DPD) operation. There is a resonance at the baseband end of the amplifier that can impede the ability of the DPD to correct linearity over a given band. Adding the disclosed IPD to the matching topology reduces the resonance and pushes it to higher frequencies, allowing the DPD to function more effectively over a wider bandwidth. Aspects of the present disclosure not only allow coverage across multiple bands in the 2 GHz range, but can be used across all bands covered by cellular infrastructure, including covering all bands where LDMOS devices do not function, such as 3 GHz to 5 GHz. In certain aspects, the disclosed circuitry is configured to operate at the input side of a device, such as a GaN device, HEMT device, and improves the baseband impedance of the amplifier over at least a substantial portion of the wideband signal.
[0013] Conventional devices that attempt to achieve wider linear performance using GaN attempt to improve performance at the output of the device, for example by adding larger capacitors to improve the device's DPD linearity, whereas the present disclosure focuses on the input side of the device and provides further improvements to the existing topology. Additionally, conventional devices may implement circuitry to improve baseband impedance in narrowband applications. However, any such implementations are distinct from the present disclosure, which includes aspects that improve baseband impedance over at least a substantial portion of the wideband signal.
[0014] The disclosed embodiments represent substantial improvements over standard topologies, for example, at instantaneous bandwidths of over 160 MHz. The present disclosure further contemplates implementation in wideband technologies such as GaN-based devices.
[0015] Further features, advantages, and aspects of the present disclosure will become apparent or become apparent upon consideration of the following detailed description, drawings, and claims. Moreover, it is to be understood that both the foregoing summary of the disclosure and the following detailed description are exemplary and are intended to provide further explanation without limiting the scope of the present disclosure as set forth in the claims.
[0016] The accompanying drawings, which are included to enable a further understanding of the present disclosure and are incorporated in and constitute a part of this specification, illustrate aspects of the disclosure and, together with the detailed description, serve to explain the principles of the disclosure. No attempt has been made to show structural details of the disclosure in more detail than may be necessary for a fundamental understanding of the disclosure and various ways in which it may be practiced. [Brief description of the drawings]
[0017] [Figure 1] FIG. 1 is a functional block diagram of an RF power amplifier (RFPA) circuit according to the present disclosure. [Diagram 2]FIG. 2 shows further exemplary details of the functional block diagram of the RF power amplifier (RFPA) circuit according to FIG. [Diagram 3] FIG. 2 shows further exemplary details of the functional block diagram of the RF power amplifier (RFPA) circuit according to FIG. [Figure 4] FIG. 2 shows further exemplary details of the functional block diagram of the RF power amplifier (RFPA) circuit according to FIG. [Diagram 5] 1 is a graph of input impedance versus frequency for an embodiment of an RF power amplifier (RFPA) circuit. [Figure 6] FIG. 1 is a partial top view of a packaged RF power amplifier (RFPA) according to the present disclosure. [Figure 7A] FIG. 2 is a cross-sectional view of a package according to one aspect of the present disclosure. [Figure 7B] FIG. 2 is a cross-sectional view of a package according to another aspect of the present disclosure. [Figure 8] FIG. 1 is a partial top view of a packaged RF power amplifier (RFPA) according to the present disclosure. [Figure 9] 1 is an enlarged partial schematic diagram of an embodiment of a transistor amplifier according to the present disclosure; [Figure 10] FIG. 10 is a schematic cross-sectional view taken along line XI-XI in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0018] Details of the aspects of the present disclosure and various features and advantages of the present disclosure will be more fully described with reference to the non-limiting aspects and examples described and / or illustrated in the accompanying drawings and detailed in the following description. It should be noted that the features shown in the drawings are not necessarily drawn to scale, and that features of one aspect may be used with other aspects that would be recognized by those skilled in the art even if not explicitly stated herein. Descriptions of well-known components and processing techniques may be omitted so as not to unnecessarily obscure aspects of the present disclosure. The examples used herein are merely intended to facilitate an understanding of how the present disclosure can be implemented and to further enable those skilled in the art to implement aspects of the present disclosure. Thus, the examples and aspects of the present specification should not be construed as limiting the scope of the present disclosure, which is defined solely by the appended claims and applicable law. Furthermore, it should be noted that like reference numerals represent similar parts throughout the several views of the drawings.
[0019] Terms such as first, second, etc. may be used herein to describe various elements, but it will be understood that these elements should not be limited by such terms. Such terms are used only to distinguish one element from another element. For example, a first element can be referred to as a second element, and similarly, a second element can be referred to as a first element, without departing from the scope of the present disclosure. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.
[0020] When an element such as a layer, region, or substrate is said to be "on" or extend "onto" another element, it will be understood that the element may be directly on or extend directly onto the other element, or intervening elements may also be present. In contrast, when an element is said to be "directly on" or extend "directly onto" another element, there are no intervening elements. Similarly, when an element such as a layer, region, or substrate is said to be "over" or extend "over" another element, it will be understood that the element may be directly over or extend directly over the other element, or intervening elements may also be present. In contrast, when an element is said to be "over" or extend "directly over" another element, there are no intervening elements. When an element is said to be "connected" or "coupled" to another element, it will also be understood that the element may be directly connected or coupled to the other element, or intervening elements may be present. In contrast, when an element is said to be "directly connected" or "directly coupled" to another element, there are no intervening elements present.
[0021] Relative terms such as "lower," "above," "upper," "lower," "horizontal," or "vertical" may be used herein to describe the relationship of one element, layer, or region to another element, layer, or region shown in the figures. It will be understood that these terms, and those discussed above, are intended to encompass various orientations of the device in addition to the orientation depicted in the figures.
[0022] The terms used herein are for the purpose of describing particular aspects only and are not intended to be limiting of the disclosure. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and / or "including," as used herein, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.
[0023] All terms used herein (including technical and scientific terms) have the same meaning as commonly understood by those skilled in the art to which this disclosure belongs, unless otherwise defined. It will be further understood that the terms used herein should be interpreted to have a meaning consistent with the meaning of the terms in the context of this specification and related art, and should not be interpreted in an idealized or overly formal sense unless expressly defined as such herein.
[0024] FIG. 1 illustrates a functional block diagram of an RF power amplifier (RFPA) circuit according to the present disclosure.
[0025] 1 specifically illustrates an RF power amplifier (RFPA) circuit 100. The RF power amplifier (RFPA) circuit 100 includes an input port 102, an RF output port 104, and a reference potential port 106. The RF power amplifier (RFPA) circuit 100 further includes an RF amplifier device 108 having an input terminal 110 electrically coupled to the input port 102, an output terminal 112 electrically coupled to the RF output port 104, and a reference potential terminal 114 electrically coupled to the reference potential port 106.
[0026] In various embodiments, the RF amplifier device 108 and the RF power amplifier (RFPA) circuit 100 may be a multi-carrier amplifier, a multi-band amplifier, a long term evolution (LTE) compliant amplifier, a wideband code division multiple access (WCDMA) compliant amplifier, an 802.11(x) compliant amplifier, or the like. The RF power amplifier (RFPA) circuit 100 can be utilized in or with base stations, wireless devices, mobile base station communication transmitters, mobile base station communication amplifiers, RF power amplifiers for various mobile communication bands, wireless fidelity (Wi-Fi) devices, multiple-input and multiple-output (MIMO) devices, devices using IEEE 802.11n (Wi-Fi), devices using IEEE 802.11ac (Wi-Fi), devices implementing the Evolved High Speed Packet Access (HSPA+) protocol, devices implementing 3G protocols, devices implementing Worldwide Interoperability for Microwave Access (WiMAX) protocols, devices implementing 4G protocols, devices implementing Long Term Evolution (LTE) protocols, devices implementing 5G protocols, Class A amplifier devices, Class B amplifier devices, Class C amplifier devices, Class AB amplifier devices, Doherty amplifiers, and the like, and combinations thereof.
[0027] Generally speaking, the RF amplifier device 108 may be any device capable of performing amplification of an RF signal. In the illustrated embodiment, the RF amplifier device 108 is a transistor device, with the input terminal 110 corresponding to a control or gate terminal of the transistor device, the output terminal 112 corresponding to a first load terminal (e.g., a drain terminal) of the transistor device, and the reference potential terminal 114 corresponding to a second load terminal (e.g., a source terminal) of the transistor device.
[0028] The RF amplifier device 108 can be configured to amplify an RF signal between an input terminal 110 and an output terminal 112 over an RF frequency range that includes a fundamental RF frequency. According to one embodiment, this frequency range may be a "wideband" frequency range. A "wideband" frequency range refers to the fact that the range of frequency values of the RF signal exceeds the coherence bandwidth of a single channel.
[0029] The RF power amplifier (RFPA) circuit 100 may further include an input impedance matching network 146 connected between the input port 102 of the RF power amplifier (RFPA) circuit 100 and the input terminal 110 of the RF amplifier device 108. A detailed exemplary implementation of the input impedance matching network 146 is described herein with reference to FIG. 2. Additionally, the RF power amplifier (RFPA) circuit 100 may further include an output impedance matching network 116 electrically coupled between the output terminal 112 and the RF output port 104. A detailed exemplary implementation of the output impedance matching network 116 is described herein with reference to FIG. 4.
[0030] The RF power amplifier (RFPA) circuit 100 may further include a baseband impedance enhancement circuit 190. The baseband impedance enhancement circuit 190 may be connected to the input port 102, the baseband impedance enhancement circuit 190 may be connected to the input impedance matching network 146, the baseband impedance enhancement circuit 190 may be connected to the RF amplifier device 108, and / or the baseband impedance enhancement circuit 190 may be connected to the input terminal 110.
[0031] In one or more aspects, the baseband impedance enhancement circuit 190 may be connected to the input port 102 upstream of the input impedance matching network 146, the baseband impedance enhancement circuit 190 may be connected to the input port 102 downstream of the input impedance matching network 146, or as shown in FIG. 1, the baseband impedance enhancement circuit 190 may be connected to the input port 102 via the input impedance matching network 146. In one or more aspects, the baseband impedance enhancement circuit 190 may be connected to and / or operate on the input side of the RF power amplifier (RFPA) circuit 100, such as upstream of the RF amplifier device 108, between the input port 102 and the RF amplifier device 108, including between the input port 102 and the RF amplifier device 108, etc.
[0032] The baseband impedance enhancement circuit 190 may be implemented as an integrated passive device (IPD). The baseband impedance enhancement circuit 190 may be configured to improve the baseband impedance of the RF power amplifier (RFPA) circuit 100. Alternatively or additionally, the baseband impedance enhancement circuit 190 may be configured to achieve improved digital pre-distortion (DPD) operation of the RF power amplifier (RFPA) circuit 100 and / or the RF amplifier device 108. In one aspect, the baseband impedance enhancement circuit 190 may be configured to reduce resonance of the baseband termination. In one aspect, the baseband impedance enhancement circuit 190 may be configured to push and / or move resonance of the baseband termination to a higher frequency.
[0033] In one aspect, the baseband impedance enhancement circuit 190 can be configured to push and / or move the resonance of the baseband termination to higher frequencies so that DPD can function more effectively over a wider bandwidth.
[0034] In this regard, the baseband termination of the RF power amplifier (RFPA) circuit 100 may have resonances that impede the ability of the DPD operation to correct linearity across a given band. To accomplish this correction, the implementation of the baseband impedance enhancement circuit 190 relative to the matching topology of the RF power amplifier (RFPA) circuit 100, such as the input impedance matching network 146, reduces the resonances and pushes them to higher frequencies, allowing the DPD to function more effectively over a wider bandwidth.
[0035] The baseband impedance enhancement circuit 190 may be implemented using a network of reactive components. The parameters of the reactive component network may be specifically tailored to achieve a desired frequency response in a given frequency range. More specifically, the parameters of the reactive component network may be specifically tailored to achieve a desired frequency response in a given frequency range in a wideband implementation. These reactive components may include one or more inductors and capacitors. The parameters (i.e., inductance and capacitance) of these inductors and capacitors may be specifically tailored to achieve a desired frequency response in a given frequency range. More specifically, the parameters of the inductors and capacitors may be specifically tailored to achieve a desired frequency response in a wideband implementation.
[0036] Implementations of the baseband impedance enhancement circuit 190 in the RF power amplifier (RFPA) circuit 100 can be used across all bands covered by the mobile communications infrastructure. Additionally, implementations of the baseband impedance enhancement circuit 190 in the RF power amplifier (RFPA) circuit 100 can include coverage across multiple bands, for example in the 2 GHz range, as well as coverage across all bands where LDMOS may not function, for example, 3 GHz to 5 GHz. Additionally, implementations of the baseband impedance enhancement circuit 190 in the RF power amplifier (RFPA) circuit 100 provide surprising improvements over standard topologies. For example, implementations of the baseband impedance enhancement circuit 190 in the RF power amplifier (RFPA) circuit 100 provide surprising linearity improvements over standard topologies. Additionally, implementations of the baseband impedance enhancement circuit 190 in the RF power amplifier (RFPA) circuit 100 provide unexpected improvements over standard topologies. In this regard, implementations of the baseband impedance enhancement circuit 190 in the RF power amplifier (RFPA) circuit 100 provide unexpected linearity improvements over standard topologies. For example, implementations of the baseband impedance enhancement circuit 190 in the RF power amplifier (RFPA) circuit 100 provide improvements over standard topologies, for example, when the instantaneous bandwidth exceeds 160 MHz. Furthermore, implementations of the baseband impedance enhancement circuit 190 in the RF power amplifier (RFPA) circuit 100 provide surprising and unexpected improvements in wideband applications.
[0037] FIG. 2 shows further exemplary details of a functional block diagram of the RF power amplifier (RFPA) circuit according to FIG.
[0038] 2 specifically illustrates an exemplary implementation of the input impedance matching network 146. The input impedance matching network 146 may include an inductor 148 and an inductor 150 connected in series between the input port 102 and the input terminal 110 of the RF amplifier device 108. Additionally, the input impedance matching network 146 may include a capacitor 152 connected in parallel with the input terminal 110 and the reference potential terminal 114 of the RF amplifier device 108.
[0039] 2 additionally illustrates that the baseband impedance enhancement circuit 190 may be connected between the input port 102 and the input terminal 110. In one aspect, the baseband impedance enhancement circuit 190 may be connected between the inductor 148, the capacitor 152, and / or the inductor 150 of the input impedance matching network 146. In one aspect, the baseband impedance enhancement circuit 190 may be connected downstream of the inductor 148, and the baseband impedance enhancement circuit 190 may be connected upstream of the capacitor 152 and / or the inductor 150 of the input impedance matching network 146. However, as previously mentioned, the baseband impedance enhancement circuit 190 may be located and connected anywhere between the input port 102 and the RF amplifier device 108.
[0040] According to one embodiment, the parameters of the inductor 150 and the capacitor 152 can be adjusted in a similar manner as previously discussed for impedance matching in the fundamental frequency range between the input capacitance of the RF amplifier device 108 and a fixed impedance value at the board level (e.g., 50 ohms). Alternatively, the input impedance matching network 146 can be configured in some other circuit configuration.
[0041] FIG. 3 shows further exemplary details of a functional block diagram of the RF power amplifier (RFPA) circuit according to FIG.
[0042] 3 specifically illustrates further details of the baseband impedance enhancement circuit 190. In one aspect, the baseband impedance enhancement circuit 190 may comprise an inductor 196 connected between the inductor 148, the capacitor 152, and / or the inductor 150. The inductor 196 may further be connected to a capacitor 198. In one aspect, the inductor 196 and the capacitor 198 may be connected in series to the reference potential port 106.
[0043] In one aspect, inductor 196 may connect to inductor 148, connect to capacitor 152, and / or connect to inductor 150. In one aspect, inductor 196 may connect to inductor 148, connect to capacitor 152, and connect to inductor 150. In one aspect, inductor 196 may connect to capacitor 198.
[0044] In one embodiment, the inductor 196 may be directly connected to the inductor 148, directly connected to the capacitor 152, and / or directly connected to the inductor 150. In one embodiment, the inductor 196 may be directly connected to the inductor 148, directly connected to the capacitor 152, and directly connected to the inductor 150. In one embodiment, the inductor 196 may be directly connected to the capacitor 198. However, the baseband impedance enhancement circuit 190 may be implemented using similar components that achieve equivalent circuitry and / or functionality.
[0045] The baseband impedance enhancement circuit 190 may be implemented using a network of reactive components. In the illustrated embodiment, these reactive components include one or more inductors and capacitors. The parameters (i.e., inductance and capacitance) of these inductors and capacitors can be specially tuned to achieve a desired frequency response within a given frequency range. In particular, the parameters (i.e., inductance and capacitance) of these inductors and capacitors can be specially tuned to improve the baseband impedance of the RF power amplifier (RFPA) circuit 100, achieve improved digital pre-distortion (DPD) operation of the RF power amplifier (RFPA) circuit 100 and / or the RF amplifier device 108, reduce baseband termination resonance, push and / or move baseband termination resonance to a higher frequency, etc.
[0046] FIG. 4 shows further exemplary details of a functional block diagram of the RF power amplifier (RFPA) circuit according to FIG.
[0047] 4 specifically illustrates an exemplary implementation of output impedance matching network 116. Output impedance matching network 116 may include a series branch 118 that may be connected in series between output terminal 112 of RF power amplifier (RFPA) circuit 100 and RF output port 104 of RF power amplifier (RFPA) circuit 100, and a parallel branch 120 that is in parallel with RF output port 104 and reference potential terminal 114 of RF power amplifier (RFPA) circuit 100.
[0048] The output impedance matching network 116 may include a baseband termination circuit 122, a fundamental frequency matching circuit 124, and a second harmonic termination circuit 126. The baseband termination circuit 122, the fundamental frequency matching circuit 124, and the second harmonic termination circuit 126 may each be implemented using a network of reactive components. In the illustrated embodiment, these reactive components include inductors and capacitors. As discussed in more detail below, the parameters (i.e., inductance and capacitance) of these inductors and capacitors may be specifically tailored to achieve a desired frequency response in a given frequency range. More generally, the reactive components of the output impedance matching network 116 may be implemented using any of a variety of components (e.g., radial stubs, transmission lines, etc.), with the parameters (e.g., radius, length, etc.) of these components being tailored to achieve a desired frequency response.
[0049] FIG. 5 shows a graph of real input impedance versus frequency for an embodiment of an RF power amplifier (RFPA) circuit.
[0050] 5 specifically illustrates a graph 500 of the real part of the input impedance versus frequency for an implementation of an RF power amplifier (RFPA) circuit 502, a first exemplary RF power amplifier 504, and a second exemplary RF power amplifier 506 according to the present disclosure. More specifically, FIG. 5 illustrates a graph 500 of the real part of the input impedance versus frequency, where the input impedance is in ohms along the y-axis direction and frequency in megahertz along the x-axis direction.
[0051] As shown in FIG. 5, the RF power amplifier (RFPA) circuit 502 according to the present disclosure operates with an impedance of less than 2 ohms at least in the frequency range of about 1 MHz to at least about 150 MHz. Moreover, the impedance of the RF power amplifier (RFPA) circuit 502 according to the present disclosure is shown to be highly linear at least in the frequency range of about 25 MHz to at least about 150 MHz. Moreover, the impedance of the RF power amplifier (RFPA) circuit 502 according to the present disclosure is shown to have a slope (ΔY / ΔX-1st derivative-dy / dx) that remains stable, generally constant, and / or unchanged over a significant portion of the frequency range, such as 25 MHz to at least about 150 MHz. Specifically, the slope remains within a range of 0%-20%, 0%-5%, 5%-10%, 10%-15%, or 15%-20% over a significant portion of the frequency range, such as 25 MHz to at least about 150 MHz. Additionally, RF power amplifier (RFPA) circuits according to the present disclosure are contemplated to operate over additional frequencies above 150 MHz with an impedance of less than 2. Furthermore, the impedance is contemplated to be highly linear over additional frequencies above 150 MHz.
[0052] On the other hand, the first exemplary RF power amplifier 504 operates in a frequency range from about 25 MHz to at least about 110 MHz with an impedance greater than 2. Moreover, this impedance is shown to be non-linear over the entire frequency range of the graph.
[0053] Similarly, the second exemplary RF power amplifier 506 operates in a frequency range from about 25 MHz to at least about 80 MHz with an impedance greater than 2. Moreover, this impedance is shown to be non-linear over the entire frequency range of the graph.
[0054] Referring again to FIG. 4, the components of the fundamental frequency matching circuit 124 can be adjusted so that the output impedance matching network 116 provides a complex conjugate of the inherent impedance of the RF amplifier device 108 at the output terminal 112 of the RF amplifier device 108 in the RF frequency range. As is generally known in the art, optimal power transfer occurs when the input and output impedances are matched as complex conjugates of each other. Transistor devices such as GaN-based HEMTs typically have relatively low characteristic input and output impedances (e.g., 2 ohms or less). The fundamental frequency matching circuit 124 matches the output impedance of the RF amplifier device 108 to a fixed value (e.g., 50 ohms) that corresponds to a standardized value at the system level. In this way, optimal power transfer can be achieved between the RF power amplifier (RFPA) circuit 100 and other components at the system level.
[0055] According to one embodiment, the fundamental frequency matching circuit 124 comprises a first capacitor 128 and a first inductor 130. The first capacitor 128 and the first inductor 130 can be connected in series with each other along the parallel branch 120. The inductance of the first inductor 130 can be adjusted to achieve impedance matching with respect to the characteristic impedance of the RF amplifier device 108. In the illustrated circuit, the first inductor 130 can be in parallel with the output of the RF amplifier device 108. Thus, the output capacitance of the RF amplifier device 108 and the first inductor 130 form a first parallel LC resonator. As is commonly known in the art, a parallel LC circuit achieves a maximum impedance (from an RF perspective) at a resonant frequency, i.e., the point where the reactive branch currents are equal and opposite. According to one embodiment, the inductance of the first inductor 130 can be adjusted so that the first parallel LC resonator resonates at a center frequency of 2.0 GHz. The first capacitor 128 can be configured as a DC blocking capacitor that blocks very low frequency (e.g., frequencies below 10 MHz) and DC signals. The capacitance value of the DC blocking capacitor is therefore very large. Thus, at much higher frequency values, including the fundamental frequency range, the first capacitor 128 appears as an RF short circuit at the fundamental frequency. In this way, the effect of the first capacitor 128 on the first parallel LC resonator can be neglected when tuning the parameters of the first parallel LC resonator.
[0056] The components of the second harmonic termination circuit 126 can be tuned so that the second harmonic termination circuit 126 provides a low impedance at the output terminal 112 of the RF amplifier device 108 in the second harmonic frequency range. By filtering out the higher harmonic content of the RF signal, the efficiency of the device can be substantially improved. By reducing the harmonic oscillations at the output of the device, the shape of the voltage and current waveforms during transient conditions is beneficially controlled, minimizing overlap, and thus providing higher efficiency. This is done by including short-circuit paths for the higher harmonics (e.g., 2F0, 4F0, 6F0, etc.) of the fundamental frequency F0 of the RF signal being amplified. To this end, the second harmonic termination circuit 126 can be tuned (from an RF perspective) to provide a short-circuit path for the second harmonic of the fundamental frequency, e.g., at 4.0 GHz within the exemplary fundamental frequency range. That is, the second harmonic termination can be designed to terminate RF signals in this frequency range such that the second harmonic does not appear at the RF output port 104 .
[0057] According to one embodiment, the second harmonic termination circuit 126 may include a second inductor 132 and a second capacitor 134. The second inductor 132 and the second capacitor 134 may be in parallel with each other along the parallel branch 120 of the impedance matching circuit. The second inductor 132 and the second capacitor 134 may thereby form a second parallel LC resonator. The parameters of the second LC resonator, i.e., the capacitance of the second capacitor 134 and the inductance of the second inductor 132, may be adjusted to provide a low impedance path for the second harmonic between the output terminal 112 and the reference potential terminal 114 of the RF amplifier device 108. This adjustment of the parameters of the second LC resonator takes into account the collective effect of other reactance values of the output impedance matching network 116, including the first inductor 130 and the first parallel LC resonator, including the inherent capacitance of the RF amplifier device 108. As is commonly known, a parallel resonant circuit becomes more capacitive as the frequency value increases above the resonant frequency, and becomes more inductive as the frequency value decreases below the resonant frequency. Using this principle, the resonant frequency of the second parallel LC resonator can be adjusted so that the second parallel LC resonator becomes relatively more inductive or capacitive at the second harmonic in order to compensate for other reactance components, such as the first parallel resonator, in the transmission path between the output terminal 112 of the RF amplifier and the reference potential terminal 114. That is, the parameters of the second parallel LC resonator can be selected so that the output impedance matching network 116 provides a short circuit of the RF at the output terminal 112 of the RF amplifier at the second harmonic of the fundamental frequency, such as 4.0 GHz.
[0058] The baseband termination circuit 122 can be tuned to provide a low impedance in the baseband frequency region, which is below the RF frequency range. Suppressing these lower frequency values can reduce the effects of inter-modulation-distortion (IMD) over the baseband frequency range, thereby increasing the linear efficiency of the RF power amplifier (RFPA) circuit 100. The parameters (e.g., capacitance and inductance) of the baseband termination circuit 122 are selected such that the impedance matching circuit suppresses these lower frequency values. That is, the baseband termination circuit 122 provides a low impedance path (from an RF perspective) from the output terminal 112 to the reference potential terminal 114 of the RF amplifier device 108 for frequencies within this range.
[0059] According to one embodiment, the baseband termination circuit 122 may include a first resistor 136, a third inductor 138, and a third capacitor 140. Each of these components is connected to a second branch 142 of the output impedance matching network 116. The second branch 142 of the output impedance matching network 116 may be connected between a first node 143 that directly connects the first capacitor 128 to the second parallel LC resonator and a reference potential port. The parameter values (i.e., resistance values, inductances, and capacitances) of the components of the baseband termination circuit 122 are selected to provide a low impedance response over a wideband baseband frequency range. The parameters of the third inductor 138 and the third capacitor 140 may be selected such that, using a baseband frequency range of 400 MHz as an example, these components, together with other components of the impedance matching circuit, form a low impedance path from the output terminal 112 of the RF amplification device 108 to the reference potential terminal 114. By adjusting the resistance value of the first resistor 136, the impedance response of the baseband termination circuit 122 is flattened to provide better performance over a wideband frequency range, i.e., the first resistor 136 is used to make the impedance response of the baseband termination circuit 122 less frequency dependent.
[0060] Optionally, the output impedance matching network 116 may include a fourth inductor 144, which may be connected between the series branch 118 and a DC terminal 145 of the RF power amplifier (RFPA) circuit 100. The fourth inductor 144 may be configured as an RF choke, i.e., a device that transmits lower frequency values while blocking higher frequency values. This RF choke may be used in conjunction with the first resistor 136, the third inductor 138, and the third capacitor 140 to provide a low impedance in the baseband frequency range.
[0061] FIG. 6 illustrates a partial top view of a packaged RF power amplifier (RFPA) according to the present disclosure.
[0062] FIG. 7 includes FIG. 7A, which shows a cross-sectional view of a package according to one embodiment of the disclosure, and FIG. 7 further includes FIG. 7B, which shows a cross-sectional view of a package according to another embodiment of the disclosure.
[0063] 6 and 7, a packaged RF amplifier 200 is shown according to one embodiment. In one embodiment shown in FIG. 6, the packaged RF amplifier 200 may contain and / or implement two RF power amplifier (RFPA) circuits 100 described herein disposed next to each other. In another embodiment shown in FIG. 8, the packaged RF amplifier 200 may contain and / or implement one of the RF power amplifier (RFPA) circuits 100.
[0064] The packaged RF amplifier 200 may include a metal flange 202 that may be configured to interface with another device, such as a printed circuit board (PCB) that may utilize a printed circuit board (PCB) manufacturing process. The PCB may be a single layer PCB configuration, a multi-layer PCB configuration, etc.
[0065] The packaged RF amplifier 200 may include a pair of conductive input leads 204 that may extend away from a first side of the metal flange 202 and a pair of conductive output leads 206 that may extend away from a second side of the metal flange 202 in an opposite direction to the conductive input leads 204. The conductive input leads 204 may realize and / or implement the input port 102 of the amplifier circuit 100 described herein, and the conductive output leads 206 may realize and / or implement the RF output port 104 of the amplifier circuit 100 described herein. Optionally, the packaged RF amplifier 200 may be implemented to include a separately implemented DC bias lead 208 that extends away from a side of the packaged RF amplifier 200 adjacent the conductive output leads 206.
[0066] The packaged RF amplifier 200 can be implemented with an electrically insulating window frame 210. The electrically insulating window frame 210 can be formed around a metal flange 202. The electrically insulating window frame 210 can insulate the conductive input lead 204 and the conductive output lead 206 from the metal flange 202. A central portion of the metal flange 202 can be exposed from the insulating window frame 210. This exposed portion of the metal flange 202 can include a conductive die pad 212 for mounting an integrated circuit device on the exposed portion. The metal flange 202 can include a thermally and electrically conductive material (e.g., copper, aluminum, etc.) such that the conductive die pad 212 can provide both a reference potential connection (e.g., a GND terminal) and a heat sink that can be configured to carry heat away from an integrated circuit device mounted on the conductive die pad 212.
[0067] The packaged RF amplifier 200 can include RF transistors 214 mounted on a metal flange 202. These RF transistors 214 realize and / or implement the RF amplifier devices 108 previously described in the RF power amplifier (RFPA) circuit 100 of Figure 1. The RF transistors 214 can be configured as power transistors such as MOSFETs (metal-oxide semiconductor field-effect transistors), DMOS (double-diffused metal-oxide semiconductor) transistors, GaN HEMTs (gallium nitride high electron mobility transistors), GaN MESFETs (gallium nitride metal-semiconductor field-effect transistors), LDMOS transistors, or more generally, any type of RF transistor device.
[0068] The RF transistor 214 may include conductive input, output, and reference potential terminals. In the illustrated embodiment, the reference potential terminal is located on a bottom side of the RF transistor 214. The reference potential terminal may be directly opposite the die pad 212 and may be electrically connected to the die pad 212, for example, using a conductive paste. The input and output terminals of the RF transistor 214 may be located on a top side of the RF transistor 214, opposite the reference potential terminal.
[0069] The packaged RF amplifier 200 may include an output impedance matching network 116, previously described with reference to Figure 1, connected between the output terminal of the RF transistor and the conductive output lead 206. In one embodiment, most of the passive components of the output impedance matching network 116 may be realized by an IPD (integrated passive device). The underside of the IPD may include a reference potential terminal 114, which may be attached to the die pad 212 in a manner similar to that previously described with respect to the RF transistor 214.
[0070] Generally speaking, the term IPD refers to an integrated circuit that may be semiconductor-based and includes several passive devices integrally formed within the IC and connected to the terminals of the IC. Custom circuit topologies can be realized with IPDs. A variety of different structures are fabricated within the device to achieve the required frequency response of specific passive components (e.g., capacitors, inductors, etc.). Examples of these structures include parallel plate capacitors, radial stubs, transmission lines, etc.
[0071] In the illustrated embodiment, the first set of conductive bond wires 218 may be electrically connected directly between the output terminal of the RF transistor 214 and the conductive output leads 206. The second set of conductive bond wires 220 may be electrically connected directly between the output terminal of the RF transistor 214 and the output impedance match network 116. The third set of conductive bond wires 222 may be connected directly between the conductive output leads 206 and the DC bias lead 208.
[0072] The fourth set of bond wires 226 are electrically connected between the conductive input leads 204 and the input impedance matching network 146. The fifth set of bond wires 228 are electrically connected between the input impedance matching network 146 and an input terminal of the baseband impedance enhancement circuit 190. The sixth set of bond wires 224 can electrically connect the input impedance matching network 146 to the RF transistor 214.
[0073] The packaged RF amplifier 200 can be implemented to include an open cavity configuration suitable for use with the output impedance matching network 116, the RF transistor 214, the input impedance matching network 146, and / or the baseband impedance enhancement circuit 190 of the present disclosure. In particular, the open cavity configuration can utilize an open cavity package design. In some aspects, the open cavity configuration can include a lid 308 or other housing that protects the interconnects, circuit components, the output impedance matching network 116, the RF transistor 214, the input impedance matching network 146, the baseband impedance enhancement circuit 190, etc. The packaged RF amplifier 200 can include a ceramic body and / or the lid 308 can be made of a ceramic material. In one aspect, the ceramic material may include aluminum oxide (Al2O3). In one aspect, the lid 308 may be attached to the electrically insulating window frame 210 using an adhesive. In one aspect, the adhesive may be epoxy-based.
[0074] Within the packaged RF amplifier 200, the output impedance matching network 116, the RF transistor 214, the input impedance matching network 146, and / or the baseband impedance enhancement circuit 190 can be attached to the metal flange 202 via a die attach material. The electrically insulating window frame 210 can be configured to isolate the source, gate, and drain of the RF transistor 214. The electrically insulating window frame 210 can be configured to be more cost-effective, provide a better coefficient of thermal expansion (CTE) match with the metal flange 202, and allow for high flexibility in both straight-lead and surface-mounted lead configurations. The electrically insulating window frame 210 can also be configured to be rigid and therefore more stable and less prone to bending.
[0075] The metal flange 202 may be made of a conductive material such as copper (Cu), copper molybdenum, copper laminate, copper tungsten (CuW), etc., and may have a CTE that closely matches the CTE of the electrically insulating window frame 210. The source side of the RF transistor 214 may be attached to the inner die attach region of the metal flange 202 as described herein by adhesive, soldering, sintering, eutectic bonding, thermocompression bonding, ultrasonic bonding / welding, etc. The source side of the RF transistor 214 may specifically be electrically connected to the metal flange 202.
[0076] The electrically insulating window frame 210 may include conductive paths, tracks, or signal traces etched from a laminated, embedded, and / or otherwise attached copper sheet. The electrically insulating window frame 210 may be attached to an outer perimeter region of the metal flange 202. The electrically insulating window frame 210 may have openings 306 for receiving the output impedance matching network 116, the RF transistor 214, the input impedance matching network 146, the baseband impedance enhancement circuit 190, etc., which may be attached to the inner die attach region of the metal flange 202.
[0077] The electrically insulating window frame 210 can have a bottom surface that can be attached to the perimeter region of the metal flange 202. In one embodiment, the electrically insulating window frame 210 can have a bottom surface that can be attached to the perimeter region using a conductive adhesive. In one embodiment, the electrically insulating window frame 210 can have a bottom surface that can be attached to the perimeter region using an intervening ceramic structure 578, as shown in FIG. 7B. In one embodiment, the intervening ceramic structure 578 can include a ceramic material, such as aluminum oxide (Al2O3). In one embodiment, the intervening ceramic structure 578 can be plated with one or more metals, including copper, gold, the like, and combinations thereof.
[0078] The metal flange 202 can dissipate heat generated by the output impedance matching network 116, the RF transistor 214, the input impedance matching network 146, and / or the baseband impedance boost circuit 190. The metal flange 202 can be implemented as a metal submount and can be implemented as a support, surface, package support, package surface, package support surface, flange, metal flange, heat sink, common source support, common source surface, common source package support, common source package surface, common source package support surface, common source flange, common source heat sink, lead frame, metal lead frame, etc. The metal flange 202 can include an insulating material, a dielectric material, etc.
[0079] Another embodiment of the packaged RF amplifier 200 may include an overmolded configuration that may substantially surround the RF transistor 214 mounted on the metal flange 202. The overmolded configuration may be formed of a plastic or plastic polymer that is injection molded around the metal flange 202, the output impedance matching network 116, the RF transistor 214, the input impedance matching network 146, and / or the baseband impedance enhancement circuit 190, thereby providing protection from the external environment.
[0080] In one aspect, the overmolded configuration may substantially enclose the output impedance matching network 116, the RF transistor 214, the input impedance matching network 146, and / or the baseband impedance enhancement circuitry 190. The overmolded configuration may be formed of plastic, molding compound, plastic compound, polymer, polymer compound, plastic-polymer compound, etc. The overmolded configuration may be injection or compression molded around the output impedance matching network 116, the RF transistor 214, the input impedance matching network 146, the baseband impedance enhancement circuitry 190, and / or other components of the packaged RF amplifier 200 from the external environment.
[0081] Specifically, the packaged RF amplifier 200 may be implemented as a Doherty circuit with one of the RF power amplifier (RFPA) circuits 100 implemented, at least in part, as a carrier amplifier and another of the RF power amplifier (RFPA) circuits 100 implemented as a peak amplifier. Specifically, the packaged RF amplifier 200 may include a carrier amplifier and a peak amplifier, where the packaged RF amplifier 200 is configured to power combine the outputs of the carrier amplifier and the peak amplifier. In one embodiment, the two amplifiers may be biased separately. In one embodiment, the carrier amplifier may operate in normal class AB or class B. In one embodiment, the peak amplifier may operate in class C. Other operating classes are also contemplated.
[0082] The packaged RF amplifier 200 may be implemented to have a housing, an open cavity configuration, an overmolded configuration, etc. In this regard, the packaged RF amplifier 200 may be implemented to include a housing. In particular, the housing may include a lid or other enclosure to protect the interconnects, circuit components, etc.
[0083] Alternatively, the packaged RF amplifier 200 may be implemented to have an open cavity configuration. In particular, the open cavity configuration may utilize an open cavity package design. In some aspects, the open cavity configuration may include a lid or other enclosure to protect the interconnects, circuit components, and the like.
[0084] Alternatively, the packaged RF amplifier 200 may be implemented to include an overmolded configuration. In one aspect, the overmolded configuration may substantially surround the components. The overmolded configuration may be formed of plastic, molding compound, plastic compound, polymer, polymer compound, plastic-polymer compound, etc. The overmolded configuration may be injection or compression molded around the components, thereby providing protection for the packaged RF amplifier 200 components from the external environment.
[0085] FIG. 8 illustrates a partial top view of a packaged RF power amplifier (RFPA) according to the present disclosure.
[0086] 8 specifically illustrates a single implementation of RF power amplifier (RFPA) circuit 100 and / or RF transistor 214 of packaged RF amplifier 200. Additionally, FIG. 8 illustrates packaged RF amplifier 200 implementing baseband impedance enhancement circuit 190 offset from an axis (y-axis as referenced in the figure) with output impedance matching network 116, RF transistor 214, input impedance matching network 146, conductive output lead 206, and / or conductive input lead 204. FIG. 6, on the other hand, illustrates packaged RF amplifier 200 implementing baseband impedance enhancement circuit 190 along the same axis (y-axis as referenced in the figure) with output impedance matching network 116, RF transistor 214, input impedance matching network 146, conductive output lead 206, and / or conductive input lead 204.
[0087] In one or more aspects, the RF transistor 214, the output impedance matching network 116, the input impedance matching network 146, and / or the baseband impedance enhancement circuit 190 may be implemented as an integrated circuit. Specifically, each of the RF transistor 214, the output impedance matching network 116, the input impedance matching network 146, and / or the baseband impedance enhancement circuit 190 may be implemented as an active area within an integrated circuit. In one aspect, the RF transistor 214, the output impedance matching network 116, the input impedance matching network 146, and / or the baseband impedance enhancement circuit 190 may be implemented as a monolithic microwave integrated circuit (MMIC).
[0088] FIG. 9 is an enlarged partial schematic diagram of an embodiment of a transistor amplifier according to the present disclosure.
[0089] FIG. 10 is a schematic cross-sectional view taken along line XX in FIG.
[0090] 9, the RF amplifier device 108 and / or the RF transistor 214 may include a gate bus 402 that may be connected to multiple gate fingers 406, which may extend in parallel in a first direction (e.g., the x-direction shown in FIG. 9). A source bus 410 may be connected to multiple parallel ones of the source contacts 416. The source bus 410 may be connected to a ground voltage node on the underside of the RF amplifier device 108 and / or the RF transistor 214. A drain bus 420 may be connected to multiple drain contacts 426.
[0091] As can be seen in FIG. 9 , each gate finger 406 can extend along the X-direction between a pair of adjacent source and drain contacts 416 and 426. The RF amplifier device 108 or RF transistor 214 can include a plurality of unit cells 430, each of which can include an individual transistor. One of the plurality of unit cells 430 is illustrated by a dashed box in FIG. 9 and includes a gate finger 406 that can extend between adjacent source and drain contacts 416 and 426. A “gate width” can refer to the distance that a gate finger 406 overlaps with its associated one of the source and drain contacts 416 and 426 in the X-direction. That is, the “width” of a gate finger 406 refers to the dimension (distance along the z-direction) of the gate finger 406 that extends in parallel to adjacent source / drain contacts 416 and 426. Each of the plurality of unit cells 430 may share one of the source contacts 416 and / or drain contacts 426 with one or more adjacent unit cells of the plurality of unit cells 430. Although a particular number of the plurality of unit cells 430 is shown in FIG. 9, it will be understood that the RF amplifier device 108 and / or the RF transistor 214 may include more or fewer unit cells 430.
[0092] 10, the RF amplifier device 108 and / or the RF transistor 214 may comprise a semiconductor structure 440 including a substrate 422 that may include, for example, 4H-SiC or 6H-SiC. A channel layer 490 may be disposed on the substrate 422, and a barrier layer 470 may be disposed on the channel layer 490 such that the channel layer 490 is between the substrate 422 and the barrier layer 470. The channel layer 490 and the barrier layer 470 may include III-nitride based materials, with the material of the barrier layer 470 having a wider bandgap than the material of the channel layer 490. The channel layer 490 may include, for example, GaN, while the barrier layer 470 may include AlGaN.
[0093] Due to the band gap difference between the barrier layer 470 and the channel layer 490, and the piezoelectric effect at the interface between the barrier layer 470 and the channel layer 490, a two-dimensional electron gas (2DEG) is induced in the channel layer 490 at the junction between the channel layer 490 and the barrier layer 470. The 2DEG acts as a highly conductive layer that allows conduction between the source and drain regions of the device, which may be below the source and drain contacts 416 and 426, respectively. The source and drain contacts 416 and 426 may be on the barrier layer 470. The gate finger 406 may be on the barrier layer 470 and between the source and drain contacts 416 and 426. Although the gate finger 406, source contact 416, and drain contact 426 are all shown in FIG. 9 as having the same “length”, it will be understood that the gate finger 406 may actually be substantially shorter than the length of the source and drain contacts 416 and 426. It will also be appreciated that the source and drain contacts 426 do not have to have the same length.
[0094] The material of the gate fingers 406 may be selected based on the composition of the barrier layer 470. However, in certain embodiments, materials that allow for making Schottky contacts to nitride-based semiconductor materials include Ni, Pt, NiSiX Materials such as TiN, Cu, Pd, Cr, W, and / or WSiN can be used. The source contact 416 and the drain contact 426 can include a metal, such as TiAlN, that can form an ohmic contact to GaN.
[0095] The RF amplifier device 108 and / or the RF transistor 214 may include a metallization layer disposed on a bottom surface of the substrate 422. The metallization layer may be disposed in a plane generally parallel to the z-axis and / or the x-axis. In an embodiment, the metallization layer may be implemented as a metallization layer on the entire bottom surface of the substrate 422. The RF amplifier device 108 and / or the RF transistor 214 may include features such as separate wires, tracks, circuit traces, connecting pads, vias for connecting between layers of aluminum, copper, silver, gold, etc., and solid conductive areas for EM shielding or other purposes.
[0096] The RF amplifier devices 108 may be implemented as field-effect transistors (FETs), metal-oxide-semiconductor field-effect transistors (MOSFETs), laterally diffused MOSFETs (LDMOS), Gallium Nitride (GaN) MOSFETs, GaN laterally diffused MOSFETs (LDMOS), transistors implemented as amplifiers, GaN high-electron-mobility transistors (HEMTs), GaN metal-semiconductor field-effect transistors (MESFETs), bipolar transistors, discrete devices, Doherty configurations, any devices utilizing bias feeds, etc. Additionally, more than one RF amplifier device 108 may be included in the RF power amplifier (RFPA) circuit 100 and connected in parallel. In this regard, multiple RF amplifier devices 108 may utilize the same type of transistors and / or multiple RF amplifier devices 108 may utilize different types of transistors.
[0097] In one embodiment, the RF amplifier device 108 may be implemented as a high power transistor. In one embodiment, the RF amplifier device 108 may be implemented as a high power laterally diffused MOSFET (LDMOS), a high power Gallium Nitride (GaN) MOSFET, a high power GaN laterally diffused MOSFET (LDMOS), a high power GaN high electron mobility transistor (HEMT), and / or a high power GaN metal semiconductor field effect transistor (MESFET).
[0098] In one embodiment, the RF amplifier device 108 may be implemented as a high frequency transistor. In one embodiment, the RF amplifier device 108 may be implemented as a high frequency laterally diffused MOSFET (LDMOS), a high frequency Gallium Nitride (GaN) MOSFET, a high frequency GaN laterally diffused MOSFET (LDMOS), a high frequency GaN high electron mobility transistor (HEMT), and / or a high frequency GaN metal semiconductor field effect transistor (MESFET).
[0099] In one embodiment, the RF amplifier device 108 may be implemented as a high power high frequency transistor. In one embodiment, the RF amplifier device 108 may be implemented as a high power high frequency laterally diffused MOSFET (LDMOS), a high power high frequency Gallium Nitride (GaN) MOSFET, a high power high frequency GaN laterally diffused MOSFET (LDMOS), a high power high frequency GaN high electron mobility transistor (HEMT), and / or a high power high frequency GaN metal semiconductor field effect transistor (MESFET).
[0100] High power is defined herein as a peak power of 10W to 2kW, a peak power of 100W to 500W, a peak power of 500W to 1kW, a peak power of 1kW to 1.5kW, or a peak power of 1.5kW to 2kW; and / or high power is defined herein as a peak power of greater than 10W, a peak power of greater than 500W, a peak power of greater than 1kW, a peak power of greater than 1.5kW, or a peak power of greater than 2kW.
[0101] Here, radio frequency is defined as a frequency between 0.4 GHz and 6 GHz, between 1.4 GHz and 1.6 GHz, between 1.8 GHz and 2.7 GHz, between 1 GHz and 2 GHz, between 2 GHz and 3 GHz, between 3 GHz and 4 GHz, between 4 GHz and 5 GHz, or between 5 GHz and 6 GHz, and / or radio frequency is defined as a frequency greater than 1.4 GHz, greater than 1.8 GHz, greater than 2 GHz, greater than 3 GHz, greater than 4 GHz, greater than 5 GHz, or less than 6 GHz.
[0102] As described herein, the present disclosure describes an embodiment of the RF power amplifier (RFPA) circuit 100 and / or packaged RF amplifier 200 including a baseband impedance enhancement circuit 190. As disclosed herein, the baseband impedance enhancement circuit 190 can be configured to improve the baseband impedance of the RF power amplifier (RFPA) circuit 100. Alternatively or additionally, the baseband impedance enhancement circuit 190 may be configured to achieve improved digital pre-distortion (DPD) operation of the RF power amplifier (RFPA) circuit 100 and / or the RF amplifier device 108. In one aspect, the baseband impedance enhancement circuit 190 can be configured to reduce resonance of the baseband termination. In one aspect, the baseband impedance enhancement circuit 190 can be configured to push and / or move the resonance of the baseband termination to a higher frequency.
[0103] Specifically, as described herein, being connected can include bonding or connecting, which can include leads as described herein, wire bonds, adhesives, soldering, sintering, eutectic bonds, thermocompression bonds, ultrasonic bonds / welds, clip parts, etc. The connection may be through an intervening structure or part, or the connection may be a direct connection.
[0104] The adhesives of the present disclosure can be utilized in adhesive bonding processes that may include connecting the surfaces to be connected with an intermediate layer. The adhesives may be organic or inorganic, and the adhesives may be applied to one or both surfaces of the surfaces to be connected. The adhesives can be utilized in adhesive bonding processes that may include applying a specific coating thickness of adhesive material at a specific bonding temperature for a specific processing time in an environment that may include applying pressure with a specific tool. In one aspect, the adhesives may be conductive adhesives, epoxy-based adhesives, conductive epoxy-based adhesives, and the like.
[0105] The solders of the present disclosure can be utilized to form a solder interface that may include and / or be formed with solder. The solder may be any fusible alloy that can be used to form a joint between surfaces to be joined. The solder may be lead-free, lead solder, eutectic solder, and the like. Lead-free solders may include tin, copper, silver, bismuth, indium, zinc, antimony, trace amounts of other metals, and the like. Lead solders may include other metals such as lead, tin, silver, and the like. The solder may further include a flux, if desired.
[0106] Sintering of the present disclosure may utilize a process that condenses and forms a solid mass of material through heat and / or pressure. The sintering process may occur without melting the material to a liquidus point. The sintering process may include sintering of metal powders. The sintering process may include sintering in a vacuum. The sintering process may include sintering using a protective gas.
[0107] The eutectic bond of the present disclosure may utilize a bonding process with an intermediate metal layer capable of forming a eutectic system. The eutectic system may be used between the surfaces to be connected. The eutectic bond may utilize a eutectic metal, which may be an alloy that changes from a solid state to a liquid state or from a liquid state to a solid state without going through a two-phase equilibrium at a certain composition and temperature. The eutectic alloy may be deposited by sputtering, dual source deposition, electroplating, etc.
[0108] Ultrasonic welding of the present disclosure can utilize a process of locally applying high frequency ultrasonic acoustic vibrations to parts that are being held together under pressure. Ultrasonic welding can create a solid weld between the surfaces to be joined. In one aspect, ultrasonic welding can include the application of ultrasonic forces.
[0109] Any one or more components of the packaged RF amplifier 200 may be disposed on one or more metallization layers, such as an electrically insulating window frame 210. The one or more metallization layers may include utilizing one or more manufacturing techniques, including processes such as print screening of solder paste, print screening of epoxy, silk screen printing processes, photolithography processes, printing processes on transparent films, photomask processes combined with etching processes, photosensitive substrate processes, laser resist ablation processes, milling processes, laser etching processes, direct metal printing processes, and the like.
[0110] In certain aspects, the RF power amplifier (RFPA) circuit 100 and / or packaged RF amplifier 200 of the present disclosure can be utilized in a wireless base station that connects to a wireless device. In further aspects, the RF power amplifier (RFPA) circuit 100 and / or packaged RF amplifier 200 of the present disclosure can be utilized in an amplifier implemented in a wireless base station that connects to a wireless device. In further aspects, the RF power amplifier (RFPA) circuit 100 and / or packaged RF amplifier 200 of the present disclosure can be utilized in a wireless device. In further aspects, the RF power amplifier (RFPA) circuit 100 and / or packaged RF amplifier 200 of the present disclosure can be utilized in an amplifier implemented in a wireless device.
[0111] It should be understood that in this disclosure, references to wireless devices are intended to encompass electronic devices such as mobile phones, tablet computers, gaming systems, MP3 players, personal computers, PDAs, user equipment (UE), and the like. A "wireless device" is also intended to encompass any compatible mobile technology computing device capable of connecting to a wireless communication network, such as a mobile phone, a portable device, a mobile station, a user equipment, a cellular telephone, a smartphone, a handset, a wireless dongle, a remote notification device, an Internet of things (IoT)-based wireless device, or other wireless network-enabled mobile computing device. A wireless device may utilize wireless communication technologies such as GSM, CDMA, wireless local loop, Wi-Fi, WiMAX, other wide area network (WAN) technologies, 3G technologies, 4G technologies, 5G technologies, LTE technologies, and the like.
[0112] It should be understood that in this disclosure, references to wireless base stations are intended to cover base transceiver stations (BTS), Node B devices, Base Station (BS) devices, Evolved Node B devices, etc. that facilitate wireless communication between wireless devices and the network. The wireless base stations and / or networks may utilize wireless communication technologies such as GSM, CDMA, wireless local loop, Wi-Fi, WiMAX, other wide area network (WAN) technologies, 3G technologies, 4G technologies, 5G technologies, LTE technologies, etc.
[0113] While the present disclosure has been described with respect to exemplary embodiments, those skilled in the art will recognize that the disclosure can be practiced with modification within the spirit and scope of the appended claims. The examples provided above are merely illustrative and are not meant to be an exhaustive list of all possible designs, embodiments, applications, or variations of the present disclosure.
Claims
1. 1. An amplifier comprising: an input matching network; at least one transistor; an input lead coupled to said at least one transistor; a ground terminal coupled to the transistor; an output lead coupled to the at least one transistor; an output matching circuit coupled to the output lead and to the at least one transistor; a baseband impedance enhancement circuit having at least one reactive element coupled to the input matching network; Equipped with The baseband impedance enhancement circuit is configured to reduce resonance of a baseband termination; the at least one reactive element of the baseband impedance enhancement circuit includes an inductor, a capacitor, and a reference potential port; the input matching network includes a reactive element including a capacitor, and the at least one reactive element of the baseband impedance enhancement circuit is coupled between the reactive elements of the input matching network upstream of the capacitor. amplifier.
2. the baseband impedance enhancement circuit is configured to achieve improved digital pre-distortion (DPD) operation; 2. The amplifier of claim 1.
3. The at least one reactance element of the baseband impedance enhancement circuit includes the inductor and the capacitor connected in series to the reference potential port, The amplifier incorporating the baseband impedance enhancement circuit is configured to operate at an impedance of less than 2 ohms over at least a frequency range of 1 MHz to 150 MHz.
2. The amplifier of claim 1.
4. The amplifier of claim 1 , wherein the at least one transistor comprises a GaN-based transistor.
5. The amplifier of claim 1 , wherein the at least one transistor comprises an LDMOS-based transistor.
6. the at least one transistor includes a transistor implemented as a carrier amplifier; the at least one transistor comprises a transistor implemented as a peak amplifier; 2. The amplifier of claim 1.
7. A metal flange, a first conductive lead, a second conductive lead, and a conductive die pad The amplifier of claim 1 further comprising:
8. A process for implementing an amplifier, comprising: providing an input matching network; providing at least one transistor; coupling an input lead to the at least one transistor; coupling a ground terminal to the transistor; coupling an output lead to the at least one transistor; coupling an output matching circuit to the output lead and to the at least one transistor; coupling a baseband impedance enhancement circuit having at least one reactive element to the input matching network; Including, The baseband impedance enhancement circuit is configured to reduce resonance of a baseband termination; the at least one reactive element of the baseband impedance enhancement circuit includes an inductor, a capacitor, and a reference potential port; the input matching network includes a reactive element including a capacitor, and the at least one reactive element of the baseband impedance enhancement circuit is coupled between the reactive elements of the input matching network upstream of the capacitor. The process of implementing an amplifier.
9. the baseband impedance enhancement circuit is configured to achieve improved digital pre-distortion (DPD) operation; A process for implementing the amplifier of claim 8.
10. The at least one reactance element of the baseband impedance enhancement circuit includes the inductor and the capacitor connected in series to the reference potential port, The amplifier incorporating the baseband impedance enhancement circuit is configured to operate at an impedance of less than 2 ohms over at least a frequency range of 1 MHz to 150 MHz. A process for implementing the amplifier of claim 8.
11. the at least one transistor comprises a GaN-based transistor; the baseband impedance enhancement circuit is configured to improve a baseband impedance; A process for implementing the amplifier of claim 8.
12. The process for implementing an amplifier as recited in claim 8 , wherein the at least one transistor comprises an LDMOS-based transistor.
13. implementing the at least one transistor includes implementing a transistor as a carrier amplifier; implementing the at least one transistor includes implementing a transistor as a peak amplifier; and 10. A process for implementing the amplifier of claim 8, further comprising:
14. 1. An amplifier comprising: an input matching network; at least one transistor; an input lead coupled to said at least one transistor; a ground terminal coupled to the transistor; an output lead coupled to the at least one transistor; an output matching circuit coupled to the output lead and to the at least one transistor; a baseband impedance enhancement circuit having at least one reactive element coupled to the input matching network; Equipped with the input matching network includes at least one reactive element coupled to the at least one reactive element of the baseband impedance enhancement circuit; The baseband impedance enhancement circuit is configured to reduce resonance of a baseband termination; the at least one reactive element of the baseband impedance enhancement circuit includes an inductor, a capacitor, and a reference potential port; the input matching network includes a reactive element including a capacitor, and the at least one reactive element of the baseband impedance enhancement circuit is coupled between the reactive elements of the input matching network upstream of the capacitor; the baseband impedance enhancement circuit is configured to achieve improved digital pre-distortion (DPD) operation; amplifier.
15. 15. The amplifier of claim 14, wherein the amplifier implementing the baseband impedance enhancement circuit is configured to operate with an impedance of less than 2 ohms in at least the frequency range of 1 MHz to 150 MHz.
16. The amplifier of claim 14 , wherein the at least one transistor comprises a GaN-based transistor.
17. The amplifier of claim 14 , wherein the at least one transistor comprises an LDMOS-based transistor.
18. the at least one transistor includes a transistor implemented as a carrier amplifier; the at least one transistor comprises a transistor implemented as a peak amplifier; 15. The amplifier of claim 14.
19. A metal flange, a first conductive lead, a second conductive lead, and a conductive die pad The amplifier of claim 14 further comprising:
20. The at least one reactance element of the baseband impedance enhancement circuit includes the inductor and the capacitor connected in series to the reference potential port.
15. The amplifier of claim 14.
Citation Information
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