Composite Electronic Components

Abstract

A composite electronic component 100 in which a plurality of circuit layers including electronic components are layered is provided with: a first circuit layer 10; a second circuit layer 20; a ceramic electronic component 30 that is disposed between the first circuit layer 10 and the second circuit layer 20 and that has a plurality of via electrodes 32 exposed on a principal surface on one side and a principal surface on the other side as a result of passing through a body the principal constituent of which is ceramic; and a seal resin 40 provided so as to cover at least the ceramic electronic component 30 between the first circuit layer 10 and the second circuit layer 20. At least one electronic component 12 included in the first circuit layer 10 and at least one electronic component 22 included in the second circuit layer 20 are electrically connected by means of the via electrodes 32 of the ceramic electronic component 30.

Description

[Technical field]

[0001] The present invention relates to a composite electronic component in which a plurality of circuit layers are laminated. [Background technology]

[0002] 2. Description of the Related Art Composite electronic components are known in which a plurality of circuit layers each including electronic components and wiring are laminated.

[0003] As one such composite electronic component, Patent Document 1 discloses a package-on-package device 200 in which three semiconductor packages, a first semiconductor package (first circuit layer) 201, a second semiconductor package (second circuit layer) 202, and a third semiconductor package (third circuit layer) 203, are stacked as shown in Fig. 7. Each of the semiconductor packages 201, 202, and 203 has a structure in which a semiconductor chip 220 is mounted on a package substrate 210, and the periphery of the semiconductor chip 220 is covered with resin 230. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2013-143570 A Summary of the Invention [Problem to be solved by the invention]

[0005] However, in the package-on-package device 200 described in Patent Document 1, electrical connections between the first semiconductor package 201 and the second semiconductor package 202, and between the second semiconductor package 202 and the third semiconductor package 203 are made by solder bumps 240, respectively, so that the connection resistance cannot be said to be low and there is room for improvement.

[0006] The present invention is devised to solve the above-mentioned problems, and has an object to provide a composite electronic component capable of reducing the connection resistance between a plurality of stacked circuit layers. [Means for solving the problem]

[0007] The composite electronic component of the present invention is a composite electronic component in which a plurality of circuit layers including electronic components are laminated, a first circuit layer; a second circuit layer; a ceramic electronic component disposed between the first circuit layer and the second circuit layer, the ceramic electronic component having a plurality of via electrodes penetrating a body whose main component is ceramic and exposed on one main surface and the other main surface, respectively; a sealing resin provided between the first circuit layer and the second circuit layer so as to cover at least the ceramic electronic component; Equipped with At least one electronic component included in the first circuit layer and at least one electronic component included in the second circuit layer are electrically connected by the via electrodes of the ceramic electronic components. Effect of the Invention

[0008] According to the composite electronic component of the present invention, a ceramic electronic component having a plurality of via electrodes penetrating the body and exposed on one main surface and the other main surface is disposed between a first circuit layer and a second circuit layer, and at least one electronic component included in the first circuit layer and at least one electronic component included in the second circuit layer are electrically connected by the via electrodes of the ceramic electronic component. In other words, since the electrical connection is established by the via electrodes of the ceramic electronic component without using solder bumps, the connection resistance can be reduced. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a cross-sectional view showing a schematic configuration of a composite electronic component according to an embodiment. [Diagram 2]FIG. 1 is a plan view illustrating a schematic configuration of a ceramic electronic component. [Diagram 3] 3 is a cross-sectional view taken along line III-III of the ceramic electronic component shown in FIG. 2. [Figure 4] 5(a) to 5(e) are diagrams illustrating an example of a manufacturing method for a composite electronic component according to an embodiment. [Diagram 5] 4(a) to 4(d) are diagrams for explaining an example of a method for manufacturing a composite electronic component according to an embodiment, following FIG. 4(e). [Figure 6] 1A and 1B are diagrams showing the results of a simulation of the degree of deformation when a composite electronic component is cooled from 150°C to 25°C, where (a) is a perspective view of a composite electronic component in one embodiment, (b) is a perspective view of a comparative composite electronic component in which a ceramic electronic component is not disposed between two circuit layers, (c) is a cross-sectional view of the composite electronic component in one embodiment, and (d) is a cross-sectional view of the comparative composite electronic component. [Figure 7] 1 is a cross-sectional view showing a schematic configuration of a package-on-package device described in Patent Document 1. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The composite electronic component of the present invention has a structure in which a plurality of circuit layers each including an electronic component are laminated.

[0011] 1 is a cross-sectional view showing a schematic configuration of a composite electronic component 100 in one embodiment. The composite electronic component 100 in one embodiment includes a first circuit layer 10, a second circuit layer 20, a ceramic electronic component 30 disposed between the first circuit layer 10 and the second circuit layer 20, and a sealing resin 40 provided between the first circuit layer 10 and the second circuit layer 20 so as to cover at least the ceramic electronic component 30. That is, the composite electronic component 100 in this embodiment has a three-layer structure in which the first circuit layer 10, the ceramic electronic component 30, and the second circuit layer 20 are laminated in this order.

[0012] The first circuit layer 10 and the second circuit layer 20 each include wiring and electronic components. Specifically, the first circuit layer 10 includes a first wiring 11 and a first electronic component 12. The second circuit layer 20 includes a second wiring 21 and a second electronic component 22. Although two first electronic components 12 are shown in FIG. 1, there is no particular restriction on the number of first electronic components 12 included in the first circuit layer 10. Similarly, although one second electronic component 22 is shown in FIG. 1, there is no particular restriction on the number of second electronic components 22 included in the second circuit layer 20.

[0013] In this embodiment, the first circuit layer 10 contains a first insulating resin 13. The first insulating resin 13 is located between the first electronic component 12 and the ceramic electronic component 30. The first insulating resin 13 is a resin having insulating properties, such as a polyimide resin. The thickness of the first insulating resin 13 is, for example, 5 μm.

[0014] In this embodiment, the second circuit layer 20 includes a second insulating resin 23. The second insulating resin 23 is located between the second electronic component 22 and the ceramic electronic component 30. The second insulating resin 23 is a resin having insulating properties, such as a polyimide resin. The second insulating resin 23 has a thickness of, for example, 5 μm.

[0015] The first wiring 11 is a wiring for electrically connecting the first electronic component 12 and the ceramic electronic component 30, and is provided inside the first insulating resin 13. However, a part of the first wiring 11 may be provided on the surface of the first insulating resin 13. The material of the first wiring 11 may be any material as long as it is conductive, and is, for example, Cu.

[0016] The second wiring 21 is a wiring for electrically connecting the second electronic component 22 and the ceramic electronic component 30, and is provided inside the second insulating resin 23. However, a part of the second wiring 21 may be provided on the surface of the second insulating resin 23. The material of the second wiring 21 may be any material as long as it has electrical conductivity, such as Cu.

[0017] When the first circuit layer 10 includes a plurality of first electronic components 12, the first circuit layer 10 may include wiring that electrically connects the first electronic components 12 to each other. Similarly, when the second circuit layer 20 includes a plurality of second electronic components 22, the second circuit layer 20 may include wiring that electrically connects the second electronic components 22 to each other.

[0018] There are no particular limitations on the types of the first electronic component 12 and the second electronic component 22. The first electronic component 12 and the second electronic component 22 are, for example, semiconductor devices such as logic ICs such as CPUs and memory ICs such as ROMs and RAMs.

[0019] The first electronic component 12 is disposed in contact with the first insulating resin 13, and has a plurality of first electrodes 12a. The first wiring 11 electrically connects the first electrodes 12a of the first electronic component 12 to via electrodes 32 of a ceramic electronic component 30 described below.

[0020] The second electronic component 22 is disposed in contact with the second insulating resin 23, and has a plurality of second electrodes 22a. The second wiring 21 electrically connects the second electrodes 22a of the second electronic component 22 to via electrodes 32 of a ceramic electronic component 30 described below.

[0021] The first electronic component 12 may include, for example, one in which the first electrode 12a penetrates the first insulating resin 13 and directly contacts the via electrode 32 of the ceramic electronic component 30. Similarly, the second electronic component 22 may include one in which the second electrode 22a penetrates the second insulating resin 23 and directly contacts the via electrode 32 of the ceramic electronic component 30.

[0022] The ceramic electronic component 30 has a plurality of via electrodes 32 that penetrate a body 31 whose main component is ceramic and are exposed to a first main surface 31a that is a main surface on one side and a second main surface 31b that is a main surface on the other side (FIG. 3). More specifically, the ceramic electronic component 30 has three or more via electrodes 32, and in this embodiment, has nine or more via electrodes 32. Although FIG. 1 shows one ceramic electronic component 30, two or more ceramic electronic components 30 may be provided. In this embodiment, the ceramic electronic component 30 is a multilayer ceramic capacitor.

[0023] Fig. 2 is a plan view that illustrates a schematic configuration of a ceramic electronic component 30. Fig. 3 is a cross-sectional view of the ceramic electronic component 30 taken along line III-III of Fig. 2.

[0024] The body 31 of the ceramic electronic component 30 has a structure in which a plurality of dielectric layers 33, a plurality of first internal electrodes 34, and a plurality of second internal electrodes 35 are laminated. More specifically, the body 31 of the ceramic electronic component 30 has a structure in which the first internal electrodes 34 and the second internal electrodes 35 are alternately laminated with the dielectric layers 33 interposed therebetween.

[0025] The dielectric layer 33 is made of any material whose main component is ceramic, for example, a ceramic material whose main component is BaTiO3, CaTiO3, SrTiO3, SrZrO3, CaZrO3, etc. These main components may contain minor components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, Ni compounds, etc., which are contained in smaller amounts than the main components.

[0026] The ceramic electronic component 30 may have any shape, for example, a rectangular parallelepiped shape as a whole. A rectangular parallelepiped shape as a whole refers to a shape that is not a perfect rectangular parallelepiped shape, such as a shape in which the corners or ridges of a rectangular parallelepiped are rounded, or a shape in which the surface of a rectangular parallelepiped has irregularities, but has six outer surfaces and can be regarded as a rectangular parallelepiped as a whole.

[0027] The dimensions of the ceramic electronic component 30 are also arbitrary, but for example, the length direction dimension can be 0.3 mm to 3.0 mm, the width direction dimension can be 0.3 mm to 3.0 mm, and the thickness can be 30 μm to 100 μm.

[0028] The first internal electrode 34 and the second internal electrode 35 may be made of any material, and may contain, for example, a metal such as Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au, or an alloy containing these metals. The first internal electrode 34 and the second internal electrode 35 may contain, as a common material, the same ceramic material as the dielectric ceramic contained in the dielectric layer 33. In this case, the ratio of the common material contained in the first internal electrode 34 and the second internal electrode 35 is, for example, 20 vol % or less.

[0029] The thickness of the first internal electrode 34 and the second internal electrode 35 is arbitrary, but can be, for example, about 0.3 μm or more and 1.0 μm or less. The number of layers of the first internal electrode 34 and the second internal electrode 35 is arbitrary, but can be, for example, about 10 layers or more and 150 layers or less in total. As described later, the first internal electrode 34 and the second internal electrode 35 are each electrically connected to at least one of the multiple via electrodes 32, but the main body 31 may include an internal electrode that is not electrically connected to any of the multiple via electrodes 32.

[0030] The first inner electrode 34 has a plurality of first through holes 34a for inserting second via electrodes 32b (described later). The second inner electrode 35 has a plurality of second through holes 35a for inserting first via electrodes 32a (described later).

[0031] The via electrodes 32 include a first via electrode 32a and a second via electrode 32b. The via electrodes 32 are electrically connected to some of the multiple internal electrodes 34, 35. Specifically, the first via electrode 32a is electrically connected to the multiple first internal electrodes 34, and the second via electrode 32b is electrically connected to the multiple second internal electrodes 35.

[0032] In this embodiment, a plurality of first via electrodes 32a and a plurality of second via electrodes 32b are provided in a matrix. More specifically, as shown in Fig. 2, a total of 25 via electrodes 32 including the first via electrodes 32a and the second via electrodes 32b are regularly arranged in an array of 5 rows and 5 columns. As shown in Fig. 2, the first via electrodes 32a and the second via electrodes 32b are alternately arranged in the row direction and the column direction, respectively.

[0033] 3, the first via electrode 32a has a first via conductor 321a located inside the body 31 of the ceramic electronic component 30, and a first external electrode 322a located on the surface of the body 31 of the ceramic electronic component 30. For one first via conductor 321a, one first external electrode 322a is provided on each of the first main surface 31a and the second main surface 31b of the body 31.

[0034] 3, the second via electrode 32b has a second via conductor 321b located inside the body 31 of the ceramic electronic component 30, and a second external electrode 322b located on the surface of the body 31 of the ceramic electronic component 30. For one second via conductor 321b, one second external electrode 322b is provided on each of the first principal surface 31a and the second principal surface 31b of the body 31.

[0035] The first via conductor 321a is provided inside the body 31 so as to extend in the stacking direction T of the dielectric layers 33, the first inner electrode 34, and the second inner electrode 35. The first via conductor 321a passes through a second through hole 35a formed in the second inner electrode 35, so that the first via electrode 32a is insulated from the second inner electrode 35.

[0036] The second via conductor 321b is provided inside the main body 31 to extend in the stacking direction T. The second via conductor 321b passes through a first through hole 34a formed in the first internal electrode 34, so that the second via electrode 32b is insulated from the first internal electrode 34.

[0037] The material of the first via conductor 321a and the second via conductor 321b is arbitrary and may contain, for example, a metal such as Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au, or an alloy containing these metals.

[0038] The first via conductor 321a and the second via conductor 321b may have any shape, for example, a cylindrical shape. In this case, the diameter of the first via conductor 321a and the second via conductor 321b may be, for example, about 30 μm or more and 150 μm or less. The distance between the adjacent first via conductor 321a and the second via conductor 321b, more specifically, the distance between the center of the first via conductor 321a and the center of the second via conductor 321b, is, for example, about 50 μm or more and 500 μm or less.

[0039] The first external electrode 322a is provided on each of the first and second principal surfaces 31a and 31b of the main body 31 at positions overlapping the first via conductors 321a when viewed in the stacking direction T, and is directly connected to the first via conductors 321a. The second external electrode 322b is provided on each of the first and second principal surfaces 31a and 31b of the main body 31 at positions overlapping the second via conductors 321b when viewed in the stacking direction T, and is directly connected to the second via conductors 321b. The first external electrode 322a and the second external electrode 322b are disposed spaced apart from each other.

[0040] The first external electrode 322a and the second external electrode 322b may be made of any material, for example, Cu. However, instead of Cu, metals such as Ni, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au, or alloys containing these metals, may be used. Furthermore, the surfaces of the first external electrode 322a and the second external electrode 322b may be plated. The plating may be performed using metals such as Cu, Ni, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au, or alloys containing these metals. The plating may be a single layer or multiple layers.

[0041] At least one first electronic component 12 included in the first circuit layer 10 and at least one second electronic component 22 included in the second circuit layer 20 are electrically connected by via electrodes 32 of the ceramic electronic component 30. That is, the ceramic electronic component 30 in this embodiment functions as a multilayer ceramic capacitor constituting the composite electronic component 100, and also functions as a connection member that electrically connects at least one first electronic component 12 included in the first circuit layer 10 and at least one second electronic component 22 included in the second circuit layer 20. In this embodiment, all of the first electronic components 12 included in the first circuit layer 10 and all of the second electronic components 22 included in the second circuit layer 20 are electrically connected by the via electrodes 32 of the ceramic electronic component 30.

[0042] As described above, the sealing resin 40 is disposed so as to cover at least the ceramic electronic component 30. In this embodiment, the sealing resin 40 is provided in the spatial region between the first circuit layer 10 and the second circuit layer 20, other than the ceramic electronic component 30. Furthermore, in this embodiment, the sealing resin 40 is provided in a manner so as to cover the first electronic component 12 included in the first circuit layer 10 and the second electronic component 22 included in the second circuit layer 20.

[0043] However, the first electronic components 12 included in the first circuit layer 10 and the second electronic components 22 included in the second circuit layer 20 may include components that are not completely covered by the sealing resin 40 and have part of their surfaces exposed.

[0044] There is no particular restriction on the type of sealing resin 40, and for example, an epoxy resin containing a silica filler can be used.

[0045] As described above, in the composite electronic component 100 of this embodiment, at least one first electronic component 12 included in the first circuit layer 10 and at least one second electronic component 22 included in the second circuit layer 20 are electrically connected by via electrodes 32 of the ceramic electronic component 30. That is, no solder bumps are used to establish electrical connection between the first circuit layer 10 and the second circuit layer 20. Moreover, in the composite electronic component 100 of this embodiment, no solder is used inside the first circuit layer 10 and the second circuit layer 20.

[0046] An example of a method for manufacturing the composite electronic component 100 in this embodiment will be described with reference to FIGS.

[0047] First, a first electronic component 12 is provided on a carrier wafer 50 such as silicon glass (FIG. 4(a)). The first electronic component 12 can be formed, for example, by stacking constituent materials in a plurality of layers.

[0048] Next, sealing resin 40 is provided so as to cover first electronic component 12 (FIG. 4(b)). For example, carrier wafer 50 on which first electronic component 12 is provided is placed inside a predetermined mold, and sealing resin 40 is poured into the mold and cured.

[0049] Next, the surface of the sealing resin 40 is scraped off so that the surface of the first electronic component 12 is exposed (FIG. 4(c)).

[0050] Next, a first wiring 11 is provided to connect with the first electrode 12a of the first electronic component 12, and a first insulating resin 13 is provided so as to cover the exposed first electronic component 12 (FIG. 4(d)). Here, as shown in FIG. 4(d), the first insulating resin 13 is provided so as to cover the entire surface opposite to the carrier wafer 50. Of the first wiring 11, the portion extending in the vertical direction can be formed by providing a via in the first insulating resin 13 and filling it with the material constituting the first wiring 11. In this way, the first circuit layer 10 is formed.

[0051] Next, a ceramic electronic component 30 is provided on the first insulating resin 13 (FIG. 4(e)). Here, the ceramic electronic component 30 is arranged so that the first wiring 11 exposed on the surface of the first insulating resin 13 and the via electrode 32 of the ceramic electronic component 30 abut against each other.

[0052] Next, a sealing resin 40 is provided so as to cover the ceramic electronic component 30 (FIG. 5(a)).

[0053] Next, the surface of the sealing resin 40 is scraped off so that the surface of the ceramic electronic component 30 is exposed, and then a second wiring 21 that connects to the via electrode 32 of the ceramic electronic component 30 is provided, and a second insulating resin 23 is provided (Figure 5(b)).

[0054] Next, the second electronic component 22 is provided on the second insulating resin 23, and then the sealing resin 40 is provided so as to cover the second electronic component 22 (FIG. 5(c)). Here, the second electronic component 22 is provided so that the second wiring 21 exposed on the surface of the second insulating resin 23 and the second electrode 22a of the second electronic component 22 abut against each other.

[0055] Next, the carrier wafer 50 is removed, and a sealing resin 40 is provided in the position where the carrier wafer 50 was placed (FIG. 5(d)).

[0056] The above-described method can be used to manufacture the composite electronic component 100. However, the method for manufacturing the composite electronic component 100 is not limited to the above-described method.

[0057] According to a composite electronic component 100 in one embodiment, a ceramic electronic component 30 having a plurality of via electrodes 32 penetrating a body 31 whose main component is ceramic and exposed on one main surface and the other main surface is disposed between a first circuit layer 10 and a second circuit layer 20, and at least one first electronic component 12 included in the first circuit layer 10 and at least one second electronic component 22 included in the second circuit layer 20 are electrically connected by the via electrodes 32 of the ceramic electronic component 30. With such a configuration, the connection resistance between the first circuit layer 10 and the second circuit layer 20 can be reduced and the connection reliability is improved compared to a configuration in which the first circuit layer 10 and the second circuit layer 20 are connected by solder bumps.

[0058] Here, when multiple circuit layers are connected with solder bumps, an area for providing multiple solder bumps is required, and the overall size becomes large. In contrast, in the composite electronic component 100 of this embodiment, electrical connection is performed using the ceramic electronic components 30 required to configure the composite electronic component 100, such as a multilayer ceramic capacitor, so there is no need to provide solder bumps. This allows the composite electronic component 100 to be made smaller.

[0059] Furthermore, in the composite electronic component 100 of this embodiment, the ceramic electronic component 30 disposed between the first circuit layer 10 and the second circuit layer 20 has three or more, and preferably nine or more, via electrodes 32. This makes it possible to further reduce the connection resistance when electrically connecting the first electronic component 12 included in the first circuit layer 10 and the second electronic component 22 included in the second circuit layer 20.

[0060] Furthermore, in the composite electronic component 100 of this embodiment, the ceramic electronic component 30 has a plurality of via electrodes 32 arranged in a matrix, making it easy to design the layout of the first wiring 11 and the second wiring 21 connected to the via electrodes 32.

[0061] Furthermore, in the composite electronic component 100 of this embodiment, the ceramic electronic component 30 is disposed between the first circuit layer 10 and the second circuit layer 20, and therefore deformation such as warping of the composite electronic component 100 can be suppressed compared to a configuration in which the ceramic electronic component 30 is not disposed. This will be described below.

[0062] A composite electronic component 100 according to one embodiment and a comparative composite electronic component were prepared, and the degree of deformation caused by temperature change was examined. The prepared composite electronic component 100 has five ceramic electronic components 30 provided between a first circuit layer 10 and a second circuit layer 20. On the other hand, in the comparative composite electronic component, no ceramic electronic components are provided between the two circuit layers, and a sealing resin is provided instead.

[0063] Specifically, assuming that there is no stress at 150°C, the degree of deformation of the composite electronic component when cooled to 25°C was investigated by simulation. The simulation results are shown in Fig. 6. Figs. 6(a) and (c) show the simulation results of a composite electronic component 100 in one embodiment, and Figs. 6(b) and (d) show the simulation results of a comparative composite electronic component. Figs. 6(a) and (b) are perspective views of the composite electronic component, and Figs. 6(c) and (d) are cross-sectional views of the composite electronic component.

[0064] 6, composite electronic component 100 in which ceramic electronic component 30 is disposed between first circuit layer 10 and second circuit layer 20 undergoes less deformation than a comparative composite electronic component in which no ceramic electronic component is disposed between two circuit layers. That is, by including ceramic electronic component 30 having body 31 mainly composed of ceramic having a smaller linear expansion coefficient than sealing resin 40, composite electronic component 100 in one embodiment undergoes less deformation when temperature changes.

[0065] The present invention is not limited to the above-described embodiment, and various applications and modifications can be made within the scope of the present invention. For example, in the above-described embodiment, the ceramic electronic component 30 is described as being a multilayer ceramic capacitor, but the ceramic electronic component 30 is not limited to being a multilayer ceramic capacitor, and may be any component having a configuration including a plurality of via electrodes that penetrate a body whose main component is ceramic and are exposed on one main surface and the other main surface.

[0066] The composite electronic component 100 in one embodiment has a three-layer structure in which a first circuit layer 10, a ceramic electronic component 30, and a second circuit layer 20 are laminated in this order, but may have a structure in which four or more layers are laminated. In that case, too, it is sufficient to dispose a ceramic electronic component 30 having a plurality of via electrodes 32 between circuit layers adjacent to each other in the lamination direction, and electrically connect the electronic components included in the circuit layers with each other through the via electrodes 32. [Explanation of symbols]

[0067] 10 First Circuit Layer 11 First Wire 12 The first electronic component 13 First insulating resin 20 Second Circuit Layer 21 Second Wiring 22 Secondary Electronic Components 23 Second insulating resin 30 Ceramic electronic components 31 Ceramic electronic component body 32 Via electrode 32a first via electrode 32b Second via electrode 33 Dielectric layer 34 First internal electrode 35 Second internal electrode 40 Sealing resin 50 Carrier Wafer 100 Composite Electronic Components 321a first via conductor 321b Second via conductor 322a First external electrode 322b Second external electrode

Claims

1. A composite electronic component in which multiple circuit layers each including a plurality of electronic components are laminated, a first circuit layer; a second circuit layer; a ceramic electronic component disposed between the first circuit layer and the second circuit layer, the ceramic electronic component having a plurality of via electrodes penetrating a body whose main component is ceramic and exposed on one principal surface and the other principal surface; a sealing resin provided between the first circuit layer and the second circuit layer so as to cover at least the ceramic electronic component; Equipped with Among the plurality of electronic components, the electronic components included in the first circuit layer and the electronic components included in the second circuit layer are disposed opposite each other such that their electrodes face each other, at least one electronic component included in the first circuit layer and at least one electronic component included in the second circuit layer are electrically connected to each other by the via electrodes of the ceramic electronic component; Wiring is provided between the first circuit layer and the ceramic electronic component, and between the second circuit layer and the ceramic electronic component, a composite electronic component, wherein an electrode of at least one electronic component included in the first circuit layer and the via electrode, and an electrode of at least one electronic component included in the second circuit layer and the via electrode are electrically connected by the wiring.

2. The ceramic electronic component is a multilayer ceramic capacitor in which dielectric layers and internal electrodes are alternately laminated, The composite electronic component according to claim 1 , wherein the via electrode is electrically connected to some of the plurality of internal electrodes.

3. 2. The composite electronic component according to claim 1, wherein the ceramic electronic component has three or more via electrodes.

4. 2. The composite electronic component according to claim 1, wherein the ceramic electronic component has nine or more via electrodes.

5. The composite electronic component according to claim 1 , wherein the ceramic electronic component has a plurality of the via electrodes arranged in a matrix.

6. 6. The composite electronic component according to claim 1, wherein the ceramic electronic component has a thickness of 30 μm or more and 100 μm or less.

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