Data transmission method and electronic device

Abstract

This application provides a data transmission method and an electronic device. The method may be applied to an electronic device configured with multiple input devices (e.g., camera modules). Each input device of the electronic device is provided with one uplink interface and one downlink interface. The uplink interface is connected to a processor or a higher-level input device, and the downlink interface is connected to a lower-level input device or not. A processing module in each input device may process image data collected by the current-level device and data transmitted by the lower-level input device connected to the downlink interface, and then transmit the processed data to the processor or the higher-level input device via the uplink interface. In this way, multiple input devices are connected in a cascade manner, and only one of the multiple input devices needs to be connected to the processor. This reduces the number of interfaces and signal pins between the processor and the multiple input devices. In addition, it is easy to operate the input devices.

Description

[Technical field]

[0001] This application claims priority to Chinese Patent Application No. 202011347808.9, entitled “Data Transmission Method and Electronic Device,” filed with the State Intellectual Property Office of China on November 26, 2020, which is incorporated by reference in its entirety.

[0002] The present application relates to the field of electronic technology, and in particular to a data transmission method and an electronic device. [Background technology]

[0003] 2. Description of the Related Art With the ever-increasing photography requirements for electronic devices such as smartphones and tablets, cameras in electronic devices continue to evolve toward multi-camera, high resolution, and so on.

[0004] At present, in the circuit structure of the camera module, the processor in the electronic device transmits data to the camera module through the mobile industry processor interface (MIPI). Generally, one camera module needs to communicate with the processor through four pairs of data differential signal lines. When one front camera module and one rear camera module are separately placed in the electronic device, eight pairs of data differential signal lines are needed to communicate with the processor. As the shooting accuracy improves, the number of front camera modules and rear camera modules also increases, which increases the number of MIPI differential signal lines on the processor side and the number of interfaces on the processor side. This is not favorable for system integration. Summary of the Invention [Means for solving the problem]

[0005] This application provides a data transmission method and an electronic device. In the method, multiple input devices are connected in a cascaded manner, and only one input device needs to be connected to a processor. Therefore, the number of interfaces on the processor side and the number of signal lines between the input devices and the processor are greatly reduced. In addition, multiple input devices are connected in a cascaded manner, and an added input device needs to be connected to an existing input device in a cascaded manner, so that the subsequent operation of adding an input device is simplified.

[0006] According to a first aspect, the present application provides a data transmission method, the method includes the steps of: after receiving a first instruction transmitted by a processor, a first camera module receives a first data packet transmitted by a second camera module, the first data packet includes an identification field, and a value of the identification field in the first data packet indicates a number of forwardings of the first data packet; the first camera module identifies that the value of the identification field in the first data packet is a first value and modifies the first value to a second value, the difference between the second value and the first value being a preset value; and the first camera module transmits to the processor the first data packet obtained by modifying the value of the identification field in the first data packet to the second value.

[0007] The method may be applied to an electronic device configured with a camera module. Each camera module of the electronic device is provided with one uplink interface and one downlink interface. The uplink interface is connected to a processor or a higher-level camera module, and the downlink interface is connected to a lower-level camera module or not. A processing module in each input device may process image data collected by the current input device and data sent by a lower-level camera module connected to the downlink interface, and then send the processed data to a processor or a higher-level camera module via the uplink interface. In this way, multiple camera modules are connected in a cascaded manner, and only one of the multiple input devices needs to be connected to a processor. Therefore, the number of interfaces and the number of signal pins between the processor and the multiple camera modules are reduced, and the system integration on the processing side is facilitated. In addition, it is easy to operate the addition and subtraction of camera modules.

[0008] In addition to being applied to an electronic device 100 in which a camera module is arranged, the method may also be applied to devices such as sensors, radars, etc., which is not a limitation of the present application.

[0009] In relation to the first aspect, in one possible implementation of the first aspect, the first camera module includes a first application layer, a first protocol layer, and a first physical layer, and the first physical layer includes a first uplink interface and a first downlink interface. The first camera module receiving the first data packet transmitted by the second camera module specifically includes the first camera module receiving the first data packet transmitted by the second camera module via the first downlink interface. The first camera module modifying the value of the identification field in the first data packet from a first value to a second value specifically includes the first camera module modifying the value of the identification field in the first data packet from a first value to a second value by using the first protocol layer. The first camera module transmits the first data packet obtained by modifying the value of the identification field in the first data packet to the processor to the second value, specifically including the first camera module transmits the first data packet obtained by modifying the value of the identification field in the first data packet to the processor via the first uplink interface. In this way, the first camera module is connected to the second camera module via the first downlink interface, and the first uplink interface of the first camera module is connected to the processor, so that multiple camera modules are connected to the processor in a cascaded manner, the number of signal pins on the processor side is reduced, and the system integration on the processor side is facilitated. In addition, when the second camera module collects data and the first camera module does not need to collect data, the first application layer of the first camera module is not enabled, and the first physical layer and the first protocol layer of the first camera module are enabled, so that the wear of the first camera module can be reduced.

[0010] In relation to the first aspect, in one possible implementation of the first aspect, the first camera module collects first data and generates a second data packet based on the first data, the second data packet includes an identification field, the value of the identification field in the second data packet is a third value, and the first camera module transmits the second data packet to the processor. In this way, the second camera module and the first camera module can collect data simultaneously. The processor identifies which camera module collects the data packet based on the value of the identification field in the data packet.

[0011] In relation to the first aspect, in one possible implementation of the first aspect, the first camera module includes a first application layer, a first protocol layer, and a first physical layer, and the first physical layer includes a first uplink interface and a first downlink interface. After the first camera module collects the first data, and before the first camera generates a second data packet based on the first data, the method further includes the first camera module encoding the first data by using the first application layer. The first camera module generating the second data packet based on the first data specifically includes the first camera module generating the second data packet based on the first data encoded by using the first protocol layer. The first camera module transmitting the second data packet to the processor specifically includes the first camera module transmitting the second data packet to the processor via the first uplink interface. In this manner, when the first camera module collects data, the first application layer, the first physical layer, and the first protocol layer of the first camera module are all enabled.

[0012] In relation to the first aspect, in one possible implementation of the first aspect, the first data packet includes a packet header, a data packet, and a packet footer, and an identification field in the first data packet is located in the packet header of the first data packet. The processor may identify a value of the identification field in the packet header, and identify that the data packet is from the first camera module based on the value of the identification field.

[0013] Similarly, the second data packet also includes a packet header, a data packet, and a packet footer, and the identification field in the second data packet is located in the packet header of the second data packet. The processor may identify a value of the identification field in the packet header and identify that the data packet is from the second camera module based on the value of the identification field.

[0014] In relation to the first aspect, in one possible implementation of the first aspect, the first camera module receiving the first instruction sent by the processor specifically includes the first camera module receiving the first instruction sent by the processor via the first control interface. In this way, after the first camera module receives the first instruction sent by the processor via the first control interface, the first camera module enables the first physical layer and the first protocol layer and receives the data packet sent by the second camera module. After the second camera module receives the second instruction sent by the processor via the second control interface, the second camera module enables the application layer of the second camera module, the physical layer of the second camera module, and the protocol layer of the second camera module, and the second camera module starts collecting data, packing the data into a data packet, and sending the data packet to the first camera module.

[0015] Similarly, each camera module in the electronic device is configured with a control interface, which is different from the uplink and downlink interfaces. The control interface is configured to receive control instructions sent by the processor. The uplink and downlink interfaces are configured to transmit and receive data packets.

[0016] According to a second aspect, the present application provides an electronic device. The electronic device includes a processor, a first camera module, and a second camera module. The first camera module is configured to receive a first data packet transmitted by the second camera module after receiving a first instruction transmitted by the processor, the first data packet including an identification field, and a value of the identification field in the first data packet indicates a number of forwardings of the first data packet. The first camera module is further configured to identify that the value of the identification field in the first data packet is a first value, modify the first value to a second value, and transmit to the processor a first data packet obtained by modifying the value of the identification field in the first data packet to the second value, where the difference between the second value and the first value is a preset value.

[0017] The method may be applied to an electronic device configured with a camera module. Each camera module of the electronic device is provided with one uplink interface and one downlink interface. The uplink interface is connected to a processor or a higher-level camera module, and the downlink interface is connected to a lower-level camera module or not. A processing module in each input device may process image data collected by the current input device and data sent by a lower-level input device connected to the downlink interface, and then send the processed data to the processor or the higher-level input device via the uplink interface. In this way, multiple camera modules are connected in a cascaded manner, and only one of the multiple input devices needs to be connected to the processor. Therefore, the number of interfaces and the number of signal pins between the processor and the multiple camera modules are reduced, and the system integration on the processing side is facilitated. In addition, the input device is easy to operate.

[0018] In relation to the second aspect, in one possible implementation of the second aspect, the first camera module includes a first application layer, a first protocol layer, and a first physical layer, and the first physical layer includes a first uplink interface and a first downlink interface. The first camera module is further configured to receive a first data packet transmitted by a second camera module via the first downlink interface, modify a value of an identification field in the first data packet from a first value to a second value by using the first protocol layer, and transmit the first data packet obtained by modifying the value of the identification field in the first data packet to the second value to the processor via the first uplink interface. In this way, the first camera module is connected to the second camera module via the first downlink interface, and the first uplink interface of the first camera module is connected to the processor, so that multiple camera modules are connected to the processor in a cascaded manner, reducing the number of signal pins on the processor side and facilitating system integration on the processor side. In addition, when the second camera module collects data and the first camera module does not need to collect data, the first application layer of the first camera module is not enabled, and the first physical layer and the first protocol layer of the first camera module are enabled, so that wear on the first camera module can be reduced.

[0019] In relation to the second aspect, in one possible implementation of the second aspect, the first camera module is further configured to collect the first data, generate a second data packet based on the first data, the second data packet includes an identification field, a value of the identification field in the second data packet is a third value, and transmit the second data packet to the processor. In this way, the second camera module and the first camera module can collect data simultaneously. The processor identifies which camera module collects the data packet based on the value of the identification field in the data packet.

[0020] In relation to the second aspect, in one possible implementation of the second aspect, the first camera module includes a first application layer, a first protocol layer, and a first physical layer, the first physical layer includes a first uplink interface and a first downlink interface, and the first uplink interface is connected to a first receiving port of the processor. The first camera module is further configured to encode first data by using the first application layer, generate a second data packet based on the first data encoded by using the first protocol layer, the second data packet includes an identification field, and the value of the identification field in the second data packet is a third value, and transmit the second data packet to the processor via the first uplink interface. In this way, when the first camera module collects data, the first application layer, the first physical layer, and the first protocol layer of the first camera module are all enabled.

[0021] In relation to the second aspect, in one possible implementation form of the second aspect, the electronic device further includes a third camera module.

[0022] The third camera module is configured to collect the second data and generate a third data packet based on the second data, the third data packet including an identification field, and a value of the identification field in the third data packet is a third value. The third camera module is further configured to transmit the third data packet to the processor. Thus, in one aspect, when there are multiple camera modules in the electronic device, the front camera module is separated from the rear camera module to reduce the burden on the processor of receiving data simultaneously collected by multiple cascaded camera modules through one interface. The multiple cascaded front camera modules are connected to a first receiving port of the processor, and the multiple cascaded rear camera modules are connected to a second receiving port of the processor. That is, the multiple cascaded front camera modules and the multiple cascaded rear camera modules are connected in parallel to the processor.

[0023] In relation to the second aspect, in one possible implementation of the second aspect, the third camera module includes a second application layer, a second protocol layer, and a second physical layer, the second physical layer includes a second uplink interface and a second downlink interface, and the second uplink interface is connected to a second receiving port of the processor. The third camera module is further configured to: encode second data by using the second application layer; generate a third data packet based on the second data encoded by using the second protocol layer, the third data packet includes an identification field, and the value of the identification field in the third data packet is a third value; and transmit the third data packet to the processor via the second uplink interface. In this way, when the third camera module collects data, the second application layer, the second physical layer, and the second protocol layer of the third camera module are all enabled. In addition, the third data packet is sent to a second receiving port of the processor via the second uplink interface to relieve pressure on the processor receiving a large amount of data simultaneously on the same port when the processor only has one port.

[0024] In relation to the second aspect, in one possible implementation of the second aspect, the first camera module includes a first application layer, a first protocol layer, and a first physical layer, the first physical layer includes a first uplink interface and a first downlink interface, and the first uplink interface is connected to a first receiving port of the processor. The third camera module includes a second application layer, a second protocol layer, and a second physical layer, the second physical layer includes a second uplink interface and a second downlink interface, and the second uplink interface is connected to a second receiving port of the processor. The first receiving port is different from the second receiving port.

[0025] In relation to the second aspect, in one possible implementation form of the second aspect, the electronic device further includes a fourth camera module.

[0026] The fourth camera module is configured to collect third data and generate a fourth data packet based on the third data, the fourth data packet including an identification field, and a value of the identification field in the fourth data packet is a third value. The fourth camera module is further configured to transmit the fourth data packet to the third camera module. The third camera module is further configured to receive the fourth data packet transmitted by the fourth camera module, identify that the value of the identification field in the first data packet is the third value, and modify the value of the identification field in the fourth data packet to a fourth value, and a difference between the fourth value and the third value is a preset value.

[0027] In relation to the second aspect, in one possible implementation of the second aspect, the fourth camera module includes a third application layer, a third protocol layer, and a third physical layer, the third physical layer includes a third uplink interface and a third downlink interface, and the third uplink interface is connected to the second downlink interface. The fourth camera module is further configured to: encode third data by using the third application layer, generate a fourth data packet based on the third data encoded by using the third protocol layer, the fourth data packet includes an identification field, a value of the identification field in the fourth data packet is a third value, and transmit the fourth data packet to the third camera module via the third uplink interface. The third camera module is further configured to receive, via the second downlink interface, the fourth data packet transmitted via the third uplink interface, identify by using the second protocol layer that the value of the identification field in the fourth data packet is a third value, modify the third value to a fourth value, and a difference between the third value and the fourth value is a preset value, and send the fourth data packet obtained by modifying the value of the identification field in the fourth data packet to the fourth value to the processor via the second uplink interface. In this way, when a camera module needs to be added later, only the third uplink interface of the fourth camera module needs to be connected to the second downlink interface of the third camera module, and the original circuit structure does not need to be changed, and the operation is simple.

[0028] In relation to the second aspect, in one possible implementation of the second aspect, the first data packet includes a packet header, a data packet, and a packet footer, and an identification field in the first data packet is located in the packet header of the first data packet. The processor may identify a value of the identification field in the packet header, and identify that the data packet is from the first camera module based on the value of the identification field.

[0029] Similarly, the second data packet also includes a packet header, a data packet, and a packet footer, and the identification field in the second data packet is located in the packet header of the second data packet. The processor may identify a value of the identification field in the packet header and identify that the data packet is from the second camera module based on the value of the identification field.

[0030] Similarly, the third data packet also includes a packet header, a data packet, and a packet footer, and the identification field in the third data packet is located in the packet header of the third data packet. The processor may identify a value of the identification field in the packet header and identify that the data packet is from the third camera module based on the value of the identification field.

[0031] Similarly, the fourth data packet also includes a packet header, a data packet, and a packet footer, and the identification field in the second data packet is located in the packet header of the fourth data packet. The processor may identify a value of the identification field in the packet header and identify that the data packet is from the fourth camera module based on the value of the identification field.

[0032] In addition, the data packets received by the first receiving port of the processor are from the first camera module and the second camera module, and the data packets received by the second receiving port of the processor are from the third camera module and the fourth camera module. When the values ​​of the identification fields in the data packets are the same, the processor may determine whether the data packet is from the first camera module or the third camera module based on whether the data packet is received by the first receiving port or the second receiving port. Alternatively, the processor may determine whether the data packet is from the second camera module or the fourth camera module based on whether the data packet is received by the first receiving port or the second receiving port.

[0033] In relation to the second aspect, in one possible implementation of the second aspect, the first camera module is further configured to receive a first command sent by the processor via the first control interface. In this way, after the first camera module receives the first command sent by the processor via the first control interface, the first camera module enables the first physical layer and the first protocol layer and receives the data packets sent by the second camera module. After the second camera module receives the second command sent by the processor via the second control interface, the second camera module enables the application layer of the second camera module, the physical layer of the second camera module, and the protocol layer of the second camera module, and the second camera module starts to collect data, pack the data into data packets, and send the data packets to the first camera module.

[0034] Similarly, each camera module in the electronic device is configured with a control interface, which is different from the uplink and downlink interfaces. The control interface is configured to receive control instructions sent by the processor. The uplink and downlink interfaces are configured to transmit and receive data packets.

[0035] According to a third aspect, the present application provides a computer-readable storage medium comprising instructions which, when executed on a camera module, enable the camera module to perform a data transmission method according to the first aspect or associated with any one of the implementations of the first aspect.

[0036] In the method, multiple input devices are connected in a cascaded manner, and only one input device needs to be connected to the processor. Therefore, the number of interfaces on the processor side and the number of signal lines between the input devices and the processor are greatly reduced. In addition, multiple input devices are connected in a cascaded manner, and an added input device needs to be connected to an existing input device in a cascaded manner, so that the subsequent operation of adding an input device is simplified. [Brief description of the drawings]

[0037] [Figure 1] 1 is a schematic diagram of the structure of an electronic device 100 according to an embodiment of the present application. [Diagram 2] FIG. 2 is a schematic diagram of an architecture of a D-PHY interface between a camera module and a processor according to an embodiment of the present application. [Diagram 3] FIG. 2 is a schematic diagram of the architecture of a C-PHY interface between a camera module and a processor according to an embodiment of the present application. [Figure 4] FIG. 2 is a schematic diagram of a structure of a camera module according to an embodiment of the present application. [Diagram 5]1 is a schematic diagram of a multi-camera system of an electronic device 100 according to an embodiment of the present application. [Figure 6] 1 is a schematic diagram of a multi-camera system of an electronic device 100 according to an embodiment of the present application. [Figure 7] 1 is a schematic diagram of an in-vehicle monitoring system according to an embodiment of the present application. [Figure 8A] 1 is a schematic diagram of a video surveillance system at an intersection according to an embodiment of the present application; [Figure 8B] 1 is a schematic diagram of a video surveillance system at an intersection according to an embodiment of the present application; [Figure 9] FIG. 2 is a schematic diagram of multiple camera modules connected to a processor by using a parallel topology structure according to an embodiment of the present application. [Figure 10] 1 is a schematic diagram of the technical structure of multiple camera modules connected in parallel to a processor of an electronic device 100 according to an embodiment of the present application. [Figure 11] 1 is a schematic diagram of a cascade connection of multiple camera modules in an electronic device 100 according to an embodiment of the present application. [Figure 12] FIG. 2 is a schematic diagram of an architecture of a D-PHY interface between a cascaded camera module and a processor according to an embodiment of the present application. [Figure 13] FIG. 9 is a schematic diagram of a technical structure of multiple cascaded camera modules connected to a processor 910 according to an embodiment of the present application. [Figure 14] FIG. 2 is a schematic diagram of a structure of a data packet according to an embodiment of the present application; [Figure 15] FIG. 2 is a schematic diagram of a structure of another data packet according to an embodiment of the present application; [Figure 16] 4 illustrates a data packet transmitting process for N camera modules according to an embodiment of the present application. [Figure 17A] 2 is a flowchart of a data transmission method according to an embodiment of the present application; [Figure 17B]2 is a flowchart of a data transmission method according to an embodiment of the present application; [Figure 18] FIG. 2 is a system diagram of another cascade connection of camera modules according to an embodiment of the present application. [Figure 19] FIG. 9 is a schematic diagram of the technical structure of multiple cascaded camera modules connected to a processor 910 by using analog switches according to an embodiment of the present application. [Figure 20A] 4 is a flowchart of another data transmission method according to an embodiment of the present application. [Figure 20B] 4 is a flowchart of another data transmission method according to an embodiment of the present application. [Figure 21] FIG. 13 is a system diagram of yet another coupling of camera modules according to an embodiment of the present application. [Figure 22] FIG. 9 is a schematic diagram of yet another technical structure of multiple cascaded camera modules connected in parallel to a processor 910 according to an embodiment of the present application. [Figure 23A] 4 is a flowchart of yet another data transmission method according to an embodiment of the present application. [Figure 23B] 4 is a flowchart of yet another data transmission method according to an embodiment of the present application. [Figure 23C] 4 is a flowchart of yet another data transmission method according to an embodiment of the present application. [Figure 24A] 1 is a group of UI diagrams according to one embodiment of the present application. [Figure 24B] 1 is a group of UI diagrams according to one embodiment of the present application. [Figure 24C] 1 is a group of UI diagrams according to one embodiment of the present application. [Figure 25A] 1 is another group of UI diagrams according to an embodiment of the present application. [Figure 25B] 1 is another group of UI diagrams according to an embodiment of the present application. [Figure 25C] 1 is another group of UI diagrams according to an embodiment of the present application. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0038] The following describes in detail the technical solutions in the embodiments of the present application with reference to the accompanying drawings. In the description of the embodiments of the present application, unless otherwise specified, " / " indicates "or". For example, A / B may indicate A or B. The term "and / or" in this specification merely represents a related relationship to describe related objects, and indicates that three relationships may exist. For example, A and / or B may indicate three cases: only A exists, both A and B exist, and only B exists. In addition, in the description of the embodiments of the present application, "multiple" means two or more.

[0039] The terms "first" and "second" below are intended for descriptive purposes only and should not be understood as an indication or suggestion of relative importance or an implicit indication of the number of technical features indicated. Thus, a feature qualified by "first" or "second" may explicitly or implicitly include one or more features. In the description of the embodiments of this application, unless otherwise specified, "plurality" means two or more than two.

[0040] The following describes the hardware architecture of the electronic device 100 referred to in the embodiments of the present application.

[0041] FIG. 1 is a schematic diagram of the structure of an electronic device 100 .

[0042] The electronic device 100 is used as an example below to describe the embodiment in detail. The device types of the electronic device 100 may include mobile phones, televisions, tablet computers, sound boxes, watches, desktop computers, laptop computers, handheld computers, notebook computers, ultra-mobile personal computers (UMPCs), netbooks, personal digital assistants (PDAs), augmented reality (AR) / virtual reality (VR) devices, etc.

[0043] In some embodiments, the electronic device 100 may alternatively be a surveillance system, which includes multiple cameras, multiple sensors, or multiple radars and a system of processors and other devices.

[0044] The device type of the electronic device 100 is not particularly limited in the embodiments of the present application.

[0045] It should be understood that the electronic device 100 shown in Figure 1 is only an example, and that the electronic device 100 may have more or fewer components, may combine two or more components, or may have a different component configuration than those shown in Figure 1. The components shown in the figure may be implemented by hardware, software, or a combination of hardware and software, including one or more signal processing and / or application specific I2C.

[0046] The electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) port 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headset jack 170D, a sensor module 180, buttons 190, a motor 191, an indicator 192, a camera 193, a display 194, a subscriber identification module (SIM) card interface 195, and the like. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, an optical proximity sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, and the like.

[0047] It will be understood that the structure shown in this embodiment of the invention does not constitute a particular limitation on the electronic device 100. In some other embodiments of the present application, the electronic device 100 may include more or fewer components than those shown in the figures, some components may be combined, some components may be divided, or different component arrangements may be used. The components shown in the figures may be implemented using hardware, software, or a combination of software and hardware.

[0048] The processor 110 may include one or more processing units. For example, the processor 110 may include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, a neural-network processing unit (NPU), etc. The different processing units may be separate components or may be integrated into one or more processors.

[0049] The controller may be the nerve center and command center of the electronic device 100. The controller may generate operation control signals based on the instruction operation codes and time series signals to complete the control of instruction fetching and instruction execution.

[0050] A memory may further be disposed in the processor 110 and configured to store instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may store instructions or data that have just been used or that are used periodically by the processor 110. When the processor 110 needs to use the instructions or data again, the processor 110 may retrieve the instructions or data directly from the memory. This avoids repeated accesses, reduces the latency of the processor 110, and improves system efficiency.

[0051] In some embodiments, the processor 110 may include one or more interfaces, which may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, a universal serial bus (USB) interface, etc.

[0052] The I2C interface is a bidirectional synchronous serial bus and includes one serial data line (SDA) and one serial clock line (SCL). In some embodiments, the processor 110 may include multiple I2C bus groups. The processor 110 may be separately coupled to the touch sensor 180K, the charger, the flash, the camera 193, etc. through different I2C bus interfaces. For example, the processor 110 may be coupled to the camera 193 through an I2C interface such that the processor 110 communicates with the camera 193 through the I2C bus interface to implement a photography function of the electronic device 100.

[0053] The I2S interface may be configured to perform audio communication. In some embodiments, the processor 110 may include multiple I2S bus groups. The processor 110 may be coupled to the audio module 170 via the I2S bus to perform communication between the processor 110 and the audio module 170. In some embodiments, the audio module 170 may send audio signals to the wireless communication module 160 via the I2S interface to perform a function of answering a call via a Bluetooth headset.

[0054] The PCM interface may also be used to perform audio communication and to sample, quantize, and encode analog signals. In some embodiments, audio module 170 may be coupled to wireless communication module 160 via a PCM bus interface. In some embodiments, audio module 170 may send audio signals to wireless communication module 160 via the PCM interface to perform the function of answering a call via a Bluetooth headset. Both the I2S interface and the PCM interface may be used for audio communication.

[0055] The UART interface is a universal serial data bus and is configured for asynchronous communication. The bus may be a bidirectional communication bus. The bus converts data to be transmitted between serial and parallel communication. In some embodiments, the UART interface is typically configured to connect the processor 110 to the wireless communication module 160. For example, the processor 110 communicates with a Bluetooth module in the wireless communication module 160 via the UART interface to perform a Bluetooth function. In some embodiments, the audio module 170 may send audio signals to the wireless communication module 160 via the UART interface to perform a music playback function via a Bluetooth headset.

[0056] The MIPI interface may be configured to connect the processor 110 to peripheral components such as the display 194 and the camera 193. The MIPI interface includes a camera serial interface (CSI), a display serial interface (DSI), etc. In some embodiments, the processor 110 communicates with the camera 193 via the CSI to perform image capture functions of the electronic device 100. The processor 110 communicates with the display 194 via the DSI to perform display functions of the electronic device 100.

[0057] The GPIO interface may be configured by software. The GPIO interface may be configured as a control signal or a data signal. In some embodiments, the GPIO interface may be configured to connect the processor 110 to the camera 193, the display 194, the wireless communication module 160, the audio module 170, the sensor module 180, etc. The GPIO interface may alternatively be configured as an I2C interface, an I2S interface, a UART interface, a MIPI interface, etc.

[0058] The USB interface 130 is an interface that complies with the USB standard specification, and may specifically be a Mini USB interface, a Micro USB interface, a USB Type C interface, etc. The USB interface 130 may be configured to connect to a charger to charge the electronic device 100, may be configured to transmit data between the electronic device 100 and a peripheral device, or may be configured to connect to a headset to play audio through the headset. The interface may be further configured to connect to another electronic device, such as an AR device.

[0059] It will be understood that the interfacing relationships between modules shown in this embodiment of the disclosure are merely an illustrative example and do not constitute limitations on the structure of the electronic device 100. In some other embodiments of the present application, the electronic device 100 may alternatively use different interfacing schemes than those of the aforementioned embodiment, or may use a combination of interfacing schemes.

[0060] The charging management module 140 is configured to receive a charging input from a charger. The charger may be a wireless charger or a wired charger. In some wired charging embodiments, the charging management module 140 may receive the charging input from the wired charger via the USB interface 130. In some wireless charging embodiments, the charging management module 140 may receive the wireless charging input via a wireless charging coil of the electronic device 100. The charging management module 140 provides power to the electronic device via the power management module 141 while charging the battery 142.

[0061] The power management module 141 is configured to connect to the battery 142, the charging management module 140, and the processor 110. The power management module 141 receives inputs of the battery 142 and / or the charging management module 140 and provides power to the processor 110, the internal memory 121, the external memory, the display 194, the camera 193, the wireless communication module 160, etc. The power management module 141 may be further configured to monitor parameters such as battery capacity, battery cycle count, battery health (leakage or impedance), etc. In some other embodiments, the power management module 141 may be alternatively located in the processor 110. In some other embodiments, the power management module 141 and the charging management module 140 may be alternatively located in the same device.

[0062] The wireless communication function of the electronic device 100 may be implemented by using antenna 1, antenna 2, mobile communication module 150, wireless communication module 160, a modem processor, a baseband processor, and the like.

[0063] Antenna 1 and Antenna 2 are configured to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 may be configured to cover one or more communication frequency bands. Different antennas may be further multiplexed to improve antenna utilization. For example, Antenna 1 may be multiplexed as a diversity antenna for a wireless local area network. In some other embodiments, the antennas may be used in combination with tuning switches.

[0064] The mobile communication module 150 may be applied to the electronic device 100 to provide wireless communication solutions including 2G / 3G / 4G / 5G. The mobile communication module 150 may include at least one filter, switch, power amplifier, low noise amplifier (LNA), etc. The mobile communication module 150 may receive electromagnetic waves via the antenna 1, process the received electromagnetic waves such as filtering and amplifying, and send the electromagnetic waves to the modem processor for demodulation. The mobile communication module 150 may further amplify the signal modulated by the modem processor and convert the signal to an electromagnetic wave for emission via the antenna 1. In some embodiments, at least some functional modules of the mobile communication module 150 may be disposed in the processor 110. In some embodiments, at least some functional modules in the mobile communication module 150 may be disposed in the same device as at least some modules of the processor 110.

[0065] The modem processor may include a modulator and a demodulator. The modulator is configured to modulate a low-frequency baseband signal to be transmitted into a medium-frequency signal. The demodulator is configured to demodulate a received electromagnetic signal into a low-frequency baseband signal. The demodulator then transmits the low-frequency baseband signal obtained by demodulation to the baseband processor for processing. The low-frequency baseband signal is processed by the baseband processor and then transmitted to the application processor. The application processor outputs an acoustic signal via an audio device (such as but not limited to a speaker 170A, a receiver 170B, etc.) or displays an image or video via a display 194. In some embodiments, the modem processor may be an independent component. In some other embodiments, the modem processor may be independent from the processor 110 and is located in the same device as the mobile communication module 150 or in a separate functional module.

[0066] The wireless communication module 160 may be applied to the electronic device 100 to provide wireless communication solutions including wireless local area network (WLAN) (e.g., wireless fidelity (Wi-Fi) network), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC) technology, infrared (IR) technology, etc. The wireless communication module 160 may be one or more components incorporating at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, performs frequency modulation and filtering processing on the electromagnetic wave signal, and transmits the processed signal to the processor 110. The wireless communication module 160 may further receive a signal to be transmitted from the processor 110, perform frequency modulation and amplification on the signal, and convert the signal into an electromagnetic wave for emission via the antenna 2.

[0067] In some embodiments, antenna 1 is coupled to a mobile communication module 150 in electronic device 100, and antenna 2 is coupled to a wireless communication module 160 in electronic device 100, such that electronic device 100 can communicate with a network and other devices by using wireless communication technologies. The wireless communication technologies may include global system for mobile communications (GSM), general packet radio service (GPRS), code division multiple access (CDMA), wideband code division multiple access (WCDMA), time-division code division multiple access (TD-SCDMA), long term evolution (LTE), BT, GNSS, WLAN, NFC, FM, IR technologies, etc. GNSS may include global positioning system (GPS), global navigation satellite system (GLONASS), beidou navigation satellite system (BDS), quasi-zenith satellite system (QZSS), and / or satellite based augmentation systems (SBAS).

[0068] The electronic device 100 may perform display functions via a GPU, a display 194, an application processor, etc. The GPU is a microprocessor for image processing and is connected to the display 194 and the application processor. The GPU is configured to perform mathematical and geometric calculations and render images. The processor 110 may include one or more GPUs, which execute program instructions to generate or modify display information.

[0069] The display 194 is configured to display images, videos, etc. The display 194 includes a display panel. The display panel may be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), Miniled, MicroLed, Micro-oLed, quantum dot light emitting diodes (QLED), etc. In some embodiments, the electronic device 100 may include one or N displays 194, where N is a positive integer greater than 1.

[0070] The electronic device 100 may implement image capture functions via a camera 193, an ISP, a video codec, a GPU, a display 194, an application processor, and the like.

[0071] The ISP is configured to process data fed back by the camera 193. For example, during shooting, the shutter is pressed and light is sent through the lens to the camera's photosensitive elements. The light signal is converted into an electrical signal, which the camera's photosensitive elements send to the ISP for processing to convert the electrical signal into a visible image. The ISP may further perform algorithmic optimization on noise, brightness, and complexion of the image. The ISP may further optimize parameters such as exposure and color temperature for the shooting scenario. In some embodiments, the ISP may be located in the camera 193.

[0072] The camera 193 may be configured to capture still images or videos. An optical image of an object is generated through a lens and projected onto a photosensitive element. The photosensitive element may be a charge coupled device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The photosensitive element converts an optical signal into an electrical signal, which is then sent to the ISP for conversion into a digital image signal. The ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into an image signal in a standard format, such as RGB or YUV. In some embodiments, the electronic device 100 may include one or N cameras 193, where N is a positive integer greater than 1.

[0073] In some embodiments, electronic device 100 may include a front camera and a rear camera. There may be one or more front cameras, and there may be one or more rear cameras. The front and rear cameras may operate simultaneously. For example, the front and rear cameras may capture images simultaneously when a person wants to use the front camera to take images of a distant object and the front camera to record an image of the individual. Alternatively, a user may select to enable any one or more front cameras in the multiple front cameras, or a user may select to enable any one or more rear cameras in the multiple rear cameras.

[0074] The digital signal processor is configured to process digital signals, and may process other digital signals in addition to the digital image signal. For example, once the electronic device 100 selects a frequency, the digital signal processor is configured to perform a Fourier transform on the frequency energy.

[0075] A video codec is configured to compress or decompress digital video. Electronic device 100 may support one or more video codecs. In this manner, electronic device 100 may play or record video in multiple coding formats, e.g., moving picture experts group (MPEG) 1, MPEG 2, MPEG 3, and MPEG 4.

[0076] The NPU is a neural-network (NN) computing processor. The NPU can rapidly process input information by referring to the structure of biological neural networks, such as the transmission mode between human brain neurons, and can further perform self-learning seamlessly. Applications such as intelligent cognition of the electronic device 100, such as image recognition, face recognition, voice recognition, and text understanding, can be implemented through the NPU.

[0077] The external memory interface 120 may be used to connect to an external memory card, for example, a Micro SD card, to expand the storage capabilities of the electronic device 100. The external memory card communicates with the processor 110 via the external memory interface 120 to implement data storage functions. For example, files such as music and videos are stored on the external memory card.

[0078] The internal memory 121 may be configured to store computer executable program code. The executable program code includes instructions. The processor 110 executes the instructions stored in the internal memory 121 to perform various functional applications and data processing of the electronic device 100. The internal memory 121 may include a program storage area and a data storage area. The program storage area may store an operating system, applications required by at least one function (e.g., a sound playback function and an image playback function), and the like. The data storage area may store data created during use of the electronic device 100 (e.g., audio data, an address book, and the like). In addition, the internal memory 121 may include a high-speed random access memory, and may include a non-volatile memory, such as at least one magnetic disk storage device, a flash memory, or a universal flash storage (UFS).

[0079] The electronic device 100 may implement audio functionality, such as music playback and recording, via an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headset jack 170D, an application processor, and the like.

[0080] Audio module 170 is configured to convert digital audio information into analog audio signals for output, and is also configured to convert analog audio input to digital audio signals. Audio module 170 may be further configured to encode and decode audio signals. In some embodiments, audio module 170 may be located in processor 110, or some functional modules within audio module 170 are located within processor 110.

[0081] Speaker 170A, also referred to as a "loudspeaker," is configured to convert audio electrical signals into acoustic signals. Electronic device 100 may be used for listening to music and answering calls in a hands-free mode via speaker 170A.

[0082] Receiver 170B, also referred to as an "earphone," is configured to convert electrical audio signals into acoustic signals. When a call is answered or voice information is received via electronic device 100, receiver 170B may be held close to a person's ear to hear the sound.

[0083] The microphone 170C, also referred to as a "mike" or "mic," is configured to convert an acoustic signal into an electrical signal. When making a call or sending a voice message, a user may make a sound through the user's mouth near the microphone 170C to input an acoustic signal into the microphone 170C. At least one microphone 170C may be disposed within the electronic device 100. In some other embodiments, two microphones 170C may be disposed in the electronic device 100 to collect acoustic signals and implement noise reduction functions.

[0084] The headset jack 170D is configured to connect to a wired headset and may be a USB interface 130, a 3.5 mm open mobile terminal platform (OMTP) standard interface, or a cellular telecommunications industry association of the USA (CTIA) standard interface.

[0085] The pressure sensor 180A is configured to sense a pressure signal and can convert the pressure signal into an electrical signal. In some embodiments, the pressure sensor 180A may be disposed on the display 194. There are multiple types of pressure sensor 180A, resistive pressure sensor, inductive pressure sensor, capacitive pressure sensor, etc. The capacitive pressure sensor may include at least two parallel plates made of a conductive material. When a force is applied to the pressure sensor 180A, the capacitance between the electrodes changes. The electronic device 100 determines the pressure intensity based on the change in capacitance. When a touch operation is performed on the display 194, the electronic device 100 detects the intensity of the touch operation via the pressure sensor 180A. The electronic device 100 may also calculate the touch position based on the detection signal of the pressure sensor 180A.

[0086] The gyroscope sensor 180B may be configured to determine a movement attitude of the electronic device 100. In some embodiments, the angular velocity of the electronic device 100 about three axes (i.e., axis x, axis y, and axis z) may be determined via the gyroscope sensor 180B. The gyroscope sensor 180B may be configured to perform image stabilization during image capture.

[0087] The air pressure sensor 180C is configured to measure air pressure. In some embodiments, the electronic device 100 calculates altitude via the air pressure measured by the air pressure sensor 180C to assist in positioning and navigation.

[0088] The magnetic sensor 180D includes a Hall sensor. The electronic device 100 can detect the opening and closing of the flip cover by using the magnetic sensor 180D.

[0089] The acceleration sensor 180E may detect the acceleration of the electronic device 100 in various directions (typically on three axes). The magnitude and direction of gravity may be detected when the electronic device 100 is stationary. The acceleration sensor 180E may be further configured to identify the orientation of the electronic device, for use in applications such as switching between landscape and portrait modes and as a pedometer.

[0090] The distance sensor 180F is configured to measure distance. The electronic device 100 may measure distance by infrared or laser. In some embodiments, in a photography scenario, the electronic device 100 may measure distance by using the distance sensor 180F to perform quick focusing.

[0091] The optical proximity sensor 180G may include a light detector, such as, for example, a light emitting diode (LED) or a photodiode. The light emitting diode may be an infrared light emitting diode. The electronic device 100 emits infrared light by using the light emitting diode. The electronic device 100 detects infrared reflected light from a nearby object by using the photodiode. If sufficient reflected light is detected, the electronic device 100 may determine that there is an object near the electronic device 100. If insufficient reflected light is detected, the electronic device 100 may determine that there is no object near the electronic device 100. By using the optical proximity sensor 180G, the electronic device 100 may detect that a user is holding the electronic device 100 close to the ear for a call and automatically turn off the screen to save power. The optical proximity sensor 180G may also be used in smart cover mode or pocket mode to automatically unlock or lock the screen.

[0092] The ambient light sensor 180L is configured to sense the brightness of the ambient light. The electronic device 100 may adaptively adjust the brightness of the display 194 based on the sensed brightness of the ambient light. The ambient light sensor 180L may also be configured to automatically adjust the white balance during capture. The ambient light sensor 180L may also cooperate with the optical proximity sensor 180G to detect whether the electronic device 100 is in a pocket to avoid accidental touches.

[0093] The fingerprint sensor 180H is configured to capture a fingerprint. The electronic device 100 may use the captured fingerprint characteristics to implement fingerprint unlocking, application lock access, fingerprint photography, fingerprint call answering, and the like.

[0094] The temperature sensor 180J is configured to detect a temperature. In some embodiments, the electronic device 100 executes a temperature handling policy based on the temperature detected by the temperature sensor 180J. For example, when the temperature reported by the temperature sensor 180J exceeds a threshold, the electronic device 100 reduces the performance of a processor located near the temperature sensor 180J to reduce power consumption for thermal protection. In some other embodiments, when the temperature is lower than another threshold, the electronic device 100 heats the battery 142 to avoid an abnormal shutdown of the electronic device 100 caused by a low temperature. In some other embodiments, when the temperature is lower than yet another threshold, the electronic device 100 increases the output voltage of the battery 142 to avoid an abnormal shutdown caused by a low temperature.

[0095] The touch sensor 180K may also be referred to as a "touch panel." The touch sensor 180K may be disposed on the display 194, and the touch sensor 180K and the display 194 together form a touch screen, also referred to as a "touch screen." The touch sensor 180K is configured to detect touch operations performed on or near the touch sensor. The touch sensor may forward the detected touch operations to an application processor to determine a type of touch event. A visual output associated with the touch operation may be provided by using the display 194. In some other embodiments, the touch sensor 180K may also be disposed on a surface of the electronic device 100 at a location different from the location of the display 194.

[0096] The bone conduction sensor 180M may acquire a vibration signal. In some embodiments, the bone conduction sensor 180M may acquire a vibration signal of the vibrating bone of the human vocal cord part. The bone conduction sensor 180M may also contact the human pulse to receive a blood pressure pulsation signal. In some embodiments, the bone conduction sensor 180M may also be disposed in a headset to obtain a bone conduction headset. The audio module 170 may acquire a voice signal by analysis based on the vibration signal acquired by the bone conduction sensor 180M, which is of the vibrating bone of the vocal cord part, to implement a voice function. The application processor may analyze heart rate information based on the blood pressure pulsation signal acquired by the bone conduction sensor 180M to implement a heart rate detection function.

[0097] The buttons 190 include a power button, a volume button, etc. The buttons 190 may be mechanical buttons or touch-sensitive buttons. The electronic device 100 may receive key inputs and generate key signal inputs associated with user settings and function control of the electronic device 100.

[0098] The motor 191 may generate a vibration prompt. The motor 191 may be configured to provide an incoming vibration prompt and touch vibration feedback. For example, touch operations performed in different applications (e.g., taking pictures and playing audio) may correspond to different vibration feedback effects. The motor 191 may also correspond to different vibration feedback effects for touch operations performed in different regions of the display 194. Also, different application scenarios (e.g., time reminder, information reception, alarm clock, games) may correspond to different vibration feedback effects. The touch vibration feedback effects may be further customized.

[0099] Indicator 192 may be an indicator light and may be configured to indicate charging status and power changes, as well as to indicate messages, missed calls, notifications, and the like.

[0100] The SIM card interface 195 is configured to connect to a SIM card. The SIM card may be inserted into or removed from the SIM card interface 195 to effect contact with or separation from the electronic device 100. The electronic device 100 may support one or N SIM card interfaces, where N is a positive integer greater than 1. The SIM card interface 195 may support a Nano SIM card, a Micro SIM card, a SIM card, etc. Multiple cards may be inserted into the SIM card interface 195 at the same time. The multiple cards may be of the same type or different types. The SIM card interface 195 may accommodate different types of SIM cards. The SIM card interface 195 also accommodates an external memory card. The electronic device 100 interacts with the network through the SIM card to implement functions such as conversation and data communication. In some embodiments, the electronic device 100 uses an eSIM, i.e., an embedded SIM card. The eSIM card may be integrated into the electronic device 100 and cannot be separated from the electronic device 100.

[0101] To facilitate understanding of this application, the following describes terms used in this application.

[0102] The Mobile Industry Processor Interface (MIPI) is an open standard for mobile application processors initiated by the MIPI Alliance. MIPI is finalizing the Camera Serial Interface (CSI) specification in the Camera Working Group.

[0103] CSI-2 Protocol: The CSI-2 protocol specifies a standard data for data control and data transmission interface between the transmitting end and the receiving end. The transmitting end is the primary device and the receiving end is the secondary device. The CSI-2 protocol transmits data and clock signals over a unidirectional differential serial interface.

[0104] The CSI-2 protocol includes three layers: an application layer, a CSI-2 protocol layer, and a data physical layer.

[0105] The application layer may be configured to perform operations such as encoding and decoding on data.

[0106] The CSI-2 protocol layers include a pixel / byte packing / unpacking layer, a low level protocol (LLP) layer, and a channel management layer.

[0107] The CSI-2 protocol supports image applications with various pixel formats with pixel widths from 6 bits to 12 bits. At the transmitting end, the pixel / byte packing / unpacking layer packs the data sent from the application layer from pixel data to byte data. At the receiving end, the pixel / byte packing / unpacking layer unpacks the data sent from the LLP layer, i.e., unpacks the byte data into pixel data, and then the pixel / byte packing / unpacking layer sends the pixel data to the application layer. The low-level protocol layer includes methods for transmitting serial data events between the start and end of transmission, forwarding data to the next layer, and establishing bit-level and byte-level synchronization. At the channel management layer, the number of data channels may be one, two, three, or four. The transmitting end of the interface assigns data streams to one or more data channels. At the receiving end, the interface collects bytes from the data channels and combines them into a recombined data stream that restores the original data stream sequence.

[0108] The data physical layer specifies the transmission medium, electrical characteristics, I / O circuits, and synchronization mechanisms. The port data physical layer (PHY) conforms to the C-PHY interface, the M-PHY interface, and the D-PHY interface. The C-PHY interface and the D-PHY interface are currently widely used in parts of application processors, display screens, video interfaces, etc. The D-PHY interface includes at most four data channels for transmitting data streams and one channel for transmitting a clock signal, and each channel includes two differential signal lines.

[0109] The following describes the architecture of the D-PHY interface between the camera module and the processor.

[0110] FIG. 2 is a schematic diagram of the architecture of the D-PHY interface between the camera module and the processor.

[0111] 2, the transmitting end of the camera serial interface includes P data channels for transmitting data streams and one channel for transmitting a clock signal. The receiving end of the camera serial interface also includes P data channels for transmitting data streams and one channel for transmitting a clock signal. P is a positive integer between 1 and 4.

[0112] Each data channel includes two differential signal lines, and each channel for transmitting a clock signal also includes two differential signal lines. That is, when there are P data channels for transmitting data streams and one channel for transmitting a clock signal, there are (P+1)*2 differential signal lines. For a D-PHY interface, a maximum of 10 differential signal lines are required.

[0113] If there may be multiple camera modules in the electronic device 100, the D-PHY interface shown in Figure 2 is used between each of the multiple camera modules and the processor, and the details will not be described again in this application.

[0114] The C-PHY interface contains data channels for up to three data streams. The C-PHY interface incorporates a clock signal into the data channels, so no additional clock channel is required. Each channel contains three differential signal lines.

[0115] The following describes the architecture of the C-PHY interface between the camera module and the processor.

[0116] FIG. 3 is a schematic diagram of the architecture of the C-PHY interface between the camera module and the processor.

[0117] 3, the transmitting end of the camera serial interface includes Q data channels for transmitting data streams. The receiving end of the camera serial interface also includes Q data channels for transmitting data streams. Q is a positive integer between 1 and 3.

[0118] Each data channel contains three differential signal wires, i.e., when there are Q data channels to transmit data streams, there are Q*3 differential signal wires. For the C-PHY interface, a maximum of nine differential signal wires are required.

[0119] If there may be multiple camera modules in the electronic device 100, the C-PHY interface shown in Figure 3 is used between each of the multiple camera modules and the processor, and the details will not be described again in this application.

[0120] Camera Module: As shown in FIG. 4, the camera module includes a lens, a photosensitive sensor, an analog-to-digital converter, a digital signal processor, and an interface module.

[0121] Specifically, a scene is projected onto a photosensitive sensor through a lens, and the photosensitive sensor converts the light signal into an electrical signal. After the electrical signal is sent to an analog-to-digital converter, the electrical signal is converted into a digital image signal by using an analog-to-digital converter. Then, the digital image signal is sent to a digital signal processor. The digital signal processor is mainly used to perform post-processing on the digital image signal. The post-processing includes linear correction, noise removal, dead pixel removal, interpolation, white balance, automatic exposure control, etc.

[0122] The interface module is encapsulated in a CSI-2 protocol. The CSI-2 protocol includes an application layer, a CSI-2 protocol layer, and a data physical layer. The interface module is configured to encode or decode pixel data by using the application layer of the CSI-2 protocol. The CSI-2 protocol layer packs the encoded pixel data into a data packet, and then the interface module transmits the data packet to an application processor by using the data physical layer of the CSI-2 protocol.

[0123] The following describes an application scenario with multiple cameras.

[0124] 5 and 6 are schematic diagrams of a multi-camera system of an electronic device 100 according to an embodiment of the present application. The multi-camera system shown in FIG. 5 is only an example. In a specific implementation, the multi-camera system may include more or less camera modules.

[0125] 5 is a schematic diagram of a front camera module 501 of electronic device 100. Front camera module 501 includes camera module 5011 and camera module 5022. Camera module 5011 and camera module 5022 may be enabled simultaneously to record an image of a user.

[0126] FIG. 6 is a schematic diagram of the rear camera module 506 of the electronic device 100. The rear camera module 506 includes a camera module 5061, a camera module 5062, and a camera module 5063. For example, the camera module 5063 may be a main camera module, the camera module 5061 may be an ultra-wide-angle camera module, and the camera module 5062 may be a telephoto camera. When a user wants to capture a distant scene, the camera module 5063 is in an enabled state. When a user wants to capture a distant scene by using the ultra-wide-angle function, the camera module 5063 and the camera module 5061 are in an enabled state. When a user wants to capture a more distant scene, the camera module 5063 and the camera module 5062 are in an enabled state. The camera module 5061, the rear camera module 5062, and the rear camera module 5063 may also be enabled simultaneously to record a distant scene.

[0127] In some embodiments, when a user wishes to capture a distant scene and record an image of the user, the front camera module 501 and the rear camera module 506 may be enabled simultaneously.

[0128] As another example, currently, in order to assist the driver in driving, multiple cameras (sensors and radars) are installed on the outside of the vehicle body to monitor the road conditions outside the vehicle. Therefore, the monitoring data of the multiple cameras on the outside of the vehicle body can expand the driver's field of vision, so that the driver can see more road conditions outside the vehicle. In addition, the multiple sensors installed on the outside of the vehicle body can also detect the road conditions of the vehicle, and when the sensor or radar detects that the distance between the vehicle body and an obstacle is less than a predetermined value, an alarm or brake device is triggered to prompt the driver to prevent an accident.

[0129] 7 is a schematic diagram of an in-vehicle monitoring system. FIG. 7 is only an example of a schematic diagram of an in-vehicle monitoring system, which is not limited in this application.

[0130] As shown in FIG. 7, the vehicle exterior monitoring system has four cameras, namely, a front camera 701, a left camera 702, a right camera 703, and a rear camera 704. The front camera 701 is configured to record the road conditions in front of the vehicle, the left camera 702 is configured to record the road conditions on the left side of the vehicle, the right camera 703 is configured to record the road conditions on the right side of the vehicle, and the rear camera 704 is configured to record the road conditions behind the vehicle. The multiple cameras aggregate the road conditions and display the road conditions on a display screen in the vehicle to assist the driver in driving. In this way, the driver can be prompted to avoid obstacles in front, behind, left, and right of the vehicle while driving, and the user can be assisted in parking.

[0131] In some embodiments, the exterior surveillance system may further include more or fewer cameras, and the surveillance cameras may be located inside the vehicle, which is not a limitation of this application.

[0132] As another example, video surveillance technology is widely used in schools, shopping malls, hospitals, public transportation, unmanned stores, temporary deployment of public security investigation, etc. This is illustrated in this application by using a video surveillance system at an intersection. Video surveillance technology may be further applied to more scenarios, and the details will not be described again in this application.

[0133] 8A and 8B are schematic diagrams of a video surveillance system at an intersection.

[0134] Fig. 8A is a schematic diagram of a video monitoring area at an intersection. For example, there are three cameras (camera 1, camera 2, and camera 3) at the intersection to monitor the traffic situation at the intersection in real time. As shown in Fig. 8B, the display screen in the monitoring room displays the real-time data detected by camera 1, camera 2, and camera 3 respectively. A technician can view the monitoring data of each camera on the display screen in the monitoring room.

[0135] In some embodiments, the video surveillance system may further include more cameras, which is not a limitation of this application.

[0136] Currently, in various application scenarios mentioned above, multiple camera modules are connected to the processor in a parallel manner. When there are N cameras, N interfaces are needed on the processor side to connect to each camera separately. As the number of cameras increases, the number of interfaces on the processor side increases. As a result, the cabling on the processor side becomes complicated, making the integration on the processor side unfavorable.

[0137] The following describes a structure in which the five-camera system (three rear camera modules and two front camera modules) of the electronic device 100 are connected in a parallel manner to a processor.

[0138] 9 is a schematic diagram of multiple camera modules connected to a processor by using a parallel topology structure. The three rear camera modules are camera module 1, camera module 2, and camera module 3, respectively. The two front camera modules are camera module 3 and camera module 5, respectively.

[0139] An Inter-Integrated Circuit Master (I2C Master) is provided in the processor 910, which is connected to each camera module separately.

[0140] Each camera module is equipped with an inter-integrated circuit slave (I2C slave). Each camera module transmits data to and from the processor 910 according to the I2C specification.

[0141] The camera module 1 is connected to the interface 1 of the processor 910 via the interface 1, and the camera module 1 transmits the data packets of the camera module 1 to the interface 1 of the processor 910 via the data line 1 (lane 1) via the interface 1. The camera module 2 is connected to the interface 2 of the processor 910 via the interface 2, and the camera module 2 transmits the data packets of the camera module 2 to the interface 2 of the processor 910 via the data line 2 (lane 2) via the interface 2. The camera module 3 is connected to the interface 3 of the processor 910 via the interface 3, and the camera module 3 transmits the data packets of the camera module 3 to the interface 3 of the processor 910 via the data line 3 (lane 3) via the interface 3. The camera module 4 is connected to the interface 4 of the processor 910 via the interface 4, and the camera module 4 transmits the data packets of the camera module 4 to the interface 4 of the processor 910 via the data line 4 (lane 4) via the interface 4. The camera module 5 is connected to the interface 5 of the processor 910 via the interface 5, and the camera module 5 transmits data packets of the camera module 5 via the interface 5 to the interface 5 of the processor 910 via the data line 5 (lane 5).

[0142] The following uses the data transmission process between the camera module 1 and the processor 910 as an example for explanation.

[0143] As shown in FIG. 9, the CSI-2 protocol used by the camera module 1 includes an application layer of the camera 1, a CSI-2 protocol layer, and a data physical layer. The data physical layer includes an interface 1. The application layer of the camera 1 is configured to encode pixel data collected by the camera 1. The application layer of the camera 1 then transmits the pixel data to the CSI-2 protocol layer. The CSI-2 protocol layer is configured to receive the pixel data transmitted by the application layer of the camera 1 and pack the pixel data into data packets. The CSI-2 protocol layer then transmits the data packets to the data physical layer. The data physical layer is configured to receive the data packets transmitted by the data protocol layer, and the data physical layer transmits the data packets to the processor 910 via the interface 1 and data line 1 (lane 1). The interface 1 may be any one of the aforementioned C-PHY interface, M-PHY interface, and D-PHY interface. This is not limited in the present application.

[0144] The CSI-2 protocol used by the processor 910 includes an application layer, a CSI-2 protocol layer, and a data physical layer. The data physical layer includes an interface 1. The processor 910 receives data packets sent by the camera module 1 through the interface 1 of the data physical layer. The data physical layer then transmits the data packets to the CSI-2 protocol layer. The CSI-2 protocol layer receives the data packets sent by the data physical layer and unpacks the data packets into encoded pixel data. The CSI-2 protocol layer then transmits the encoded pixel data to the application layer. The application layer may be configured to decode the encoded pixel data to obtain the pixel data. The application layer then performs operations on the pixel data, such as pixel data compression, pixel data combining, image compression, etc. For example, when a user takes a picture of a distant scene and presses a capture button, the application layer combines the pixel data into a picture and saves the picture in the gallery of the electronic device 100.

[0145] For the process of camera module 2, camera module 3, camera module 4, and camera module 5 transmitting data to processor 910 shown in Fig. 9, please refer to the above process of camera module 1 transmitting data to the processor, and the details will not be described again in this specification.

[0146] FIG. 10 is a schematic diagram of the technical structure of multiple camera modules connected in parallel to a processor of an electronic device 100.

[0147] Each camera module is connected to a connector (board to board, BTB) of the processor 910 by using a flexible circuit board (FPC).

[0148] Specifically, camera module N is connected to the connector of processor 910 by using a flexible circuit board. Camera module N-1 is connected to the connector of processor 910 by using a flexible circuit board. By analogy, camera module 2 is connected to the connector of processor 910 by using a flexible circuit board. Camera module 1 is connected to the connector of processor 910 by using a flexible circuit board.

[0149] It can be seen that when multiple camera modules are connected in parallel to the processor 910 in the electronic device 100, each camera module needs to be connected to the processor 910 via an interface. When there are N camera modules, the processor 910 needs to be connected to each camera module via N interfaces.

[0150] When multiple camera modules are connected in parallel to a processor, as the number of camera modules increases, the number of interfaces and the number of signal pins on the processor side also increase, resulting in complex cabling on the processor side and unfavorable system integration.

[0151] Therefore, the present application provides a data transmission method and an electronic device. The method may be applied to an electronic device 100 configured with multiple input devices (e.g., camera modules). Each input device of the electronic device 100 is provided with one uplink interface and one downlink interface. The uplink interface is connected to a processor or a higher-level input device, and the downlink interface is connected to a lower-level input device or not. A processing module in each input device may process image data collected by the current input device and data sent by a lower-level input device connected to the downlink interface, and then send the processed data to a processor or a higher-level input device via the uplink interface. In this way, multiple input devices are connected in a cascaded manner, and only one of the multiple input devices needs to be connected to a processor. Therefore, the number of interfaces and the number of signal pins between the processor and the multiple input devices are reduced, and the system integration on the processing side is facilitated. In addition, it is easy to operate the input device.

[0152] The input device may be a device such as a camera module, a sensor, a radar, etc. Alternatively, the input device may be another device, which is not limited in this application.

[0153] The method may be applicable to a camera system in an electronic device 100. To improve the shooting accuracy, the number of camera modules in the electronic device 100 (e.g., a mobile phone) increases. When the electronic device 100 (e.g., a mobile phone) has multiple camera modules, the multiple camera modules may be connected in a cascaded manner, and only one camera module needs to be connected to a processor in the electronic device 100 (e.g., a mobile phone). In this way, the processor only needs one interface to be connected to one camera module. Therefore, the number of interfaces and data pins on the processor side is reduced, and system integration is facilitated. In addition, when a camera module needs to be added later, only the added camera module needs to be connected in a cascaded manner with the existing camera module, and the operation is simple.

[0154] The method may also be applicable to the vehicle-mounted surveillance system shown in Figure 7, in which multiple vehicle-mounted cameras (sensors and radars) are connected in a cascaded manner. Thus, only one of the multiple cameras needs to be connected to the processor, so the number of interfaces and data pins on the processor side is reduced. In addition, when an additional vehicle-mounted camera needs to be added, only the added camera needs to be connected to the last camera in a cascaded manner, and the operation is simple.

[0155] The method may also be applicable to the video surveillance system in the security area shown in Figure 8A and Figure 8B. In order to prevent accidents, multiple surveillance cameras need to be installed in the security area to perform omnidirectional surveillance. When a surveillance camera needs to be added to the surveillance area, the surveillance camera that needs to be added may be directly connected with the last camera in a cascade manner, so that the modification is simple and unnecessary operations are reduced.

[0156] The following describes the data transmission method provided in this embodiment of the present application by using the multi-camera module in the electronic device 100.

[0157] In some application scenarios, the electronic device 100 is configured with multiple camera modules, which may include multiple front camera modules and multiple rear camera modules. For example, the electronic device 100 includes two front camera modules and three rear camera modules, and the two front camera modules and the three rear camera modules are all connected to the processor in a cascaded manner.

[0158] The cascaded structure of multiple camera modules in the electronic device 100 will be described first.

[0159] FIG. 11 is a schematic diagram of a cascade connection of multiple camera modules in an electronic device 100.

[0160] The front camera module includes camera module 1, camera module 2, ..., camera module M. There are a total of M camera modules. The front camera module may include more or fewer camera modules. This is not limited in this application.

[0161] The rear camera module includes camera module M+1, camera module M+2, ..., camera module N. There are a total of NM camera modules. The rear camera module may include more or less camera modules. This is not a limitation in this application.

[0162] For example, when M is 2 and N is 5, the electronic device 100 has two front camera modules and three rear camera modules.

[0163] An Inter-Integrated Circuit Master (I2C Master) is provided in the processor 910, which is connected to each camera module separately.

[0164] An inter-integrated circuit slave (I2C slave) is provided in each camera module, and the inter-integrated circuit slave (I2C slave) provided in each camera module is connected to an inter-integrated circuit master (I2C master) provided in the processor 910. The processor 910 may send control signals by using the inter-integrated circuit master (I2C master), and the inter-integrated circuit slave (I2C slave) receives the control signals and configures and controls each camera module. Data is transmitted between every two camera modules and between the camera modules and the processor 910 by using the CSI-2 protocol.

[0165] As shown in FIG. 11, the CSI-2 protocol used by camera module N includes an application layer of camera N, a CSI-2 protocol layer, and a data physical layer. The data physical layer includes an uplink interface and a downlink interface, and the downlink interface of camera module N is not connected. The uplink interface of camera module N is connected to the downlink interface of camera module N-1. The application layer of camera N is configured to perform further processing on the pixel data collected by the camera module, such as pixel data encoding. The application layer of camera N then transmits the pixel data to the CSI-2 protocol layer. The CSI-2 protocol layer is configured to receive the pixel data transmitted by the application layer of the camera and pack the pixel data into data packets. The CSI-2 protocol layer then transmits the data packets to the data physical layer. The data physical layer is configured to receive the data packets transmitted by the data protocol layer. The data physical layer transmits the data packets to the data physical layer of camera module N-1 via the uplink interface and data line N (lane N).

[0166] By analogy, the downlink interface of camera module M+2 is connected to the uplink interface of camera module M+3. Camera module M+2 receives data packets of camera modules N to M+3 via the downlink interface and data line M+3. Camera module M+2 then transmits the data packets of camera module M+2 and data packets of camera modules N to M+3 to camera module M+1 via the uplink interface and data line M+2.

[0167] The downlink interface of camera module M+1 is connected to the uplink interface of camera module M+2. Camera module M+1 receives data packets of camera module M+2 through camera module N via the downlink interface and data line M+2. Camera module M+1 then transmits the data packets of camera module M+1 and the data packets of camera module N through camera module M+2 to camera module M via the uplink interface and data line M+1.

[0168] The downlink interface of camera module M is connected to the uplink interface of camera module M+1. Camera module M receives data packets of camera module M+1 from camera module N via the downlink interface and data line M+1. Camera module M then transmits the data packets of camera module M and data packets of camera module M+1 from camera module N to camera module M-1 via the uplink interface and data line M.

[0169] By analogy, the downlink interface of camera module 2 is connected to the uplink interface of camera module 3. Camera module 2 receives data packets of camera module 3 from camera module N via the downlink interface and data line 3 (lane 3). Camera module 2 then transmits the data packets of camera module 2 and the data packets of camera module 3 from camera module N to camera module 1 via the uplink interface and data line 2 (lane 2).

[0170] The downlink interface of camera module 1 is connected to the uplink interface of camera module 2. Camera module 1 receives data packets of camera module N from camera module 2 via the downlink interface. Camera module 1 then transmits the data packets of camera module 1 and the data packets of camera module N from camera module 2 to processor 910 via the uplink interface and data line 1 (lane 1).

[0171] The CSI-2 protocol used by camera module M+2, camera module M+1, camera module M, ..., camera module 2, and camera module 1 is the same as the CSI-2 protocol used by camera module N. In addition, the processes of collecting pixel data, packing pixel data, and transmitting data packets of camera module M+1, camera module M+2, camera module M, ..., camera module 2, and camera module 1 are the same as those of camera module N. Details will not be described again in this application.

[0172] The CSI-2 protocol used by the processor 910 includes an application layer, a CSI-2 protocol layer, and a data physical layer. The processor 910 receives data packets sent by the camera module 1 from the camera module 1 through the downlink interface of the data physical layer. The data packets from the camera module 1 through the camera module N are unpacked into encoded pixel data of the camera module 1 through the camera module N by using the CSI-2 protocol layer of the processor 910. The CSI-2 protocol layer then sends the encoded pixel data to the application layer. The application layer may be configured to decode the encoded pixel data to obtain the pixel data. The application layer then performs operations such as pixel data compression, pixel data combination, image compression, etc. on the pixel data of the camera module 1 through the camera module N. For example, when a user takes a picture of a distant scene and presses a capture button, the application layer combines the pixel data of the camera module M+1 through the camera module N into a picture and saves the picture in the gallery of the electronic device 100. If a user takes a selfie while photographing a distant scene, when the user presses the capture button, the application layer aggregates the pixel data from camera modules 1 through M into a picture and stores the picture in the gallery of electronic device 100.

[0173] In some embodiments, the pixel data collected by each camera module may be separately composited into one picture and stored in the gallery. For example, when the processor receives pixel data collected by a total of NM camera modules from camera module M+1 to camera module N, the processor separately composites the pixel data collected by camera module M+1 to camera module N into a picture by using the application layer to generate a total of NM pictures. The processor stores the NM pictures in the gallery.

[0174] It should be noted that the form of the picture generated by the camera modules is not limited in this application. The pixel data collected by each camera module may be combined into one picture, the pixel data collected by multiple camera modules may be combined into one picture, or the pixel data collected by any one or more camera modules may be combined into one picture. This is not limited in this application.

[0175] The uplink interface and downlink interface of each camera module and the interface of the processor in the above embodiment may be any one of a C-PHY interface, an M-PHY interface, or a D-PHY interface, which is not limited in this application.

[0176] FIG. 12 is a schematic diagram of the architecture of a D-PHY interface between a cascaded camera module and a processor according to one embodiment of the present application.

[0177] 12, the camera module 1 is connected to the processor 910. The transmitting end of the camera serial interface of the camera module 1 includes P data channels for transmitting data streams and one channel for transmitting a clock signal. The receiving end of the camera serial interface on the processor 910 side also includes P data channels for transmitting data streams and one channel for transmitting a clock signal. P is a positive integer between 1 and 4.

[0178] Each data channel includes two differential signal lines, and each channel for transmitting a clock signal also includes two differential signal lines. That is, when there are P data channels for transmitting data streams and one channel for transmitting a clock signal, there are (P+1)*2 differential signal lines. For a D-PHY interface, a maximum of 10 differential signal lines are required.

[0179] The inter-integrated circuit master (I2C Master) on the processor 910 side transmits a control signal to the inter-integrated circuit slave (I2C Slaver) via the I2C bus.

[0180] When there are multiple camera modules in the electronic device 100, the multiple camera modules are connected in a cascade manner. For example, for camera module 2, camera module 2 is connected to camera module 1 in a cascade manner.

[0181] 12, the camera module 2 is connected to the camera module 1 in a cascade manner. The receiving end of the camera serial interface of the camera module 2 includes P data channels for transmitting data streams and one channel for transmitting a clock signal. The receiving end of the camera serial interface of the camera module 1 includes P data channels for transmitting data streams and one channel for transmitting a clock signal. P is a positive integer between 1 and 4.

[0182] When there are multiple camera modules, a connection is established between the multiple camera modules in a cascade manner between camera module 1 and camera module 2. Details will not be described again in this specification.

[0183] An inter-integrated circuit slave (I2C slave) is provided in each camera module, and an inter-integrated circuit master (I2C master) is provided in the processor 910. The processor 910 transmits a control signal to the inter-integrated circuit slave (I2C slave) of each camera module via the I2C bus. The inter-integrated circuit slave (I2C slave) receives a control signal that controls enabling and disabling of the camera module.

[0184] Similarly, in this embodiment of the present application, a C-PHY interface may be used between the cascaded camera module and the processor. The manner in which the cascaded camera module is connected to the processor 910 via the C-PHY interface is similar to the manner in which the cascaded camera module is connected to the processor 910 via the C-PHY interface. Details are not described again in this specification.

[0185] FIG. 13 is a schematic diagram of a technical structure of multiple cascaded camera modules connected to a processor 910.

[0186] Every two camera modules are connected by using a flexible circuit board (FPC), and the first camera module is connected to the connector of the processor 910 by using a flexible circuit board.

[0187] Specifically, camera module N is connected to camera module N-1 by using an FPC. By analogy, camera module 3 is connected to camera module 2 by using an FPC, camera module 2 is connected to camera module 1 by using an FPC, and camera module 1 is connected to a connector on the processor 910 side by using a flexible circuit board.

[0188] For example, when M is 2 and N is 5, the electronic device 100 has two front camera modules and three rear camera modules. The two front camera modules are connected to the three rear camera modules in a cascaded manner, and only one camera module (e.g., one front module) needs to be connected to the connector on the processor 910 side by using a flexible circuit board. In this way, the processor 910 only needs 10 differential signal lines to be connected to one camera module. When the processor 910 performs data transmission with one camera module by using four data channels and one clock channel, only 10 differential signal lines are needed on the processor 910 side. Compared with the prior art in which the processor 910 is connected to five camera modules separately in parallel, 40 differential signal lines are reduced on the processor 910 side.

[0189] Therefore, in this embodiment of the present application, the number of interfaces and data pins of the processor 910 is reduced since only one camera module needs to be connected to the processor 910. Thus, system integration of the processor 910 is facilitated. In addition, this makes it easier to add devices later, and modifications are simple since only the added device needs to be cascaded with the existing device.

[0190] The electronic device 100 may be controlled so that the front camera module and the rear camera module are enabled simultaneously.

[0191] In some embodiments, when a user wants the rear camera module to be able to capture a distant scene and at the same time wants the front camera module to be able to record an image of the user, the electronic device 100 may control the front camera module and the rear camera module to be enabled simultaneously.

[0192] When the front camera module and the rear camera module need to be enabled at the same time, the addresses of the N camera modules are stored in the processor. The processor first finds the addresses of the N camera modules. Then, the inter-integrated circuit master (I2C Master) sends the addresses of the N camera modules to the inter-integrated circuit slave (I2C Slaver) of each camera module via the I2C bus. After receiving the addresses of the N camera modules, each inter-integrated circuit slave (I2C Slaver) compares their addresses with the addresses of the camera modules of the inter-integrated circuit slave. If the addresses of the camera modules in the addresses of the N camera modules match the addresses of the camera modules of the inter-integrated circuit slave, the N camera modules send confirmation information to the inter-integrated circuit master (I2C Master) by using the inter-integrated circuit slave (I2C Slaver) via the I2C bus. After receiving the confirmation information, the inter-integrated circuit master (I2C Master) controls the N camera modules to be enabled.

[0193] When the camera module is enabled, the application layer, the CSI-2 protocol layer, and the data physical layer of the camera module are all enabled.

[0194] The electronic device 100 may be controlled to have a front camera module enabled or may be controlled to have a rear camera module enabled.

[0195] It will first be described how the electronic device 100 controls the rear camera module to be enabled.

[0196] In some embodiments, a user may choose to enable only the rear camera module to capture distant scenes, or the user can choose to enable only the front camera module to record images of the user.

[0197] For example, camera module 1 to camera module M are front camera modules, and camera module M-1 to camera module N are rear camera modules. Of course, camera module 1 to camera module M may alternatively be rear camera modules, and camera module M-1 to camera module N are front camera modules. This is not limited in the present application.

[0198] When the user selects to enable only the rear camera module to capture distant scenes, the processor 910 stores the addresses of the N camera modules. The processor 910 first finds the addresses of the camera modules M-1 to N. Then, the inter-integrated circuit master (I2C Master) sends the addresses of the camera modules M-1 to N to the inter-integrated circuit slave (I2C Slaver) of each camera module via the I2C bus. After receiving the addresses of the camera modules M-1 to N, each inter-integrated circuit slave (I2C Slaver) compares their addresses with the addresses of the camera modules of the inter-integrated circuit slave. If the addresses of the camera modules in the addresses of the camera modules M-1 to N match the addresses of the camera modules of the inter-integrated circuit slave, the camera modules M-1 to N send first confirmation information to the inter-integrated circuit master (I2C Master) by using the respective inter-integrated circuit slave (I2C Slaver) via the I2C bus. After receiving the first confirmation information, the inter-integrated circuit master (I2C Master) controls camera module M-1 to camera module N to be enabled. If any of the addresses of camera module 1 to camera module N does not match the address of the camera module of the inter-integrated circuit slave, none of camera module 1 to camera module N sends confirmation information to the inter-integrated circuit master (I2C Master), and none of camera module 1 to camera module N is enabled.

[0199] Because pixel data collected by cameras M-1 through camera module N needs to be transmitted to processor 910 via camera modules 1 through M, the CSI-2 protocol layer and data physical layer of camera modules 1 through N need to be enabled, and none of the application layers of camera modules 1 through N are enabled.

[0200] Specifically, after the inter-integrated circuit master (I2C Master) controls the camera modules M-1 to N to be enabled, the inter-integrated circuit master (I2C Master) transmits the addresses of the camera modules 1 to M to the inter-integrated circuit slaves (I2C Slavers) of the camera modules 1 to M via the I2C bus. After receiving the addresses of the camera modules M from the camera module 1, the inter-integrated circuit slaves (I2C Slavers) of the camera modules 1 to M compare these addresses with the addresses of the inter-integrated circuit slaves of the camera modules 1 to M. If one of the addresses of the camera modules 1 to M matches the address of the camera module of the inter-integrated circuit slave, the camera modules 1 to N transmit second confirmation information to the inter-integrated circuit master (I2C Master) by using the respective inter-integrated circuit slaves (I2C Slavers) via the I2C bus. After receiving the second confirmation information, the integrated circuit master (I2C Master) controls the CSI-2 protocol layer and the data physical layer of the camera modules 1 to N to be enabled, and controls the application layer of the camera modules 1 to N to be disabled. In this way, it can be guaranteed that the pixel data collected by the camera M-1 to camera modules N are transmitted to the processor via the camera modules 1 to N, and the energy consumption of the camera modules 1 to N can be reduced.

[0201] It should be noted that the processor may simultaneously control the camera modules M-1 to N to be enabled, and control the CSI-2 protocol layer and the data physical layer of the camera modules 1 to N to be enabled, thereby improving the response speed of the camera modules and the processing efficiency of the processor.

[0202] In some embodiments, the electronic device 100 may determine by default that the CSI-2 protocol layer and data physical layer of the N camera modules from camera module 1 to camera module N are always in an enabled state. When a user selects to enable only the rear camera module to capture a distant scene, the processor stores the addresses of the N camera modules. The processor first finds the addresses of camera modules M-1 to N. Then, the inter-integrated circuit master (I2C Master) sends the addresses of camera modules M-1 to N to each inter-integrated circuit slave (I2C Slaver) via the I2C bus. After receiving the addresses of camera modules M-1 to N, each inter-integrated circuit slave (I2C Slaver) compares their addresses with the addresses of the camera modules of the inter-integrated circuit slave. If the address of the camera module in the address of the camera module M-1 to the camera module N matches the address of the camera module of the inter-integrated circuit slave, the camera module M-1 to the camera module N send third confirmation information to the inter-integrated circuit master (I2C Master) by using the respective inter-integrated circuit slave (I2C Slaver) via the I2C bus. After receiving the third confirmation information, the inter-integrated circuit master (I2C Master) controls the application layer of the camera module M-1 to the camera module N to be enabled. If any of the addresses of the camera module 1 to the camera module N does not match the address of the camera module of the inter-integrated circuit slave, none of the camera module 1 to the camera module N sends confirmation information to the inter-integrated circuit master (I2C Master), and none of the camera module 1 to the camera module N is enabled.Although the pixel data collected by the camera M-1 to the camera module N needs to be transmitted to the processor via the camera module 1 to the camera module N, the CSI-2 protocol layer and the data physical layer of the camera module 1 to the camera module N are enabled, so that the integrated circuit master (I2C Master) does not need to enable the CSI-2 protocol layer and the data physical layer of the camera module 1 to the camera module N by configuring the address. In this way, the operation steps of the processor are reduced.

[0203] When a user needs to enable a primary camera of a rear camera module (e.g., camera module X, where X is greater than M and less than or equal to N), the manner in which electronic device 100 enables camera module X is the same as the manner in which electronic device 100 enables a rear camera module, and the details will not be described again here.

[0204] Next, the electronic device 100 will be described controlling the rear camera module to be enabled.

[0205] When the user selects to enable only the front camera module to record the user's image, the processor stores the addresses of the N camera modules. The processor first finds the addresses of the camera modules 1 to M-1. Then, the inter-integrated circuit master (I2C Master) sends the addresses of the camera modules 1 to M-1 to each inter-integrated circuit slave (I2C Slaver) via the I2C bus. After receiving the addresses of the camera modules M-1 from the camera modules 1, each inter-integrated circuit slave (I2C Slaver) compares their addresses with the addresses of the camera modules of the inter-integrated circuit slave. If the addresses of the camera modules in the addresses of the camera modules 1 to M-1 match the addresses of the camera modules of the inter-integrated circuit slave, the camera modules 1 to M-1 send fourth confirmation information to the inter-integrated circuit master (I2C Master) by using the respective inter-integrated circuit slave (I2C Slaver) via the I2C bus. After receiving the fourth confirmation information, the inter-integrated circuit master (I2C Master) controls the camera modules 1 to M-1 to be enabled. If none of the addresses of camera module M-1 through camera module N match the address of a camera module of the inter-integrated circuit slave, none of camera module M-1 through camera module N sends confirmation information to the inter-integrated circuit master (I2C Master), and none of camera module M-1 through camera module N is enabled.

[0206] Because pixel data collected by camera 1 through camera module M-1 does not need to be transmitted to the processor via camera modules M-1 through N, neither the CSI-2 protocol layer nor the data physical layer of cameras M-1 through N need to be enabled.

[0207] The following describes the data packet transmission process from camera module 1 to camera module N.

[0208] Currently, when N camera modules are connected to a processor by using a parallel structure, the format of the data packet of each camera module is shown in FIG.

[0209] As shown in FIG. 14, the format of the data packet includes a packet header, a data packet, and a packet footer.

[0210] The packet header may include a data identifier, a data packet size (word count), an error correcting code (ECC), etc. The data packet contains the pixel data to be transmitted. The packet footer contains additional information for the data packet, such as a verification codeword.

[0211] In this embodiment of the present application, when N camera modules are connected to the processor by using a cascade structure, the data packet of camera module N is sent to the processor through N-1 camera modules. In order to identify which camera module the data packet received by the processor is from, in this application, an identification field is added to the packet header of the data packet format to identify the camera module to which the data packet belongs. For example, this field may be called a HOP field. It will be understood that this field may be added to any position, for example, the data packet or the packet footer. The specific position of the identification field is not limited in this application.

[0212] FIG. 15 is a schematic diagram of a format of a data packet including an identification field (eg, a HOP field).

[0213] The data packet including the identification field shown in FIG. 15 may be applicable to the data packets described in the embodiments of FIGS.

[0214] As shown in FIG. 15, the format of the data packet includes a packet header, a data packet, and a packet footer.

[0215] The packet header may include a data identifier, a data packet size (word count), an error correcting code (ECC), etc. The packet header further includes an identification field (e.g., a HOP field), and a value of the HOP field is used to identify the location of the camera module. That is, the processor may identify which camera module the data packet is from based on the value of the HOP field in the packet header.

[0216] In some embodiments, the identification field (e.g., the HOP field) may be added to the end of the packet header, to the beginning of the packet header, or in the middle of the packet header, although this is not a limitation herein.

[0217] The data packet contains the pixel data to be transmitted. The packet footer contains additional information for the data packet, such as an identification codeword.

[0218] FIG. 16 shows an example of a data packet transmission process for N camera modules.

[0219] The data packet transmitting process of the N camera modules shown in FIG. 16 may be applicable to the data packet transmitting process described in the embodiment shown in FIG.

[0220] For ease of explanation, a data packet of camera module N is denoted as Pn, a data packet of camera module N-1 is denoted as Pn-1, and by analogy, a data packet of camera module 2 is denoted as P2, and a data packet of camera module 1 is denoted as P1.

[0221] For camera module N: Camera module N collects pixel data, packs the pixel data into a data packet (Pn), and sets the value of the identification field (HOP field) in Pn to 0, i.e., HOP field = 0. Camera module N then transmits Pn to the downlink interface of camera module N-1 via the uplink interface and data line N (lane N).

[0222] For example, when N is 5, camera module 5 collects pixel data, packs the pixel data into a data packet (P5), and sets the value of the identification field (HOP field) in P5 to 0, i.e., HOP field=0. Then, camera module 5 transmits P5 to the downlink interface of camera module 4 via the uplink interface and data line 5 (lane 5).

[0223] For camera module N-1: Processing data from camera module N-1: Camera module N-1 collects pixel data, packs the pixel data into a data packet (Pn-1), and sets the value of the identification field (HOP field) in Pn-1 to 0, i.e., HOP field = 0. Camera module N-1 then transmits Pn-1 to the downlink interface of camera module N-2 via the uplink interface and data line N-1 (lane N-1).

[0224] For example, when N is 5, camera module 4 collects pixel data, packs the pixel data into a data packet (P4), and sets the value of the identification field (HOP field) in P4 to 0, i.e., HOP field=0. Then, camera module 4 transmits P4 to the downlink interface of camera module 3 via the uplink interface and data line 4 (lane 4).

[0225] Handling Pn: Camera module N-1 receives Pn through the downlink interface and unpacks Pn into a data block. Then, camera module N-1 detects the HOP field of the data block of camera module N and adds 1 to the HOP field so that the HOP field is 1. The data block is then packed into a data packet Pn. Then, camera module N-1 transmits Pn to the uplink interface of camera module N-1 through the downlink interface. Finally, Pn is transmitted from the uplink interface of camera module N-1 to the downlink interface of camera module N-2 through data line N-1 (lane N-1).

[0226] It should be noted that camera module N-1 may process the data of camera module N-1 and process Pn synchronously to improve the data transmission efficiency of each camera module.

[0227] For example, when N is 5, camera module 4 receives P5 via the downlink interface and unpacks P5 into a data block. Then, camera module 4 detects the HOP field of the data block of camera module 5 and adds 1 to the HOP field so that the HOP field becomes 1. The data block is then packed into data packet P5. Then, camera module 4 transmits P5 to the uplink interface of camera module 4 via the downlink interface. Finally, P5 is transmitted from the uplink interface of camera module 4 to the downlink interface of camera module 3 via data line 4 (lane 4).

[0228] For camera module N-2: Processing data from camera module N-2: Camera module N-2 collects pixel data, packs the pixel data into a data packet (Pn-2), and sets the value of the identification field (HOP field) in Pn-2 to 0, i.e., HOP field = 0. Camera module N-2 then transmits Pn-2 to the downlink interface of camera module N-3 via the uplink interface and data line N-2 (lane N-2).

[0229] For example, when N is 5, camera module 3 collects pixel data, packs the pixel data into a data packet (P3), and sets the value of the identification field (HOP field) in P3 to 0, i.e., HOP field=0. Then, camera module 3 transmits P3 to the downlink interface of camera module 2 via the uplink interface and data line 3 (lane 3).

[0230] Processing of Pn-1: Camera module N-2 receives Pn-1 through the downlink interface and unpacks Pn-1 into a data block. Then, camera module N-2 detects the HOP field of the data block of camera module N-1 and adds 1 to the HOP field so that the HOP field is 1. The data block is then packed into a data packet Pn-1. Then, camera module N-2 transmits Pn-1 to the uplink interface of camera module N-2 through the downlink interface. Finally, Pn-1 is transmitted from the uplink interface of camera module N-2 to the downlink interface of camera module N-3 through data line N-2 (lane N-2).

[0231] For example, when N is 5, camera module 3 receives P4 through the downlink interface and unpacks P4 into a data block. Then, camera module 3 detects the HOP field of the data block of camera module 4 and adds 1 to the HOP field so that the HOP field is 1. The data block is then packed into a data packet P4. Then, camera module 3 transmits P4 to the uplink interface of camera module 3 through the downlink interface. Finally, P4 is transmitted from the uplink interface of camera module 3 to the downlink interface of camera module 2 through data line 3 (lane 3).

[0232] Handling Pn: Camera module N-2 receives Pn through the downlink interface and unpacks Pn into a data block. Then, camera module N-2 detects the HOP field of the data block of camera module N and adds 1 to the HOP field so that the HOP field becomes 2. The data block is then packed into a data packet Pn. Then, camera module N-2 transmits Pn to the uplink interface of camera module N-2 through the downlink interface. Finally, Pn is transmitted from the uplink interface of camera module N-2 to the downlink interface of camera module N-3 through data line N-2 (lane N-2).

[0233] For example, when N is 5, camera module 3 receives P5 through the downlink interface and unpacks P5 into a data block. Then, camera module 3 detects the HOP field of the data block of camera module 5 and adds 1 to the HOP field so that the HOP field becomes 2. The data block is then packed into data packet P5. Then, camera module 3 transmits P5 to the uplink interface of camera module 3 through the downlink interface. Finally, P5 is transmitted from the uplink interface of camera module 3 to the downlink interface of camera module 2 through data line 3 (lane 3).

[0234] It should be noted that camera module N-2 may process the data of camera module N-2, process Pn-1, and process Pn synchronously to improve the data transmission efficiency of each camera module.

[0235] By analogy, for the data processing process of camera module N-3, camera module N-4 to camera module 3, please refer to the data processing process of camera module N-2, and the details will not be described again in this application.

[0236] For Camera Module 2: Processing the data from camera module 2: Camera module 2 collects pixel data, packs the pixel data into a data packet (P2), and sets the value of the identification field (HOP field) in P2 to 0, i.e., HOP field=0. Camera module 2 then transmits P2 to the downlink interface of camera module 1 via the uplink interface and data line 2 (lane 2).

[0237] Processing Pn to P3: Camera module 2 receives Pn to P3 through the downlink interface, and there are a total of N-2 data packets from Pn to P3. First, Pn to P3 are unpacked into data blocks separately, and camera module 2 detects the HOP fields of camera module 3 to camera module N. The HOP fields of camera module 3 to camera module N are added by 1 separately, and then camera module 2 packs the data blocks of camera module 3 to camera module N into data packets. Then camera module 2 sends Pn to P3 through the downlink interface to the uplink interface of camera module 2. Finally, Pn is sent from the uplink interface of camera module 2 to P3 through data line 2 (lane 2) to the downlink interface of camera module 1.

[0238] For example, when N is 5, camera module 2 receives P5 via the downlink interface and unpacks P5 into a data block. Then, camera module 2 detects the HOP field of the data block of camera module 5 and adds 1 to the HOP field so that the HOP field becomes 3. The data block is then packed into data packet P5. Then, camera module 2 transmits P5 to the uplink interface of camera module 2 via the downlink interface. Finally, P5 is transmitted from the uplink interface of camera module 2 to the downlink interface of camera module 1 via data line 2 (lane 2).

[0239] Similarly, when N is 5, camera module 2 receives P4 via the downlink interface and unpacks P4 into a data block. Then, camera module 2 detects the HOP field of the data block of camera module 4 and adds 1 to the HOP field so that the HOP field becomes 2. The data block is then packed into data packet P4. Then, camera module 2 transmits P4 to the uplink interface of camera module 2 via the downlink interface. Finally, P4 is transmitted from the uplink interface of camera module 2 to the downlink interface of camera module 1 via data line 2 (lane 2).

[0240] Similarly, when N is 5, camera module 2 receives P3 through the downlink interface and unpacks P3 into a data block. Then, camera module 2 detects the HOP field of the data block of camera module 3 and adds 1 to the HOP field so that the HOP field is 1. The data block is then packed into a data packet P3. Then, camera module 2 transmits P3 to the uplink interface of camera module 2 through the downlink interface. Finally, P3 is transmitted from the uplink interface of camera module 2 to the downlink interface of camera module 1 through data line 2 (lane 2). It should be noted that camera module 1 may synchronously process the data of camera module 1 and process Pn to P3, which improves the data transmission efficiency of each camera module.

[0241] For camera module 1: Processing the data from camera module 1: Camera module 1 collects pixel data, packs the pixel data into a data packet (P1), and sets the value of the identification field (HOP field) in P1 to 0, i.e., HOP field=0. Camera module 1 then transmits P1 to the processor's downlink interface via the uplink interface and data line 1 (lane 1).

[0242] Processing Pn to P2: Camera module 1 receives Pn to P2 through the downlink interface, and there are a total of N-1 data packets from Pn to P2. First, Pn to P2 are unpacked into data blocks separately, and camera module 1 detects the HOP fields of camera module 2 to camera module N. The HOP fields of camera module 2 to camera module N are added by 1 separately, and then camera module 1 packs the data blocks of camera module 2 to camera module N into data packets. Then camera module 1 sends P2 to Pn to the uplink interface of camera module 1 through the downlink interface. Finally, Pn to P2 are sent from the uplink interface of camera module 1 through data line 1 (lane 1) to the downlink interface of the processor.

[0243] For example, when N is 5, camera module 1 receives P5 via the downlink interface and unpacks P5 into a data block. Then, camera module 1 detects the HOP field of the data block of camera module 5 and adds 1 to the HOP field so that the HOP field becomes 4. The data block is then packed into data packet P5. Then, camera module 1 transmits P5 to the uplink interface of camera module 1 via the downlink interface. Finally, P5 is transmitted from the uplink interface of camera module 1 to the downlink interface of the processor via data line 1 (lane 1).

[0244] Similarly, when N is 5, camera module 1 receives P4 via the downlink interface and unpacks P4 into a data block. Then, camera module 1 detects the HOP field of camera module 4's data block and adds 1 to the HOP field so that the HOP field becomes 3. The data block is then packed into data packet P4. Then, camera module 1 transmits P4 to the uplink interface of camera module 1 via the downlink interface. Finally, P4 is transmitted from the uplink interface of camera module 1 to the downlink interface of the processor via data line 1 (lane 1).

[0245] Similarly, when N is 5, camera module 1 receives P3 via the downlink interface and unpacks P3 into a data block. Then, camera module 1 detects the HOP field of the data block of camera module 3 and adds 1 to the HOP field so that the HOP field becomes 2. The data block is then packed into data packet P3. Then, camera module 1 transmits P3 to the uplink interface of camera module 1 via the downlink interface. Finally, P3 is transmitted from the uplink interface of camera module 1 to the downlink interface of the processor via data line 1 (lane 1).

[0246] Similarly, when N is 5, camera module 1 receives P2 via the downlink interface and unpacks P2 into a data block. Then, camera module 1 detects the HOP field of the data block of camera module 2 and adds 1 to the HOP field so that the HOP field is 1. The data block is then packed into data packet P2. Then, camera module 1 transmits P2 to the uplink interface of camera module 1 via the downlink interface. Finally, P2 is transmitted from the uplink interface of camera module 1 to the downlink interface of the processor via data line 1 (lane 1).

[0247] It should be noted that camera module 1 may process the data of camera module 1, Pn to P2 synchronously, which improves the data transmission efficiency of each camera module.

[0248] 17A and 17B are a flowchart of a data transmission method according to one embodiment of the present application.

[0249] The data transmission method shown in FIGS. 17A and 17B may also be applied to a data packet transmission process in which multiple camera modules are cascaded in the multi-camera module cascade structure shown in FIG.

[0250] The following describes a process by which, in some implementations, pixel data collected by camera module X is sent to processor 910 when a user needs to enable only a primary camera in a rear camera module (e.g., camera module X, where X is a positive integer greater than M and less than or equal to N) to capture a distant scene.

[0251] Since the data packets of camera module X need to be transmitted to processor 910 by using the CSI-2 protocol layer and data physical layer of camera module 1 to camera module X-1, the CSI-2 protocol layer and data physical layer of camera module 1 to camera module X-1 need to be enabled, and none of the application layers of camera module 1 to camera module X-1 are enabled.

[0252] For example, when X is 3, M is 2, and N is 5, after camera module 3 is enabled to collect pixel data, the data packets of camera module 3 need to be sent to processor 910 by using the CSI-2 protocol layer and the data physical layer of camera module 1 and camera module 2. Therefore, the CSI-2 protocol layer and the data physical layer of camera module 1 and camera module 2 need to be enabled, and the application layer of camera module 1 and camera module 2 is not enabled either.

[0253] S1701: The processor 910 transmits the address of the camera module X to each camera module.

[0254] The electronic device 100 may store the address of each camera module, and the electronic device 100 may control the camera modules to be enabled or disabled based on the address of the camera module.

[0255] When a user requests to enable a primary camera (e.g., camera module X) in the rear camera modules, the processor 910 first obtains the address of the camera module X and transmits the address of the camera module X to each camera module. If N camera modules are disposed in the electronic device 100, the processor 910 transmits the address of the camera module X to the N camera modules separately.

[0256] For example, when a user requests to enable camera module 3 in the rear camera module, the processor 910 first obtains the address of camera module 3 and transmits the address of camera module 3 to each camera module. If five camera modules are arranged in the electronic device 100, the processor 910 transmits the address of camera module 3 to the five camera modules separately.

[0257] S1702: The camera module X transmits confirmation information to the processor 910.

[0258] After the N camera modules receive the address of camera module X, each camera module matches the received address of camera module X with the address of the camera module. If the address of camera module X does not match the address of the camera module, the camera module does not respond. If the address of camera module X matches the address of the camera module, the camera module X sends confirmation information to the processor 910.

[0259] The processor 910 receives and responds to the confirmation information sent by the camera module X, and the processor 910 controls the camera module X to be enabled. When the camera module X is enabled, the application layer, the CSI-2 protocol layer, and the data physical layer of the camera module X are all enabled.

[0260] For example, after five camera modules receive the address of camera module 3, each camera module matches the received address of camera module 3 with the address of its camera module. If the address of camera module 3 does not match the address of its camera module, the camera module does not respond. If the address of camera module 3 matches the address of its camera module, the camera module 3 sends confirmation information to the processor 910.

[0261] The processor 910 receives and responds to the confirmation information sent by the camera module 3, and the processor 910 controls the camera module 3 to be enabled. When the camera module 3 is enabled, the application layer, the CSI-2 protocol layer, and the data physical layer of the camera module 3 are all enabled.

[0262] S1703: Camera module X starts collecting pixel data, and packs the pixel data into a data packet, where the value of the identification field in the data packet is 0.

[0263] For example, camera module 3 begins collecting pixel data and packs the pixel data into data packets.

[0264] In order to enable the processor 910 to identify the camera module to which the data packet belongs, an identification field is added to the data packet. Specifically, for the format of the data packet to which the identification field is added, please refer to the embodiment shown in Figure 15. The details will not be described again in this application.

[0265] The camera module X sets the value of the identification field of the current level data packet to 0.

[0266] For example, the camera module 3 sets the value of the identification field of the current level data packet to 0.

[0267] S1704: Camera module X transmits a data packet to camera module X-1.

[0268] For example, camera module 3 sends a data packet to camera module 2.

[0269] S1705: Camera module X-1 receives the data packet and adds 1 to the value of the identification field in the data packet of camera module X.

[0270] Camera module X-1 receives the data packet of camera module X sent by camera module X, and first unpacks the data packet of camera module X into a data block. Camera module X-1 detects the identification field of camera module X, and adds 1 to the value of the identification field in the data packet of camera module X. In this case, the value of the identification field in the data packet of camera module X is 1, and camera module X-1 packs the data block of camera module X into the data packet.

[0271] S1706: Camera module X-1 transmits the data packet of camera module X to camera module X-2.

[0272] By analogy, each camera module transmits a data packet of camera module X to the camera module of the next level, and each camera module of the next level adds 1 to the value of the identification field in the received data packet.

[0273] S1707: Camera module 2 receives the data packet of camera module 3, and adds 1 to the value of the identification field in the data packet of camera module X, so that the value of the identification field is X-2.

[0274] Camera module 2 receives the data packet of camera module X sent by camera module 3, and first unpacks the data packet of camera module X into a data block. Camera module X-1 detects the identification field of camera module X and adds 1 to the value of the identification field in the data packet of camera module X. In this case, the value of the identification field in the data packet of camera module X is X-2, and camera module 2 packs the data block of camera module 3 into the data packet.

[0275] For example, camera module 2 receives the data packet of camera module 3 sent by camera module 3, and first unpacks the data packet of camera module 3 into a data block. Camera module 2 detects the identification field of camera module 3, and adds 1 to the value of the identification field in the data packet of camera module 3. In this case, the value of the identification field in the data packet of camera module 3 is 1, and camera module 2 packs the data block of camera module 3 into the data packet.

[0276] S1708: Camera module 2 transmits the data packet of camera module X to camera module 1.

[0277] For example, camera module 2 transmits a data packet of camera module 3 to camera module 1.

[0278] S1709: Camera module 1 receives the data packet and adds 1 to the value of the identification field in the data packet of camera module X.

[0279] Camera module 1 receives the data packet of camera module X sent by camera module 2, and first unpacks the data packet of camera module X into a data block. Camera module X-1 detects the identification field of camera module X, and adds 1 to the value of the identification field in the data packet of camera module X. In this case, the value of the identification field in the data packet of camera module X is X-1.

[0280] For example, camera module 1 receives the data packet of camera module 3 sent by camera module 2, and first unpacks the data packet of camera module 3 into a data block. Camera module 1 detects the identification field of camera module 3, and adds 1 to the value of the identification field in the data packet of camera module 3. In this case, the value of the identification field in the data packet of camera module 3 is 2, and then camera module 1 packs the data block into the data packet.

[0281] S1710: Camera module 1 transmits a data packet of camera module X to processor 910.

[0282] For example, camera module 1 sends a data packet for camera module 3 to processor 910.

[0283] S1711: The processor 910 receives a data packet of camera module X sent by camera module 1, and the processor 910 may identify the camera module to which the data packet belongs based on the value of the identification field in the data packet.

[0284] When the value of the identification field in a data packet received by the processor 910 is X-1, the data packet belongs to camera module X. When the value of the identification field in a data packet received by the processor 910 is N-1, the data packet belongs to camera module N.

[0285] For example, when the value of the identification field in a data packet received by processor 910 is 2, the data packet belongs to camera module 3 .

[0286] The processor 910 unpacks the data packets into encoded data blocks by using the CSI-2 protocol layer. The CSI-2 protocol layer then sends the encoded pixel data to the application layer. The application layer may be configured to decode the encoded pixel data to obtain the pixel data. The application layer then performs operations on the pixel data, such as pixel data compression, pixel data combining, image compression, etc. For example, when a user takes a picture of a distant scene and presses a capture button, the application layer combines the pixel data into a picture and saves the picture in the gallery of the electronic device 100.

[0287] In some embodiments, a user wants to add a rear camera module to electronic device 100. For ease of explanation, the camera module that needs to be added is called camera module N+1. In this case, the user needs to connect the uplink interface of camera module N+1 to the downlink interface of camera module N, and the downlink interface of camera module N+1 is not connected. After camera module N+1 is enabled and collects pixel data, camera module N+1 packs the collected pixel data into a data packet, and camera module N+1 sets the value of an identification field in the data packet to 0. Then, camera module N+1 transmits the data packet to camera module N via the uplink interface of camera module N+1 and data line N+1. Then, the data packet of camera module N+1 is transmitted from camera module N to processor 910 via camera module 1. After the data packet of camera module N+1 is transmitted to processor 910, the value of the identification field in the data packet of camera module N+1 is N, and the processor may determine that the data packet is from camera module N+1 based on the value N of the identification field in the data packet. For the process of the data packet of camera module N+1 being sent from camera module N to processor 910 via camera module 1, please refer to the embodiment shown in Figure 16. The details will not be described again in this application.

[0288] From the above embodiment, it can be seen that when a user wants to add a camera module, the user only needs to connect the camera module that needs to be added with the existing camera module in a cascade manner, and the line connection relationship between the processor and the camera module does not need to be changed. Therefore, the operation is simple.

[0289] In some application scenarios, the electronic device 100 is configured with multiple camera modules, which may include multiple front camera modules and multiple rear camera modules. The multiple front camera modules are connected in a cascaded manner, the multiple rear camera modules are connected in a cascaded manner, and the multiple front camera modules and the multiple rear camera modules are connected in parallel to an analog switch. The electronic device 100 may control the multiple front camera modules to be enabled or the multiple rear camera modules to be enabled by using the analog switch.

[0290] In the above embodiment, multiple camera modules are connected in a cascade manner. If camera module 1 to camera module M are front camera modules and camera module M-1 to camera module N are rear camera modules, it can be seen that when a user selects to enable only the rear camera modules to capture a distant scene, the rear camera modules of camera M-1 to camera module N are enabled, and none of camera module 1 to camera module M are enabled. Since the pixel data collected by camera M-1 to camera module N needs to be transmitted to the processor via camera module 1 to camera module N, the CSI-2 protocol layer and data physical layer of camera module 1 to camera module N need to be enabled.

[0291] The CSI-2 protocol layer and data physical layer of camera module 1 through camera module N may be enabled in the following manner:

[0292] Method 1: After camera modules M-1 to N are enabled, the processor sends a control signal to control the CSI-2 protocol layer and data physical layer of camera modules 1 to N to be enabled.

[0293] Method 2: The CSI-2 protocol layer and data physical layer of camera module 1 to camera module N are always enabled by default. Then, the processor sends a control signal to control the application layer of camera module M-1 to camera module N to be enabled.

[0294] From the above schemes, it can be seen that the operation of scheme 1 is complicated, and the processor needs to send a control signal to control the enabling of the CSI-2 protocol layer and data physical layer of camera module 1 to camera module N, while in scheme 2, the CSI-2 protocol layer and data physical layer of camera module 1 to camera module N are always enabled by default, which increases the consumption of the camera modules.

[0295] Therefore, in the following embodiments of the present application, the front camera module is separated from the rear camera module, and the front camera module or the rear camera module is selected to be enabled by using an analog switch.

[0296] FIG. 18 is a system diagram of another cascade connection of camera modules.

[0297] As shown in FIG. 18, the system includes a rear camera module, a front camera module, an analog switch, and a processor.

[0298] The front camera module includes M camera modules, such as camera module 1, camera module 2, ..., camera module M. The rear camera module includes NM camera modules, such as camera module M+1, camera module M+2, ..., camera module N.

[0299] For the structure description of the rear camera module, the front camera module and the processor, please refer to the above embodiments, and the details will not be described again in this application.

[0300] 18, in the case of a front camera module, the downlink interface of camera module M is not connected, and the uplink interface of camera module M is connected to the downlink interface of camera module M-1. By analogy, the downlink interface of camera module 2 is connected to the uplink interface of camera module 3. The uplink interface of camera module 2 is connected to the downlink interface of camera module 1, and the uplink interface of camera module 1 is connected to contact 2 (second contact) of the analog switch.

[0301] For the rear camera module, the downlink interface of camera module N is not connected, and the uplink interface of camera module N is connected to the downlink interface of camera module N-1. By analogy, the downlink interface of camera module M+2 is connected to the uplink interface of camera module M+3. The uplink interface of camera module M+2 is connected to the downlink interface of camera module M+1, and the uplink interface of camera module M+1 is connected to contact 1 (first contact) of the analog switch.

[0302] Contact 0 (third contact) of the analog switch is connected to the downlink interface of the processor.

[0303] When a user needs to enable the rear camera module to capture a distant scene, the processor uses an I / O pin to send a control signal by controlling contact 0 (third contact) of the analog switch to be connected to contact 1 (first contact) of the analog switch. In this way, the processor can receive pixel data from the rear camera modules (camera module M+1, camera module M+2, ..., camera module N).

[0304] For the process of pixel data of the rear camera modules (camera module M+1, camera module M+2, ..., camera module N) being sent to the processor, please refer to embodiment 1, and the details will not be described again here.

[0305] When a user needs to enable the front camera module to record the user's image, the processor uses an I / O pin to send a control signal by controlling contact 0 (third contact) of the analog switch to be connected to contact 2 (second contact) of the analog switch. In this way, the processor can receive pixel data from the front camera modules (camera module M+1, camera module M+2, ..., camera module M).

[0306] For the process of pixel data of the front camera modules (camera module 1, camera module 2, ..., camera module M) being sent to the processor, please refer to embodiment 1, and the details will not be described again here.

[0307] FIG. 19 is a schematic diagram of a technical structure of multiple cascaded camera modules connected to a processor 910 by using analog switches.

[0308] The front camera module is connected to a first contact of the analog switch. The rear camera module is connected to a second contact of the analog switch. The third contact of the analog switch is connected to the processor 910.

[0309] There are M front camera modules and NM rear camera modules.

[0310] Specifically, for a front camera module, camera module M is connected to camera module M-1 by using a flexible circuit board. By analogy, camera module M+2 is connected to camera module M+1 by using a flexible circuit board, and camera module M+1 is connected to the second contact of the analog switch.

[0311] For the rear camera module, camera module N is connected to camera module M-1 by using a flexible circuit board (FPC). By analogy, camera module 2 is connected to camera module 1 by using a flexible circuit board, and camera module 1 is connected to the first contact of the analog switch.

[0312] The third contact of the analog switch is connected to a connector on the processor 910 side by using a flexible circuit board.

[0313] In this way, the front camera module is separated from the rear camera module, and the front camera module or the rear camera module is selected to be enabled by using an analog switch. Thus, the operation of the processor 910 can be reduced, and unnecessary consumption of the camera module can be reduced.

[0314] 20A and 20B are a flowchart of another data transmission method according to Embodiment 2 of the present application.

[0315] The electronic device 100 is equipped with a front camera module and a rear camera module. The front camera module includes M camera modules, such as camera module 1, camera module 2, ..., camera module M. The rear camera module includes NM camera modules, such as camera module M+1, camera module M+2, ..., camera module X, ..., camera module N.

[0316] For example, when X is 4, M is 2, and N is 5, the front camera module includes two camera modules, such as camera module 1 and camera module 2. The rear camera module includes three camera modules, such as camera module 3, camera module 4, and camera module 5.

[0317] The front camera module and the rear camera module are connected by using an analog switch. For details, please refer to the embodiment shown in Figure 18. The details will not be described again in this application.

[0318] The following describes a process in which pixel data collected by camera module X is sent to processor 910 when a user needs to enable a primary camera in a rear camera module (e.g., camera module X, where X is a positive integer greater than M and less than or equal to N) to capture a distant scene.

[0319] S2001: The processor 910 controls the third contact of the analog switch to be connected to the second contact of the analog switch.

[0320] In this manner, the electronic device 100 may enable one or more of the rear camera modules by address configuration.

[0321] In some embodiments, the processor 910 may also control the second contact of the analog switch to be connected to the first contact of the analog switch. In this manner, the electronic device 100 may enable one or more of the front camera modules through the address configuration.

[0322] S2002: The processor 910 transmits the address of the camera module X to each camera module of the rear camera module.

[0323] Since the data packets of camera module X need to be transmitted to processor 910 by using the CSI-2 protocol layer and data physical layer of camera module M+1 through camera module X-1, the CSI-2 protocol layer and data physical layer of camera module 1 through camera module X-1 need to be enabled, and none of the application layer of camera module 1 through camera module X-1 is enabled. None of the CSI-2 protocol layer, data physical layer, and application layer of camera module X+1 through camera module N are enabled.

[0324] For example, when X is 4, M is 2, and N is 5, after camera module 4 is enabled to collect pixel data, the data packets of camera module 4 need to be sent to processor 910 by using the CSI-2 protocol layer and the data physical layer of camera module 3. Therefore, the CSI-2 protocol layer and the data physical layer of camera module 3 need to be enabled, and the application layer of camera module 3 is not enabled.

[0325] The electronic device 100 may store the address of each camera module, and the electronic device 100 may control the camera modules to be enabled or disabled based on the address of the camera module.

[0326] When a user requests to enable a primary camera in a rear camera module (e.g., camera module X), the processor 910 first obtains the address of camera module X and sends the address of camera module X to NM camera modules from camera module M+1 to camera module N.

[0327] For example, when a user requests to enable camera module 4 in the rear camera module, processor 910 obtains the address of camera module 4 and sends the address of camera module 4 to three camera modules, namely camera module 3, camera module 4, and camera module 5.

[0328] S2003: The camera module X transmits confirmation information to the processor 910.

[0329] After the NM camera modules from camera module M+1 to camera module N receive the address of camera module X, the NM camera modules from camera module M+1 to camera module N match the received address of camera module X with the address of each camera module. If the address of camera module X does not match the address of each camera module, the camera module does not respond. If the address of camera module X matches the address of each camera module, the camera module X sends confirmation information to the processor 910.

[0330] The processor 910 receives and responds to the confirmation information sent by the camera module X, and the processor 910 controls the camera module X to be enabled. When the camera module X is enabled, the application layer, the CSI-2 protocol layer, and the data physical layer of the camera module X are all enabled.

[0331] For example, after the three camera modules from camera module 3 to camera module 5 receive the address of camera module 4, the three camera modules from camera module 3 to camera module 5 match the received address of camera module 4 with the address of each camera module. If the address of camera module 4 does not match the address of each camera module, the camera module does not respond. If the address of camera module 4 matches the address of each camera module, the camera module 4 sends confirmation information to the processor 910.

[0332] The processor 910 receives and responds to the confirmation information sent by the camera module 4, and the processor 910 controls the camera module 4 to be enabled. When the camera module 4 is enabled, the application layer, the CSI-2 protocol layer, and the data physical layer of the camera module 4 are all enabled.

[0333] S2004: Camera module X starts collecting pixel data, packs the pixel data into a data packet, and the value of the identification field in the data packet is 0.

[0334] In order to enable the processor 910 to identify the camera module to which the data packet belongs, an identification field is added to the data packet. Specifically, for the format of the data packet to which the identification field is added, please refer to the embodiment shown in Figure 15. The details will not be described again in this application.

[0335] The camera module X sets the value of the identification field of the current level data packet to 0.

[0336] For example, camera module 4 begins collecting pixel data, packs the pixel data into a data packet, and sets the value of an identification field in the data packet to zero.

[0337] S2005: Camera module X transmits a data packet to camera module X-1.

[0338] Camera module X-1 receives the data packet of camera module X sent by camera module X, and first unpacks the data packet of camera module X into a data block. Camera module X-1 detects the identification field of camera module X, and adds 1 to the value of the identification field in the data packet of camera module X. In this case, the value of the identification field in the data packet of camera module X is 2, and camera module X-1 packs the data block of camera module X into the data packet.

[0339] By analogy, each camera module transmits a data packet of camera module X to the camera module of the next level, and each camera module of the next level adds 1 to the value of the identification field in the received data packet.

[0340] S2006: Camera module M+2 receives the data packet, adds 1 to the value of the identification field in the data packet, and the value of the identification field is XM-2.

[0341] S2007: Camera module M+2 transmits a data packet to camera module M+1.

[0342] S2008: Camera module M+1 receives the data packet, and adds 1 to the value of the identification field in the data packet, so that the value of the identification field is XM-1.

[0343] For example, the camera module 3 receives the camera module 4 data packet sent by the camera module 4, and first unpacks the camera module 4 data packet into a data block. The camera module 3 detects the camera module 4 identification field, and adds 1 to the value of the identification field in the camera module 4 data packet. In this case, the value of the identification field in the camera module 3 data packet is 1. Then, the camera module 3 packs the data block into the data packet.

[0344] S2009: The camera module M+1 transmits a data packet to the processor 910.

[0345] S2010: The processor 910 receives the data packet of the camera module X transmitted by the camera module M+1.

[0346] The processor 910 may identify the camera module to which the data packet belongs based on the value of an identification field in the data packet.

[0347] When the value of the identification field in a data packet received by the processor 910 is XM-1, the data packet belongs to camera module X. When the value of the identification field in a data packet received by the processor 910 is NM-1, the data packet belongs to camera module N.

[0348] For example, when the value of the identification field in a data packet received by processor 910 is 2, the data packet belongs to camera module 4 .

[0349] The processor 910 unpacks the data packets into encoded data blocks by using the CSI-2 protocol layer, which then sends the encoded data blocks to the application layer. The application layer may be configured to decode the encoded data blocks to obtain pixel data. The application layer then performs operations on the pixel data, such as pixel data compression, pixel data combining, image compression, etc. For example, when a user takes a picture of a distant scene and presses a capture button, the application layer combines the pixel data into a picture and saves the picture in the gallery of the electronic device 100.

[0350] In some application scenarios, the electronic device 100 is configured with multiple camera modules, which may include multiple front camera modules and multiple rear camera modules, the multiple front camera modules are connected in a cascaded manner, the multiple rear camera modules are connected in a cascaded manner, and the multiple front camera modules and the multiple rear camera modules are connected in parallel to the processor 910.

[0351] The multiple camera modules used in the above embodiment are connected in series to the processor 910, and only one interface on the processor 910 side needs to be connected to the camera modules. When multiple camera modules are enabled at the same time, the pixel data simultaneously received by the interface will increase, resulting in data congestion on the interface. In order to reduce the excessive pixel data simultaneously received by the interface, the front camera module and the rear camera module are separated in the following embodiments of the present application. The front camera module is connected to the processor 910 in a cascaded manner, and the rear camera module is connected to the processor 910 in a cascaded manner. In this way, data congestion caused by too much data at the same time on the processing side interface can be avoided. In addition, the data processing speed of the processor 910 can also be improved.

[0352] FIG. 21 is a system diagram of another cascade connection of camera modules.

[0353] As shown in FIG. 21, the system includes a rear camera module, a front camera module, and a processor 910.

[0354] The front camera module includes camera module 1, camera module 2, ..., camera module M. There are a total of M camera modules. The front camera module may include more or fewer camera modules. This is not limited in this application.

[0355] The rear camera module includes camera module M+1, camera module M+2, ..., camera module N. There are a total of NM camera modules. The rear camera module may include more or less camera modules. This is not a limitation in this application.

[0356] Please refer to the above embodiments for the structure description of the rear camera module, the front camera module and the processor 910. The details will not be described again in this application.

[0357] The first inter-integrated circuit master may be disposed on the processor 910 side, and the first inter-integrated circuit master may be configured to control the NM camera modules of the rear camera module to be enabled or disabled.

[0358] A second inter-integrated circuit master may be disposed on the processor 910 side, and the second inter-integrated circuit master may be configured to control the M camera modules of the front camera module to be enabled or disabled.

[0359] In some embodiments, the front camera module and the rear camera module may also be controlled by the same inter-integrated circuit master or by different inter-integrated circuit masters, which is not limited herein.

[0360] 21, in the rear camera module, the downlink interface of camera module N is not connected, and the uplink interface of camera module N is connected to the downlink interface of camera module N-1. By analogy, the uplink interface of camera module M+2 is connected to the downlink interface of camera module M+1. The downlink interface of camera module M+1 is connected to the first downlink interface of processor 910.

[0361] In the front camera module, the downlink interface of camera module M is not connected, and the uplink interface of camera module M is connected to the downlink interface of camera module M-1. By analogy, the uplink interface of camera module 2 is connected to the downlink interface of camera module 1. The uplink interface of camera module 1 is connected to the second downlink interface of processor 910.

[0362] In this way, the pixel data of the rear camera module is sent to the processor 910 through the first downlink interface on the processing side, and the pixel data of the front camera module is sent to the processor 910 through the second downlink interface on the processing side. This avoids the case where the interface needs to send an excessive amount of data at the same time when there is only one interface on the processor 910 side and the front camera module and the rear camera module are enabled at the same time, and the data pressure on the interface is reduced.

[0363] FIG. 22 is a schematic diagram of a technical structure of multiple cascaded camera modules connected in parallel to a processor 910.

[0364] There are M front camera modules, which are connected to the processor 910. There are NM rear camera modules, which are connected to the processor.

[0365] In the front camera module, the camera module M is connected to the camera module M-1 by using a flexible circuit board. By analogy, the camera module 1 is connected to the second connector of the processor 910 by using a flexible circuit board.

[0366] For a rear camera module, camera module N is connected to camera module N-1 by using a flexible circuit board (FPC). By analogy, camera module M+2 is connected to camera module M+1 by using a flexible circuit board, and camera module M+1 is connected to the first connector of processor 910 by using a flexible circuit board.

[0367] 23A to 23C are flowcharts of a data transmission method according to Embodiment 3 of the present application.

[0368] The electronic device 100 is equipped with a front camera module and a rear camera module. The front camera module includes M camera modules, such as camera module 1, camera module 2, ..., camera module E, ..., camera module M. The rear camera module includes NM camera modules, such as camera module M+1, camera module M+2, ..., camera module X, ..., camera module N.

[0369] For example, when X is 4, M is 2, and N is 5, the front camera module includes two camera modules, such as camera module 1 and camera module 2. The rear camera module includes three camera modules, such as camera module 3, camera module 4, and camera module 5.

[0370] The front camera module is connected to the first downlink interface of the processor 910, and the rear camera module is connected to the second downlink interface of the processor 910. Specifically, refer to the embodiment shown in Figure 21. Details will not be described again in this application.

[0371] The following describes a process by which pixel data collected by camera module X and camera module E are sent to processor 910 when a user enables the primary camera of a rear camera module (e.g., camera module X, where X is a positive integer greater than M and less than or equal to N) to capture a distant scene and the primary camera of a front camera module (e.g., camera module E, where E is a positive integer greater than or equal to 1 and less than or equal to M) to record an image of the user.

[0372] Since the data packets of camera module X need to be transmitted to processor 910 by using the CSI-2 protocol layer and data physical layer of camera module M+1 to camera module X-1, the CSI-2 protocol layer and data physical layer of camera module M+1 to camera module X-1 need to be enabled, and none of the application layers of camera module M+1 to camera module X-1 are enabled.

[0373] For example, when X is 4, M is 2, N is 5, and E is 2, after camera module 4 is enabled to collect pixel data, the data packets of camera module 4 need to be sent to processor 910 by using the CSI-2 protocol layer and the data physical layer of camera module 3. Therefore, the CSI-2 protocol layer and the data physical layer of camera module 3 need to be enabled, and the application layer of camera module 3 is not enabled.

[0374] Since the data packets of camera module E need to be transmitted to processor 910 by using the CSI-2 protocol layer and data physical layer of camera module 1 to camera module E-1, the CSI-2 protocol layer and data physical layer of camera module 1 to camera module E-1 need to be enabled, and none of the application layers of camera module 1 to camera module E-1 are enabled.

[0375] For example, when X is 4, M is 2, N is 5, and E is 2, after camera module 2 is enabled to collect pixel data, the data packets of camera module 2 need to be sent to processor 910 by using the CSI-2 protocol layer and the data physical layer of camera module 1. Therefore, the CSI-2 protocol layer and the data physical layer of camera module 1 need to be enabled, and the application layer of camera module 1 is not enabled.

[0376] S2301: The processor 910 transmits the address of the camera module E to each camera module of the front camera modules.

[0377] Since the data packets of camera module E need to be transmitted to processor 910 by using the CSI-2 protocol layer and data physical layer of camera module 1 through camera module E-1, the CSI-2 protocol layer and data physical layer of camera module 1 through camera module E-1 need to be enabled, and none of the application layer of camera module 1 through camera module E-1 is enabled. None of the CSI-2 protocol layer, data physical layer, and application layer of camera module X+1 through camera module N are enabled.

[0378] For example, when a user requests to enable camera module 2 in the rear camera module, the processor 910 first obtains the address of camera module 2 and sends the address of camera module 2 to two camera modules, i.e., camera module 1 and camera module 2.

[0379] The electronic device 100 may store the address of each camera module, and the electronic device 100 may control the camera modules to be enabled or disabled based on the address of the camera module.

[0380] When a user requests to enable the primary camera of a front camera module (e.g., camera module E), the processor 910 of the electronic device 100 first obtains the address of camera module E and sends the address of camera module E to camera module 1 to camera module M.

[0381] S2302: The camera module E transmits confirmation information to the processor 910.

[0382] After the M camera modules receive the address of camera module E, each camera module matches the received address of camera module E with the address of its camera module. If the address of camera module E does not match the address of its camera module, the camera module does not respond. If the address of camera module E matches the address of its camera module, the camera module E sends confirmation information to the processor 910.

[0383] The processor 910 receives and responds to the confirmation information sent by the camera module E, and the processor 910 controls the camera module E to be enabled. When the camera module E is enabled, the application layer, the CSI-2 protocol layer, and the data physical layer of the camera module E are all enabled.

[0384] For example, after the two camera modules from camera module 1 to camera module 2 receive the address of camera module 2, the two camera modules from camera module 1 to camera module 2 match the received address of camera module 2 with the address of each camera module. If the address of camera module 2 does not match the address of each camera module, the camera module does not respond. If the address of camera module 2 matches the address of each camera module, the camera module 2 sends confirmation information to the processor 910.

[0385] The processor 910 receives and responds to the confirmation information sent by the camera module 2, and the processor 910 controls the camera module 2 to be enabled. When the camera module 2 is enabled, the application layer, the CSI-2 protocol layer, and the data physical layer of the camera module 24 are all enabled.

[0386] S2303: The processor 910 transmits the address of the camera module X to each camera module of the rear camera module.

[0387] Since the data packets of camera module X need to be transmitted to processor 910 by using the CSI-2 protocol layer and data physical layer of camera module M+1 through camera module X-1, the CSI-2 protocol layer and data physical layer of camera module M+1 through camera module X-1 need to be enabled, and none of the application layer of camera module M+1 through camera module X-1 is enabled. None of the CSI-2 protocol layer, data physical layer, and application layer of camera module X+1 through camera module N are enabled.

[0388] The electronic device 100 may store the address of each camera module, and the electronic device 100 may control the camera modules to be enabled or disabled based on the address of the camera module.

[0389] When a user requests to enable a primary camera in a rear camera module (e.g., camera module X), the processor 910 of the electronic device 100 first obtains the address of camera module X and transmits the address of camera module X to camera module M+1 through camera module N.

[0390] For example, when a user requests to enable camera module 4 in the rear camera module, processor 910 obtains the address of camera module 4 and sends the address of camera module 4 to three camera modules, namely camera module 3, camera module 4, and camera module 5.

[0391] S2304: The camera module X transmits confirmation information to the processor 910.

[0392] After the NM camera modules receive the address of the camera module X, each camera module matches the received address of the camera module X with the address of the camera module. If the address of the camera module X does not match the address of the camera module, the camera module does not respond. If the address of the camera module X matches the address of the camera module, the camera module X sends a confirmation information to the processor 910.

[0393] The processor 910 receives and responds to the confirmation information sent by the camera module X, and the processor 910 controls the camera module X to be enabled. When the camera module X is enabled, the application layer, the CSI-2 protocol layer, and the data physical layer of the camera module X are all enabled.

[0394] For example, after the three camera modules, camera module 3, camera module 4, and camera module 5, receive the address of camera module 4, camera module 3, camera module 4, and camera module 5 match the received address of camera module 4 with the address of each camera module. If the address of camera module 4 does not match the address of each camera module, the camera module does not respond. If the address of camera module 4 matches the address of each camera module, camera module 4 sends confirmation information to processor 910.

[0395] The processor 910 receives and responds to the confirmation information sent by the camera module 4, and the processor 910 controls the camera module 4 to be enabled. When the camera module 4 is enabled, the application layer, the CSI-2 protocol layer, and the data physical layer of the camera module 24 are all enabled.

[0396] S2301, S2302, S2303, and S2304 may be performed synchronously, which is not a limitation in this application.

[0397] S2305: The camera module E starts collecting pixel data, and packs the pixel data into a data packet, where the value of the identification field in the data packet is 0.

[0398] For example, camera module 2 begins collecting pixel data, packs the pixel data into a data packet, and sets the value of an identification field in the data packet to zero.

[0399] S2306: The camera module E transmits a data packet to the camera module E-1.

[0400] Camera module E-1 receives the data packet of camera module E sent by camera module E, and first unpacks the data packet of camera module E into a data block. Camera module E-1 detects the identification field of camera module E, and adds 1 to the value of the identification field in the data packet of camera module E. In this case, the value of the identification field in the data packet of camera module X is 2, and camera module E-1 packs the data block of camera module E into the data packet.

[0401] Analogously, each camera module transmits the data packet of camera module E to the camera module of the next level, and the camera module of each level adds 1 to the value of the identification field in the received data packet.

[0402] S2307: Camera module 2 receives the data packet, adds 1 to the value of the identification field in the data packet, and the value of the identification field is E-2.

[0403] S2008: Camera module 2 transmits a data packet to camera module 1.

[0404] S2009: Camera module 1 receives the data packet, and adds 1 to the value of the identification field in the data packet, so that the value of the identification field is E-1.

[0405] For example, camera module 1 receives the camera module 2 data packet sent by camera module 2, and first unpacks the camera module 2 data packet into a data block. Camera module 1 detects the camera module 2 identification field, and adds 1 to the value of the identification field in the camera module 2 data packet. In this case, the value of the identification field in the camera module 2 data packet is 1. Then, camera module 1 packs the data block into the data packet.

[0406] S2010: The camera module 1 transmits a data packet to the processor 910.

[0407] S2311: Camera module X starts collecting pixel data, and packs the pixel data into a data packet, and the value of the identification field is 0.

[0408] For example, camera module 4 begins collecting pixel data, packs the pixel data into a data packet, and sets the value of an identification field in the data packet to zero.

[0409] S2312: Camera module X transmits a data packet to camera module X-1.

[0410] Camera module X-1 receives the data packet of camera module X sent by camera module X, and first unpacks the data packet of camera module X into a data block. Camera module X-1 detects the identification field of camera module X, and adds 1 to the value of the identification field of camera module X. In this case, the value of the identification field of camera module X is 2, and camera module X-1 packs the data packet of camera module X into a data block.

[0411] By analogy, each camera module sends a data packet of camera module X to the camera module of the next level, and each level camera module adds 1 to the value of the identification field in the received data packet. S2313: Camera module M+2 receives a data packet and adds 1 to the value of the identification field in the data packet, and the value of the identification field is XM-2.

[0412] S2314: Camera module M+2 transmits a data packet to camera module M+1.

[0413] S2315: Camera module M+1 receives the data packet, adds 1 to the value of the identification field in the data packet, and the value of the identification field is XM-1.

[0414] For example, when N is 5, X is 4, and M is 2, the camera module 3 receives the camera module 4 data packet sent by the camera module 4, and first unpacks the camera module 4 data packet into a data block. The camera module 3 detects the camera module 4 identification field, and adds 1 to the value of the identification field in the camera module 4 data packet. In this case, the value of the identification field in the camera module 3 data packet is 1. Then, the camera module 3 packs the data block into the data packet.

[0415] S2316: Camera module M+1 sends a data packet to processor 910.

[0416] S2317: The processor 910 receives data packets from the camera module E and the camera module X.

[0417] Processor 910 receives a data packet belonging to camera module X and sent by camera module M+1 via a first downlink interface.

[0418] Processor 910 receives data packets belonging to camera module E and transmitted by camera module 1 via the second downlink interface.

[0419] The processor 910 may identify the camera module to which the data packet belongs based on the value of an identification field in the data packet.

[0420] For example, the processor 910 first determines that the data packet received by the first downlink interface is from data collected by the rear camera module. When the value of the identification field in the data packet is XM-1, the processor 910 identifies that the data packet belongs to the camera module X in the rear camera module.

[0421] The processor 910 first determines that the data packet received by the second downlink interface is from data collected by the front camera module. When the value of the identification field in the data packet is E-1, the processor 910 identifies that the data packet belongs to the camera module E in the front camera module.

[0422] After the processor 910 receives the data packets of the camera module E and the camera module X, the CSI-2 protocol layer unpacks the data packets of the camera module E and the camera module X into encoded data blocks, and then sends the encoded data blocks to the application layer. The application layer may be configured to decode the encoded data blocks to obtain pixel data. The application layer then performs operations on the pixel data, such as pixel data compression, pixel data combination, image compression, and the like. For example, the pixel data of the camera module E is integrated into a picture, the pixel data of the camera module X is integrated into a picture, and the picture taken by the camera module E and the picture taken by the camera module X are stored in the gallery of the electronic device 100.

[0423] S2305 to S2310 and S2311 to S2316 may be performed synchronously, although this is not a limitation in the present application.

[0424] Based on the above embodiments shown in FIGS. 21 to 23C, the following describes application scenarios in the embodiments of the present application.

[0425] 24A to 24C are example UI diagrams of switching between the front camera interface and the rear camera interface in a current video calling application scenario.

[0426] 24A illustrates an example of a video call application interface. The video call application interface includes a video interface 240, a video interface 241, and action control options 243. The video interface 240 is a user image captured by a front camera module of the electronic device 100. The video interface 241 is a user image captured by another electronic device that is performing a video call with the electronic device 100. The user image may be a user image captured by a front camera module of the other electronic device, or a user image captured by a rear camera module of the other electronic device. The action control options 243 include a camera switching control 2401, a hang up control 2402, and other controls 2403.

[0427] As shown in Figure 24B, when a user wants to switch the current video image to an image captured by the rear camera module, the camera switching control 2401 may receive a user click operation and respond to the user clicking the camera switching control 2401. As shown in Figure 24C, the electronic device 100 displays the video image 244 captured by the rear camera module.

[0428] In some embodiments, when a user is on a video call with a friend, electronic device 100 may enable the front and rear camera modules to simultaneously collect and display images.

[0429] 25A-25C are example UI views when electronic device 100 enables the front and rear camera modules to collect and display images simultaneously.

[0430] FIG. 25A illustrates an example of a video call application interface. The video call application interface includes a video interface 240, a video interface 241, and an action control option 244. The video interface 240 is a user image collected by a front camera module of the electronic device 100. The video interface 241 is a user image collected by another electronic device that performs a video call with the electronic device 100. The user image may be a user image collected by a front camera module of the other electronic device, or a user image collected by a rear camera module of the other electronic device. The action control option 245 includes a camera switching control 2401, a hang up control 2402, an other control 2403, and a control 2404. The control 2404 may receive a user click operation. In response to the user click operation, the front camera module and the rear camera module of the electronic device 100 are enabled to collect images simultaneously.

[0431] As shown in Figure 25B, control 2404 may receive a user click operation when the user wants to enable the front and rear camera modules of electronic device 100 to collect images simultaneously. In response to the user click operation, electronic device 100 displays the user interface shown in Figure 25C.

[0432] The user interface includes a video interface 240, a video interface 241, a video interface 246, and an operation control option 244. For the video interface 240, the video interface 241, and the operation control option 244, please refer to the above-mentioned embodiment. The details will not be described again in this specification. The video interface 246 is an image collected by the rear camera module of the electronic device 100.

[0433] In this way, the user may enable the front camera module and the rear camera module to collect and display images at the same time. The images collected by the front camera module and the rear camera module are sent to a friend who is video calling with the user. This solves the problem that in some application scenarios, the electronic device 100 can only enable the front camera module to collect and display images or the rear camera module to collect and display images, thus improving the user experience.

[0434] Of course, this application scenario is also applicable to the embodiments shown in Figures 11 to 17B, which is not limited herein.

[0435] Depending on the context, the term "when" as used in the above embodiments may be interpreted as meaning "if," "after," "in response to determining," or "in response to detecting." Similarly, depending on the context, the phrase "when it is determined" or "when (a described condition or event) is detected" may be interpreted as "when it is determined," "in response to determining," "when (a described condition or event) is detected," or "in response to detecting (a described condition or event)."

[0436] All or part of the above-mentioned embodiments may be implemented by using software, hardware, firmware, or any combination thereof. When software is used to implement the embodiments, the embodiments may be fully or partially implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded into a computer and executed, the procedures or functions according to the embodiments of the present application are generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or another programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from a computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website, computer, server, or data center to another website, computer, server, or data center in a wired (e.g., coaxial cable, optical fiber, or digital subscriber line) manner or in a wireless (e.g., infrared, radio wave, or microwave) manner. The computer-readable storage medium may be any available medium accessible by a computer, or may be a data storage device that integrates one or more available media, such as a server or a data center. The usable media may be magnetic media (eg, floppy disks, hard disks, or magnetic tapes), optical media (eg, DVDs), semiconductor media (eg, solid state drives), and the like.

[0437] Those skilled in the art may understand that all or part of the steps of the method in the embodiment may be implemented by a computer program that instructs relevant hardware. The program may be stored in a computer-readable storage medium. When the program is executed, the steps of the method in the embodiment are performed. The aforementioned storage medium includes any medium that can store program code, such as a ROM, a random access memory RAM, a magnetic disk, an optical disk, etc. [Explanation of symbols]

[0438] 100 Electronic Devices 110 Processor 120 External Memory Interface 121 Internal Memory 130 USB interface 140 Charging Management Module 141 Power Management Module 142 Battery 150 Mobile communication module 2G / 3G / 4G / 5G 160 Wireless communication module BT / WLAN / GNSS / NFC / IR / FM 170 Audio Module 170A Speaker 170B Receiver 170C Microphone 170D Headset Jack 180 Sensor Module 180A PRESSURE SENSOR 180B Gyroscope Sensor 180C Barometric Pressure Sensor 180D Magnetic Sensor 180E Acceleration Sensor 180F Distance Sensor 180G Optical Proximity Sensor 180H Fingerprint Sensor 180J Temperature Sensor 180K touch sensor 180L Ambient Light Sensor 180M Bone Conduction Sensor 190 Button 191 Motor 192 Indicator 193 Camera 1~N 194 Display 1~N 195 SIM card interface 1~N 501 Front Camera Module 5011 Camera module 5022 Camera Module 506 Rear Camera Module 5061 Camera Module 5063 Camera Module 5062 Camera Module 701 Front Camera 702 Left Camera 703 Right Camera 704 Rear Camera 910 Processor 240 Video Interface 2401 Camera Switching Control 2402 Hang up control 2403 Other Controls 2404 Control 241 Video Interface 243 Motion Control Options 244 Video Images 245 Motion Control Options 246 Video Interface

Claims

1. A data transmission method, the data transmission method comprising: receiving, by a first camera module including a first application layer, a first protocol layer, and a first physical layer, the first physical layer including a first uplink interface and a first downlink interface, a first data packet transmitted by a second camera module via the first downlink interface after receiving a first instruction transmitted by a processor, the first data packet including an identification field, and a value of the identification field in the first data packet indicating a number of transfers of the first data packet; identifying, by the first camera module, the value of the identification field in the first data packet as a first value, and modifying the first value to a second value by using the first protocol layer, wherein a difference between the second value and the first value is a preset value; transmitting, by the first camera module, a first data packet obtained by modifying the value of the identification field in the first data packet to the second value, via the first uplink interface to the processor; A data transmission method comprising:

2. The data transmission method includes: collecting, by the first camera module, first data and generating a second data packet based on the first data, the second data packet including an identification field, and a value of the identification field in the second data packet being a third value; transmitting, by the first camera module, the second data packet to the processor; The data transmission method of claim 1 , further comprising:

3. The first camera module includes a first application layer, a first protocol layer, and a first physical layer, the first physical layer including a first uplink interface and a first downlink interface; After the step of collecting first data by the first camera module and before the step of generating a second data packet based on the first data, the data transmission method includes: encoding, by the first camera module, the first data by using the first application layer; Further comprising: The step of generating, by the first camera module, a second data packet based on the first data, further comprises: generating, by the first camera module, the second data packet based on first data encoded by using the first protocol layer; Specifically, The step of transmitting, by the first camera module, the second data packet to the processor further comprises: transmitting, by the first camera module, the second data packet to the processor via the first uplink interface. The data transmission method according to claim 2, specifically comprising:

4. the first data packet includes a packet header, a data packet, and a packet footer; 2. The data transmission method of claim 1, wherein the identification field in the first data packet is located in the packet header of the first data packet.

5. The step of receiving, by the first camera module, a first instruction transmitted by a processor includes: receiving, by the first camera module, the first instruction transmitted by the processor via a first control interface; The data transmission method of claim 1 , specifically comprising:

6. 1. An electronic device comprising: a processor; a first application layer; a first protocol layer; and a first physical layer, the first physical layer including a first uplink interface and a first downlink interface; and a first camera module; and a second camera module, the first camera module is configured to receive, after receiving a first instruction sent by the processor, a first data packet sent by the second camera module via the first downlink interface, the first data packet including an identification field, and a value of the identification field in the first data packet indicating a number of transfers of the first data packet; The first camera module includes: Identifying that the value of the identification field in the first data packet is a first value, and modifying the first value to a second value by using the first protocol layer, a difference between the second value and the first value being a preset value; transmitting a first data packet obtained by modifying the value of the identification field in the first data packet to the second value via the first uplink interface to the processor. The electronic device further comprises:

7. The first camera module includes: Collecting first data and generating a second data packet based on the first data, the second data packet including an identification field, the value of the identification field in the second data packet being a third value; Transmitting the second data packet to the processor. The electronic device of claim 6 further configured as follows:

8. the first camera module includes a first application layer, a first protocol layer, and a first physical layer, the first physical layer includes a first uplink interface and a first downlink interface, the first uplink interface is connected to a first receiving port of the processor; The first camera module includes: Encoding the first data by using the first application layer; generating the second data packet based on the first data encoded by using the first protocol layer, the second data packet including the identification field, and the value of the identification field in the second data packet being the third value; Transmitting the second data packet to the processor via the first uplink interface. The electronic device of claim 7 further configured as follows:

9. the electronic device further comprises a third camera module; the third camera module is configured to collect second data and generate a third data packet based on the second data, the third data packet including an identification field, a value of the identification field in the third data packet being a third value; The electronic device of claim 6 , wherein the third camera module is further configured to transmit the third data packet to the processor.

10. the third camera module includes a second application layer, a second protocol layer, and a second physical layer, the second physical layer includes a second uplink interface and a second downlink interface, the second uplink interface is connected to a second receiving port of the processor; The third camera module includes: encoding the second data by using the second application layer; generating the third data packet based on second data encoded by using the second protocol layer, the third data packet including the identification field, and the value of the identification field in the third data packet being the third value; Transmitting the third data packet to the processor via the second uplink interface. The electronic device of claim 9 further configured to:

11. 11. The electronic device of claim 10, wherein the first camera module includes a first application layer, a first protocol layer, and a first physical layer, the first physical layer including a first uplink interface and a first downlink interface, the first uplink interface connected to a first receive port of the processor, the first receive port being different from the second receive port.

12. the electronic device further comprises a fourth camera module; the fourth camera module is configured to collect third data and generate a fourth data packet based on the third data, the fourth data packet including an identification field, a value of the identification field in the fourth data packet being the third value; the fourth camera module is further configured to transmit the fourth data packet to the third camera module; The third camera module includes: receiving the fourth data packet transmitted by the fourth camera module; Identifying that the value of the identification field in the fourth data packet is the third value, modifying the value of the identification field in the fourth data packet to a fourth value, wherein a difference between the fourth value and the third value is the preset value. The electronic device of claim 10 further configured to:

13. the fourth camera module includes a third application layer, a third protocol layer, and a third physical layer, the third physical layer includes a third uplink interface and a third downlink interface, the third uplink interface is connected to the second downlink interface; The fourth camera module includes: encoding the third data by using the third application layer; generating the fourth data packet based on third data encoded by using the third protocol layer, the fourth data packet including the identification field, and the value of the identification field in the fourth data packet being the third value; Transmitting the fourth data packet to the third camera module via the third uplink interface. The method further comprises: The third camera module includes: receiving, via the second downlink interface, the fourth data packet transmitted via the third uplink interface; Identifying, by using the second protocol layer, that the value of the identification field in the fourth data packet is the third value, modifying the third value to the fourth value, the difference between the third value and the fourth value being the preset value; transmitting a fourth data packet obtained by modifying the value of the identification field in the fourth data packet to the fourth value via the second uplink interface to the processor. The electronic device of claim 12 further configured to:

14. the first data packet includes a packet header, a data packet, and a packet footer; The electronic device of claim 6 , wherein the identification field in the first data packet is located in the packet header of the first data packet.

15. the first camera module is further configured to receive the first instruction transmitted by the processor via a first control interface.

7. The electronic device of claim 6.

16. A computer-readable storage medium comprising instructions which, when executed on a camera module, enable the camera module to perform the data transmission method of any one of claims 1 to 5.

17. A computer program, when executed on a camera module, enabling the camera module to perform the data transmission method according to any one of claims 1 to 5.

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