Quantum computing device and its manufacturing method

JP7639484B2Active Publication Date: 2025-03-05FUJITSU LTD
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Patent Information

Application Number
JP2021058191
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-03-30
Publication Date
2025-03-05
Estimated Expiration
2041-03-30

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Benefits of technology

【0007】 本開示によれば、冷却源の冷却能力を向上せずとも量子ビットの数を増加できる。

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Abstract

To provide a quantum computing device capable of increasing the number of quantum bits without improving the cooling capacity of a cooling source, and a manufacturing method for the same.SOLUTION: The quantum computing device includes: a first substrate; a second substrate; a quantum chip provided on the first substrate and including a plurality of quantum bit units functioning as a quantum bit; a transmission unit provided on the second substrate and transmitting a microwave control signal controlling the plurality of quantum bit units to the plurality of quantum bits through a space; a first cooling source for cooling the first substrate; and a second cooling source for cooling the second substrate.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] The present disclosure relates to a quantum computing device and a method for manufacturing the same. [Background technology]

[0002] Quantum computing devices using superconducting qubits are being investigated. To realize superconductivity and to reduce noise caused by heat, a cooling source with extremely high cooling capacity such as a dilution refrigerator is used. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2020-61554 A [Patent Document 2] JP 2020-61447 A [Patent Document 3] International Publication No. 2020 / 075150 Summary of the Invention [Problem to be solved by the invention]

[0004] Increasing the number of built-in quantum bits is an effective way to improve the performance of quantum computing devices. However, as the number of quantum bits increases, the number of control lines that control the quantum bits also increases, making it easier for heat to flow into the quantum chip containing the quantum bits through the control lines. For this reason, with conventional technology, it is difficult to increase the number of quantum bits without further improving the cooling capacity.

[0005] An object of the present disclosure is to provide a quantum processing device that can increase the number of quantum bits without improving the cooling capacity of the cooling source, and a manufacturing method thereof. [Means for solving the problem]

[0006] According to one embodiment of the present disclosure, there is provided a quantum processing device having a first substrate, a second substrate, a quantum chip provided on the first substrate and including a plurality of quantum bit sections each functioning as a quantum bit, a sending section provided on the second substrate and sending a microwave control signal to the plurality of quantum bits via space to control the plurality of quantum bit sections, a first cooling source that cools the first substrate, and a second cooling source that cools the second substrate. Effect of the Invention

[0007] According to the present disclosure, the number of quantum bits can be increased without improving the cooling capacity of the cooling source. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram illustrating a quantum processing device according to a first embodiment. [Diagram 2] FIG. 1 is a diagram illustrating a quantum processing device according to a second embodiment. [Diagram 3] FIG. 11 is a diagram illustrating a quantum processing device according to a third embodiment. [Figure 4] FIG. 13 is a diagram illustrating a quantum processing device according to a fourth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In this specification and the drawings, components having substantially the same functional configurations are denoted by the same reference numerals, and redundant description may be omitted.

[0010] (First embodiment) First, a first embodiment will be described. The first embodiment relates to a quantum processing device. Fig. 1 is a diagram showing a quantum processing device according to the first embodiment.

[0011] As shown in FIG. 1, a quantum processing device 100 according to the first embodiment includes a quantum circuit board 110, a control waveform sending board 120, and a control unit .

[0012] The quantum circuit board 110 is provided with a quantum chip 111. The quantum circuit board 110 includes a circuit to which the quantum chip 111 is connected. The quantum chip 111 includes a plurality of quantum bit units 112 each functioning as a quantum bit, and a plurality of reception patterns 113 each connected to the quantum bit units 112. The reception patterns 113 function as reception antennas. The number of the quantum bit units 112 is equal to the number of the reception patterns 113. The quantum bit units 112 and the reception patterns 113 are connected to each other via, for example, a coplanar line (CPW) 114. The number of sets of the quantum bit units 112 and the reception patterns 113 is not limited, and may be, for example, 16 or 64. The quantum circuit board 110 is an example of a first board.

[0013] The control waveform sending board 120 is provided with a sending section 121. The sending section 121 includes a plurality of sending patterns 123 each corresponding to a quantum bit section 112. The sending patterns 123 function as a sending antenna. The number of sending patterns 123 is equal to the number of quantum bit sections 112. The control waveform sending board 120 has the same number of coaxial connectors 124 as the sending patterns 123. The control waveform sending board 120 is an example of a second board.

[0014] The quantum circuit board 110 and the control waveform sending board 120 are disposed apart from each other, and face each other. The distance between the quantum circuit board 110 and the control waveform sending board 120 is, for example, about 100 μm to 1 mm. There is a space between the quantum circuit board 110 and the control waveform sending board 120. This space is usually a vacuum.

[0015] The control unit 130 includes waveform generators 131 in the same number as the quantum bit units 112. One end of a coaxial cable 141 is connected to each waveform generator 131, and the other end of the coaxial cable 141 is connected to the input of an attenuator 151. One end of a coaxial cable 142 is connected to the output of the attenuator 151, and the other end of the coaxial cable 142 is connected to the input of an attenuator / filter 152. One end of a coaxial cable 143 is connected to the output of the attenuator / filter 152, and the other end of the coaxial cable 143 is connected to a coaxial connector 124 of the control waveform sending board 120.

[0016] The quantum processing device 100 further includes a first cooling source 161, a second cooling source 162, and a third cooling source 163. The first cooling source 161 cools the quantum circuit board 110. The first cooling source 161 is, for example, a dilution refrigerator, and cools the quantum circuit board 110 to a temperature of about 10 mK. The second cooling source 162 mainly cools the control waveform sending board 120 and the attenuator / filter 152. The second cooling source 162 cools the control waveform sending board 120 and the attenuator / filter 152 to a temperature of about 100 mK. The third cooling source 163 mainly cools the attenuator 151. The third cooling source cools the attenuator 151 to a temperature of about several K. The temperature of the control unit 130 including the waveform generator 131 is, for example, room temperature.

[0017] In this way, the first cooling source 161 cools the quantum circuit board 110 to a first temperature (e.g., about 10 mK), and the second cooling source 162 cools the control waveform sending board 120 to a second temperature (e.g., about 100 mK) higher than the first temperature. The second cooling source 162 may be coupled to the control waveform sending board 120 to directly cool the control waveform sending board 120, or may indirectly cool the control waveform sending board 120 via the ground conductor of the coaxial cable 143.

[0018] In the quantum computing device 100, the waveform generator 131 generates and outputs a microwave control signal for controlling the quantum bit unit 112. The frequency of the control signal is, for example, about 5 GHz. The control signal output from the waveform generator 131 is input to the sending unit 121 via the coaxial cable 141, the attenuator 151, the coaxial cable 142, the attenuator filter 152, the coaxial cable 143, and the coaxial connector 124. The sending unit 121 sends out the input control signal from the sending pattern 123. The control signal sent out from the sending pattern 123 reaches the quantum chip 111 through the space between the control waveform sending board 120 and the quantum circuit board 110. The control signal that has reached the quantum chip 111 is input to the quantum bit unit 112 via the receiving pattern 113, and the quantum bit unit 112 is controlled.

[0019] In the quantum processing device 100, the control waveform sending board 120 and the quantum circuit board 110 are separated by a space, and a control signal is transmitted through the space. Therefore, there is no need to connect a coaxial cable to the quantum circuit board 110, and even if the number of quantum bit sections 112 is increased, heat from the control waveform sending board 120 is unlikely to flow into the quantum circuit board 110. Therefore, the number of quantum bit sections 112 provided on the quantum circuit board 110 can be increased without strengthening the cooling capacity.

[0020] Furthermore, since there is no need to connect a coaxial cable to the quantum circuit board 110, noise transmitted via the coaxial cable can also be suppressed.

[0021] If the quantum bit section 112 has a function for receiving a control signal sent from the sending pattern 123, the receiving pattern 113 does not have to be provided.

[0022] When manufacturing a quantum processing device 100 having such a configuration, first, a quantum circuit board 110 provided with a quantum chip 111 and a control waveform sending board 120 provided with a sending unit 121 are prepared, and then these are positioned. In addition, a first cooling source 161 is provided so as to be able to cool the quantum circuit board 110, and a second cooling source 162 is provided so as to be able to cool the control waveform sending board 120. The connection of the coaxial cable 143 to the control waveform sending board 120, etc. may be performed before or after the above process.

[0023] Furthermore, the number of sending patterns 123 does not have to match the number of quantum bit sections 112. For example, if a multiplexed control signal can be sent from one sending pattern 123 to multiple quantum bit sections 112, the number of sending patterns 123 may be less than the number of quantum bit sections 112. Also, if a quantum bit section is controlled via another quantum bit section to which it is coupled, the number of sending patterns 123 may be less than the number of quantum bit sections 112.

[0024] Second embodiment Next, a description will be given of a second embodiment. Fig. 2 is a diagram showing a quantum processing device according to the second embodiment.

[0025] As shown in FIG. 2, in the quantum processing device 200 according to the second embodiment, a plurality of spacers 201 are provided between a surface 110A of the quantum circuit substrate 110 facing the control waveform sending substrate 120 and a surface 120A of the control waveform sending substrate 120 facing the quantum circuit substrate 110. For example, three or more spacers 201 are provided. When the shape of the control waveform sending substrate 120 is a rectangle in a plan view from a direction perpendicular to the surface 120A, a total of four spacers 201 may be provided at the four corners. Also, a total of five spacers 201 may be provided in the center in addition to the four corners. The arrangement of the spacers 201 is arbitrary.

[0026] The spacer 201 is preferably made of a material with low thermal conductivity. Examples of the material of the spacer 201 include a niobium titanium (NbTi) alloy that becomes superconducting at a temperature equal to or higher than the cooling temperature (about 100 mK) by the second cooling source 162, solder, and the like. The material of the spacer 201 may be an organic resin. The shape of the spacer 201 may be, for example, spherical or columnar. The diameter of the spacer 201 is, for example, about 100 μm to 1 mm.

[0027] For example, the spacer 201 can be fused to the surface 120A of the control waveform sending substrate 120 in advance, and then the spacer 201 can be fixed to the quantum circuit substrate 110 by bonding the spacer 201 to the quantum circuit substrate 110 while aligning the spacer 201 and pressing the spacer 201 against the quantum circuit substrate 110.

[0028] A heat block 210 is attached to a surface 110B opposite to the surface 110A of the quantum circuit substrate 110. The heat block 210 is, for example, a copper (Cu) material. A gold (Au) plating film may be provided on the surface of the Cu material. The heat block 210 and the quantum circuit substrate 110 are in contact with a first cooling source 161. The first cooling source 161 has a plate-like shape, and a through-hole 261 is formed in the first cooling source 161.

[0029] The attenuator / filter 152 is in contact with the second cooling source 162. In addition, the ground conductor of the coaxial cable 143 is in contact with the second cooling source 162. The coaxial cable 143 passes through a through hole 261 of the first cooling source 161, extends to the opposite side of the first cooling source 161 to the second cooling source 162, and is connected to the coaxial connector 124 (see FIG. 1) of the control waveform sending board 120. A heat insulating support member 262 that supports the coaxial cable 143 is provided inside the through hole 261. The heat insulating support member 262 is preferably made of a material with low thermal conductivity. Examples of materials for the heat insulating support member 262 include organic resins such as polytetrafluoroethylene (PTFE).

[0030] The other configurations are the same as those of the first embodiment. For example, although only one set of the coaxial cable 142, the attenuator / filter 152, the coaxial cable 143, the through hole 261, and the heat insulating support member 262 is illustrated in Fig. 2, the number of these provided is the same as the number of the quantum bit units 112.

[0031] The second embodiment can also provide the same effects as the first embodiment. In addition, since the spacer 201 is provided, it is easy to adjust the distance between the sending pattern 123 and the receiving pattern 113 with high precision, and it is easy to reduce signal loss and crosstalk of the control waveform between multiple quantum bit units.

[0032] Furthermore, the quantum circuit substrate 110 is disposed on the opposite side of the first cooling source 161 from the second cooling source 162. Therefore, the quantum circuit substrate 110 is less susceptible to the influence of the second cooling source 162. Furthermore, the portion of the coaxial cable 143 inside the through hole 261 is thermally separated from the first cooling source 161 by the heat insulating support member 262. Therefore, the first cooling source 161 is less susceptible to the heat of the coaxial cable 143.

[0033] Third embodiment Next, a third embodiment will be described below. Fig. 3 is a diagram showing a quantum processing device according to the third embodiment.

[0034] 3, in a quantum processing device 300 according to the third embodiment, a reception pattern 313 is provided outside the quantum chip 111 instead of the reception pattern 113. In this example, the quantum chip 111 includes 16 quantum bit sections 112, and 16 reception patterns 313 are provided on the surface 110A of the quantum circuit substrate 110. Each reception pattern 313 is connected to the quantum bit section 112 in the quantum chip 111 via a coplanar line 314. In a plan view from a direction perpendicular to the surface 110A, the 16 reception patterns 313 are arranged to surround the quantum chip 111.

[0035] In the control waveform sending substrate 120, the sending patterns 123 are arranged on the surface 120A so as to face the receiving patterns 313. In a plan view from a direction perpendicular to the surface 120A, an opening 325 is formed in the control waveform sending substrate 120 so as to be surrounded by 16 sending patterns 123. In a plan view from a direction perpendicular to the surface 120A, for example, the opening 325 is larger than the quantum chip 111, and the entire quantum chip 111 can be seen through the opening 325.

[0036] Other configurations are the same as those in the second embodiment. For example, although not shown, a spacer 201 and the like are provided.

[0037] The third embodiment can also provide the same effects as the second embodiment. In addition, since the opening 325 is formed in the control waveform sending substrate 120, the quantum chip 111 can be made less susceptible to the effects of the signal transmitted within the control waveform sending substrate 120.

[0038] (Fourth embodiment) Next, a fourth embodiment will be described below. Fig. 4 is a diagram showing a quantum processing device according to the fourth embodiment.

[0039] As shown in Fig. 4, in the quantum processing device 400 according to the fourth embodiment, a plurality of, for example, nine quantum chips 111 are provided on the quantum circuit board 110. Of the nine quantum chips 111, five quantum chips 111 are provided on the surface 110A, and four quantum chips 111 are provided on the surface 110B. When viewed through the quantum circuit board 110, the nine quantum chips 111 are arranged in a lattice pattern. Although not shown, a plurality of reception patterns 313 (see Fig. 3) are provided around each quantum chip 111 and connected to the quantum bit section 112 in the quantum chip 111, as in the third embodiment.

[0040] The quantum circuit board 110 is made of, for example, Si, and includes, for example, three wiring layers. One of the three wiring layers is provided on the surface 110A, the other is provided on the surface 110B, and the other is provided between the surfaces 110A and 110B. The wiring layers adjacent to each other in the thickness direction are connected to each other via through-hole vias. The through-hole vias are preferably made of a material that becomes superconducting at a temperature (about 10 mK) cooled by the first cooling source 161. The multiple quantum chips 111 are connected to each other via such multi-layer wiring.

[0041] As in the third embodiment, five openings 325 are formed in the control waveform sending substrate 120 so as to correspond to the five quantum chips 111 provided on the surface 110A of the quantum circuit substrate 110. Although not shown, a plurality of sending patterns 123 (see FIG. 3) are provided for each opening 325 on the surface 120A of the control waveform sending substrate 120 facing the quantum circuit substrate 110 so as to surround the opening 325. For example, the sending patterns 123 provided on the surface 120A face the receiving patterns 313 provided on the surface 110A, respectively.

[0042] The quantum processing device 400 further includes a control waveform sending board 420. The control waveform sending board 420 has the same configuration as the control waveform sending board 120, except for the arrangement of the openings. The control waveform sending board 420 has four openings 325 formed therein, similar to the third embodiment, so that each opening corresponds to the four quantum chips 111 provided on the surface 110B of the quantum circuit board 110. Although not shown, a plurality of sending patterns 123 (see FIG. 3) are provided for each opening 325 on the surface 420A of the control waveform sending board 420 facing the quantum circuit board 110, so as to surround the opening 325. For example, the sending patterns 123 provided on the surface 420A face the receiving patterns 313 provided on the surface 110B, respectively.

[0043] Moreover, a heat transfer frame 410 is provided in place of the heat block 210. The heat transfer frame 410 is in contact with a part of the outer periphery of the quantum circuit substrate 110 and is in contact with the first cooling source 161 (see FIG. 2). The heat transfer frame 410 is, for example, made of copper (Cu). A gold (Au) plating film may be provided on the surface of the Cu material.

[0044] The other configuration is similar to that of the third embodiment.

[0045] The fourth embodiment can also provide the same effects as the third embodiment. In addition, since a plurality of quantum chips 111 are provided on the quantum circuit substrate 110, the quantum bit sections 112 can be integrated at a higher density.

[0046] Although the preferred embodiments have been described in detail above, the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the claims.

[0047] Various aspects of the present disclosure are summarized below as appendices.

[0048] (Appendix 1) A first substrate; A second substrate; A quantum chip provided on the first substrate, the quantum chip including a plurality of quantum bit units each functioning as a quantum bit; a transmitter provided on the second substrate and configured to transmit a microwave control signal for controlling the plurality of quantum bit units to the plurality of quantum bits through space; a first cooling source for cooling the first substrate; a second cooling source for cooling the second substrate; A quantum computing device comprising: (Appendix 2) the first cooling source cools the first substrate to a first temperature; 2. The quantum computing device according to claim 1, wherein the second cooling source cools the second substrate to a second temperature higher than the first temperature. (Appendix 3) The first substrate and the second substrate face each other, the quantum chip is provided on a surface of the first substrate facing the second substrate, 3. The quantum processing device according to claim 1, wherein the sending section is provided on a surface of the second substrate facing the first substrate. (Appendix 4) 4. The quantum processing device according to claim 3, further comprising a spacer provided between the first substrate and the second substrate. (Appendix 5) 5. The quantum processing device according to claim 3 or 4, wherein an opening is formed in a portion of the second substrate facing the quantum chip. (Appendix 6) 6. The quantum computing device according to claim 1, wherein the sending section has a plurality of sending patterns each corresponding to the quantum bit section. (Appendix 7) 7. The quantum processing device according to claim 1, further comprising a plurality of receiving patterns provided on the first substrate, each of the receiving patterns being connected to the quantum bit unit. (Appendix 8) the second cooling source is disposed on one side of the first cooling source; The quantum processing device according to any one of claims 1 to 7, wherein the first substrate and the second substrate are arranged on the other side of the first cooling source. (Appendix 9) A plurality of the quantum chips are provided on the first substrate, 9. The quantum processing device according to claim 1, wherein the sending unit sends the control signal to each of the quantum bit units included in the quantum chips. (Appendix 10) preparing a first substrate having a quantum chip including a plurality of quantum bit units each functioning as a quantum bit; preparing a second substrate provided with a transmitter that transmits a microwave control signal for controlling the plurality of quantum bit units to the plurality of quantum bits through space; aligning the first substrate and the second substrate with respect to one another; providing a first cooling source for cooling the first substrate and a second cooling source for cooling the second substrate; A method for manufacturing a quantum computing device comprising the steps of: [Explanation of symbols]

[0049] 100, 200, 300, 400: Quantum operation device 110: Quantum circuit board 110A, 110B: Surface 111: Quantum chip 112: Quantum Bits Department 113, 313: Reception pattern 120, 420: Control waveform transmission board 120A, 420A: Surface 121: Transmission section 123: Sending pattern 130: Control unit 161: 1st cooling source 162:Second cooling source 201: Spacer 325:Aperture

Claims

1. A first substrate; A second substrate; A quantum chip provided on the first substrate, the quantum chip including a plurality of quantum bit units each functioning as a quantum bit; a transmitter provided on the second substrate and configured to transmit a microwave control signal for controlling the plurality of quantum bit units to the plurality of quantum bits through space; a first cooling source for cooling the first substrate; a second cooling source for cooling the second substrate; A quantum computing device comprising:

2. the first cooling source cools the first substrate to a first temperature; The quantum computing device according to claim 1 , wherein the second cooling source cools the second substrate to a second temperature higher than the first temperature.

3. The first substrate and the second substrate face each other, the quantum chip is provided on a surface of the first substrate facing the second substrate, 3. The quantum processing device according to claim 1, wherein the sending section is provided on a surface of the second substrate facing the first substrate.

4. The quantum computing device according to claim 3 , further comprising a spacer provided between the first substrate and the second substrate.

5. 5. The quantum processing device according to claim 3, wherein an opening is formed in a portion of the second substrate facing the quantum chip.

6. 6. The quantum computing device according to claim 1, wherein the sending section has a plurality of sending patterns each corresponding to the quantum bit section.

7. 7. The quantum computing device according to claim 1, further comprising a plurality of receiving patterns provided on the first substrate, each of the receiving patterns being connected to the quantum bit unit.

8. the second cooling source is disposed on one side of the first cooling source, 8. The quantum processing device according to claim 1, wherein the first substrate and the second substrate are disposed on the other side of the first cooling source.

9. preparing a first substrate having a quantum chip including a plurality of quantum bit units each functioning as a quantum bit; preparing a second substrate provided with a transmitter that transmits a microwave control signal for controlling the plurality of quantum bit units to the plurality of quantum bits through space; aligning the first substrate and the second substrate with respect to one another; providing a first cooling source for cooling the first substrate and a second cooling source for cooling the second substrate; A method for manufacturing a quantum computing device comprising the steps of:

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