Complementary Power Modulator

Abstract

The complementary power supply modulator comprises a high-voltage side switching element (10) and a low-voltage side switching element (20) connected in series between a first power supply potential node V1 and a ground potential node, the high-voltage side switching element (10) comprising a first P-type transistor (11), the low-voltage side switching element (20) comprising a first N-type transistor (21), and a first combiner (30) that applies a PWM signal obtained by combining the PWM signal and a second voltage V2 applied to a second power supply potential node V2 to a gate electrode of the first P-type transistor (11).

Description

[Technical field]

[0001] The present disclosure relates to a complementary power supply modulator having complementary switching elements connected in series between a power supply potential node and a ground potential node. [Background technology]

[0002] A power supply modulation amplifier needs to modulate the applied bias voltage in response to the voltage level of a high-frequency input signal, which is a PWM (Pulse Width Modulation) signal. Typically, in such a power supply modulated amplifier, the bias voltage is greater than the voltage amplitude of the PWM signal by more than twice as much. In a power supply modulation amplifier, it has been considered to use a P-type MOS transistor on the high voltage side. For example, it is conceivable to apply the "high-side switch configuration using a P-channel MOSFET" shown in Figure 5-19 in Non-Patent Document 1 to a power supply modulation amplifier.

[0003] The high-side switch configuration shown in Non-Patent Document 1 has a P-channel MOS source electrode connected to V DD and the drain electrode is connected to R L is connected to one end of the V DD and the gate electrode of the P-channel MOS. Resistor R4 is connected between one end of resistor R4 and the collector electrode of the bipolar transistor. The emitter electrode of the bipolar transistor is grounded. A pulse PG is input to the gate electrode of the bipolar transistor. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] "Mastering the Elemental Technology of Switching Power Supplies [2]" published on March 1, 2019 by CO Publishing Co., Ltd., p. 194, p. 195, especially Figure 5-19 Summary of the Invention [Problem to be solved by the invention]

[0005] The high-side switch configuration shown in Non-Patent Document 1 has a current I C Since VGS is secured by this, current consumption becomes large, and when a power supply modulation amplifier is integrated, this leads to a decrease in the efficiency of the entire integrated circuit.

[0006] The present disclosure is intended to solve the above-mentioned problems, and aims to provide a complementary power supply modulator that has complementary switching elements connected in series between a power supply potential node and a ground potential node, and has a P-type transistor as the high-voltage side switching element, which reduces power consumption when a bias voltage is applied to the gate electrode of the P-type transistor. [Means for solving the problem]

[0007] A complementary power supply modulator according to the present disclosure has a first high-voltage side main node connected to a first power supply potential node to which a first voltage is applied, a second high-voltage side main node connected to an output terminal, and a high-voltage side control node to which a PWM signal is input, and includes a high-voltage side switching element having a first P-type transistor having a source electrode electrically connected to the first high-voltage side main node, a drain electrode electrically connected to the second high-voltage side main node, and a gate electrode electrically connected to the high-voltage side control node, a first low-voltage side main node connected to the output terminal, a second low-voltage side main node connected to a ground potential node, and a low-voltage side control node to which the PWM signal is input, and a drain electrode electrically connected to the first low-voltage side main node. a low-voltage side switching element having a first N-type transistor having a source electrode electrically connected to a second low-voltage side main node and a gate electrode electrically connected to a low-voltage side control node; a high-voltage side combiner having a first high-voltage side summing node electrically connected to an input terminal to which a PWM signal is input, a second high-voltage side summing node electrically connected to a second power supply potential node to which a second voltage is applied, and a high-voltage side combined output node electrically connected to the high-voltage side control node of the high-voltage side switching element and for outputting a PWM signal resulting from combining the PWM signal input to the first high-voltage side summing node and the second voltage applied to the second high-voltage side summing node. Effect of the Invention

[0008] According to the present disclosure, in a complementary power supply modulator having a P-type transistor as a switching element on the high-voltage side, power consumption when a bias voltage is applied to the gate electrode of the P-type transistor can be reduced. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a configuration diagram showing a complementary power supply modulator according to a first embodiment. [Diagram 2] FIG. 2 is a configuration diagram showing an example of a combiner in the complementary power supply modulator according to the first embodiment. [Diagram 3]4 is an equivalent circuit diagram obtained by performing a simulation on a combiner in the complementary power supply modulator according to the first embodiment. FIG. [Figure 4] 6A to 6C are diagrams illustrating simulation results for a combiner in the complementary power supply modulator according to the first embodiment. [Diagram 5] FIG. 11 is a configuration diagram showing an example of a combiner in a complementary power supply modulator according to a second embodiment. [Figure 6] FIG. 11 is a configuration diagram showing a complementary power supply modulator according to a third embodiment. [Figure 7] FIG. 13 is a configuration diagram showing a complementary power supply modulator according to a fourth embodiment. [Figure 8] FIG. 13 is a configuration diagram showing a complementary power supply modulator according to a fifth embodiment. [Figure 9] FIG. 13 is a configuration diagram showing a complementary power supply modulator according to a sixth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Embodiment 1 A complementary power supply modulator according to a first embodiment will be described with reference to FIGS. 1 to 4. FIG. The complementary power supply modulator 100 of the first embodiment includes complementary switching elements connected in series between a first power supply potential node V1 and a ground potential node, with the connection point being connected to an output node, and includes a P-type transistor 11 in the high-voltage side switching element 10 and an N-type transistor 21 in the low-voltage side switching element 20. In the complementary power supply modulator according to the first embodiment, a high-frequency PWM signal is input as an input signal, and the voltage applied to the first power supply potential node V1 is more than twice as large as the voltage amplitude of the PWM signal, which is the input signal.

[0011] As shown in FIG. 1, the complementary power supply modulator according to the first embodiment includes a high-voltage side switching element 10, a low-voltage side switching element 20, and a high-voltage side combiner 30. The high side switching element 10, the low side switching element 20 and the high side combiner 30 are implemented as an integrated circuit. The high-voltage side switching element 10 has a first high-voltage side main node 10a connected to a first power supply potential node V1 to which a first voltage V1 is applied, a second high-voltage side main node 10b connected to the output terminal 1, and a high-voltage side control node 10c to which a PWM signal is input via a high-voltage side combiner 30.

[0012] The first voltage V1 applied to the first power supply potential node V1 is, for example, 30V. For example, the H level of a PWM signal is 0V and the L level is -3V. In this example, the voltage applied to the first power supply potential node V1 is ten times the voltage amplitude of the PWM signal which is the input signal. The specific example shown here is merely an example and is not limited to this. In short, the present invention is applicable to a complementary power supply modulator in which the voltage applied to the first power supply potential node V1 is more than twice as large as the voltage amplitude of the input signal, the PWM signal. The first voltage V1 applied to the first power supply potential node V1 is supplied from a power supply circuit (not shown).

[0013] The high-voltage side switching element 10 comprises a first P-type transistor 11 having a source electrode electrically connected directly to a first high-voltage side main node 10a, a drain electrode electrically connected directly to a second high-voltage side main node 10b, and a gate electrode electrically connected directly to a high-voltage side control node 10c. The first P-type transistor 11 is a P-type transistor (high-voltage transistor element) that uses a wide band gap semiconductor.

[0014] A P-type transistor that uses a wide bandgap semiconductor has a bandgap of 2.2 eV or more. As the first P-type transistor 11, for example, a P-type GaN (Gallium Nitride) transistor or a diamond MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is used, and in particular, a P-type transistor using a wide band gap semiconductor of 3 eV or more is used. Note that the specific example shown here for the first P-type transistor 11 is just one example, and is not limited to this. Any P-type transistor using a wide band gap semiconductor may be used, and either a normally-on type or a normally-off type may be used.

[0015] The low-voltage side switching element 20 has a first low-voltage side main node 20a connected to the output terminal 1, a second low-voltage side main node 20b connected to the ground potential node, and a low-voltage side control node 20c electrically connected directly to the input terminal 2 to which a PWM signal is input. The low-voltage side switching element 20 comprises a first N-type transistor 21 having a drain electrode electrically connected directly to a first low-voltage side main node 20a, a source electrode electrically connected directly to a second low-voltage side main node 20b, and a gate electrode electrically connected directly to a low-voltage side control node 20c.

[0016] The first N-type transistor 21 is an N-type transistor (high-voltage transistor element) that uses a wide band gap semiconductor. The band gap of an N-type transistor using a wide band gap semiconductor is 2.2 eV or more. As the first N-type transistor 21, for example, an N-type GaN HEMT (High Electron Mobility Transistor) is used, and in particular, an N-type transistor using a wide band gap semiconductor of 3 eV or more is used. Note that the specific example shown here for the first N-type transistor 21 is just one example and is not limited to this. Any N-type transistor using a wide band gap semiconductor may be used, and either a normally-on type or a normally-off type may be used.

[0017] The high-voltage side combiner 30 has a first high-voltage side summing node 30a electrically connected directly to the input terminal 2, a second high-voltage side summing node 30b directly connected to a second power supply potential node V2 to which a second voltage V2 is applied, and a high-voltage side combined output node 30c electrically connected directly to a high-voltage side control node 10c of the high-voltage side switching element 10 and which outputs a PWM signal obtained by combining the PWM signal input to the first high-voltage side summing node 30a and the second voltage V2 applied to the second high-voltage side summing node 30b. The second voltage V2 applied to the second power supply potential node V2 is, for example, 31.5V.

[0018] Now, the potential difference between the H level and L level of the PWM signal input to the input terminal 2 is (HL), the duty ratio is D, and the second voltage V2 applied to the second power supply potential node V2 is V2. When the PWM signal is at H level, the voltage appearing at the high-voltage side composite output node 30c is at H level (HL)(1-D)+V2, the first P-type transistor 11 is off, the first N-type transistor 21 is on, and the voltage appearing at the output terminal 1 is 0V (ground potential). When the PWM signal is at an L level, the voltage appearing at the high-voltage side composite output node 30c is at an L level of -(HL)D+V2, the first P-type transistor 11 is on, the first N-type transistor 21 is off, and the voltage appearing at the output terminal 1 is V1 (the first voltage V1 applied to the first power supply potential node V1).

[0019] As an example, assume that the H level of the PWM signal is 0V, the L level is −3V, the first voltage V1 is 30V, and the second voltage V2 is 31.5V. When the PWM signal is at H level, the voltage appearing at the high-voltage side composite output node 30c is 33V, and the voltage appearing at the output terminal 1 is 0V. When the PWM signal is at the L level, the voltage appearing at the high-voltage side composite output node 30c is 30V, and the voltage appearing at the output terminal 1 is 30V. Note that normally-on depletion type transistors are used as the first P-type transistor 11 and the first N-type transistor 21.

[0020] 2, combiner 30 on the high voltage side has DC block 31 which is a capacitor and inductor section 32 which is a choke coil. In the following, in the first embodiment, DC block 31 will be described as capacitor 31 and inductor section 32 as choke coil 32. In capacitor 31, one electrode is electrically connected directly to first high-voltage side summing node 30a, and the other electrode is electrically connected directly to high-voltage side combined output node 30c. In the choke coil 32, one electrode is electrically connected directly to the second power supply potential node 30b, and the other electrode is electrically connected directly to the combined output node 30c on the high voltage side.

[0021] The constant of the capacitor 31 is determined as follows. To perform the simulation, we will assume the equivalent circuit shown in Figure 3. Here, we performed the simulation using a series CR circuit to clarify the relationship with the time constant. The equivalent circuit shown in FIG. 3 is assumed to be a series circuit of a capacitor C1 and a resistor R1.

[0022] The capacitor C1 is connected between terminals CR1 and CR2 to which a PWM signal is input. Capacitor C1 corresponds to capacitor 31 in combiner 30 on the high side. The resistor R1 is connected between the terminal CR2 and the ground node. The resistor R1 corresponds to a resistor whose resistance value is determined by the input impedance of the choke coil 32 and the first P-type transistor 11 in the combiner 30 on the high voltage side, and the like.

[0023] The simulation is performed with the capacitance value of the capacitor C1 set to 1 nF and the resistance value of the resistor R1 set to 50 Ω. The time constant calculated from capacitor C1 and resistor R1 is 5.0 x 10 -8 seconds, and its reciprocal is 20 MHz. The duty ratio of the PWM signal was set to 50%.

[0024] The results of a simulation performed under these conditions are shown in Figure 4. In Figure 4, the horizontal axis represents time, shown as a value normalized by the inverse of the frequency of the PWM signal, and the vertical axis represents voltage, with waveform CR1V1 representing the voltage amplitude of the PWM signal input to terminal CR1, waveform CR2V1 representing the voltage amplitude at terminal CR2 when a 1 MHz PWM signal is input, waveform CR2V2 representing the voltage amplitude at terminal CR2 when a 10 MHz PWM signal is input, waveform CR2V3 representing the voltage amplitude at terminal CR2 when a 20 MHz PWM signal is input, and waveform CR2V4 representing the voltage amplitude at terminal CR2 when a 100 MHz PWM signal is input.

[0025] As can be seen from the simulation results in Figure 4, when the PWM signal is 1 MHz (waveform CR2V1), a transient response characteristic can be confirmed, but as the frequency increases (waveform CR2V2 to waveform CR2V4), it is unable to return to a steady state, resulting in a differentiated waveform. In the simulation results (waveform CR2V3) when a 20 MHz PWM signal, which is the reciprocal of the time constant, is input, a sag of about V / 5 occurs in the voltage amplitude V (waveform CR1V1) of the PWM signal. However, by paying attention to the threshold voltage of the first P-type transistor 11, it can be applied as the capacitor 31 in the high-side combiner 30. Therefore, the capacitance value of the capacitor 31 in the combiner 30 on the high voltage side is determined so that the frequency of the PWM signal is equal to or greater than the inverse of the time constant.

[0026] In the simulation results (waveform CR2V4) when a 100 MHz PWM signal, which is five times the inverse of the time constant, is input, almost no sag occurs. Therefore, when used near the threshold voltage of the first P-type transistor 11, it is advisable to determine the capacitance value of the capacitor 31 in the high-voltage side combiner 30 so that the frequency of the PWM signal is five or more times the inverse of the time constant.

[0027] That is, the capacitance value of the capacitor 31 that can control the on / off operation of the first P-type transistor 11 by the output waveform of the high-voltage side combiner 30 can be adjusted according to the resistance value determined by the input impedance of the choke coil 32 and the first P-type transistor 11 in the high-voltage side combiner 30 corresponding to the resistor R1 and the lower limit frequency of the PWM signal. The upper limit frequency of the PWM signal is determined by the cutoff frequency of the first P-type transistor 11.

[0028] In short, the capacitance value of the capacitor 31 is set to a value equal to or greater than the reciprocal of a time constant calculated from the input impedance of the first P-type transistor 11, which is the same as the frequency of the PWM signal, and the resistance value of the choke coil 32. In particular, it is preferable that the capacitance value of the capacitor 31 is set to a value that is at least five times the reciprocal of the time constant calculated from the input impedance of the first P-type transistor 11, which is the same as the frequency of the PWM signal, and the resistance value of the choke coil 32.

[0029] The impedance of the choke coil 32 in the combiner 30 on the high voltage side is preferably set to be five times or more the input impedance of the first P-type transistor 11 at the frequency of the PWM signal. By making it five times or more, the energy of the PWM signal can be supplied sufficiently to the gate electrode of the first P-type transistor 11 .

[0030] As described above, by configuring the high-voltage side combiner 30 with the capacitor 31 and the choke coil 32, in particular, by setting the capacitance value of the capacitor 31 to a value equal to or greater than the reciprocal of the time constant calculated from the input impedance of the first P-type transistor 11, which is the same as the frequency of the PWM signal, and the resistance value of the choke coil 32, and by setting the impedance of the choke coil to a value equal to or greater than five times the input impedance of the first P-type transistor 11 at the frequency of the PWM signal, the power consumption when applying a bias voltage to the gate electrode of the first P-type transistor 11 is suppressed, and a PWM signal obtained by combining the PWM signal and the second voltage V2 applied to the second high-voltage side addition node 30b is applied to the gate electrode of the first P-type transistor 11 as a bias voltage.

[0031] Next, the operation of the complementary power supply modulator according to the first embodiment will be described. When an H level PWM signal is input to input terminal 2, in the high-voltage side combiner 30, a voltage (HL) which is the potential difference between the H level and L level of the PWM signal is combined with a second voltage V2 applied to the second power supply potential node V2, and an H level consisting of the combined voltage [(HL)(1-D)+V2] is applied to the gate electrode of the first P-type transistor 11 in the high-voltage side switching element 10 at the high-voltage side combined output node 30c.

[0032] As a result, the first P-type transistor 11 is turned off, and the first power supply potential node V1 and the output terminal 1 are electrically cut off. On the other hand, the H-level voltage of the PWM signal is applied to the gate electrode of the first N-type transistor 21 constituting the switching element 20 on the low-voltage side. As a result, the first N-type transistor 21 is turned on, and electrical continuity is established between the output terminal 1 and the ground potential node. Therefore, the output terminal 1 is at ground potential.

[0033] When an L level PWM signal is input to input terminal 2, in the high-voltage side combiner 30, a voltage -(HL) which is the potential difference between the H level and L level of the PWM signal is combined with a second voltage V2 applied to the second power supply potential node V2, and an L level consisting of the combined voltage [-(HL)D)+V2] is applied to the gate electrode of the first P-type transistor 11 in the high-voltage side switching element 10 at the high-voltage side combined output node 30c.

[0034] As a result, the first P-type transistor 11 is turned on, and electrical continuity is established between the first power supply potential node V1 and the output terminal 1. On the other hand, an L-level voltage of the PWM signal is applied to the gate electrode of the first N-type transistor 21 constituting the switching element 20 on the low-voltage side. As a result, the first N-type transistor 21 is turned off, and the output terminal 1 and the ground potential node are electrically cut off. Therefore, the output terminal 1 is set to the first voltage V1 applied to the first power supply potential node V1.

[0035] As described above, the complementary power supply modulator according to the first embodiment includes a high-voltage side switching element 10 and a low-voltage side switching element 20 connected in series between a first power supply potential node V1 and a ground potential node, the high-voltage side switching element 10 includes a first P-type transistor 11, the low-voltage side switching element 20 includes a first N-type transistor 21, and a high-voltage side combiner 30 that applies a PWM signal obtained by combining a PWM signal and a second voltage V2 applied to a second power supply potential node V2 to the gate electrode of the first P-type transistor 11. Therefore, it is possible to control the on / off operation of the first P-type transistor 11 constituting the high-voltage side switching element 10 while suppressing the power consumption when applying a bias voltage to the gate electrode of the first P-type transistor 11.

[0036] In other words, in order to generate a high-voltage bias voltage at the gate electrode of the first P-type transistor 11, there is no resistive loss when the high-voltage side combiner 30 combines the second voltage and the PWM signal, so power consumption can be reduced. Furthermore, by suppressing power consumption, when the high-voltage side switching element 10, the low-voltage side switching element 20, and the high-voltage side combiner 30 are incorporated as an integrated circuit, the efficiency of the integrated circuit can be improved.

[0037] Embodiment 2 A complementary power supply modulator according to a second embodiment will be described with reference to FIG. The complementary power supply modulator according to the second embodiment is the same as the complementary power supply modulator according to the first embodiment except that the combiner 30 on the high voltage side is changed. In FIG. 5, the same reference numerals as those shown in FIGS. 1 and 2 indicate the same or corresponding parts.

[0038] Similar to the complementary power supply modulator according to the first embodiment, the complementary power supply modulator according to the second embodiment includes a high-voltage side switching element 10, a low-voltage side switching element 20, and a high-voltage side combiner 30A. The high-voltage side switching element 10 and the low-voltage side switching element 20 are the same as the high-voltage side switching element 10 and the low-voltage side switching element 20 in the complementary power supply modulator according to the first embodiment, and therefore a description thereof will be omitted.

[0039] As shown in FIG. 5, the high-voltage side combiner 30A has a DC block 31, which is a capacitor, and an inductor section 32A. The capacitor that is DC block 31 is the same as capacitor 31 in the first embodiment, and the method for setting the capacitance value is also the same as the method for setting the capacitance value described in the first embodiment.

[0040] The inductor section 32A has a first inductor 33, a first parallel arrangement of a second inductor 34 and a first resistor 35, a second parallel arrangement of a third inductor 36 and a second resistor 37, a first capacitor 38, and a second capacitor 39. A first parallel combination of the first inductor 33, the second inductor 34, and the first resistor 35, and a second parallel combination of the third inductor 36 and the second resistor 37 are connected in series in that order between the second power supply potential node 30b and the high-voltage side composite output node 30c.

[0041] The first capacitor 38 is connected between one electrode of the first inductor 33 that is electrically connected to the second power supply potential node V2 and the ground node. The second capacitor 39 is connected between the connection point between the other electrode of the first inductor 33 and one end of the first parallel body of the second inductor 34 and the first resistor 35 and a ground node.

[0042] By setting the inductance and capacitance values, which are the circuit constants of the first parallel body, the second parallel body, the first capacitor 38, and the second capacitor 39, it is possible to achieve stabilization for a plurality of frequencies of the PWM signal. The impedance of the inductor section 32A between the second power supply potential node V2 and the high-voltage side combined output node 30c is preferably set to be five or more times the input impedance of the first P-type transistor 11 at the frequency of the PWM signal. The circuit constants of the elements constituting the inductor section 32A are set so that the second voltage V2 applied to the second power supply potential node V2 is not dropped by the inductor section 32A. The complementary power supply modulator according to the second embodiment has the same effects as the complementary power supply modulator according to the first embodiment.

[0043] Embodiment 3 A complementary power supply modulator according to a third embodiment will be described with reference to FIG. The complementary power supply modulator of embodiment 3 is different from the complementary power supply modulator of embodiment 1 in that the second voltage V2 applied to the second high-voltage side adding node 30b of the high-voltage side combiner 30 is higher than the first voltage V1, whereas the second voltage V2 is the same as the first voltage V1. In FIG. 6, the same reference numerals as those shown in FIGS. 1 and 2 indicate the same or corresponding parts.

[0044] The following description will focus on the differences from the first embodiment. The second high-voltage side summing node 30b in the high-voltage side combiner 30 is directly connected to a first power supply potential node V1 to which a first voltage V1 is applied. Therefore, the second voltage V2 applied to the second high-voltage side summing node 30b in the high-voltage side combiner 30 becomes the same as the first voltage V1. As a result, a PWM signal that is a combination of the PWM signal input to the first high-voltage side summing node 30a and the first voltage V1 applied to the second high-voltage side summing node 30b is output to the high-voltage side combined output node 30c of the high-voltage side combiner 30.

[0045] In the complementary power supply modulator according to the third embodiment, it is preferable to use a normally-off enhancement type P-type transistor as the first P-type transistor 11 constituting the switching element 10 on the high-voltage side. When a normally-on depletion type P-type transistor is used as the first P-type transistor 11, the threshold voltage of the first P-type transistor 11 and the voltage amplitude and duty ratio of the PWM signal are set so as to enable control of the on / off operation of the first P-type transistor 11.

[0046] The complementary power supply modulator according to the third embodiment has the same effects as the complementary power supply modulator according to the first embodiment. In the complementary power supply modulator according to the third embodiment, the high-voltage side combiner 30A shown in the complementary power supply modulator according to the second embodiment may be used as the high-voltage side combiner 30.

[0047] Embodiment 4 A complementary power supply modulator according to a fourth embodiment will be described with reference to FIG. The complementary power supply modulator of embodiment 4 differs from the complementary power supply modulator of embodiment 1 in that, while the high-voltage side switching element 10 of the complementary power supply modulator of embodiment 1 is configured using a first P-type transistor 11, a second P-type transistor 12 connected in cascode with the first P-type transistor 11 is added as the high-voltage side switching element 10, but is otherwise the same. In FIG. 7, the same reference numerals as those shown in FIG. 1 and FIG. 2 indicate the same or corresponding parts.

[0048] The following description will focus on the switching element 10 on the high voltage side, which is a difference from the first embodiment. The high-voltage side switching element 10 comprises a first P-type transistor 11 and a second P-type transistor 12 that are cascode-connected. A first P-type transistor 11 has a source electrode electrically connected directly to a first high-voltage side main node 10a, a drain electrode indirectly electrically connected to a second high-voltage side main node 10b via a second P-type transistor 12, and a gate electrode electrically connected directly to a high-voltage side control node 10c.

[0049] The second P-type transistor 12 has a source electrode electrically connected directly to the drain electrode of the first P-type transistor 11, a drain electrode electrically connected directly to the second high-voltage side main node 10b, and a gate electrode electrically connected directly to the high-voltage side control node 10c. The second P-type transistor 12, like the first P-type transistor 11, is a P-type transistor (high voltage transistor element) using a wide band gap semiconductor, for example, a P-type GaN transistor or a diamond MOSFET.

[0050] A combined voltage from the high-voltage side combined output node 30c in the high-voltage side combiner 30 is input to the gate electrode of the first P-type transistor 11 and the gate electrode of the second P-type transistor 12, and the first P-type transistor 11 and the second P-type transistor 12 are simultaneously controlled to be turned on / off.

[0051] In this way, the high-voltage side switching element 10 is configured with a cascode-connected first P-type transistor 11 and second P-type transistor 12, so that the source-drain voltage applied to each of the first P-type transistor 11 and the second P-type transistor 12 can be distributed, and a first voltage V1 exceeding the withstand voltage of each of the first P-type transistor 11 and the second P-type transistor 12 can be applied.

[0052] Generally, in a transistor, there is a trade-off between the on-resistance, the cutoff frequency, and the withstand voltage. However, by lowering the withstand voltage of each of the first P-type transistor 11 and the second P-type transistor 12, the on-resistance can be reduced and the cutoff frequency can be increased. The complementary power supply modulator according to the fourth embodiment has the same effects as the complementary power supply modulator according to the first embodiment, and in addition, it can reduce the on-resistance of the switching element 10 on the high-voltage side and increase the cutoff frequency.

[0053] In the high-voltage side switching element 10, the cascode-connected transistors are not limited to the two stages of the first P-type transistor 11 and the second P-type transistor 12, but may be three or more stages of cascode-connected P-type transistors. In the complementary power supply modulator according to the fourth embodiment, the high-voltage side combiner 30A shown in the complementary power supply modulator according to the second embodiment may be used as the high-voltage side combiner 30. Furthermore, in the complementary power supply modulator of embodiment 4, similar to the complementary power supply modulator of embodiment 3, the second voltage V2 applied to the second high-voltage side addition node 30b of the high-voltage side combiner 30 may be the same voltage as the first voltage V1.

[0054] Embodiment 5. A complementary power supply modulator according to a fifth embodiment will be described with reference to FIG. The complementary power supply modulator of embodiment 5 differs from the complementary power supply modulator of embodiment 4 in that, while the low-voltage side switching element 20 is configured using a first N-type transistor 21, a second N-type transistor 22 connected in cascode with the first N-type transistor 21 is added as the low-voltage side switching element 20, but is otherwise the same. In FIG. 8, the same reference numerals as those shown in FIG. 1, FIG. 2 and FIG. 7 indicate the same or corresponding parts.

[0055] The following description will focus on the switching element 20 on the low voltage side, which is a difference from the fourth embodiment. The low-voltage side switching element 20 includes a first N-type transistor 21 and a second N-type transistor 22 that are cascode-connected. A first N-type transistor 21 has a drain electrode electrically connected directly to a first low-voltage side main node 20a, a source electrode indirectly electrically connected directly to a second low-voltage side main node 20b via a second N-type transistor 22, and a gate electrode electrically connected directly to a low-voltage side control node 20c.

[0056] The second N-type transistor 22 has a drain electrode electrically connected directly to the source electrode of the first N-type transistor 21, a source electrode electrically connected directly to the second low-voltage side main node 20b, and a gate electrode directly connected to the low-voltage side control node. The second N-type transistor 22, like the first N-type transistor 21, is an N-type transistor (high voltage transistor element) using a wide band gap semiconductor, for example, an N-type GaN HEMT.

[0057] A PWM signal is input to the gate electrode of the first N-type transistor 21 and the gate electrode of the second N-type transistor 22, and the first N-type transistor 21 and the second N-type transistor 22 are simultaneously controlled to be turned on / off. In this way, since the low-voltage side switching element 20 is configured with the first N-type transistor 21 and the second N-type transistor 22 connected in cascode, the source-drain voltage applied to each of the first N-type transistor 21 and the second N-type transistor 22 can be distributed, and a first voltage V1 exceeding the withstand voltage of each of the first N-type transistor 21 and the second N-type transistor 22 can be applied.

[0058] The complementary power supply modulator according to the fifth embodiment has the same effects as the complementary power supply modulator according to the fourth embodiment. In addition, in the low-voltage side switching element 20, the cascode-connected transistors are not limited to two stages, the first N-type transistor 21 and the second N-type transistor 22, but may be three or more stages of cascode-connected N-type transistors.

[0059] In the complementary power supply modulator according to the fifth embodiment, the high-voltage side combiner 30A shown in the complementary power supply modulator according to the second embodiment may be used as the high-voltage side combiner 30. Furthermore, in the complementary power supply modulator of embodiment 5, similar to the complementary power supply modulator of embodiment 3, the second voltage V2 applied to the second high-voltage side addition node 30b of the high-voltage side combiner 30 may be the same voltage as the first voltage V1.

[0060] Embodiment 6 A complementary power supply modulator according to a sixth embodiment will be described with reference to FIG. The complementary power supply modulator according to the second embodiment is the same as the complementary power supply modulator according to the first embodiment except that a low-voltage side combiner 40 is added. In FIG. 9, the same reference numerals as those shown in FIG. 1 and FIG. 2 indicate the same or corresponding parts.

[0061] The following description will focus on the low-pressure side combiner 40, which is a difference from the first embodiment. The low-voltage side combiner 40 has a first low-voltage side summing node 40a electrically connected directly to the input terminal 2, a second low-voltage side summing node 40b directly connected to the third power supply potential node V3 to which the third voltage V3 is applied, and a low-voltage side combined output node 40c connected to the low-voltage side control node 20c of the low-voltage side switching element 20 and outputting a PWM signal resulting from combining the PWM signal input to the first low-voltage side summing node 40a and the third voltage V3 applied to the second low-voltage side summing node 40b.

[0062] A normally-on depletion type N-type transistor is used as the first N-type transistor 21 constituting the low-voltage side switching element 20, and the third voltage V3 applied to the second low-voltage side addition node 40b is set to a negative voltage. By doing this, it is not necessary to add a negative value to the PMW signal. It is preferable that the second voltage V2 applied to the second power supply potential node V2 is the same as the first voltage V1 applied to the first power supply potential node V1.

[0063] Similar to the high-voltage side combiner 30 in the first embodiment shown in FIG. 2, the low-voltage side combiner 40 has a DC block which is a capacitor and an inductor section which is a choke coil. The capacitor in the low-voltage side combiner 40 has one electrode electrically connected directly to the first low-voltage side summing node 40a, and the other electrode electrically connected directly to the low-voltage side combined output node 40c. In the choke coil in the low-voltage side combiner 40, one electrode is electrically connected directly to the third power supply potential node V3, and the other electrode is electrically connected directly to the low-voltage side combined output node 40c.

[0064] Further, the low-voltage side combiner 40 may be configured to include a DC block, which is a capacitor, and an inductor portion, similar to the high-voltage side combiner 30A in the second embodiment shown in FIG. In this case, one electrode of the capacitor in the low-voltage side combiner 40 is electrically connected directly to the first low-voltage side summing node 40a, and the other electrode is electrically connected directly to the low-voltage side combined output node 40c.

[0065] In the inductor section of the low-voltage side combiner 40, a first parallel arrangement of the first inductor, the second inductor, and the first resistor and a second parallel arrangement of the third inductor and the second resistor are connected in series to a low-voltage side combined output node 40c in that order from a third power supply potential node V3, a first capacitor is connected between one electrode of the first inductor and the ground node, and a second capacitor is connected between a connection point between the other electrode of the first inductor and one end of the first parallel arrangement and the ground node.

[0066] The low-voltage side combiner 40 may be changed to only a capacitor that constitutes a DC block by setting the threshold voltage of the first N-type transistor 21 and the voltage amplitude and duty ratio of the PWM signal.

[0067] In the complementary power supply modulator of the sixth embodiment, for example, if the H level of the PWM signal is 3V, the L level is 0V, and the third voltage V3 is -3V, when the PWM signal is at the H level, a combined voltage of 0V is output to the low-voltage side combined output node 40c of the low-voltage side combiner 40, and the first N-type transistor 21 constituting the low-voltage side switching element 20 is turned on, and when the PWM signal is at the L level, a combined voltage of -3V is output to the low-voltage side combined output node 40c of the low-voltage side combiner 40, and the first N-type transistor 21 constituting the low-voltage side switching element 20 is turned off.

[0068] The complementary power supply modulator according to the sixth embodiment has the same effects as the complementary power supply modulator according to the first embodiment. In addition, in the complementary power supply modulator of embodiment 6, as in the complementary power supply modulator of embodiment 4, a second P-type transistor 12 connected in cascode to the first P-type transistor 11 may be added as a high-voltage side switching element 10. Furthermore, in the complementary power supply modulator of embodiment 6, as in the complementary power supply modulator of embodiment 5, a second P-type transistor 12 connected in cascode with the first P-type transistor 11 may be added as the high-voltage side switching element 10, and a second N-type transistor 22 connected in cascode with the first N-type transistor 21 may be added as the low-voltage side switching element 20.

[0069] It should be noted that the embodiments may be freely combined, or any of the components in each embodiment may be modified, or any of the components in each embodiment may be omitted. [Industrial Applicability]

[0070] The complementary power supply modulator according to the present disclosure is suitable as a power supply modulator that modulates an applied bias voltage in response to the voltage level of an input signal that is a PWM signal. Furthermore, the complementary power supply modulator according to the present disclosure is suitable for use as a power supply modulator in a power supply modulated amplifier. [Explanation of symbols]

[0071] 1 input terminal, 2 output terminal, 10 high-voltage side switching element, 10a first high-voltage side main node, 10b second high-voltage side main node, 10c high-voltage side control node, 11 first P-type transistor, 20 low-voltage side switching element, 20a first low-voltage side main node, 20b second low-voltage side main node, 20c low-voltage side control node, 21 first N-type transistor, 30 high-voltage side combiner, 30a first high-voltage side summing node, 30b second high-voltage side summing node, 30c high-voltage side combined output node, 31 capacitor, 32 choke coil, 40 low-voltage side combiner.

Claims

1. a high-voltage side switching element having a high-voltage side control node to which a PWM signal is input, a first high-voltage side main node connected to a first power supply potential node to which a first voltage that is at least twice the amplitude of the PWM signal is applied, and a second high-voltage side main node connected to an output terminal, the high-voltage side switching element comprising a first P-type transistor having a source electrode electrically connected to the first high-voltage side main node, a drain electrode electrically connected to the second high-voltage side main node, and a gate electrode electrically connected to the high-voltage side control node; a low-voltage side switching element including a first N-type transistor having a first low-voltage side main node connected to the output terminal, a second low-voltage side main node connected to a ground potential node, and a low-voltage side control node to which a PWM signal is input, the first N-type transistor having a drain electrode electrically connected to the first low-voltage side main node, a source electrode electrically connected to the second low-voltage side main node, and a gate electrode electrically connected to the low-voltage side control node; a high-voltage side combiner having a first high-voltage side summing node electrically connected to an input terminal to which a PWM signal is input, a second high-voltage side summing node electrically connected to a second power supply potential node to which a second voltage is applied, and a high-voltage side combined output node electrically connected to a high-voltage side control node of the high-voltage side switching element and from which a PWM signal obtained by combining the PWM signal input to the first high-voltage side summing node and the second voltage applied to the second high-voltage side summing node is output, the high-voltage side combiner having no resistance loss for combining the PWM signal input to the first high-voltage side summing node and the second voltage applied to the second high-voltage side summing node; 1. A complementary power supply modulator comprising:

2. 2. The complementary power supply modulator according to claim 1, wherein the first P-type transistor is a transistor using a wide bandgap semiconductor having a bandgap of 3 eV or more, and the first N-type transistor is a transistor using a wide bandgap semiconductor having a bandgap of 3 eV or more.

3. 2. The complementary power supply modulator of claim 1, wherein the high-voltage side combiner includes a DC block electrically connected between the first high-voltage side summing node and the high-voltage side combined output node, and a choke coil electrically connected between the second high-voltage side summing node and the high-voltage side combined output node.

4. the DC block is a capacitor; 4. A complementary power supply modulator according to claim 3, wherein the capacitance value of the capacitor is set to a value equal to or greater than the reciprocal of a time constant calculated from the input impedance of the first P-type transistor, which is equal to the frequency of the PWM signal, and the resistance value of the choke coil.

5. the DC block is a capacitor; 4. The complementary power supply modulator according to claim 3, wherein the capacitance value of the capacitor is set to a value that is 5 times or more the reciprocal of a time constant calculated from the input impedance of the first P-type transistor, which is the same as the frequency of the PWM signal, and the resistance value of the choke coil.

6. 4. The complementary power supply modulator according to claim 3, wherein the impedance of the choke coil is set to a value that is five or more times the input impedance of the first P-type transistor at the frequency of the PWM signal.

7. 2. A complementary power supply modulator as claimed in claim 1, wherein the second voltage applied to the second power supply potential node is higher than the first voltage applied to the first power supply potential node.

8. 2. A complementary power supply modulator as claimed in claim 1, wherein the second voltage applied to said second power supply potential node is the same as the first voltage applied to said first power supply potential node.

9. The high pressure side combiner includes: a DC block including a capacitor electrically connected between the first high-voltage side summing node and the high-voltage side combined output node; an inductor section including a first inductor, a first parallel combination of a second inductor and a first resistor, and a second parallel combination of a third inductor and a second resistor, which are connected in series in this order between the second high-voltage side summing node and the high-voltage side combined output node, a first capacitor connected between the second high-voltage side summing node and a ground node, and a second capacitor connected between a connection point of the first inductor and the first parallel combination and the ground node; 2. The complementary power supply modulator of claim 1, comprising:

10. 10. The complementary power supply modulator according to claim 1, further comprising a low-voltage side combiner having a first low-voltage side summing node electrically connected to the input terminal, a second low-voltage side summing node connected to a third power supply potential node to which a third voltage is applied, and a low-voltage side combined output node connected to a low-voltage side control node of the low-voltage side switching element and outputting a PWM signal obtained by combining a PWM signal input to the first low-voltage side summing node and a third voltage applied to the second low-voltage side summing node.

11. 10. The complementary power supply modulator according to claim 1, wherein the high-voltage side switching element further comprises a P-type transistor that is cascode-connected with the first P-type transistor in two or more stages.

12. 10. The complementary power supply modulator according to claim 1, wherein the low-voltage side switching element further comprises an N-type transistor that is cascode-connected with the first N-type transistor in two or more stages.

Images