Silicon carbide semiconductor device and method for manufacturing silicon carbide semiconductor device
By incorporating dendrite structure Si nodules in the AlSi electrode of silicon carbide semiconductor devices and sputtering at elevated temperatures, the issues of substrate cracking and bonding wire peeling are addressed, enhancing the device's yield and embedding properties.
Patent Information
- Application Number
- JP2021022958
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-02-17
- Publication Date
- 2025-03-18
- Estimated Expiration
- 2041-02-17
AI Technical Summary
When silicon carbide is used as a semiconductor material, the growth of Si nodules in the AlSi electrode during sputtering can lead to cracks in the semiconductor substrate and peeling of the bonding wire, due to the expansion of these nodules under applied loads and ultrasonic vibrations.
The silicon carbide semiconductor device incorporates a surface electrode made of an aluminum alloy containing silicon, with silicon nodules of a dendrite structure deposited inside the electrode. The temperature of the semiconductor substrate during sputtering is set to 430° C. or higher, and the area ratio of dendrite structure Si nodules is maintained at 10% or more at the junction with the bonding wire, ensuring the height of the Si nodules is 2 μm or less.
This approach effectively suppresses the occurrence of cracks in the semiconductor substrate and prevents peeling of the bonding wire, thereby improving the yield of the silicon carbide semiconductor device. Additionally, the higher temperature sputtering improves the embedding property of the AlSi electrode.
Smart Images

Figure 0007647146000001 
Figure 0007647146000002 
Figure 0007647146000003
Abstract
Description
[Technical field]
[0001] The present invention relates to a silicon carbide semiconductor device and a method for manufacturing a silicon carbide semiconductor device. [Background technology]
[0002] Conventionally, aluminum (Al) containing silicon (Si) has been used as the electrode material for the surface electrode on the front side of a semiconductor substrate. The surface electrode on the front side of the semiconductor substrate is formed to be embedded in the contact hole of the interlayer insulating film. For this reason, reflow sputtering, which deposits (forms) aluminum containing silicon as the electrode material (hereinafter referred to as AlSi electrode) and then softens it by heat treatment (reflow) to embed it, has been proposed as a method to improve the embeddability of the surface electrode.
[0003] When silicon (Si) is used as a semiconductor material, if the semiconductor substrate and AlSi electrode are exposed to high temperatures while in contact with each other, interdiffusion between the silicon atoms in the semiconductor substrate and the aluminum atoms in the AlSi electrode is likely to occur. The aluminum atoms that diffuse from the AlSi electrode into the semiconductor substrate are alloyed with the silicon atoms in the semiconductor substrate, forming a protrusion (alloy spike) that locally protrudes from the AlSi electrode into the semiconductor substrate. If the alloy spike progresses to the pn junction inside the semiconductor substrate, there is concern that the element may fail due to degradation of characteristics.
[0004] Silicon atoms that diffuse from the semiconductor substrate into the AlSi electrode precipitate as silicon (Si) nodules near the interface of the AlSi electrode with the semiconductor substrate, increasing the electrical resistance at the interface between the semiconductor substrate and the AlSi electrode. It is known that by keeping the temperature of the semiconductor substrate relatively low (less than about 300°C) during sputtering of the AlSi electrode, the interdiffusion between silicon atoms in the semiconductor substrate and aluminum atoms in the AlSi electrode is suppressed, and the progression of alloy spikes and the precipitation of Si nodules are suppressed.
[0005] In addition, when the aspect ratio of the contact hole in the interlayer insulating film is large, a method is used in which tungsten (W), which has a higher embedding ability than aluminum, is embedded in the contact hole in the interlayer insulating film by using a chemical vapor deposition (CVD) method. By depositing an AlSi electrode on a tungsten plug (W plug) embedded in the contact hole in the interlayer insulating film, the AlSi electrode and the semiconductor substrate are not in direct contact with each other, thereby suppressing the occurrence of alloy spikes.
[0006] On the other hand, when silicon carbide (SiC) is used as the semiconductor material, alloy spikes are unlikely to occur even if the temperature of the semiconductor substrate during sputtering of the AlSi electrode is set to 300° C. or higher. This is because the diffusion coefficient of silicon carbide itself is small (the bond energy between the carbon atoms and silicon atoms of silicon carbide is large), and because a silicide film for ohmic contact with the semiconductor substrate is formed between the semiconductor substrate and the AlSi electrode, suppressing interdiffusion between the silicon atoms in the semiconductor substrate and the aluminum atoms in the AlSi electrode.
[0007] As a conventional method for manufacturing a silicon semiconductor device using silicon as a semiconductor material, a method has been proposed in which the temperature of the semiconductor substrate during sputtering of the AlSi electrode is set to a temperature close to the recrystallization temperature of the metal material of the AlSi electrode or lower to suppress the precipitation of Si nodules (see, for example, Patent Document 1 below). In Patent Document 1 below, the temperature of the semiconductor substrate during sputtering of the AlSi electrode is set to 170° C. or lower, at which silicon atoms diffused in the AlSi electrode are unlikely to become granular, thereby reducing the precipitation of Si nodules in the AlSi electrode to nearly 0%.
[0008] Also, as another conventional method for manufacturing a silicon semiconductor device, a method has been proposed in which an AlSi electrode is deposited by successively performing sputtering at a semiconductor substrate temperature of a low temperature of 150° C. and a high temperature of 350° C. (see, for example, Patent Document 2 below.) In Patent Document 2 below, Si nodules in an AlSi electrode deposited at a low temperature are absorbed into and grow in an AlSi electrode deposited at a high temperature, so that Si nodules are precipitated at a depth intermediate the total thickness of the AlSi electrode and are separated from the underlying barrier metal.
[0009] Also, in another conventional method for manufacturing a silicon semiconductor device, it has been reported that coarse silicon precipitates (Si precipitates) precipitated in an AlSi electrode deposited by sputtering are strongly pressed into the semiconductor substrate when a bonding wire is crimped to the AlSi electrode, causing cracks that reach the semiconductor substrate from the places where the Si precipitates are pressed in (see, for example, Non-Patent Document 1 below). Non-Patent Document 1 below reports that cracks caused by Si precipitates may cause element destruction and reduce yields. [Prior art documents] [Patent documents]
[0010] [Patent Document 1] Patent No. 3083301 [Patent Document 2] JP 2000-164593 A [Non-patent literature]
[0011] [Non-Patent Document 1] Hirofumi Goto and 4 others, High-strength aluminum alloy electrode material for Si-IGBT, Research and Development KOBE STEEL ENGINEERING REPORTS, Kobe Steel, Ltd., September 2005, Vol. 65, No. 2, pp. 58-61 Summary of the Invention [Problem to be solved by the invention]
[0012] As described above, when silicon carbide is used as the semiconductor material, the embeddability of the AlSi electrode can be improved by using only sputtering, without using the CVD method to embed a W plug, etc. However, as a result of the inventors' intensive research, it was found that if the temperature of the semiconductor substrate during the sputtering of the AlSi electrode is set to 300°C or higher, the Si nodules precipitated in the AlSi electrode grow and expand as crystal grains in the thickness direction of the AlSi electrode (the direction perpendicular to the surface of the semiconductor substrate and away from the surface of the semiconductor substrate).
[0013] It was found that when the Si nodules in the AlSi electrode expand, damage caused by the load, ultrasonic vibration, etc. applied to the AlSi electrode during the wire bonding process is transmitted to the semiconductor substrate via the Si nodules in the AlSi electrode, causing cracks near the Si nodules that reach the inside of the semiconductor substrate, or peeling off the bonding wire from the semiconductor substrate. The above-mentioned Non-Patent Document 1 reports that the problem of cracks in the semiconductor substrate caused by these Si nodules also occurs when silicon is used as the semiconductor material.
[0014] Furthermore, if Si nodules are precipitated in an AlSi electrode, in order to pattern the AlSi electrode and leave it in a specified location, it is necessary to remove the AlSi electrode by wet etching, and then remove the Si nodules remaining on the barrier metal by dry etching. However, in order to remove the Si nodules that have expanded and increased in height due to crystal grain growth into a rectangular column shape in the thickness direction of the AlSi electrode by dry etching, the dry etching time must be extended, which adversely affects the reliability of the barrier metal below the AlSi electrode.
[0015] In the above Patent Document 1, the temperature of the semiconductor substrate during sputtering of the AlSi electrode is as low as 170° C. or less, which causes a problem of poor embedding of the AlSi electrode. In the above Patent Document 2, the AlSi electrode is deposited by successively performing sputtering at a low temperature and sputtering at a high temperature, but it is difficult to change the temperature of the semiconductor substrate during sputtering. In addition, the thickness of the AlSi electrode used in a power device is as large as about 4 μm to 6 μm, and it is difficult to obtain the effect of depositing the AlSi electrode by applying the above Patent Document 2.
[0016] In order to solve the above-mentioned problems of the prior art, the present invention provides l An object of the present invention is to provide a silicon carbide semiconductor device having a Si electrode, which can improve the yield, and a method for manufacturing the silicon carbide semiconductor device. [Means for solving the problem]
[0017] In order to solve the above-mentioned problems and achieve the objects of the present invention, a silicon carbide semiconductor device according to the present invention has the following features: The device comprises a semiconductor substrate made of silicon carbide, and a surface electrode made of an aluminum alloy containing silicon provided on a surface of the semiconductor substrate. Silicon nodules are precipitated inside the surface electrode. The surface electrode contains silicon nodules with a dendritic structure at least in a portion that becomes a bond with a bonding wire, with an area ratio of 10% or more to the total area of the silicon nodules at the bond.
[0018] In addition, in the silicon carbide semiconductor device according to the present invention, a height of the silicon nodule inside the surface electrode is smaller than a thickness of the surface electrode.
[0019] In addition, the silicon carbide semiconductor device of the present invention is characterized in that, in the above-mentioned invention, the height of the silicon nodule inside the surface electrode is less than the thickness of the joint portion of the surface electrode which becomes relatively thin when the bonding wire is joined.
[0020] Moreover, in the silicon carbide semiconductor device according to the present invention, in the above-mentioned invention, the height of the silicon nodules inside the surface electrode is 2 μm or less.
[0021] Moreover, in the silicon carbide semiconductor device according to the present invention, in the above-mentioned invention, the front surface electrode contains silicon in an amount of 0.5 wt % or more and 3 wt % or less relative to aluminum.
[0022] In addition, the silicon carbide semiconductor device according to the present invention is characterized in that, in the above-mentioned invention, it further comprises a barrier metal provided between the semiconductor substrate and the front surface electrode, which prevents diffusion of impurity atoms from the semiconductor substrate side to the front surface electrode, or from the front surface electrode side to the semiconductor substrate, or both.
[0023] In addition, in the silicon carbide semiconductor device according to the present invention, in the above-mentioned invention, the silicon carbide semiconductor device further comprises a silicide film provided between the semiconductor substrate and the front surface electrode and in ohmic contact with the semiconductor substrate.
[0024] In order to solve the above-mentioned problems and achieve the object of the present invention, a method for manufacturing a silicon carbide semiconductor device according to the present invention is a method for manufacturing a silicon carbide semiconductor device comprising a semiconductor substrate made of silicon carbide and a surface electrode made of an aluminum alloy containing silicon provided on a surface of the semiconductor substrate, and has the following features: It includes a depositing step of depositing the surface electrode made of an aluminum alloy containing silicon on the surface of the semiconductor substrate made of silicon carbide by sputtering. In the depositing step, the temperature of the semiconductor substrate or the temperature around a region where the surface electrode is formed, or both of them, are set to 430°C or higher and 500°C or lower.
[0025] Furthermore, in the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-mentioned invention, in the deposition process, the area ratio of silicon nodules having a dendritic structure, among the silicon nodules precipitated inside the surface electrode, is set to 10% or more of the total area of the silicon nodules at the joint, at least in the portion of the surface electrode that becomes the joint with the bonding wire.
[0026] According to the above-mentioned invention, silicon nodules in the AlSi electrode (surface electrode) are not pushed into the semiconductor substrate by the bonding wire, so that it is possible to suppress the occurrence of cracks reaching the inside of the semiconductor substrate and peeling of the bonding wire. Also, according to the above-mentioned invention, by setting the temperature of the semiconductor substrate or the temperature around the region where the AlSi electrode is formed to 430° C. or higher during sputtering of the AlSi electrode, it is possible to improve the embeddability of the AlSi electrode. Effect of the Invention
[0027] According to the silicon carbide semiconductor device and the method for manufacturing the silicon carbide semiconductor device of the present invention, l The present invention provides an effect of improving the yield in a silicon carbide semiconductor device having a Si electrode. [Brief description of the drawings]
[0028] [Figure 1] 1 is a cross-sectional view showing a layout of a silicon carbide semiconductor device according to an embodiment, as viewed from the front surface side of a semiconductor substrate. [Diagram 2] 2 is a cross-sectional view showing a cross-sectional structure taken along line AA' in FIG. [Diagram 3] FIG. 2 is an explanatory diagram illustrating a schematic relationship between the temperature of a semiconductor substrate during sputtering of an AlSi electrode and the crystal structure of the AlSi electrode. [Figure 4] FIG. 2 is a characteristic diagram showing the relationship between the temperature of a semiconductor substrate during sputtering of the AlSi electrode in Experimental Example 1 and the height of Si nodules in the AlSi electrode. [Diagram 5]5 is a plan view showing a schematic view of the Si nodules of samples A to D in FIG. 4 as viewed from the front surface side of a semiconductor substrate. FIG. [Figure 6] 1 is a graph showing the relationship between the temperature of a semiconductor substrate during sputtering of an AlSi electrode in Experimental Example 1 and the area ratio of Si nodules in the AlSi electrode. [Figure 7] FIG. 11 is a cross-sectional view showing a schematic diagram of a joint between an AlSi electrode and a bonding wire in Experimental Example 2. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0029] Preferred embodiments of the silicon carbide semiconductor device and the method for manufacturing the silicon carbide semiconductor device according to the present invention will be described in detail below with reference to the accompanying drawings. In this specification and the accompanying drawings, in a layer or region prefixed with n or p, electrons or holes are the majority carriers, respectively. In addition, + and - attached to n or p respectively mean that the impurity concentration is higher and lower than that of a layer or region not prefixed with that. In the following description of the embodiments and the accompanying drawings, the same reference numerals are attached to similar configurations, and duplicated explanations are omitted.
[0030] (Embodiment) The structure of a silicon carbide semiconductor device according to an embodiment will be described. FIG. 1 is a cross-sectional view showing a layout of a silicon carbide semiconductor device according to an embodiment as viewed from the front surface side of a semiconductor substrate. FIG. 1 shows a state after mounting of a silicon carbide semiconductor device 10. In FIG. 1, openings 5a, 5b of a passivation film 5 are shown by dashed lines, and a solder layer 12 and a mounting substrate 13 are omitted. FIG. 2 is a cross-sectional view showing a cross-sectional structure taken along line A-A' in FIG. 1. In FIG. 2, an element structure (each part inside a semiconductor substrate 1) of the silicon carbide semiconductor device 10 is omitted.
[0031] A silicon carbide semiconductor device 10 according to an embodiment shown in Figures 1 and 2 includes a surface electrode (hereinafter, referred to as an AlSi electrode) 4 having an aluminum (Al) alloy containing silicon (Si) as an electrode material on a main surface of a semiconductor substrate (semiconductor chip) 1 made of silicon carbide (SiC). Figures 1 and 2 show a vertical semiconductor device having an AlSi electrode 4 on the front surface of a semiconductor substrate 1 as the silicon carbide semiconductor device 10, but it is sufficient that at least one AlSi electrode 4 is provided on at least one main surface of the semiconductor substrate 1, and other configurations can be variously modified.
[0032] The semiconductor substrate 1 may be a bulk substrate cut out from a semiconductor ingot (semiconductor single crystal rod) and diced into chips, or an epitaxial substrate formed by growing an epitaxial layer of a predetermined conductivity type on a bulk substrate (starting substrate). The semiconductor substrate 1 is provided with an active region 21 and an edge termination region 22 surrounding the periphery of the active region 21. The active region 21 is a region through which a main current flows when the silicon carbide semiconductor device 10 is turned on. The active region 21 is provided, for example, in approximately the center of the semiconductor substrate 1.
[0033] Edge termination region 22 is a region between active region 21 and an end of semiconductor substrate 1, and has the function of maintaining a breakdown voltage by mitigating the electric field on the front surface side of semiconductor substrate 1. The breakdown voltage is the limit voltage at which silicon carbide semiconductor device 10 does not malfunction or break down. In edge termination region 22, a breakdown voltage structure (not shown) such as a field limiting ring (FLR) or a junction termination extension (JTE) structure is arranged.
[0034] One or more (two in this example) AlSi electrodes 4 are provided on the front surface of the semiconductor substrate 1 in the active region 21. Fig. 1 shows a case in which a silicon carbide semiconductor device 10 according to the embodiment is used as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor: a MOS type field effect transistor having an insulated gate with a three-layer structure of metal-oxide film-semiconductor), and an AlSi electrode 4 functioning as a source electrode 4a and an AlSi electrode 4 functioning as a gate pad 4b are arranged.
[0035] The configuration of the AlSi electrode 4 will be described later. A typical trench gate structure (not shown) is provided on the front surface side of the semiconductor substrate 1 as an element structure of the silicon carbide semiconductor device 10. Reference numeral 2 denotes an interlayer insulating film or a field insulating film, or a laminated insulating film thereof, selectively provided on the front surface of the semiconductor substrate 1. Here, it is referred to as the interlayer insulating film 2. A barrier metal 3 may be provided between the AlSi electrode 4 and the front surface of the semiconductor substrate 1 exposed in the surface of the interlayer insulating film 2 and the contact hole of the interlayer insulating film 2.
[0036] The barrier metal 3 prevents diffusion of metal atoms toward the semiconductor substrate 1 and mutual reactions between adjacent portions sandwiching the barrier metal 3. The barrier metal 3 suppresses diffusion of aluminum atoms from the AlSi electrode 4 to the interlayer insulating film 2. The barrier metal 3 is, for example, a titanium (Ti) film, a titanium nitride (TiN) film, or a laminated metal film of these. A silicide film 6 in ohmic contact with the semiconductor substrate 1 may be provided between the barrier metal 3 (or the AlSi electrode 4 when the barrier metal 3 is not provided) and the semiconductor substrate 1.
[0037] The source electrode 4a is electrically connected to the front surface of the semiconductor substrate 1 via the barrier metal 3 and the silicide film 6, or via only the silicide film 6, so that the n-type junction exposed on the front surface of the semiconductor substrate 1 is + Type source region and p ++The source electrode 4a is electrically connected to the gate contact region. The source electrode 4a covers almost the entire surface of the active region 21 except for the region where the gate pad 4b is disposed. A portion of the source electrode 4a exposed to an opening 5a of a passivation film 5, which will be described later, functions as a source pad (electrode pad).
[0038] The gate pad (electrode pad) 4b is formed, for example, at the same time as the source electrode 4a and is arranged at the same level as the source electrode 4a but separated from the source electrode 4a. All gate electrodes (not shown) of the MOSFET are electrically connected to the gate pad 4b via a gate runner (not shown) made of polysilicon (poly-Si). The gate runner is arranged in the edge termination region 22 and surrounds the periphery of the active region 21. The gate pad 4b is exposed to an opening 5b in the passivation film 5.
[0039] The front surface of the semiconductor substrate 1 is covered with a passivation film 5. Different AlSi electrodes 4 (source electrode 4a and gate pad 4b) are exposed in the openings 5a and 5b of the passivation film 5. The openings 5a and 5b of the passivation film 5 have a smaller surface area than the AlSi electrodes 4 exposed therein. Different bonding wires 11 (the bonding wire 11 of the gate pad 4b is not shown) are bonded to the AlSi electrodes 4 exposed in the openings 5a and 5b of the passivation film 5.
[0040] One end of the bonding wire 11 is bonded to the AlSi electrode 4, and the other end is bonded to a lead (not shown) of a lead frame (a mounting substrate 13 described later). The bonding wire 11 is crimped to the AlSi electrode 4 by ordinary wire bonding, and is crushed at a joint 11a with the AlSi electrode 4. The AlSi electrode 4 is crushed by the bonding wire 11, and a remaining thickness t2 at a joint 4c with the bonding wire 11 is thinner than a thickness t1 of the other part of the AlSi electrode 4 (thickness at the time of deposition or after patterning (processing)).
[0041] A front surface electrode 7 functioning as a drain electrode is provided over the entire back surface of the semiconductor substrate 1. Front surface electrode 7 is joined to a die pad of a mounting substrate 13, which is, for example, a lead frame, via a solder layer 12, whereby silicon carbide semiconductor device 10 is mounted on the front surface of mounting substrate 13. Mounting substrate 13 may be, for example, a DCB (Direct Copper Bond) substrate in which circuit patterns made of conductive plates such as copper (Cu) foil are formed on both sides of a ceramic substrate.
[0042] Between mounting substrate 13 on which semiconductor substrate 1 to which one end of bonding wire 11 is bonded is mounted, and lead (not shown) to which the other end of bonding wire 11 is bonded, a thermosetting resin such as epoxy resin is provided so as to cover semiconductor substrate 1 and bonding wire 11. When a resin case (not shown) is attached to the periphery of mounting substrate 13, a sealing material such as epoxy resin is filled between the resin case and mounting substrate 13 so as to cover semiconductor substrate 1 and bonding wire 11.
[0043] Next, the configuration of the AlSi electrode 4 will be described. Fig. 3 is an explanatory diagram that shows a typical relationship between the temperature of the semiconductor substrate and the crystal structure of the AlSi electrode during sputtering of the AlSi electrode. The AlSi electrode 4 is deposited on the barrier metal 3 by sputtering in a state in which the temperature of the semiconductor substrate 1 or the temperature around the region where the AlSi electrode 4 is formed, or both of them (hereinafter, referred to as the temperature of the semiconductor substrate 1 or the temperature around the region where the AlSi electrode 4 is formed) is about 430°C or higher and lower than the melting point of the electrode material of the AlSi electrode 4.
[0044] The melting point (freezing point) of the electrode material of the AlSi electrode 4 is the liquidus point (crystallization point on the liquidus line) of the eutectic reaction based on the composition of the electrode material of the AlSi electrode 4, and is, for example, about 530° C. For this reason, by increasing the temperature of the semiconductor substrate 1 during sputtering of the AlSi electrode 4 or the temperature around the region where the AlSi electrode 4 is formed, the embeddability of the AlSi electrode 4 can be improved, and by not making the AlSi electrode 4 too soft (fluid) during sputtering at a temperature of, for example, about 500° C. or less, the thickness t1 of the AlSi electrode 4 can be maintained.
[0045] The upper limit of the thickness t1 of the AlSi electrode 4 is the limit determined by the lamination accuracy of the sputtering device or the processing capacity of the dry etching device, and is, for example, about 5 μm. It is preferable that the thickness t1 of the AlSi electrode 4 is as thick as possible, and the thicker the thickness t1 of the AlSi electrode 4, the more the conduction loss can be reduced. As described above, by crimping the bonding wire 11 to the AlSi electrode 4, the remaining thickness t2 of the AlSi electrode 4 at the joint 4c with the bonding wire 11 is, for example, about 2.1 μm at its thinnest portion (see FIG. 7).
[0046] The AlSi electrode 4 contains silicon in an amount of, for example, about 0.5 wt% or more and 3 wt% or less relative to aluminum. The inclusion of silicon in the AlSi electrode 4 suppresses interdiffusion between silicon atoms in the semiconductor substrate 1 and aluminum atoms in the AlSi electrode 4, thereby suppressing the progression of alloy spikes. The AlSi electrode 4 may further contain copper (Cu) in an amount of about 0.1 wt% or more and 5 wt% or less relative to aluminum. The inclusion of copper in the AlSi electrode 4 improves the strength of the AlSi electrode 4. More preferably, the copper content of the AlSi electrode 4 relative to aluminum may be about 0.5 wt% or more and 2 wt% or less.
[0047] The AlSi electrode 4 contains silicon (Si) nodules distributed substantially uniformly over the surface of the AlSi electrode 4 near the interface between the barrier metal 3 and the AlSi electrode 4. The Si nodules are silicon precipitates (Si crystals) that grow as crystal grains using silicon atoms that have precipitated beyond the solid solubility limit of silicon in the AlSi electrode 4 as nuclei. The AlSi electrode 4 contains Si nodules with a dendritic structure at least in the bonded portion 4c with the bonding wire 11, with an area ratio of 10% or more to the total area of the Si nodules in the bonded portion 4c.
[0048] It is sufficient that the AlSi electrode 4 contains Si nodules with a dendritic structure at the above-mentioned area ratio, and Si nodules with a dendritic structure and Si nodules without a dendritic structure may be mixed in the AlSi electrode 4. The inventors have confirmed through extensive research that in order to precipitate Si nodules with a dendritic structure at the above-mentioned area ratio in the AlSi electrode 4, the temperature of the semiconductor substrate 1 during sputtering of the AlSi electrode 4 or the temperature around the region where the AlSi electrode 4 is formed should be set to 430° C. or higher (Si crystals surrounded by a rectangular frame 30 in FIG. 3).
[0049] The dendritic structure Si nodules are silicon (Si) crystals whose crystal grains have grown in a dendritic shape so that the dendrites extend in a direction approximately perpendicular to the thickness direction of the AlSi electrode 4 (the direction perpendicular to the surface of the semiconductor substrate 1 and away from the surface of the semiconductor substrate 1). The non-dendritic structure Si nodules are prismatic structure Si nodules whose crystal grains have grown in a prismatic shape in the thickness direction of the AlSi electrode 4. The area of a Si nodule is the area (surface area) of the planar shape of the Si nodule as viewed from the front surface side of the semiconductor substrate 1.
[0050] For example, when silicon is used as the semiconductor material, the temperature of the semiconductor substrate during sputtering of the AlSi electrode is set to less than 300°C as described above, so that almost all of the Si nodules in the AlSi electrode have a prismatic structure (Si crystals surrounded by a rectangular frame 130 in FIG. 3). For example, when the temperature of the semiconductor substrate during sputtering of the AlSi electrode is 400°C or lower, almost all of the Si nodules in the AlSi electrode have a prismatic structure. The height of the Si nodules with the prismatic structure in this case reaches a maximum of about 5 μm in the thickness direction of the AlSi electrode 4.
[0051] On the other hand, when the temperature of the semiconductor substrate 1 or the temperature around the region where the AlSi electrode 4 is formed during sputtering of the AlSi electrode 4 exceeds 400° C., the precipitation morphology of the Si nodules in the AlSi electrode 4 changes from a rectangular columnar structure to a dendritic structure. Then, by setting the temperature of the semiconductor substrate 1 or the temperature around the region where the AlSi electrode 4 is formed during sputtering of the AlSi electrode 4 to 430° C. or higher as in this embodiment, it is possible to precipitate Si nodules with a dendritic structure in the AlSi electrode 4 at the above-mentioned area ratio.
[0052] The higher the temperature of the semiconductor substrate 1 or the temperature around the region where the AlSi electrode 4 is formed during sputtering of the AlSi electrode 4, the greater the number (area ratio) of dendritic Si nodules in the AlSi electrode 4. The greater the number of dendritic Si nodules, the smaller the number of prismatic Si nodules in the AlSi electrode 4. In the AlSi electrode 4 (in the AlSi solid solution) during sputtering, the silicon concentration in the dendritic Si nodules is higher than the silicon concentration in the prismatic Si nodules.
[0053] The height of the Si nodules in the AlSi electrode 4 (height in the thickness direction of the AlSi electrode 4) is lower than the remaining thickness t2 of the AlSi electrode 4, and is about 2 μm or less, for both the dendritic and prismatic Si nodules (see FIGS. 4 to 6). This is because the Si nodules with the dendritic structure only grow to a height of 1 μm or less, and in addition, as described above, the deposition morphology of the Si nodules changes from a prismatic structure to a dendritic structure during sputtering of the AlSi electrode 4, so that the Si nodules with the prismatic structure do not grow beyond 2 μm.
[0054] Next, a method for manufacturing the silicon carbide semiconductor device 10 according to the embodiment will be described. First, a semiconductor wafer made of silicon carbide is prepared. A predetermined element structure is formed on the front surface side of an area of the semiconductor wafer that will become a semiconductor chip (semiconductor substrate 1) after dicing (cutting). For example, when the silicon carbide semiconductor device 10 according to the embodiment is an n-channel vertical MOSFET, the predetermined element structure includes a p-type base region, an n-type semiconductor substrate 1, and a p-type semiconductor substrate 2. + Type source region, p ++ The insulated gate (MOS gate) structure consists of a contact region, a gate insulating film, and a gate electrode.
[0055] Next, an interlayer insulating film 2 is formed on the front surface of the semiconductor wafer and then selectively removed to form contact holes at predetermined locations in the interlayer insulating film 2. Next, a silicide film 6 is formed in ohmic contact with a portion of the front surface of the semiconductor wafer that is exposed through the contact hole in the interlayer insulating film 2. Next, a barrier metal 3 is formed on the surface of the interlayer insulating film 2 and the surface of the silicide film 6. If the barrier metal 3 is a laminated metal film, only the surface of the interlayer insulating film 2 may be covered and protected with a metal film below the barrier metal 3 before the formation of the silicide film 6.
[0056] Next, the semiconductor wafer is placed on the stage of a general sputtering device (not shown) with the back side facing the stage, and is held on the stage by, for example, an electrostatic chuck (ESC: Electric Static Chuck), etc. Next, the chamber (processing furnace) or stage of the sputtering device is heated by, for example, a heating means such as a heater, thereby increasing the temperature of the semiconductor wafer or the temperature around the region where the AlSi electrode 4 is formed to 430° C. or higher, and the AlSi electrode 4 is deposited on the barrier metal 3 by sputtering.
[0057] Next, the semiconductor wafer is removed from the stage of the sputtering apparatus, and is left at room temperature (neither heating nor cooling is performed) to cool the semiconductor wafer. In this manner, the temperature of the semiconductor wafer during sputtering of the AlSi electrode 4 or the temperature around the region where the AlSi electrode 4 is formed is set to 430° C. or higher, and the semiconductor wafer is cooled to room temperature after sputtering, whereby the AlSi electrode 4 containing the dendritic Si nodules at the above-mentioned predetermined area ratio is formed.
[0058] In addition, the height of the Si nodules in the AlSi electrode 4 is about 2 μm or less for both the dendritic and prismatic Si nodules. Next, the AlSi electrode 4 is etched (patterned) using a general dry etching device to leave it in a predetermined location. The AlSi electrode 4 remaining in the predetermined location after this patterning corresponds to the source electrode 4a and gate pad 4b in FIG. 1. Next, an element structure is formed on the back side of the semiconductor wafer, and a surface electrode 7 is formed on the back side of the semiconductor wafer.
[0059] Next, the semiconductor wafer is diced into individual chips (semiconductor substrate 1), thereby completing silicon carbide semiconductor device 10 according to the embodiment of Figures 1 and 2. Next, front surface electrode 7 of semiconductor substrate 1 is bonded via solder layer 12 onto a wiring layer serving as a die pad or lead of mounting substrate 13, which is, for example, a lead frame, thereby mounting silicon carbide semiconductor device 10 on the front surface of mounting substrate 13. Next, bonding wire 11 is pressure-bonded to AlSi electrode 4 of semiconductor substrate 1 by a general wire bonding process.
[0060] At this time, the remaining thickness t2 at the joint 4c of the AlSi electrode 4 with the bonding wire 11 becomes thinner than the thickness t1 of the other portion of the AlSi electrode 4, for example, about 2.1 μm, but peeling of the bonding wire 11 does not occur as in the conventional method. The reason for this is that, as described above, the AlSi electrode 4 contains Si nodules with a dendritic structure at the above-mentioned predetermined area ratio, and the height of the Si nodules in the AlSi electrode 4 is about 2 μm or less. In this manner, a semiconductor package on which the silicon carbide semiconductor device 10 is mounted is completed.
[0061] (Experimental Example 1) The relationship between the temperature of the semiconductor substrate 1 during sputtering of the AlSi electrode 4 and the height of the Si nodules was examined. Fig. 4 is a characteristic diagram showing the relationship between the temperature of the semiconductor substrate during sputtering of the AlSi electrode of Experimental Example 1 and the height of the Si nodules in the AlSi electrode. Fig. 5 is a plan view showing the Si nodules of samples A to D of Fig. 4 as viewed from the front surface side of the semiconductor substrate. Fig. 6 is a chart showing the relationship between the temperature of the semiconductor substrate during sputtering of the AlSi electrode of Experimental Example 1 and the area ratio of the Si nodules in the AlSi electrode.
[0062] A number of samples were prepared in which an AlSi electrode was deposited to a thickness of 5 μm on a semiconductor substrate (semiconductor chip) made of silicon carbide by sputtering the semiconductor substrate at various temperatures (hereinafter referred to as Experimental Example 1). A number of these samples were prepared for each temperature of the semiconductor substrate during sputtering of the AlSi electrode. The AlSi electrodes of all samples were wet etched to expose the Si nodules, and the dimensions of the Si nodules as viewed from the front surface side of the semiconductor substrate and the height of the Si nodules (height in the thickness direction of the AlSi electrode) were measured.
[0063] The relationship between the temperature of the semiconductor substrate during sputtering of the AlSi electrode in Experimental Example 1 and the height of the Si nodules in the AlSi electrode is shown in Fig. 4. The states of the Si nodules in the AlSi electrodes of Samples A to D, in which the temperatures of the semiconductor substrate during sputtering of the AlSi electrode in Experimental Example 1 were set to 200°C, 350°C, 400°C, and 470°C, as observed from the front surface side of the semiconductor substrate with a scanning electron microscope (SEM), are shown typically in Figs. 5(a) to (d), respectively.
[0064] The results of calculating the area ratio of the Si nodules of the AlSi electrode in Experimental Example 1 are shown in Fig. 6. Fig. 6 shows the temperature of the semiconductor substrate during sputtering (deposition) of the AlSi electrode, the deposition form of the Si nodules (prism, dendrite), the area ratio and height of the Si nodules with a prism structure (illustrated as the prism ratio and the prism height, respectively, in Fig. 6), the area ratio and height of the Si nodules with a dendritic structure (illustrated as the dendrite ratio and the dendrite height, respectively, in Fig. 6), and the presence or absence of peeling of the bonding wire (occurrence, absence).
[0065] From the results shown in Figs. 4 to 6, the temperature of the semiconductor substrate during sputtering of the AlSi electrode 400℃ or lessIt was confirmed that when this condition is met, all of the Si nodules in the AlSi electrode have a prismatic structure (the area surrounded by frame 41 in Figure 4; prismatic ratio 100%, see Figures 5(a) to (c)). It was also confirmed that when the temperature of the semiconductor substrate during sputtering of the AlSi electrode is between 350°C and 400°C, the bonding wire bonded to the AlSi electrode peels off (bonding wire peeling "occurrence" in Figure 6). It was confirmed that the height of the Si nodules with a prismatic structure in this case reaches a maximum of 5 μm (see Figures 5(b) and (c)).
[0066] When the temperature of the semiconductor substrate during sputtering of the AlSi electrode exceeds 400°C, Si nodules with both prismatic and dendritic structures are present in the AlSi electrode, but it was confirmed that the bonding wire bonded to the AlSi electrode peels off when the temperature of the semiconductor substrate during sputtering of the AlSi electrode is less than 430°C. It was confirmed that the area ratio of dendritic Si nodules in the AlSi electrode (dendrite ratio) at this time is less than 10%, and the height of the prismatic Si nodules (prismatic height) exceeds 2μm (see Figure 6).
[0067] When the temperature of the semiconductor substrate during sputtering of the AlSi electrode was less than 300°C, all of the Si nodules in the AlSi electrode had a rectangular columnar structure, but it was confirmed that the height of the Si nodules with the rectangular columnar structure was 1 μm or less (see Figures 4 and 5(a). Not shown in Figure 6). No peeling of the bonding wire bonded to the AlSi electrode occurred, but it was confirmed that when the aspect ratio of the contact hole in the interlayer insulating film was large, the AlSi electrode could not be embedded in the contact hole by sputtering.
[0068] On the other hand, it was confirmed that when the temperature of the semiconductor substrate during sputtering of the AlSi electrode is 430°C or higher (part surrounded by frame 42 in Fig. 4), the bonding wire bonded to the AlSi electrode does not peel off ("no" bonding wire peeling in Fig. 6). It was confirmed that the area ratio (dendrite ratio) and height (dendrite height) of the dendritic Si nodules in the AlSi electrode at this time were 10% or more and 1 μm or less, respectively, and the height of the prismatic Si nodules (prismatic height) was a maximum of 2 μm.
[0069] That is, the AlSi electrode of the sample in which the temperature of the semiconductor substrate during sputtering of the AlSi electrode in Fig. 6 was set to about 430°C or higher corresponds to the AlSi electrode 4 of this embodiment. Fig. 6 shows the ratio of the total area of Si nodules to the area (surface area) of the entire surface of the AlSi electrode for both the prismatic structure (prismatic ratio) and the dendritic structure (dendrite ratio) as the area ratio of Si nodules, but the ratio of a part of the AlSi electrode (e.g., the area of the bonding wire) to the total area of the Si nodules is also shown. joint Similar results are obtained when the area ratio of Si nodules to the area of the Si nodules is taken as the area ratio of the Si nodules to the area of the Si nodules.
[0070] It was also confirmed that by setting the temperature of the semiconductor substrate during sputtering of the AlSi electrode to 430°C or higher, the AlSi electrode can be embedded in the contact hole by sputtering even if the aspect ratio of the contact hole in the interlayer insulating film is large. Therefore, it was confirmed that by setting the temperature of the semiconductor substrate during sputtering of the AlSi electrode to 430°C or higher, it is possible to improve the embeddability of the AlSi electrode by sputtering and prevent peeling of the bonding wire.
[0071] (Experimental Example 2) The remaining thickness t2 of the AlSi electrode 4 at the joint 4c with the bonding wire 11 was examined. Fig. 7 is a cross-sectional view that typically shows the joint between the AlSi electrode and the bonding wire of Experimental Example 2. According to the manufacturing method of the silicon carbide semiconductor device according to the above-described embodiment, the AlSi electrode 4 was deposited on the semiconductor substrate 1 by sputtering to a thickness of 5 µm, and a bonding wire 11 made of aluminum was joined to the AlSi electrode 4 by wire bonding to prepare a sample (hereinafter referred to as Experimental Example 2).
[0072] Fig. 7 shows a schematic diagram of the bonded portion 4c of the AlSi electrode 4 (hatched portion) of this sample with the bonding wire 11, observed by SEM from a direction parallel to the front surface of the semiconductor substrate 1. From the results shown in Fig. 7, it was confirmed that the AlSi electrode 4 was crushed by the bonding wire 11, and the remaining thickness t2 at the bonded portion 4c with the bonding wire 11 was thinned to a thickness t2' of about 2.1 µm at the thinnest portion, which is about half the thickness t1 of the other portions of the AlSi electrode 4 (thickness at the time of deposition or after patterning (processing)).
[0073] As described above, according to the embodiment, Si nodules are precipitated in the AlSi electrode, and at least the portion of the AlSi electrode that will be the joint with the bonding wire contains Si nodules with a dendritic structure at an area ratio of 10% or more to the total area of the Si nodules in the joint. As a result, the height of the Si nodules in the AlSi electrode is 2 μm or less, which is lower than the thickness of the portion of the AlSi electrode that has been crushed and thinned by the bonding wire (the joint with the bonding wire of the AlSi electrode).
[0074] As a result, the Si nodules in the AlSi electrode are not pushed into the semiconductor substrate by the bonding wire, and the occurrence of cracks reaching the inside of the semiconductor substrate and peeling of the bonding wire can be suppressed. Therefore, the yield can be improved. Also, according to the embodiment, by setting the temperature of the semiconductor substrate or the temperature around the region where the AlSi electrode is formed to 430° C. or higher during sputtering of the AlSi electrode, the embeddability of the AlSi electrode can be improved, and the yield can be improved.
[0075] The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit and scope of the present invention. [Industrial Applicability]
[0076] INDUSTRIAL APPLICABILITY As described above, the silicon carbide semiconductor device and the method for manufacturing a silicon carbide semiconductor device according to the present invention are useful for power semiconductor devices used in power conversion devices and power supply devices for various industrial machines and the like. [Explanation of symbols]
[0077] 1. Semiconductor substrate 2. Interlayer insulating film 3. Barrier Metal 4 AlSi electrode 4a Source electrode 4b Gate Pad 4c AlSi electrode joint 5 Passivation film 5a, 5b Opening in passivation film 6 Silicide film 7 Surface electrode 10 Silicon carbide semiconductor device 11 Bonding wire 11a Bonding wire joint 12 Solder layer 13 Mounting board 21 Active area 22 Edge Termination Area t1, t2 Thickness of AlSi electrode
Claims
1. a semiconductor substrate made of silicon carbide; a surface electrode made of an aluminum alloy containing silicon provided on a surface of the semiconductor substrate; Equipped with silicon nodules are precipitated inside the surface electrode, A silicon carbide semiconductor device characterized in that the surface electrode, at least in the portion that becomes the bonding portion with the bonding wire, contains silicon nodules of a dendritic structure with an area ratio of 10% or more to the total area of the silicon nodules at the bonding portion.
2. The silicon carbide semiconductor device according to claim 1 , wherein a height of the silicon nodule inside the surface electrode is smaller than a thickness of the surface electrode.
3. 3. The silicon carbide semiconductor device according to claim 2, wherein a height of a silicon nodule inside the surface electrode is lower than a thickness of the joint portion of the surface electrode that becomes relatively thin when the bonding wire is joined.
4. 4. The silicon carbide semiconductor device according to claim 1, wherein the height of the silicon nodules inside the surface electrode is 2 μm or less.
5. 5. The silicon carbide semiconductor device according to claim 1, wherein the surface electrode contains silicon in an amount of 0.5 wt % to 3 wt % relative to aluminum.
6. The silicon carbide semiconductor device according to any one of claims 1 to 5, further comprising a barrier metal provided between the semiconductor substrate and the front surface electrode to prevent diffusion of impurity atoms from the semiconductor substrate side to the front surface electrode, or from the front surface electrode side to the semiconductor substrate, or both.
7. 7. The silicon carbide semiconductor device according to claim 1, further comprising a silicide film provided between said semiconductor substrate and said front surface electrode, said silicide film being in ohmic contact with said semiconductor substrate.
8. A method for manufacturing a silicon carbide semiconductor device comprising: a semiconductor substrate made of silicon carbide; and a surface electrode made of an aluminum alloy containing silicon provided on a surface of the semiconductor substrate, the method comprising: a depositing step of depositing the surface electrode made of an aluminum alloy containing silicon on a surface of the semiconductor substrate made of silicon carbide by sputtering; In the depositing step, The temperature of the semiconductor substrate or the temperature around the region where the front surface electrode is formed, or both of the temperatures are set to 430° C. or higher and 500° C. or lower; A method for manufacturing a silicon carbide semiconductor device, characterized in that, among the silicon nodules precipitated inside the surface electrode, the area ratio of silicon nodules having a dendritic structure is 10% or more of the total area of the silicon nodules at the joint, at least in the portion of the surface electrode that becomes the joint with a bonding wire.
Citation Information
Patent Citations
Wiring of semiconductor device and forming method thereof
JP2000164593A
Method of manufacturing semiconductor device
JP2013222907A
Silicon carbide semiconductor device manufacturing method
JP2015115374A
Semiconductor device
JP2015185793A
Semiconductor device and method of manufacturing the same
JP2017152486A