Overcurrent Protection by PIN Diode

Abstract

To suppress damage to detectors and stress on readout integrated circuits.SOLUTION: A system 100 includes a pixel 102 including a diffusion layer 104 in contact with an absorption layer 106. A transparent conductive oxide (TCO) 108 is electrically connected to the diffusion layer 104. An overflow contact 110 is in telecommunication with the TCO 108. The overflow contact 110 may be laterally spaced from the diffusion layer 104. The pixel 102 may be one of a plurality of similar pixels 102 arranged in a grid pattern, and each pixel 102 has its own overflow contact that forms part of an overflow contact grid offset from the grid pattern.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] FIELD OF THE DISCLOSURE This disclosure relates to diodes, and in particular to photodiodes such as those used in pixels for imaging. [Background technology]

[0002] The lower the dark current of the photodiode in the imaging device, the better the imaging quality. Similarly, the higher the sensitivity of the photodiode in the imaging device, the better the imaging quality. At high light levels, excess photons cause high currents, which can damage the detector and / or put additional stress on the readout integrated circuit (ROIC).

[0003] For their intended purposes, the prior art has been considered satisfactory. However, there is an ever-existing need for improved systems and methods for photodiodes used in imaging devices. The present disclosure provides a solution to this need. Summary of the Invention [Means for solving the problem]

[0004] The system includes a pixel including a diffusion layer in contact with an absorber layer. A transparent conductive oxide (TCO) is electrically connected to the diffusion layer. An overflow contact is in electrical communication with the TCO.

[0005] The overflow contact may be laterally spaced from the diffusion layer. The pixel may be one of a plurality of similar pixels arranged in a grid pattern, each pixel having a respective overflow contact forming an overflow contact grid offset from the grid pattern. The overflow contact may be metallic. A cap layer may be deposited on the absorber layer opposite the substrate. The cap layer may include indium phosphide (InP). A SiNx layer may be deposited over the cap layer. A TCO may be deposited on the SiNx layer, the TCO conforming around the SiNx layer to contact the diffusion layer. At least one additional SiNx layer may be deposited over the TCO, the overflow contact extending through the at least one additional SiNx layer. An anti-reflective layer may be deposited on the substrate opposite the absorber layer. A metal contact may be electrically connected to the diffusion layer configured to electrically connect the diffusion layer to a readout integrated circuit (ROIC). The overflow contact may be in electrical communication with the ROIC.

[0006] The overflow contact may be electrically isolated from the metal contact, and the TCO is electrically connected to a current sink of the ROIC. The TCO may include multiple layers of zinc oxide (ZnO), titanium oxide (TiO2), and / or indium tin oxide (ITO). The absorption layer may include, for example, indium gallium arsenide (InGaAs), and the pixel is sensitive to illumination at infrared wavelengths. The absorption layer may also include, for example, silicon (Si), and the pixel is sensitive to illumination at visible wavelengths.

[0007] The method includes forming a pixel array including a plurality of pixels, each pixel including a diffusion layer in contact with an absorption layer, and forming a respective overflow contact electrically connected to each respective pixel of the plurality of pixels, the overflow contact following an overflow contact grid.

[0008] The method may include depositing a SiNx layer on a cap layer deposited on the absorber layer, and depositing a transparent conductive oxide (TCO) on the SiNx layer, where the overflow contact is electrically connected to the TCO. The method may include depositing at least one additional SiNx layer on the TCO.

[0009] These and other features of the subject disclosed systems and methods will become more readily apparent to those skilled in the art from the following detailed description of the preferred embodiments taken in conjunction with the drawings.

[0010] Preferred embodiments thereof are described in detail herein with reference to certain drawing figures so that those skilled in the art to which the subject disclosure pertains can readily understand, without undue experimentation, how to make and use the devices and methods of the subject disclosure. [Brief description of the drawings]

[0011] [Figure 1] 1 is a schematic cross-sectional elevation view of an embodiment of a system constructed in accordance with the present disclosure showing an overflow contact; [Diagram 2] 2 is a schematic plan view of the system of FIG. 1 showing a grid pattern for a number of pixels. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Reference is now made to the drawings, in which like reference numerals identify similar structural features or aspects of the subject disclosure. For purposes of explanation and illustration, and not limitation, a partial view of an embodiment of a system according to the disclosure is shown in FIG. 1 and generally designated by reference numeral 100. As will be explained, another embodiment of a system according to the disclosure, or aspects thereof, is provided in FIG. 2. The systems and methods described herein may be used to reduce excess current, increase sensitivity, and reduce stress on readout integrated circuits (ROICs) in imaging devices.

[0013] The system 100 includes a pixel 102 that includes a diffusion layer 104 in contact with an absorption layer 106. A transparent conductive oxide (TCO) 108 is electrically connected to the diffusion layer 104. An overflow contact 110 is in electrical communication with the TCO 108. The overflow contact 110 is spaced laterally, i.e., horizontally, from the diffusion layer 104 as oriented in FIG.

[0014] 2, the pixel 102 of FIG. 1 is one of a plurality of similar pixels 102 arranged in a grid pattern 112, as indicated by the thin lines in FIG. 2, with each pixel 102 having a respective overflow contact 110 that forms an overflow contact grid 114 offset from the grid pattern 112.

[0015] Referring again to FIG. 1, a cap layer 116 may be deposited on the absorber layer 106 opposite the substrate 118. The cap layer 116 may include indium phosphide (InP). A SiNx layer 120 may be deposited over the cap layer 116. A TCO 108 may be deposited over the SiNx layer 120, with the TCO 108 conforming around the SiNx layer 120 to contact the diffusion layer 104 (i.e., the TCO wraps down around the SiNx layer 120 to contact the diffusion layer 104 as oriented in FIG. 1). Two additional SiNx layers 122, 124 are deposited over the TCO 108. An overflow contact 110 extends through the additional SiNx layers 122, 124. Optionally, an anti-reflective layer 126 may be deposited on the substrate 118 opposite the absorber layer 106. The metal contact 128 is electrically connected to the diffusion layer 104, which electrically connects the diffusion layer 104 to a read out integrated circuit (ROIC) 130. The overflow contact 110 is electrically connected to the ROIC 130.

[0016] The TCO 108 typically acts as an insulator, but when the current reaches a predetermined maximum level, the resistance barrier of the TCO 108 fails and excess current may flow through the TCO 108 to the common current sink 132 on the ROIC 130. The film resistance of the TCO 108 may be designed based on the operating conditions of the detector, which may be implemented by adjusting the doping level of the TCO 108. The overflow contact 110 may be metallic and is electrically isolated from the metal contact 128. The TCO 108 may include multiple layers of zinc oxide (ZnO), titanium oxide (TiO2), and / or indium tin oxide (ITO).

[0017] The absorption layer 106 may, for example, comprise indium gallium arsenide (InGaAs), and the pixel 102 may be sensitive to illumination at infrared wavelengths. It is also contemplated that the absorption layer 106 may, for example, comprise silicon (Si), and the pixel 102 may be sensitive to illumination at visible wavelengths. Those skilled in the art will readily recognize that any other suitable material may be used to provide sensitivity at any other suitable wavelength.

[0018] The method includes forming a pixel array including a plurality of pixels (e.g., an array of pixels 102 in a square tile grid pattern 112 in FIG. 2 ). Each pixel includes a diffusion layer, e.g., diffusion layer 104, in contact with an absorption layer, e.g., absorption layer 106. The method includes forming a respective overflow contact, e.g., overflow contact 110, in electrical communication with each respective pixel of the plurality of pixels, where the overflow contact follows an overflow contact grid, e.g., overflow contact grid 114 of FIG. 2 .

[0019] The method may include depositing a SiNx layer, e.g., SiNx layer 120, on a cap layer, e.g., cap layer 116, deposited on the absorber layer, and depositing a transparent conductive oxide (TCO), e.g., TCO 108, on the SiNx layer, where the overflow contact is electrically connected to the TCO. The method may include depositing at least one additional SiNx layer, e.g., additional SiNx layers 122, 124, on the TCO. The diffusion layer 104 is the P portion of the PIN diode, the absorption layer 106 is the I portion of the PIN diode, and the substrate 118 is the N portion of the PIN diode.

[0020] The methods and systems of the present disclosure as described above and shown in the drawings result in reduced excess current, increased sensitivity, and reduced stress on the readout integrated circuit (ROIC) in an imaging device. This can improve imaging quality and reduce ROIC design requirements and signal processing complexity over conventional designs. Although the apparatus and methods of the subject disclosure have been shown and described with reference to preferred embodiments, those skilled in the art will readily recognize that changes and / or modifications may be made thereto without departing from the scope of the subject disclosure.

Claims

1. A pixel including a diffusing layer in contact with an absorbing layer sensitive to radiation; a transparent conductive oxide (TCO) electrically connected to the diffusion layer; a metal contact electrically connected to the diffusion layer, the metal contact configured to electrically connect the diffusion layer to a read out integrated circuit (ROIC); an overflow contact electrically connected to the ROIC and to the diffusion layer through the TCO, the overflow contact being laterally spaced from the diffusion layer; A system equipped with

2. 2. The system of claim 1, wherein the pixel is one of a plurality of pixels arranged in a grid pattern, each pixel having a respective overflow contact forming an overflow contact grid offset from the grid pattern.

3. The system of claim 1 or 2, wherein the overflow contact is made of metal.

4. The system of any of claims 1 to 3, further comprising a capping layer deposited on the absorbing layer opposite the substrate.

5. The system of claim 4 , wherein the cap layer comprises indium phosphide (InP).

6. 5. The system of claim 4, further comprising a silicon nitride (SiNx) layer over the cap layer.

7. 7. The system of claim 6, wherein the TCO is deposited on the SiNx layer, the TCO conforming around the SiNx layer to contact the diffusion layer.

8. 8. The system of claim 6 or 7, further comprising at least one additional layer of SiNx deposited over the TCO, the overflow contact extending through the at least one additional layer of SiNx.

9. The system of any of claims 4 to 8, further comprising an anti-reflective layer deposited on the substrate opposite the absorbing layer.

10. The system of any of claims 1 to 9, further comprising the ROIC connected in electrical communication with the metal contacts.

11. The system of claim 10 , wherein the overflow contact is electrically isolated from the metal contact and the TCO is electrically connected to a current sink of the ROIC.

12. The system of any of claims 1 to 11, wherein the TCO comprises multiple layers of zinc oxide (ZnO), titanium oxide (TiO2), and / or indium tin oxide (ITO).

13. The system of any preceding claim, wherein the absorbing layer comprises indium gallium arsenide (InGaAs) and the pixel is sensitive to radiation at infrared wavelengths.

14. The system of any of claims 1 to 12, wherein the absorbing layer comprises silicon (Si) and the pixels are sensitive to illumination in visible light wavelengths.

15. forming a pixel array including a plurality of pixels, each pixel including a diffusion layer in contact with an absorption layer sensitive to radiation, each diffusion layer being electrically connected to a readout integrated circuit (ROIC) by a respective metal contact; depositing a respective transparent conductive oxide (TCO) electrically connected to each of the diffusion layers of each pixel; forming a respective overflow contact electrically connected with each respective pixel of each of the plurality of pixels, the overflow contacts following an overflow contact grid, each overflow contact electrically connected with the ROIC and electrically connected to a respective diffusion layer of each pixel through a respective TCO, each overflow contact being laterally spaced from a respective diffusion layer; The method comprises:

16. and depositing a silicon nitride (SiNx) layer on a cap layer deposited on the absorbing layer.

16. The method of claim 15, wherein the transparent conductive oxide (TCO) is deposited on the SiNx layer.

17. 20. The method of claim 16, further comprising depositing at least one additional SiNx layer on the TCO.

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