Semiconductor Device
Patent Information
- Application Number
- JP2020184220
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2020-11-04
- Publication Date
- 2025-03-19
- Estimated Expiration
- 2040-11-04
AI Technical Summary
【0007】 本開示によると、半導体装置が実装される配線基板上の配線を単純化できる。
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Abstract
Description
[Technical field]
[0001] The present disclosure relates to a semiconductor device having a semiconductor element mounted thereon. [Background technology]
[0002] An inverter device used in an electric vehicle, a hybrid vehicle, or the like includes a switching element such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor), and a gate driver circuit for driving the switching element. The gate driver circuit includes a driving element and a buffer circuit for amplifying a driving signal output by the driving element and outputting the amplified driving signal to the switching element. Some buffer circuits include an NPN bipolar transistor and a PNP bipolar transistor, and the base electrodes of the two transistors are connected to each other, and the emitter electrodes of the two transistors are connected to each other. In order to miniaturize the gate driver circuit, miniaturization of each component included in the buffer circuit is expected. By using a semiconductor device in which a semiconductor element that is an NPN bipolar transistor and a semiconductor element that is a PNP bipolar transistor are mounted on a lead frame and covered with a sealing resin, it is possible to contribute to miniaturization of the gate driver circuit.
[0003] Patent Document 1 discloses a semiconductor device having two bipolar transistors. The semiconductor device includes a first transistor element, a second transistor element, a lead frame, and a sealing resin. In the semiconductor device, a lead connected to the base electrode of the first transistor element, a lead connected to the collector electrode of the first transistor element, and a lead connected to the collector electrode of the second transistor element are exposed from one side of the sealing resin. In addition, in the semiconductor device, a lead connected to the emitter electrode of the first transistor element, a lead connected to the base electrode of the second transistor element, and a lead connected to the emitter electrode of the second transistor element are exposed from the opposite side of the sealing resin. In this case, when the semiconductor device is mounted on a wiring board and the base electrodes of the two transistors are connected to each other by wiring on the wiring board, and the emitter electrodes of the two transistors are connected to each other, complex wiring is required. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] JP 2002-64106 A Summary of the Invention [Problem to be solved by the invention]
[0005] The present disclosure has been made in light of the above circumstances, and has an object to provide a semiconductor device that can simplify wiring on a wiring board on which it is mounted. [Means for solving the problem]
[0006] The semiconductor device provided by the present disclosure includes a first semiconductor element and a second semiconductor element, each of which is a switching element and has an element main surface and an element back surface facing opposite each other in a thickness direction, and a first electrode and a second electrode arranged on the element main surface, a first lead on which the first semiconductor element is mounted and which is conductive to the first semiconductor element, a second lead on which the second semiconductor element is mounted and which is conductive to the second semiconductor element, a sealing resin covering the first semiconductor element and the second semiconductor element, and a first electrode of the first semiconductor element that is exposed from the sealing resin and is disposed apart from the first lead and the second lead in a first direction perpendicular to the thickness direction. a first terminal that is electrically connected to a first electrode of the second semiconductor element, a second terminal that is spaced apart on the same side as the first terminal with respect to the first lead and the second lead in the first direction, exposed from the sealing resin, and electrically connected to a first electrode of the second semiconductor element, a third terminal that is spaced apart on the opposite side from the first terminal with respect to the first lead and the second lead in the first direction, exposed from the sealing resin, and electrically connected to the second electrode of the first semiconductor element, and a fourth terminal that is spaced apart on the same side as the third terminal with respect to the first lead and the second lead in the first direction, exposed from the sealing resin, and electrically connected to the second electrode of the second semiconductor element. Effect of the Invention
[0007] According to the present disclosure, it is possible to simplify wiring on a wiring board on which a semiconductor device is mounted.
[0008] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings. [Brief description of the drawings]
[0009] [Figure 1] 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. [Diagram 2] 2 is a perspective view showing the semiconductor device of FIG. 1 with the bottom side facing up. FIG. [Diagram 3]FIG. 2 is a plan view showing the semiconductor device in FIG. 1, with a sealing resin seen through; [Figure 4] 2 is a bottom view showing the semiconductor device of FIG. 1. [Diagram 5] FIG. 4 is a cross-sectional view taken along line VV in FIG. [Figure 6] FIG. 4 is a cross-sectional view taken along line VI-VI in FIG. [Figure 7] FIG. 2 is a circuit diagram showing the semiconductor device of FIG. [Figure 8] 2 is a diagram showing a state in which the semiconductor device in FIG. 1 is mounted on a wiring board. [Figure 9] FIG. 4 is a plan view showing a semiconductor device according to a second embodiment of the present disclosure. [Figure 10] FIG. 11 is a plan view showing a semiconductor device according to a third embodiment of the present disclosure. [Figure 11] 11 is a bottom view showing the semiconductor device of FIG. 10. [Figure 12] FIG. 13 is a bottom view showing a semiconductor device according to a fourth embodiment of the present disclosure. [Figure 13] FIG. 13 is a bottom view showing a semiconductor device according to a fifth embodiment of the present disclosure. [Figure 14] FIG. 13 is a plan view showing a semiconductor device according to a sixth embodiment of the present disclosure. [Figure 15] FIG. 13 is a bottom view showing a semiconductor device according to a seventh embodiment of the present disclosure. [Figure 16] FIG. 13 is a bottom view showing a semiconductor device according to an eighth embodiment of the present disclosure. [Figure 17] FIG. 13 is a plan view showing a semiconductor device according to a ninth embodiment of the present disclosure. [Figure 18] FIG. 23 is a bottom view showing a semiconductor device according to a tenth embodiment of the present disclosure. [Figure 19] 19 is a diagram showing a state in which the semiconductor device in FIG. 18 is mounted on a wiring board. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0010] Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
[0011] In this disclosure, "a certain object A is formed on a certain object B" and "a certain object A is formed on a certain object B" include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed on a certain object B" include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on a certain object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is located on a certain object B" includes "a certain object A is located on a certain object B in contact with a certain object B" and "a certain object A is located on a certain object B with another object interposed between the certain object A and the certain object B". In addition, unless otherwise specified, "an object A overlaps with an object B when viewed in a certain direction" includes "an object A overlaps with the entirety of an object B" and "an object A overlaps with a part of an object B."
[0012] [First embodiment] A semiconductor device A1 according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 8. The semiconductor device A1 includes leads 1, 2, 31, 41, and 42, two semiconductor elements 6, wires 71 and 72, and a sealing resin 8. The semiconductor elements 6 include a semiconductor element 601 and a semiconductor element 602. The semiconductor device A1 is used in a gate driver circuit of an inverter device of an electric vehicle, a hybrid vehicle, or the like. The semiconductor device A1 functions as a buffer circuit that amplifies a drive signal output by a drive element (not shown) and outputs the signal to a switching element (not shown). The use and function of the semiconductor device A1 are not limited. The package format of the semiconductor device A1 is DFN (Dual Flatpack No-leaded). The package format of the semiconductor device A1 is not limited to DFN.
[0013] FIG. 1 is a perspective view showing the semiconductor device A1. FIG. 2 is a perspective view showing the semiconductor device A1 with the bottom side facing up. FIG. 3 is a plan view showing the semiconductor device A1. In FIG. 3, for ease of understanding, the outer shape of the sealing resin 8 is shown by an imaginary line (two-dot chain line) through the sealing resin 8. FIG. 4 is a bottom view showing the semiconductor device A1. FIG. 5 is a cross-sectional view taken along line VV in FIG. 3. FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 3. FIG. 7 is a circuit diagram showing the semiconductor device A1. FIG. 8 is a view showing the semiconductor device A1 mounted on a wiring board.
[0014] The semiconductor device A1 has a rectangular shape when viewed in the thickness direction (plan view). For convenience of explanation, the thickness direction (plan view direction) of the semiconductor device A1 is the z direction, the direction along one side of the semiconductor device A1 perpendicular to the z direction (left-right direction in FIG. 3) is the x direction, and the direction perpendicular to the z direction and the x direction (up-down direction in FIG. 3) is the y direction. In addition, one side of the z direction (upper side in FIG. 5 and FIG. 6) is the z1 side, and the other side (lower side in FIG. 5 and FIG. 6) is the z2 side. One side of the x direction (right side in FIG. 3 and FIG. 4) is the x1 side, and the other side (left side in FIG. 3 and FIG. 4) is the x2 side. One side of the y direction (upper side in FIG. 3) is the y1 side, and the other side (lower side in FIG. 3) is the y2 side. The z direction corresponds to the "thickness direction" of the present disclosure, the y direction corresponds to the "first direction" of the present disclosure, and the x direction corresponds to the "second direction" of the present disclosure. In this embodiment, the size of the semiconductor device A1 is, for example, 1 mm to 3 mm in the x direction, 1 mm to 3 mm in the y direction, and 0.3 mm to 1 mm in the z direction. Note that each dimension of the semiconductor device A1 is not limited.
[0015] The leads 1, 2, 31, 41, 42 are electrically connected to the semiconductor element 6. The leads 1, 2, 31, 41, 42 are formed, for example, by subjecting a metal plate to etching or punching. The leads 1, 2, 31, 41, 42 are made of metal, preferably either Cu or Ni, or an alloy thereof. In this embodiment, the case where the leads 1, 2, 31, 41, 42 are made of Cu will be described as an example. The thickness of the leads 1, 2, 31, 41, 42 is, for example, 0.08 to 0.3 mm, and in this embodiment, it is about 0.2 mm. In the following description, they will be referred to as the first lead 1, the second lead 2, the third lead 31, the fifth lead 41, and the sixth lead 42. When they are collectively referred to, they will be described as the leads 1, 2, 31, 41, 42.
[0016] As shown in FIG. 3, the first lead 1 is entirely disposed on the x2 side of the center of the semiconductor device A1 in the x direction, and is located closer to the y1 side in the y direction. The second lead 2 is entirely disposed on the x1 side of the center of the semiconductor device A1 in the x direction, and is located closer to the y2 side in the y direction. The third lead 31 is disposed closer to the x1 side in the x direction at the end of the semiconductor device A1 on the y1 side in the y direction. The third lead 31 is disposed spaced apart on the y1 side in the y direction with respect to the first lead 1 and the second lead 2. The fifth lead 41 is disposed at the end of the semiconductor device A1 on the x2 side in the x direction at the end of the semiconductor device A1 on the y2 side in the y direction, and is spaced apart from the first lead 1 and the second lead 2. The sixth lead 42 is disposed at the end of the semiconductor device A1 on the y2 side in the y direction, between the second lead 2 and the fifth lead 41 in the x direction, and is spaced apart from the first lead 1, the second lead 2, and the fifth lead 41. That is, the fifth lead 41 and the sixth lead 42 are arranged on the opposite side of the third lead 31 with respect to the first lead 1 and the second lead 2 in the y direction. The fifth lead 41 and the sixth lead 42 are arranged adjacent to each other in the x direction. The z-direction visual dimensions of the first lead 1 and the second lead 2 are large, and the fifth lead 41 and the sixth lead 42 are small.
[0017] The first lead 1 supports a semiconductor element 6 (semiconductor element 601), and includes a die pad portion 110, a terminal portion 120, and a plurality of connecting portions .
[0018] The die pad portion 110 is disposed entirely on the x2 side from the center in the x direction of the semiconductor device A1, is located at the center in the y direction, and has a generally rectangular shape as viewed in the z direction. The die pad portion 110 has a die pad portion main surface 111, a die pad portion back surface 112, and a die pad portion back surface side recess 113. The die pad portion main surface 111 and the die pad portion back surface 112 face opposite sides to each other in the z direction. The die pad portion main surface 111 faces the z1 side in the z direction. The die pad portion main surface 111 is a surface on which the semiconductor element 601 is mounted. The die pad portion back surface 112 faces the z2 side in the z direction. The die pad portion back surface 112 is exposed from the sealing resin 8 to become a back surface terminal.
[0019] The die pad portion rear surface side recess 113 is a portion of the die pad portion 110 recessed from the die pad portion rear surface 112 toward the die pad portion main surface 111. The thickness (dimension in the z direction) of the portion of the die pad portion 110 where the die pad portion rear surface side recess 113 is located is approximately half the thickness of the portion where the die pad portion rear surface 112 is located. The die pad portion rear surface side recess 113 is formed, for example, by half etching. As shown in FIG. 4, the die pad portion rear surface side recess 113 is disposed around the die pad portion rear surface 112. As shown in FIG. 4, the die pad portion rear surface side recess 113 is not exposed from the sealing resin 8 and is covered by the sealing resin 8. This suppresses the first lead 1 from peeling off from the sealing resin 8 to the z2 side in the z direction. The shape of the die pad portion 110 is not limited. For example, the die pad portion 110 does not need to have the die pad portion rear surface side recess 113.
[0020] The terminal portion 120 is connected to the die pad portion 110 and has a generally rectangular shape when viewed in the z direction. In this embodiment, the terminal portion 120 is disposed on the y1 side of the die pad portion 110 in the y direction, closer to the x2 side in the x direction. The terminal portion 120 has a terminal portion main surface 121, a terminal portion back surface 122, and a terminal portion end surface 123. The terminal portion main surface 121 and the terminal portion back surface 122 face opposite sides to each other in the z direction. The terminal portion main surface 121 faces the z1 side in the z direction. The terminal portion main surface 121 and the die pad portion main surface 111 are flush with each other. The terminal portion back surface 122 faces the z2 side in the z direction. The terminal portion back surface 122 and the die pad portion back surface 112 are spaced apart in the y direction, and are at the same position in the z direction. The terminal portion end surface 123 is a surface that is perpendicular to the terminal portion main surface 121 and the terminal portion back surface 122, is connected to the terminal portion main surface 121 and the terminal portion back surface 122, and faces the y-direction y1 side. The terminal portion end surface 123 is formed by dicing in a cutting process in the manufacturing process. The terminal portion end surface 123 and the terminal portion back surface 122 are exposed from the sealing resin 8 and connected to each other to form a terminal (see FIG. 4). The shape, arrangement position, and number of the terminal portions 120 are not limited.
[0021] Each of the multiple connecting parts 130 is connected to the die pad part 110 and has a generally rectangular shape when viewed in the z direction. In this embodiment, two connecting parts 130 are arranged side by side in the y direction on the x2 side of the die pad part 110 in the x direction. The thickness (dimension in the z direction) of each connecting part 130 is approximately the same as the thickness of the die pad part 110 where the die pad part rear surface side recess 113 is located. The connecting parts 130 are formed, for example, by half etching. Each connecting part 130 has a connecting part main surface 131, a connecting part rear surface 132, and a connecting part end surface 133. The connecting part main surface 131 and the connecting part rear surface 132 face opposite to each other in the z direction. The connecting part main surface 131 faces the z1 side in the z direction. The connecting part main surface 131 and the die pad part main surface 111 are flush with each other. Therefore, the die pad portion main surface 111, the terminal portion main surface 121 and the connecting portion main surface 131 form a single, integrated surface (see FIG. 3). The connecting portion back surface 132 faces the z-direction z2 side. The connecting portion back surface 132 and the die pad portion back surface side recess 113 are flush with each other. The connecting portion end surface 133 is a surface that connects the connecting portion main surface 131 and the connecting portion back surface 132, and faces the x-direction x2 side. The connecting portion end surface 133 is formed by dicing in a cutting process in the manufacturing process. The connecting portion end surface 133 is exposed from the sealing resin 8. The shape, arrangement position and number of the connecting portions 130 are not limited.
[0022] The second lead 2 supports the semiconductor element 6 (semiconductor element 602 ), and includes a die pad portion 210 , a terminal portion 220 , and a plurality of connecting portions 230 .
[0023] The die pad portion 210 is disposed entirely on the x1 side from the center in the x direction of the semiconductor device A1, is located at the center in the y direction, and has a generally rectangular shape as viewed in the z direction. The die pad portion 210 has a die pad portion main surface 211, a die pad portion back surface 212, and a die pad portion back surface side recess 213. The die pad portion main surface 211 and the die pad portion back surface 212 face opposite sides to each other in the z direction. The die pad portion main surface 211 faces the z1 side in the z direction. The die pad portion main surface 211 is a surface on which the semiconductor element 602 is mounted. The die pad portion back surface 212 faces the z2 side in the z direction. The die pad portion back surface 212 is exposed from the sealing resin 8 to become a back surface terminal.
[0024] The die pad portion rear surface side recess 213 is a portion of the die pad portion 210 recessed from the die pad portion rear surface 212 toward the die pad portion main surface 211. The thickness (dimension in the z direction) of the portion of the die pad portion 210 where the die pad portion rear surface side recess 113 is located is approximately half the thickness of the portion where the die pad portion rear surface 212 is located. The die pad portion rear surface side recess 213 is formed, for example, by half etching. As shown in FIG. 4, the die pad portion rear surface side recess 213 is disposed around the die pad portion rear surface 212. As shown in FIG. 4 and FIG. 6, the die pad portion rear surface side recess 213 is not exposed from the sealing resin 8 and is covered by the sealing resin 8. This suppresses the second lead 2 from peeling off from the sealing resin 8 to the z2 side in the z direction. The shape of the die pad portion 210 is not limited. For example, the die pad portion 210 does not need to have the die pad portion rear surface side recess 213.
[0025] The terminal portion 220 is connected to the die pad portion 210 and has a generally rectangular shape when viewed in the z direction. In this embodiment, the terminal portion 220 is disposed on the y2 side of the die pad portion 210 in the y direction, closer to the x1 side in the x direction. The terminal portion 220 has a terminal portion main surface 221, a terminal portion back surface 222, and a terminal portion end surface 223. The terminal portion main surface 221 and the terminal portion back surface 222 face opposite sides to each other in the z direction. The terminal portion main surface 221 faces the z1 side in the z direction. The terminal portion main surface 221 and the die pad portion main surface 211 are flush with each other. The terminal portion back surface 222 faces the z2 side in the z direction. The terminal portion back surface 222 and the die pad portion back surface 212 are spaced apart in the y direction, and are at the same position in the z direction. The terminal portion end surface 223 is a surface that is perpendicular to the terminal portion main surface 221 and the terminal portion back surface 222, is connected to the terminal portion main surface 221 and the terminal portion back surface 222, and faces the y-direction y2 side. The terminal portion end surface 223 is formed by dicing in a cutting process in the manufacturing process. The terminal portion end surface 223 and the terminal portion back surface 222 are exposed from the sealing resin 8 and connected to each other to form a terminal (see FIGS. 2, 4, and 6). The shape, arrangement position, and number of the terminal portions 220 are not limited.
[0026] Each of the multiple connecting parts 230 is connected to the die pad part 210 and has a generally rectangular shape when viewed in the z direction. In this embodiment, two connecting parts 230 are arranged side by side in the y direction on the x1 side of the die pad part 210 in the x direction. The thickness (dimension in the z direction) of each connecting part 230 is approximately the same as the thickness of the die pad part 210 where the die pad part rear surface side recess 213 is located. The connecting parts 230 are formed, for example, by half etching. Each connecting part 230 has a connecting part main surface 231, a connecting part rear surface 232, and a connecting part end surface 233. The connecting part main surface 231 and the connecting part rear surface 232 face opposite to each other in the z direction. The connecting part main surface 231 faces the z1 side in the z direction. The connecting part main surface 231 and the die pad part main surface 211 are flush with each other. Therefore, the die pad portion main surface 211, the terminal portion main surface 221, and the connecting portion main surface 231 are one and the same surface (see FIG. 3). The connecting portion back surface 232 faces the z-direction z2 side. The connecting portion back surface 232 and the die pad portion back surface side recess 213 are one and the same surface. The connecting portion end surface 233 is a surface that connects the connecting portion main surface 231 and the connecting portion back surface 232, and faces the x-direction x1 side. The connecting portion end surface 233 is formed by dicing in a cutting process in the manufacturing process. The connecting portion end surface 233 is exposed from the sealing resin 8. The shape, arrangement position, and number of the connecting portions 230 are not limited.
[0027] When viewed in the z direction, the third lead 31 is arranged at the corner on the x1 side of the semiconductor device A1 in the y1 side in the y direction (the upper right corner in Figure 3), and has a main surface 311, a back surface 312, a back surface recess 313, and an end surface 314.
[0028] The main surface 311 and the back surface 312 face opposite to each other in the z direction. The main surface 311 faces the z1 side in the z direction. The main surface 311 is a surface to which the wire 71 is bonded. In this embodiment, the shape of the main surface 311 is a shape having two parts protruding from a rectangular shape long in the x direction to the y1 side in the y direction. The two protruding parts are aligned in the x direction and both reach the edge of the semiconductor device A1 on the y1 side in the y direction. The back surface 312 faces the z2 side in the z direction. The back surface 312 is exposed from the sealing resin 8 and becomes a back surface terminal. In this embodiment, the shape of the back surface 312 is a U-shape that is open on the y1 side in the y direction. Both ends of the U-shape reach the edge of the semiconductor device A1 on the y1 side in the y direction.
[0029] The rear surface side recess 313 is a portion of the third lead 31 recessed from the rear surface 312 toward the main surface 311. The thickness (dimension in the z direction) of the portion of the third lead 31 where the rear surface side recess 313 is located is approximately half the thickness of the portion where the rear surface 312 is located. The rear surface side recess 313 is formed, for example, by half etching. As shown in FIG. 4, the rear surface side recess 313 is not exposed from the sealing resin 8 and is covered by the sealing resin 8. This prevents the third lead 31 from peeling off from the sealing resin 8 to the z2 side in the z direction.
[0030] The end face 314 is a face that is perpendicular to the main face 311 and the back face 312, is connected to the main face 311 and the back face 312, and faces the y-direction y1 side. The end face 314 is formed by dicing in a cutting process in the manufacturing process. In this embodiment, the end face 314 is composed of two parts separated by the sealing resin 8. The end face 314 and the back face 312 are exposed from the sealing resin 8 and connected to each other to form a terminal (see FIGS. 2, 4, and 6). The shape of the third lead 31 is not limited. For example, the back face recess 313 may not be present. In this embodiment, the third lead 31 corresponds to the "first terminal" and the "second terminal" of the present disclosure. That is, in this embodiment, the third lead 31 also serves as the "first terminal" and the "second terminal" of the present disclosure.
[0031] The fifth lead 41 is disposed at a corner (the lower left corner in FIG. 3 ) on the x2 side in the x direction and the y2 side in the y direction of the semiconductor device A1 when viewed in the z direction. The fifth lead 41 has a substantially rectangular shape when viewed in the z direction, and has a main surface 411, a back surface 412, a back surface recess 413, and an end surface 414.
[0032] The main surface 411 and the back surface 412 face opposite to each other in the z direction. The main surface 411 faces the z1 side in the z direction. The main surface 411 is the surface to which the wire 72 is bonded. The back surface 412 faces the z2 side in the z direction. The back surface 412 is exposed from the sealing resin 8 and becomes a back surface terminal.
[0033] The rear surface side recess 413 is a portion of the fifth lead 41 recessed from the rear surface 412 toward the main surface 411. The thickness (dimension in the z direction) of the portion of the fifth lead 41 where the rear surface side recess 413 is located is approximately half the thickness of the portion where the rear surface 412 is located. The rear surface side recess 413 is formed, for example, by half etching. As shown in FIG. 4, the rear surface side recess 413 is not exposed from the sealing resin 8 and is covered by the sealing resin 8. This prevents the fifth lead 41 from peeling off from the sealing resin 8 toward the z2 side in the z direction.
[0034] The end face 414 is a surface that is perpendicular to the main surface 411 and the back surface 412, is connected to the main surface 411 and the back surface 412, and faces the y2 side in the y direction. The end face 414 is formed by dicing in a cutting step in the manufacturing process. The end face 414 and the back surface 412 are exposed from the sealing resin 8 and connected to each other to form a terminal (see FIGS. 2 and 4). The shape of the fifth lead 41 is not limited. For example, the back surface side recess 413 may be omitted. In this embodiment, the fifth lead 41 corresponds to the "third terminal" of the present disclosure.
[0035] The sixth lead 42 is disposed at an end of the semiconductor device A1 on the y2 side in the y direction as viewed in the z direction, and is located between the fifth lead 41 and the terminal portion 220 of the second lead 2 in the x direction. The sixth lead 42 is spaced apart from the fifth lead 41 and the second lead 2, and is insulated from the fifth lead 41 and the second lead 2 within the semiconductor device A1. The sixth lead 42 is substantially rectangular as viewed in the z direction, and has a main surface 421, a back surface 422, a back surface recess 423, and an end surface 424.
[0036] The main surface 421 and the back surface 422 face opposite to each other in the z direction. The main surface 421 faces the z1 side in the z direction. The main surface 421 is the surface to which the wire 72 is bonded. The back surface 422 faces the z2 side in the z direction. The back surface 422 is exposed from the sealing resin 8 and becomes a back surface terminal.
[0037] The rear surface side recess 423 is a portion of the sixth lead 42 recessed from the rear surface 422 toward the main surface 421. The thickness (dimension in the z direction) of the portion of the sixth lead 42 where the rear surface side recess 423 is located is approximately half the thickness of the portion where the rear surface 422 is located. The rear surface side recess 423 is formed, for example, by half etching. As shown in FIG. 4, the rear surface side recess 423 is not exposed from the sealing resin 8 and is covered by the sealing resin 8. This prevents the sixth lead 42 from peeling off from the sealing resin 8 toward the z2 side in the z direction.
[0038] The end face 424 is a surface that is perpendicular to the main surface 421 and the back surface 422, is connected to the main surface 421 and the back surface 422, and faces the y-direction y2 side. The end face 424 is formed by dicing in a cutting step in the manufacturing process. The end face 424 and the back surface 422 are exposed from the sealing resin 8 and connected to each other to form a terminal (see FIGS. 2 and 4). The shape of the sixth lead 42 is not limited. For example, the back surface side recess 423 may be omitted. In this embodiment, the sixth lead 42 corresponds to the "fourth terminal" of the present disclosure.
[0039] A plating layer may be formed on the surfaces of the leads 1, 2, 31, 41, and 42. The plating layer may be a laminate of a Ni plating layer, a Pd plating layer, and a Au plating layer to facilitate bonding of the wires 71 and 72, or may be made of an alloy mainly composed of Sn to improve solder wettability.
[0040] The two semiconductor elements 6 are elements that perform the electrical functions of the semiconductor device A1. Each semiconductor element 6 is a switching element. In this embodiment, the semiconductor element 6 is a bipolar transistor. The semiconductor element 6 may be an IGBT, a MOSFET, a HEMT (High Electron Mobility Transistor), or the like. The two semiconductor elements 6 include a semiconductor element 601 and a semiconductor element 602. In this embodiment, the semiconductor element 601 is an NPN type, and the semiconductor element 602 is a PNP type. When there is no need to distinguish between them, they are referred to as semiconductor elements 6. Each semiconductor element 6 includes an element body 60, a first electrode 61, a second electrode 62, and a third electrode 63.
[0041] The element body 60 is a rectangular plate-like shape when viewed in the z direction. The element body 60 is made of a semiconductor material, and in this embodiment, is made of Si (silicon). The material of the element body 60 is not limited, and may be other materials such as SiC (silicon carbide) and GaN (gallium nitride). The element body 60 has an element main surface 6a and an element back surface 6b. The element main surface 6a and the element back surface 6b face opposite each other in the z direction. The element main surface 6a faces the z1 side in the z direction. The element back surface 6b faces the z2 side in the z direction. The first electrode 61 and the second electrode 62 are disposed on the element main surface 6a. The third electrode 63 is disposed on the element back surface 6b. In this embodiment, the first electrode 61 is an emitter electrode, the second electrode 62 is a base electrode, and the third electrode 63 is a collector electrode.
[0042] As shown in FIG. 5, the semiconductor element 601 is mounted at the center of the die pad portion main surface 111 of the first lead 1 via a bonding material 75. In this embodiment, the bonding material 75 is a conductive bonding material, for example, solder. The bonding material 75 may be a conductive bonding material such as silver paste or sintered silver bonding material. The semiconductor element 601 has the element back surface 6b bonded to the die pad portion main surface 111 of the first lead 1 by the bonding material 75. The third electrode 63 of the semiconductor element 601 is conductively connected to the first lead 1 via the bonding material 75. As a result, the first lead 1 is conductively connected to the third electrode 63 (collector electrode) of the semiconductor element 601 and functions as a collector terminal of the semiconductor element 601. The second electrode 62 of the semiconductor element 601 is conductively connected to the fifth lead 41 via the wire 72, as shown in FIG. 3. As a result, the fifth lead 41 is conductively connected to the second electrode 62 (base electrode) of the semiconductor element 601 and functions as a base terminal of the semiconductor element 601.
[0043] As shown in FIG. 5 and FIG. 6, the semiconductor element 602 is mounted at the center of the die pad portion main surface 211 of the second lead 2 via a bonding material 75. The semiconductor element 602 has an element back surface 6b bonded to the die pad portion main surface 211 of the second lead 2 by the bonding material 75. The third electrode 63 of the semiconductor element 602 is conductively connected to the second lead 2 via the bonding material 75. As a result, the second lead 2 is conductively connected to the third electrode 63 (collector electrode) of the semiconductor element 602 and functions as a collector terminal of the semiconductor element 602. The second electrode 62 of the semiconductor element 602 is conductively connected to the sixth lead 42 via a wire 72 as shown in FIG. 3. As a result, the sixth lead 42 is conductively connected to the second electrode 62 (base electrode) of the semiconductor element 602 and functions as a base terminal of the semiconductor element 602.
[0044] 3, the first electrode 61 of the semiconductor element 601 and the first electrode 61 of the semiconductor element 602 are each conductively connected to the third lead 31 via the wire 71. As a result, the third lead 31 is conductively connected to the first electrode 61 (emitter electrode) of the semiconductor element 601 and the first electrode 61 (emitter electrode) of the semiconductor element 602, and functions as a common emitter terminal of the semiconductor elements 601 and 602.
[0045] The wires 71 and 72 connect the semiconductor element 6 to the third lead 31, the fifth lead 41, or the sixth lead 42, and conduct them. The wires 71 and 72 are made of metal such as Cu, Au, Ag, or Al. The material of the wires 71 and 72 is not limited. As shown in FIG. 3, the wire 71 is connected to the first electrode 61 of the semiconductor element 601 and the main surface 311 of the third lead 31. In this embodiment, the first electrode 61 of the semiconductor element 601 is connected to the main surface 311 by one wire 71, but may be connected by multiple wires 71. The other wire 71 is connected to the first electrode 61 of the semiconductor element 602 and the main surface 311 of the third lead 31. In this embodiment, the first electrode 61 of the semiconductor element 602 is connected to the main surface 311 by one wire 71, but may be connected by multiple wires 71. The wire 72 is connected to the second electrode 62 of the semiconductor element 601 and the main surface 411 of the fifth lead 41. In this embodiment, the second electrode 62 of the semiconductor element 601 is connected to the main surface 411 by one wire 72, but may be connected by multiple wires 72. The other wire 72 is connected to the second electrode 62 of the semiconductor element 602 and the main surface 421 of the sixth lead 42. In this embodiment, the second electrode 62 of the semiconductor element 602 is connected to the main surface 421 by one wire 72, but may be connected by multiple wires 72. Note that instead of the wires 71 and 72, a metal plate such as Cu may be used.
[0046] The sealing resin 8 covers parts of the leads 1, 2, 31, 41, 42, the semiconductor elements 6, the bonding material 75, and the wires 71, 72. The sealing resin 8 is made of, for example, a black epoxy resin. The material of the sealing resin 8 is not limited.
[0047] The sealing resin 8 has a resin main surface 81, a resin back surface 82, and four resin side surfaces 83. The resin main surface 81 and the resin back surface 82 face opposite each other in the z direction. The resin main surface 81 faces the z-direction z1 side, and the resin back surface 82 faces the z-direction z2 side.
[0048] Each of the four resin side surfaces 83 is perpendicular to the resin main surface 81 and the resin back surface 82, connects the resin main surface 81 and the resin back surface 82, and faces outward in the x direction or y direction. Each of the resin side surfaces 83 is formed by dicing in a cutting process in the manufacturing process. The four resin side surfaces 83 include a first resin side surface 831, a second resin side surface 832, a third resin side surface 833, and a fourth resin side surface 834. The first resin side surface 831 and the second resin side surface 832 face opposite each other in the y direction. The first resin side surface 831 is a surface disposed on the y direction y1 side and facing the y direction y1 side, and the second resin side surface 832 is a surface disposed on the y direction y2 side and facing the y direction y2 side. The third resin side surface 833 and the fourth resin side surface 834 face opposite each other in the x direction. The third resin side surface 833 is a surface disposed on the x1 side in the x direction and facing the x1 side in the x direction, and the fourth resin side surface 834 is a surface disposed on the x2 side in the x direction and facing the x2 side in the x direction.
[0049] The terminal portion end face 123 of the first lead 1 and the end face 314 of the third lead 31 are exposed from the first resin side face 831 and are flush with each other. The terminal portion end face 223 of the second lead 2, the end face 414 of the fifth lead 41, and the end face 424 of the sixth lead 42 are exposed from the second resin side face 832 and are flush with each other. The connecting portion end faces 133 of the first lead 1 are exposed from the fourth resin side face 834 and are flush with each other. The connecting portion end faces 233 of the second lead 2 are exposed from the third resin side face 833 and are flush with each other. Moreover, the die pad portion back surface 112 and the terminal portion back surface 122 of the first lead 1 and the die pad portion back surface 212 and the terminal portion back surface 222 of the second lead 2 are exposed from the resin back surface 82 of the sealing resin 8 and are flush with each other with the resin back surface 82. Moreover, the back surface 312 of the third lead 31, the back surface 412 of the fifth lead 41, and the back surface 422 of the sixth lead 42 are exposed from the resin back surface 82 of the sealing resin 8 and are flush with each other with the resin back surface 82.
[0050] The semiconductor device A1 is used, for example, as a component of a buffer circuit of a gate driver circuit. As shown in FIG. 7, in the semiconductor device A1, the terminal portion 120 of the first lead 1 functioning as the collector terminal of the semiconductor element 601 is connected to a power source, and the terminal portion 220 of the second lead 2 functioning as the collector terminal of the semiconductor element 602 is connected to the ground. In the semiconductor device A1, the fifth lead 41 functioning as the base terminal of the semiconductor element 601 and the sixth lead 42 functioning as the base terminal of the semiconductor element 602 are connected to a common wiring (a wiring 94 described later). A driving signal is input to the semiconductor device A1 from a driving element (not shown) via the wiring (wiring 94). Then, the semiconductor device A1 outputs an amplified driving signal from the third lead 31 functioning as the common emitter terminal of the semiconductor elements 601 and 602, and inputs the amplified driving signal to a switching element (not shown) via a current limiting circuit.
[0051] To drive the switching element, the semiconductor device A1 needs to output a large current of 10 A or more and 30 A or less from the third lead 31. However, the semiconductor device A1 outputs a pulsed current, and does not continuously output a constant current. Since the pulse width of the current output by the semiconductor device A1 is short, on the order of a few microseconds or less, the semiconductor device A1 outputs a large current with a maximum current of 10 A or more and 30 A or less, but the loss due to this current is not large.
[0052] As shown in FIG. 8, the semiconductor device A1 is mounted on a wiring board 9. For ease of understanding, in the semiconductor device A1 shown in FIG. 8, the surfaces of the leads 1, 2, 31, 41, and 42 exposed from the resin back surface 82 are indicated by dashed lines. As shown in FIG. 8, the semiconductor device A1 is mounted on a wiring board 9, and the leads 1, 2, 31, 41, and 42 are joined to the wirings 91 to 96 formed on the wiring board 9 by solder 99. The terminal back surface 122 and the terminal end surface 123 of the first lead 1 are joined to the wiring 91 via the solder 99. The terminal back surface 222 and the terminal end surface 223 of the second lead 2 are joined to the wiring 93 via the solder 99. The back surface 312 and the end surface 314 of the third lead 31 are joined to the wiring 92 via the solder 99. The back surface 412 and end surface 414 of the fifth lead 41 and the back surface 422 and end surface 424 of the sixth lead 42 are joined to the wiring 94 via solder 99. The die pad portion back surface 112 of the first lead 1 is joined to the wiring 95 via solder 99 (not shown). The die pad portion back surface 212 of the second lead 2 is joined to the wiring 96 via solder 99 (not shown).
[0053] Next, the functions and effects of the semiconductor device A1 will be described.
[0054] According to this embodiment, the first electrode 61 of the semiconductor element 601 and the first electrode 61 of the semiconductor element 602 are conductively connected to the third lead 31 by the wire 71. The second electrode 62 of the semiconductor element 601 is conductively connected to the fifth lead 41 by the wire 72. The second electrode 62 of the semiconductor element 602 is conductively connected to the sixth lead 42 by the wire 72. The fifth lead 41 and the sixth lead 42 are arranged adjacent to each other on the y-direction y2 side of the first lead 1 and the second lead 2. Therefore, as shown in FIG. 8, in the wiring board 9 on which the semiconductor device A1 is mounted, the wiring 92 connected to the third lead 31 and the wiring 94 connected to the fifth lead 41 and the sixth lead 42 are simple wirings.
[0055] Moreover, according to the present embodiment, the die pad portion 110 of the first lead 1 has a die pad portion back surface 112 exposed from the resin back surface 82. Moreover, the die pad portion 210 of the second lead 2 has a die pad portion back surface 212 exposed from the resin back surface 82. By bonding the die pad portion back surface 112 and the die pad portion back surface 212 to the wiring board 9, the first lead 1 and the second lead 2 can transfer heat generated by the semiconductor element 6 to the wiring board 9 and dissipate the heat.
[0056] Furthermore, according to this embodiment, the terminal portion 120 of the first lead 1 is arranged closer to the x2 side in the x direction on the y1 side of the die pad portion 110 in the y direction. Moreover, the terminal portion 220 of the second lead 2 is arranged closer to the x1 side in the x direction on the y2 side of the die pad portion 210 in the y direction. This contributes to miniaturizing the shape of the semiconductor device A1 when viewed in the z direction.
[0057] Moreover, according to this embodiment, the die pad portion back surface 112 and the terminal portion back surface 122 of the first lead 1 are spaced apart, and the die pad portion back surface side recess 113 located therebetween is covered with the sealing resin 8. This can further suppress the first lead 1 from peeling off in the z2 direction from the sealing resin 8, compared to the case where the die pad portion back surface 112 and the terminal portion back surface 122 are connected. Moreover, the die pad portion back surface 212 and the terminal portion back surface 222 of the second lead 2 are spaced apart, and the die pad portion back surface side recess 213 located therebetween is covered with the sealing resin 8. This can further suppress the second lead 2 from peeling off in the z2 direction from the sealing resin 8, compared to the case where the die pad portion back surface 212 and the terminal portion back surface 222 are connected.
[0058] Moreover, according to this embodiment, the third lead 31 has a main surface 311 that is broad and integrated. Therefore, it is possible to bond a large number of wires 71 to the third lead 31, compared to a case where the main surface 311 is divided into a plurality of parts. Moreover, according to this embodiment, the shape of the back surface 312 of the third lead 31 is a U-shape that opens on the y-direction y1 side. That is, the back surface side recess 313 is covered by the sealing resin 8 in the inner part of the U-shape. This makes it possible to further suppress the third lead 31 from peeling off from the sealing resin 8 to the z2 side in the z direction, compared to a case where the back surface 312 of the third lead 31 is rectangular. Moreover, the third lead 31 has a back surface 312 that is broad and integrated. The wires 71 can be stably bonded to the area of the main surface 311 that overlaps the back surface 312 when viewed in the z direction. Therefore, in third lead 31, rear surface 312 is divided into a plurality of portions, so that the area in main surface 311 that overlaps rear surface 312 is narrow, and thus the area in which wire 71 can be stably bonded is wide.
[0059] Furthermore, according to this embodiment, the fifth lead 41 and the sixth lead 42 are spaced apart and insulated from each other. Therefore, the semiconductor device A1 allows individual testing of the mounted semiconductor elements 601 and 602.
[0060] Furthermore, according to this embodiment, in the semiconductor device A1, the terminal portion end face 123, the terminal portion end face 223, the end face 314, the end face 414, and the end face 424 are exposed from the sealing resin 8. Therefore, as shown in Fig. 8, when the semiconductor device A1 is mounted on the wiring board 9 with the solder 99, solder fillets of the solder 99 are formed on the terminal portion end face 123, the terminal portion end face 223, the end face 314, the end face 414, and the end face 424. Therefore, the bonding state of each of the leads 1, 2, 31, 41, and 42 can be confirmed even from the appearance after mounting.
[0061] 9 to 17 show other embodiments of the present disclosure. In these figures, elements that are the same as or similar to those in the above embodiment are denoted by the same reference numerals as those in the above embodiment.
[0062] Second Embodiment Fig. 9 is a plan view showing a semiconductor device A2 according to a second embodiment of the present disclosure, and corresponds to Fig. 3. In Fig. 9, for ease of understanding, the outer shape of the sealing resin 8 is shown by an imaginary line (two-dot chain line) through the sealing resin 8. The semiconductor device A2 according to this embodiment differs from the semiconductor device A1 according to the first embodiment in that it does not include a sixth lead 42 and the shape of the fifth lead 41 is different.
[0063] The semiconductor device A2 according to the second embodiment does not include the sixth lead 42. The fifth lead 41 according to the second embodiment is a shape obtained by connecting the fifth lead 41 and the sixth lead 42 according to the first embodiment, and has a shape similar to that of the third lead 31. In the present embodiment, the second electrode 62 of the semiconductor element 601 and the second electrode 62 of the semiconductor element 602 are conductively connected to the fifth lead 41 via the wire 72. As a result, the fifth lead 41 is conductively connected to the second electrode 62 (base electrode) of the semiconductor element 601 and the second electrode 62 (base electrode) of the semiconductor element 602, and functions as a common base terminal of the semiconductor element 601 and the semiconductor element 602. In the present embodiment, the fifth lead 41 corresponds to the "third terminal" and the "fourth terminal" of the present disclosure. That is, in the present embodiment, the fifth lead 41 also serves as the "third terminal" and the "fourth terminal" of the present disclosure.
[0064] According to the present embodiment, the first electrode 61 of the semiconductor element 601 and the first electrode 61 of the semiconductor element 602 are each conductively connected to the third lead 31 by a wire 71. Also, the second electrode 62 of the semiconductor element 601 and the second electrode 62 of the semiconductor element 602 are each conductively connected to the fifth lead 41 by a wire 72. Therefore, in the wiring board 9 on which the semiconductor device A2 is mounted, the wiring 92 connected to the third lead 31 and the wiring 94 connected to the fifth lead 41 are simple wirings.
[0065] Moreover, according to this embodiment, the fifth lead 41 has a main surface 411 which is broad and integrated. Therefore, it is possible to bond a large number of wires 72 compared to the first embodiment in which the wires 72 are bonded separately to the main surface 411 of the fifth lead 41 and the main surface 421 of the sixth lead 42. Moreover, according to this embodiment, the shape of the back surface 412 of the fifth lead 41 is a U-shape which opens on the y2 side in the y direction. That is, the back surface side recess 413 is covered by the sealing resin 8 in the inner part of the U-shape. This makes it possible to further suppress the fifth lead 41 from peeling off from the sealing resin 8 to the z2 side in the z direction compared to the case in which the back surface 412 of the fifth lead 41 is rectangular. Moreover, the fifth lead 41 has a back surface 412 which is broad and integrated. The wires 72 can be stably bonded to the area of the main surface 411 which overlaps the back surface 412 when viewed in the z direction. Therefore, in the fifth lead 41, the area in which the wire 72 can be stably bonded is wide, compared to a case in which the area of the main surface 411 overlapping the back surface 412 is narrow due to the back surface 412 being divided into a plurality of portions.
[0066] Furthermore, the semiconductor device A2 has a common configuration with the semiconductor device A1, and thus achieves the same effects as the semiconductor device A1.
[0067] Third Embodiment 10 and 11 are diagrams for explaining a semiconductor device A3 according to a third embodiment of the present disclosure. FIG. 10 is a plan view showing the semiconductor device A3, and corresponds to FIG. 3. In FIG. 10, for ease of understanding, the outer shape of the sealing resin 8 is shown by an imaginary line (two-dot chain line) through the sealing resin 8. FIG. 11 is a bottom view showing the semiconductor device A3, and corresponds to FIG. 4. The semiconductor device A3 according to this embodiment differs from the semiconductor device A1 according to the first embodiment in that the shape of the third lead 31 is different and that the semiconductor device A3 further includes a fourth lead 32.
[0068] The semiconductor device A3 according to the third embodiment includes a third lead 31 having a different shape from that of the first embodiment, and further includes a fourth lead 32. The third lead 31 and the fourth lead 32 according to the third embodiment are obtained by dividing the third lead 31 according to the first embodiment into two in the x direction, and each of the leads has the same shape as the fifth lead 41 and the sixth lead 42. The third lead 31 according to the third embodiment is substantially rectangular when viewed in the z direction. The fourth lead 32 is substantially rectangular when viewed in the z direction, and has a main surface 321, a back surface 322, a back surface recess 323, and an end surface 324. The third lead 31 and the fourth lead 32 according to the third embodiment are separated and insulated from each other in the semiconductor device A3. The fourth lead 32 is disposed at a corner on the x1 side of the semiconductor device A3 in the y direction y1 side when viewed in the z direction (the upper right corner in FIG. 10). The third lead 31 in the third embodiment is arranged at the end of the semiconductor device A3 on the y1 side in the y direction when viewed in the z direction, and is located between the fourth lead 32 and the terminal portion 120 of the first lead 1 in the x direction.
[0069] In addition, in this embodiment, the first electrode 61 of the semiconductor element 601 is conductively connected to the third lead 31 via the wire 71. As a result, the third lead 31 is conductively connected to the first electrode 61 (emitter electrode) of the semiconductor element 601 and functions as the emitter terminal of the semiconductor element 601. In addition, in this embodiment, the first electrode 61 of the semiconductor element 602 is conductively connected to the fourth lead 32 via the wire 71. As a result, the fourth lead 32 is conductively connected to the first electrode 61 (emitter electrode) of the semiconductor element 602 and functions as the emitter terminal of the semiconductor element 601. In this embodiment, the third lead 31 corresponds to the "first terminal" of the present disclosure, and the fourth lead 32 corresponds to the "second terminal" of the present disclosure.
[0070] According to this embodiment, the first electrode 61 of the semiconductor element 601 is conductively connected to the third lead 31 by the wire 71. The first electrode 61 of the semiconductor element 602 is conductively connected to the fourth lead 32 by the wire 71. The third lead 31 and the fourth lead 32 are arranged adjacent to each other on the y1 side of the first lead 1 and the second lead 2 in the y direction. In addition, the second electrode 62 of the semiconductor element 601 is conductively connected to the fifth lead 41 by the wire 72. The second electrode 62 of the semiconductor element 602 is conductively connected to the sixth lead 42 by the wire 72. The fifth lead 41 and the sixth lead 42 are arranged adjacent to each other on the y2 side of the first lead 1 and the second lead 2 in the y direction. Therefore, in the wiring board 9 on which the semiconductor device A2 is mounted, the wiring 92 connected to the third lead 31 and the fourth lead 32 and the wiring 94 connected to the fifth lead 41 and the sixth lead 42 are simple wirings.
[0071] Furthermore, the semiconductor device A3 has a common configuration with the semiconductor device A1, and thus achieves the same effects as the semiconductor device A1.
[0072] [Fourth embodiment] Fig. 12 is a bottom view showing a semiconductor device A4 according to a fourth embodiment of the present disclosure, and corresponds to Fig. 4. The semiconductor device A4 according to this embodiment has a different shape of a third lead 31 from the semiconductor device A1 according to the first embodiment.
[0073] The third lead 31 according to the fourth embodiment has a rear surface 312 that is made up of two portions separated by a resin rear surface 82 .
[0074] In this embodiment, the first electrode 61 of the semiconductor element 601 and the first electrode 61 of the semiconductor element 602 are conductively connected to the third lead 31 by the wire 71. The second electrode 62 of the semiconductor element 601 is conductively connected to the fifth lead 41 by the wire 72. The second electrode 62 of the semiconductor element 602 is conductively connected to the sixth lead 42 by the wire 72. The fifth lead 41 and the sixth lead 42 are arranged adjacent to each other on the y2 side of the first lead 1 and the second lead 2 in the y direction. Therefore, in the wiring board 9 on which the semiconductor device A4 is mounted, the wiring 92 connected to the third lead 31 and the wiring 94 connected to the fifth lead 41 and the sixth lead 42 are simple wirings.
[0075] Also in this embodiment, the third lead 31 has a broad and integrated main surface 311. Therefore, it is possible to bond a large number of wires 71 to the third lead 31, compared to a case in which the main surface 311 is divided into a plurality of portions. Also, according to this embodiment, the rear surface 312 of the third lead 31 is composed of two portions separated by the resin rear surface 82. That is, between the two portions of the rear surface 312, the rear surface side recess 313 is covered by the sealing resin 8. This makes it possible to further suppress peeling of the third lead 31 from the sealing resin 8 to the z2 side in the z direction, compared to the first embodiment.
[0076] Furthermore, the semiconductor device A4 has a common configuration with the semiconductor device A1, and thus achieves the same effects as the semiconductor device A1.
[0077] Fifth embodiment Fig. 13 is a bottom view showing a semiconductor device A5 according to a fifth embodiment of the present disclosure, and corresponds to Fig. 4. The semiconductor device A5 according to this embodiment has a different shape of a third lead 31 from the semiconductor device A1 according to the first embodiment.
[0078] The third lead 31 according to the fifth embodiment is the third lead 31 according to the first embodiment, except that the recessed portion from the end face 314 in the y2 direction is eliminated. That is, the shape of the third lead 31 is a shape obtained by increasing the dimension in the x direction of the fifth lead 41 (or the sixth lead 42). The shape of the back face 312 of the third lead 31 is a U-shape that is open on the y1 side in the y direction in the first embodiment, whereas in the fifth embodiment, it is an elongated rectangle that extends to the edge of the resin back face 82 on the y1 side in the y direction. The shape of the end face 314 of the third lead 31 is divided into two parts in the first embodiment, whereas in the fifth embodiment, it is an integrated elongated rectangle that extends in the x direction.
[0079] In this embodiment, the first electrode 61 of the semiconductor element 601 and the first electrode 61 of the semiconductor element 602 are conductively connected to the third lead 31 by the wire 71. The second electrode 62 of the semiconductor element 601 is conductively connected to the fifth lead 41 by the wire 72. The second electrode 62 of the semiconductor element 602 is conductively connected to the sixth lead 42 by the wire 72. The fifth lead 41 and the sixth lead 42 are arranged adjacent to each other on the y2 side of the first lead 1 and the second lead 2 in the y direction. Therefore, in the wiring board 9 on which the semiconductor device A5 is mounted, the wiring 92 connected to the third lead 31 and the wiring 94 connected to the fifth lead 41 and the sixth lead 42 are simple wirings.
[0080] Also in this embodiment, the third lead 31 has a wide, integrated main surface 311. Therefore, it is possible to bond a large number of wires 71 to the third lead 31, compared to a case in which the main surface 311 is divided into a plurality of portions. Also, according to this embodiment, the back surface 312 of the third lead 31 has an elongated rectangular shape that extends to the edge of the resin back surface 82 on the y-direction y1 side. Therefore, the area in which the wires 71 can be stably bonded is even wider than in the first embodiment.
[0081] Furthermore, the semiconductor device A5 has a common configuration with the semiconductor device A1, and thus achieves the same effects as the semiconductor device A1.
[0082] In the present embodiment, the x-direction dimensions of the back surface 312 and end surface 314 of the third lead 31 are about three times larger than the x-direction dimensions of the back surface 412 and end surface 414 of the fifth lead 41, but this is not limiting. For example, the x-direction dimensions of the back surface 312 and end surface 314 of the third lead 31 may be approximately the same as the x-direction dimensions of the back surface 412 and end surface 414 of the fifth lead 41.
[0083] Sixth Embodiment Fig. 14 is a plan view showing a semiconductor device A6 according to a sixth embodiment of the present disclosure, and corresponds to Fig. 3. In Fig. 14, for ease of understanding, the outer shape of the sealing resin 8 is shown by an imaginary line (two-dot chain line) through the sealing resin 8. The semiconductor device A6 according to this embodiment differs from the semiconductor device A1 according to the first embodiment in that the first lead 1 and the second lead 2 are exposed from the same second resin side surface 832.
[0084] In the first lead 1 according to the sixth embodiment, the terminal portion 120 is arranged on the y2 side in the y direction of the die pad portion 110, closer to the x2 side in the x direction. The fifth lead 41 and the sixth lead 42 are arranged between the terminal portion 120 of the first lead 1 and the terminal portion 220 of the second lead 2. The third lead 31 extends to the vicinity of both ends in the x direction of the semiconductor device A6.
[0085] In this embodiment, the first electrode 61 of the semiconductor element 601 and the first electrode 61 of the semiconductor element 602 are conductively connected to the third lead 31 by the wire 71. The second electrode 62 of the semiconductor element 601 is conductively connected to the fifth lead 41 by the wire 72. The second electrode 62 of the semiconductor element 602 is conductively connected to the sixth lead 42 by the wire 72. The fifth lead 41 and the sixth lead 42 are arranged adjacent to each other on the y2 side of the first lead 1 and the second lead 2 in the y direction. Therefore, in the wiring board 9 on which the semiconductor device A6 is mounted, the wiring 92 connected to the third lead 31 and the wiring 94 connected to the fifth lead 41 and the sixth lead 42 are simple wirings. The semiconductor device A6 has a common configuration with the semiconductor device A1, and thereby has the same effects as the semiconductor device A1.
[0086] In the present embodiment, the case where the terminal portion 120 of the first lead 1 and the terminal portion 220 of the second lead 2 are both arranged on the y2 side in the y direction and exposed from the second resin side surface 832 has been described, but the present invention is not limited to this. The terminal portion 120 of the first lead 1 and the terminal portion 220 of the second lead 2 may both be arranged on the y1 side in the y direction and exposed from the first resin side surface 831. In this case, the third lead 31 may be arranged between the terminal portion 120 of the first lead 1 and the terminal portion 220 of the second lead 2. The terminal portion 120 of the first lead 1 may be arranged on the x2 side of the die pad portion 110 in the x direction and exposed from the fourth resin side surface 834. The terminal portion 220 of the second lead 2 may be arranged on the x1 side of the die pad portion 210 in the x direction and exposed from the third resin side surface 833. Furthermore, in contrast to the semiconductor device A1 of the first embodiment, the terminal portion 120 of the first lead 1 may be arranged on the y-direction y2 side of the die pad portion 110 and exposed from the second resin side surface 832, and the terminal portion 220 of the second lead 2 may be arranged on the y-direction y1 side of the die pad portion 210 and exposed from the first resin side surface 831.
[0087] Seventh embodiment Fig. 15 is a bottom view showing a semiconductor device A7 according to a seventh embodiment of the present disclosure, and corresponds to Fig. 4. The semiconductor device A7 according to this embodiment differs from the semiconductor device A1 according to the first embodiment in the shapes of the first lead 1 and the second lead 2.
[0088] In the first lead 1 according to the seventh embodiment, the die pad portion 110 does not have a die pad portion back surface 112, and the die pad portion 110 is not exposed from the resin back surface 82. In addition, in the second lead 2 according to the seventh embodiment, the die pad portion 210 does not have a die pad portion back surface 212, and the die pad portion 210 is not exposed from the resin back surface 82.
[0089] In this embodiment, the first electrode 61 of the semiconductor element 601 and the first electrode 61 of the semiconductor element 602 are conductively connected to the third lead 31 by the wire 71. The second electrode 62 of the semiconductor element 601 is conductively connected to the fifth lead 41 by the wire 72. The second electrode 62 of the semiconductor element 602 is conductively connected to the sixth lead 42 by the wire 72. The fifth lead 41 and the sixth lead 42 are arranged adjacent to each other on the y2 side of the first lead 1 and the second lead 2 in the y direction. Therefore, in the wiring board 9 on which the semiconductor device A6 is mounted, the wiring 92 connected to the third lead 31 and the wiring 94 connected to the fifth lead 41 and the sixth lead 42 are simple wirings.
[0090] Moreover, according to this embodiment, the die pad portion 110 of the first lead 1 and the die pad portion 210 of the second lead 2 are not exposed from the resin back surface 82. This makes it possible to prevent the first lead 1 from being shorted out to the leads 2, 31, 41, 42, and the second lead 2 from being shorted out to the leads 1, 31, 41, 42. Furthermore, the semiconductor device A7 has a common configuration with the semiconductor device A1, and thereby provides the same effects as the semiconductor device A1.
[0091] Eighth embodiment Fig. 16 is a bottom view showing a semiconductor device A8 according to an eighth embodiment of the present disclosure, and corresponds to Fig. 4. The semiconductor device A8 according to this embodiment differs from the semiconductor device A1 according to the first embodiment in the shapes of the first lead 1 and the second lead 2.
[0092] In the first lead 1 according to the eighth embodiment, the die pad portion back surface 112 is connected to the terminal portion back surface 122. In the second lead 2 according to the eighth embodiment, the die pad portion back surface 212 is connected to the terminal portion back surface 222.
[0093] In this embodiment, the first electrode 61 of the semiconductor element 601 and the first electrode 61 of the semiconductor element 602 are conductively connected to the third lead 31 by the wire 71. The second electrode 62 of the semiconductor element 601 is conductively connected to the fifth lead 41 by the wire 72. The second electrode 62 of the semiconductor element 602 is conductively connected to the sixth lead 42 by the wire 72. The fifth lead 41 and the sixth lead 42 are arranged adjacent to each other on the y2 side of the first lead 1 and the second lead 2 in the y direction. Therefore, in the wiring board 9 on which the semiconductor device A6 is mounted, the wiring 92 connected to the third lead 31 and the wiring 94 connected to the fifth lead 41 and the sixth lead 42 are simple wirings.
[0094] Moreover, according to this embodiment, the die pad portion back surface 112 expands until it is connected to the terminal portion back surface 122, and the die pad portion back surface 212 expands until it is connected to the terminal portion back surface 222, so that the heat dissipation function is further improved compared to the first embodiment. Furthermore, the semiconductor device A8 has a common configuration with the semiconductor device A1, and thereby exerts the same effects as the semiconductor device A1.
[0095] Ninth embodiment Fig. 17 is a plan view showing a semiconductor device A9 according to a ninth embodiment of the present disclosure, and corresponds to Fig. 3. In Fig. 17, for ease of understanding, the outer shape of the sealing resin 8 is shown by an imaginary line (two-dot chain line) through the sealing resin 8. The semiconductor device A9 according to this embodiment differs from the semiconductor device A1 according to the first embodiment in the configuration of each semiconductor element 6.
[0096] In each semiconductor element 6 according to the ninth embodiment, the third electrode 63 is disposed on the element main surface 6a, not on the element back surface 6b. The positions of the first electrode 61, the second electrode 62, and the third electrode 63 on the element main surface 6a are not limited. The semiconductor device A9 further includes a wire 73. The wire 73 is made of the same material as the wires 71 and 72. The wire 73 is connected to the third electrode 63 of the semiconductor element 601 and the terminal main surface 121 of the first lead 1. As a result, the first lead 1 is conductively connected to the third electrode 63 (collector electrode) of the semiconductor element 601 and functions as a collector terminal of the semiconductor element 601. In this embodiment, the third electrode 63 of the semiconductor element 601 is connected to the terminal main surface 121 by one wire 73, but may be connected by multiple wires 73. The other wire 73 is connected to the third electrode 63 of the semiconductor element 602 and the terminal main surface 221 of the second lead 2. As a result, the second lead 2 is conductively connected to the third electrode 63 (collector electrode) of the semiconductor element 602 and functions as a collector terminal of the semiconductor element 602. In this embodiment, the third electrode 63 of the semiconductor element 602 is connected to the terminal portion main surface 221 by one wire 73, but may be connected by multiple wires 73. In this embodiment, the bonding material 75 (not shown in FIG. 16) may be an insulating bonding material.
[0097] In this embodiment, the first electrode 61 of the semiconductor element 601 and the first electrode 61 of the semiconductor element 602 are conductively connected to the third lead 31 by the wire 71. The second electrode 62 of the semiconductor element 601 is conductively connected to the fifth lead 41 by the wire 72. The second electrode 62 of the semiconductor element 602 is conductively connected to the sixth lead 42 by the wire 72. The fifth lead 41 and the sixth lead 42 are arranged adjacent to each other on the y-direction y2 side of the first lead 1 and the second lead 2. Therefore, in the wiring board 9 on which the semiconductor device A6 is mounted, the wiring 92 connected to the third lead 31 and the wiring 94 connected to the fifth lead 41 and the sixth lead 42 are simple wirings. The semiconductor device A9 has a common configuration with the semiconductor device A1, and thereby has the same effects as the semiconductor device A1.
[0098] Tenth embodiment 18 and 19 are diagrams for explaining a semiconductor device A10 according to a tenth embodiment of the present disclosure. Fig. 18 is a bottom view showing the semiconductor device A10 and corresponds to Fig. 4. Fig. 19 is a diagram showing a state in which the semiconductor device A10 is mounted on a wiring board 9 and corresponds to Fig. 8. The semiconductor device A10 according to this embodiment differs from the semiconductor device A1 according to the first embodiment in the arrangement positions of the terminal portion 220 of the second lead 2 and the sixth lead 42.
[0099] The second lead 2 according to the tenth embodiment has a terminal portion 220 disposed on the y2 side of the die pad portion 210 in the x direction, closer to the x2 side. The sixth lead 42 according to the tenth embodiment is disposed at a corner (upper right corner in FIG. 18) on the y2 side of the x direction x1 side of the semiconductor device A10 as viewed in the z direction. That is, the fifth lead 41 and the sixth lead 42 are both disposed on the y2 side of the y direction with respect to the first lead 1 and the second lead 2, but are not adjacent to each other. In the x direction, the terminal portion 220 of the second lead 2 is disposed between the fifth lead 41 and the sixth lead 42.
[0100] The semiconductor device A10 is mounted on a wiring board 9 as shown in Fig. 19. For ease of understanding, in the semiconductor device A10 shown in Fig. 19, the surfaces of the leads 1, 2, 31, 41, and 42 exposed from the resin back surface 82 are indicated by dashed lines. As shown in Fig. 19, the semiconductor device A10 is mounted on the wiring board 9, and the leads 1, 2, 31, 41, and 42 are joined to the wirings 91 to 96 formed on the wiring board 9 by solder 99. In this embodiment, the wiring 94 is formed to bypass the wiring 93 on the y-direction y1 side, and the fifth lead 41 and the sixth lead 42 are joined to it.
[0101] In this embodiment, the first electrode 61 of the semiconductor element 601 and the first electrode 61 of the semiconductor element 602 are conductively connected to the third lead 31 by the wire 71. Therefore, in the wiring board 9 on which the semiconductor device A10 is mounted, the wiring 92 connected to the third lead 31 is a simple wiring. In addition, the second electrode 62 of the semiconductor element 601 is conductively connected to the fifth lead 41 by the wire 72. The second electrode 62 of the semiconductor element 602 is conductively connected to the sixth lead 42 by the wire 72. The fifth lead 41 and the sixth lead 42 are arranged on the y2 side of the first lead 1 and the second lead 2 in the y direction. Therefore, in the wiring board 9 on which the semiconductor device A10 is mounted, the wiring 94 connected to the fifth lead 41 and the sixth lead 42 is a simple wiring compared to the case where the fifth lead 41 and the sixth lead 42 are arranged on the opposite sides to each other in the y direction with respect to the first lead 1 and the second lead 2. Furthermore, the semiconductor device A10 has a common configuration with the semiconductor device A1, and thus achieves the same effects as the semiconductor device A1.
[0102] The semiconductor device according to the present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the semiconductor device according to the present disclosure can be freely designed in various ways.
[0103] [Appendix 1] a first semiconductor element and a second semiconductor element, each of which is a switching element and has a main surface and a back surface facing in opposite directions in a thickness direction, and a first electrode and a second electrode disposed on the main surface; a first lead on which the first semiconductor element is mounted and which is electrically connected to the first semiconductor element; a second lead on which the second semiconductor element is mounted and which is electrically connected to the second semiconductor element; a sealing resin that covers the first semiconductor element and the second semiconductor element; a first terminal that is disposed apart from the first lead and the second lead in a first direction perpendicular to the thickness direction, that is exposed from the sealing resin, and that is electrically connected to a first electrode of the first semiconductor element; a second terminal that is disposed on the same side as the first terminal with respect to the first lead and the second lead in the first direction and spaced apart from the first terminal, that is exposed from the sealing resin, and that is electrically connected to a first electrode of the second semiconductor element; a third terminal that is disposed on an opposite side of the first terminal with respect to the first lead and the second lead in the first direction, is exposed from the sealing resin, and is electrically connected to a second electrode of the first semiconductor element; a fourth terminal that is disposed on the same side as the third terminal with respect to the first lead and the second lead in the first direction and is spaced apart from the third terminal, that is exposed from the sealing resin, and that is electrically connected to a second electrode of the second semiconductor element; The semiconductor device comprises: [Appendix 2] the sealing resin includes a resin main surface and a resin back surface facing opposite sides to each other in the thickness direction, a first resin side surface connected to the resin main surface and the resin back surface and from which the first terminal and the second terminal are exposed, and a second resin side surface connected to the resin main surface and the resin back surface and from which the third terminal and the fourth terminal are exposed. 2. The semiconductor device according to claim 1. [Appendix 3] the first lead is exposed from a side surface of the first resin; The second lead is exposed from a side surface of the second resin. 3. The semiconductor device according to claim 2. [Appendix 4] the first lead includes a first die pad portion on which the first semiconductor element is mounted, the second lead includes a second die pad portion on which the second semiconductor element is mounted, the first die pad portion and the second die pad portion are exposed from the resin back surface. 4. The semiconductor device according to claim 2 or 3. [Appendix 5] the first lead further includes a first lead terminal portion connected to the first die pad portion; the second lead further includes a second lead terminal portion connected to the second die pad portion; the first lead terminal portion and the second lead terminal portion are exposed from the back surface of the resin; 5. The semiconductor device according to claim 4. [Appendix 6] the first lead terminal portion has a first terminal portion end surface exposed from the first resin side surface, the second lead terminal portion has a second terminal portion end surface exposed from the second resin side surface, the end face of the first terminal portion is flush with the first resin side face, The end surface of the second terminal portion is flush with the second resin side surface. 6. The semiconductor device according to claim 5. [Appendix 7] a third lead electrically connected to the first electrode of the first semiconductor element and the first electrode of the second semiconductor element; the third lead serves as both the first terminal and the second terminal; 7. The semiconductor device according to claim 2, [Appendix 8] The third lead includes a third lead main surface and a third lead back surface facing opposite to each other in the thickness direction, and a third lead end surface connected to the third lead main surface and the third lead back surface and exposed from the first resin side surface. 8. The semiconductor device according to claim 7. [Appendix 9] the third lead end surface is composed of two portions separated by the first resin side surface; 9. The semiconductor device according to claim 8. [Appendix 10] The shape of the third lead rear surface is U-shaped. 10. The semiconductor device according to claim 8 or 9. [Appendix 11] The third lead back surface is composed of two parts separated by the resin back surface. 10. The semiconductor device according to claim 8 or 9. [Appendix 12] a third lead as the first terminal, which is electrically connected to the first electrode of the first semiconductor element; a fourth lead as the second terminal, the fourth lead being electrically connected to the first electrode of the second semiconductor element and being spaced apart from the third lead; Further comprising: 7. The semiconductor device according to claim 2, [Appendix 13] the third lead and the fourth lead are disposed adjacent to each other; 13. The semiconductor device according to claim 12. [Appendix 14] a fifth lead electrically connected to the second electrode of the first semiconductor element and the second electrode of the second semiconductor element; the fifth lead serves as both the third terminal and the fourth terminal; 14. The semiconductor device according to any one of claims 2 to 13. [Appendix 15] a fifth lead as the third terminal, which is electrically connected to the second electrode of the first semiconductor element; a sixth lead as the fourth terminal, the sixth lead being electrically connected to the second electrode of the second semiconductor element and being spaced apart from the fifth lead; Further comprising: 14. The semiconductor device according to any one of claims 2 to 13. [Appendix 16] the fifth lead and the sixth lead are disposed adjacent to each other; 16. The semiconductor device according to claim 15. [Appendix 17] a conductive bonding material that bonds the first semiconductor element and the first lead; the first semiconductor element further includes a third electrode disposed on a back surface of the element; the third electrode is conductively connected to the first lead via the conductive bonding material; 17. A semiconductor device according to any one of claims 1 to 16. [Appendix 18] the first semiconductor element and the second semiconductor element are bipolar transistors, The first electrode is an emitter electrode, the second electrode is a base electrode, and the third electrode is a collector electrode. 18. The semiconductor device according to claim 17. [Appendix 19] The first semiconductor element is an NPN type, The second semiconductor element is a PNP type. 19. The semiconductor device according to claim 18. [Appendix 20] The dimension in the first direction and the dimension in a second direction perpendicular to the thickness direction and the first direction are both 1 mm or more and 3 mm or less. 20. A semiconductor device according to any one of claims 1 to 19. [Explanation of symbols]
[0104] A1 to A10: Semiconductor device 1: First lead 110: Die pad section 111: Main surface of die pad 112: Back side of die pad 113: Recessed portion on rear side of die pad 120:Terminal section 121: Terminal main surface 122: Back side of terminal 123: Terminal end face 130:Connection part 131: Main surface of connecting part 132: Back side of connecting part 133: Connection end face 2: 2nd lead 210: Die pad section 211: Main surface of die pad 212: Back side of die pad 213: Recessed portion on rear side of die pad 220:Terminal section 221: Terminal main surface 222: Back side of terminal 223: Terminal end face 230:Connection part 231: Main surface of connecting part 232: Back side of connecting part 233: Connection end face 31: 3rd lead 311: Main surface 312: Back side 313: Reverse side recess 314: End face 32: 4th lead 321: Main surface 322: Back side 323: Reverse side recess 324: End face 41: 5th lead 411: Main surface 412: Back side 413: Reverse side recess 414: End face 42: 6th lead 421: Main surface 422: Back side 423: Reverse side recess 424: End face 6,601,602: Semiconductor elements 60: Element body 6a: Element main surface 6b: Back side of element 61: 1st electrode 62: 2nd electrode 63:Third electrode 71, 72, 73: Wire 75: Bonding material 8: Sealing resin 81: Resin main surface 82: Resin back 83: Resin side 831: First resin side 832: Second resin side 833: Third resin side 834: 4th resin side 9: Wiring board 91~96: Wiring 99: Solder
Claims
1. a first semiconductor element and a second semiconductor element, each of which is a switching element, and has a main surface and a back surface facing in opposite directions in a thickness direction, and a first electrode and a second electrode disposed on the main surface; a first lead on which the first semiconductor element is mounted and which is electrically connected to the first semiconductor element; a second lead on which the second semiconductor element is mounted and which is electrically connected to the second semiconductor element; a third lead electrically connected to the first electrode of the first semiconductor element and the first electrode of the second semiconductor element; a sealing resin that covers the first semiconductor element and the second semiconductor element; a first terminal that is disposed apart from the first lead and the second lead in a first direction perpendicular to the thickness direction, that is exposed from the sealing resin, and that is electrically connected to a first electrode of the first semiconductor element; a second terminal that is disposed on the same side as the first terminal with respect to the first lead and the second lead in the first direction and spaced apart from the first terminal, that is exposed from the sealing resin, and that is electrically connected to a first electrode of the second semiconductor element; a third terminal that is disposed on an opposite side of the first terminal with respect to the first lead and the second lead in the first direction, is exposed from the sealing resin, and is electrically connected to a second electrode of the first semiconductor element; a fourth terminal that is disposed on the same side as the third terminal with respect to the first lead and the second lead in the first direction and is spaced apart from the third terminal, that is exposed from the sealing resin, and that is electrically connected to a second electrode of the second semiconductor element; Equipped with the sealing resin includes a resin main surface and a resin back surface facing opposite sides to each other in the thickness direction, a first resin side surface connected to the resin main surface and the resin back surface and from which the first terminal and the second terminal are exposed, and a second resin side surface connected to the resin main surface and the resin back surface and from which the third terminal and the fourth terminal are exposed, the first lead is exposed from a side surface of the first resin, the second lead is exposed from a side surface of the second resin; The third lead serves as both the first terminal and the second terminal. Semiconductor device.
2. The third lead includes a third lead main surface and a third lead back surface facing opposite to each other in the thickness direction, and a third lead end surface connected to the third lead main surface and the third lead back surface and exposed from the first resin side surface. The semiconductor device according to claim 1 .
3. the third lead end surface is composed of two portions separated by the first resin side surface; The semiconductor device according to claim 2 .
4. The third lead has a U-shaped rear surface.
4. The semiconductor device according to claim 2.
5. The third lead back surface is composed of two parts separated by the resin back surface.
4. The semiconductor device according to claim 2.
6. a first semiconductor element and a second semiconductor element, each of which is a switching element, and has a main surface and a back surface facing in opposite directions in a thickness direction, and a first electrode and a second electrode disposed on the main surface; a first lead on which the first semiconductor element is mounted and which is electrically connected to the first semiconductor element; a second lead on which the second semiconductor element is mounted and which is electrically connected to the second semiconductor element; a sealing resin that covers the first semiconductor element and the second semiconductor element; a first terminal that is disposed apart from the first lead and the second lead in a first direction perpendicular to the thickness direction, that is exposed from the sealing resin, and that is electrically connected to a first electrode of the first semiconductor element; a second terminal that is disposed on the same side as the first terminal with respect to the first lead and the second lead in the first direction and spaced apart from the first terminal, that is exposed from the sealing resin, and that is electrically connected to a first electrode of the second semiconductor element; a third terminal that is disposed on an opposite side of the first terminal with respect to the first lead and the second lead in the first direction, is exposed from the sealing resin, and is electrically connected to a second electrode of the first semiconductor element; a fourth terminal that is disposed on the same side as the third terminal with respect to the first lead and the second lead in the first direction and is spaced apart from the third terminal, that is exposed from the sealing resin, and that is electrically connected to a second electrode of the second semiconductor element; a third lead as the first terminal, which is electrically connected to the first electrode of the first semiconductor element; a fourth lead as the second terminal, the fourth lead being electrically connected to the first electrode of the second semiconductor element and being spaced apart from the third lead; Equipped with the sealing resin includes a resin main surface and a resin back surface facing opposite sides to each other in the thickness direction, a first resin side surface connected to the resin main surface and the resin back surface and from which the first terminal and the second terminal are exposed, and a second resin side surface connected to the resin main surface and the resin back surface and from which the third terminal and the fourth terminal are exposed, the first lead is exposed from a side surface of the first resin, the second lead is exposed from a side surface of the second resin; The third lead and the fourth lead are disposed adjacent to each other. Semiconductor device.
7. a fifth lead electrically connected to the second electrode of the first semiconductor element and the second electrode of the second semiconductor element; The fifth lead serves as both the third terminal and the fourth terminal.
7. The semiconductor device according to claim 1.
8. a fifth lead as the third terminal, which is electrically connected to the second electrode of the first semiconductor element; a sixth lead as the fourth terminal, the sixth lead being electrically connected to the second electrode of the second semiconductor element and being spaced apart from the fifth lead; Further comprising:
7. The semiconductor device according to claim 1.
9. The fifth lead and the sixth lead are disposed adjacent to each other. The semiconductor device according to claim 8.
10. a first semiconductor element and a second semiconductor element, each of which is a switching element, and has a main surface and a back surface facing in opposite directions in a thickness direction, and a first electrode and a second electrode disposed on the main surface; a first lead on which the first semiconductor element is mounted and which is electrically connected to the first semiconductor element; a second lead on which the second semiconductor element is mounted and which is electrically connected to the second semiconductor element; a sealing resin that covers the first semiconductor element and the second semiconductor element; a first terminal that is disposed apart from the first lead and the second lead in a first direction perpendicular to the thickness direction, that is exposed from the sealing resin, and that is electrically connected to a first electrode of the first semiconductor element; a second terminal that is disposed on the same side as the first terminal with respect to the first lead and the second lead in the first direction and spaced apart from the first terminal, that is exposed from the sealing resin, and that is electrically connected to a first electrode of the second semiconductor element; a third terminal that is disposed on an opposite side of the first terminal with respect to the first lead and the second lead in the first direction, is exposed from the sealing resin, and is electrically connected to a second electrode of the first semiconductor element; a fourth terminal that is disposed on the same side as the third terminal with respect to the first lead and the second lead in the first direction and is spaced apart from the third terminal, that is exposed from the sealing resin, and that is electrically connected to a second electrode of the second semiconductor element; a conductive bonding material that bonds the first semiconductor element and the first lead; Equipped with the sealing resin includes a resin main surface and a resin back surface facing opposite sides to each other in the thickness direction, a first resin side surface connected to the resin main surface and the resin back surface and from which the first terminal and the second terminal are exposed, and a second resin side surface connected to the resin main surface and the resin back surface and from which the third terminal and the fourth terminal are exposed, the first lead is exposed from a side surface of the first resin, the second lead is exposed from a side surface of the second resin; The first semiconductor element further includes a third electrode disposed on a back surface of the element, The third electrode is conductively connected to the first lead via the conductive bonding material.
11. the first semiconductor element and the second semiconductor element are bipolar transistors, the first electrode is an emitter electrode, the second electrode is a base electrode, and the third electrode is a collector electrode; The semiconductor device according to claim 10.
12. The first semiconductor element is an NPN type, The second semiconductor element is a PNP type. The semiconductor device according to claim 11.
13. The first resin side surface and the second resin side surface face in opposite directions to each other in the first direction.
13. The semiconductor device according to claim 1.
14. only the first lead, the first terminal, and the second terminal are exposed from the first resin side surface, only the second lead, the third terminal, and the fourth terminal are exposed from the second resin side surface; 14. The semiconductor device according to claim 1.
15. the first lead includes a first die pad portion on which the first semiconductor element is mounted, the second lead includes a second die pad portion on which the second semiconductor element is mounted, the first die pad portion and the second die pad portion are exposed from the resin back surface.
15. The semiconductor device according to claim 1.
16. the first lead further includes a first lead terminal portion connected to the first die pad portion, the second lead further includes a second lead terminal portion connected to the second die pad portion; the first lead terminal portion and the second lead terminal portion are exposed from the back surface of the resin; The semiconductor device according to claim 15.
17. the first lead terminal portion includes a first terminal portion end surface exposed from the first resin side surface, the second lead terminal portion includes a second terminal portion end surface exposed from the second resin side surface, the end surface of the first terminal portion is flush with the first resin side surface, The second terminal end surface is flush with the second resin side surface. The semiconductor device according to claim 16.
18. The dimension in the first direction and the dimension in a second direction perpendicular to the thickness direction and the first direction are both 1 mm or more and 3 mm or less.
18. The semiconductor device according to claim 1.
Citation Information
Patent Citations
Semiconductor device
JP2000294707A
Semiconductor device
JP2002064106A
Semiconductor device and electronic device
JP2005167013A
Semiconductor device
JP2007012857A
Resin sealed semiconductor device and circuit module using the same
JP2009038138A