Semiconductor Device

Abstract

To provide a semiconductor device capable of preventing electronic components mounted side by side on the same lead from being in contact with one another.SOLUTION: A semiconductor device A10 includes: a first die pad 31, a second die pad 32, and a third die pad 33 which are arranged side by side with one another in an x direction; a first connecting portion 34 connected to the first die pad 31 and the second die pad 32; a second connecting portion 35 connected to the first die pad 31 and the third die pad 33; and a first semiconductor element 11. The first die pad 31 has a main surface 311 and a back surface 312 facing opposite sides in a z direction. The second die pad 32 is located on a side of the main surface 311 with respect to the first die pad 31 in the z direction. The third die pad 33 is arranged on a side opposite to the second die pad 32 with respect to the first die pad 31 in the X direction, and is located at a different position from the first die pad 31 in the z direction.SELECTED DRAWING: Figure 10

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device. [Background technology]

[0002] One of various electronic devices is a semiconductor device using a lead frame. The semiconductor device is a multi-chip device in which a plurality of semiconductor elements are mounted side by side on the same lead. Patent Document 1 discloses an example of a semiconductor device that is a conventional multi-chip device. The semiconductor device described in Patent Document 1 includes a plurality of semiconductor chips, a lead frame, and a resin. The plurality of semiconductor chips are mounted side by side on an island of the lead frame. Each pad of the semiconductor chip and each lead terminal of the lead frame are electrically connected by a wire. The plurality of semiconductor chips are sealed with a resin. In the semiconductor device, since the plurality of semiconductor chips are mounted side by side on the same island, there is a possibility that the semiconductor chips are manufactured in a state where they are in contact with each other. In addition, not limited to semiconductor chips, when a plurality of electronic components (including semiconductor chips) are mounted side by side on the same lead, there is a possibility that the electronic components may come into contact with each other. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2017-26463 A Summary of the Invention [Problem to be solved by the invention]

[0004] In view of the above circumstances, an object of the present invention is to provide a semiconductor device capable of preventing contact between electronic components mounted side by side on the same lead. [Means for solving the problem]

[0005] A semiconductor device provided by the present disclosure includes a first lead, a first semiconductor element mounted on the first lead, and a sealing resin covering the first semiconductor element, the first lead having a first die pad, a second die pad, a third die pad, a first connecting portion, and a second connecting portion, the first die pad having a first main surface and a first back surface facing opposite each other in a thickness direction, the second die pad being arranged side by side with the first die pad in a first direction perpendicular to the thickness direction and being located on the first main surface side of the first die pad in the thickness direction, and the third die pad being located on the the first die pad is disposed on the opposite side to the second die pad with respect to the first die pad and is disposed at a different position from the first die pad in the thickness direction, the first connecting portion connects the first die pad to the second die pad, the second connecting portion connects the first die pad to the third die pad, the second die pad has a second main surface facing the same side as the first main surface in the thickness direction, the third die pad has a third main surface facing the same side as the first main surface in the thickness direction, and the first semiconductor element is mounted on any one of the first main surface, the second main surface, or the third main surface. Effect of the Invention

[0006] According to the present disclosure, it is possible to prevent the electronic component mounted on the first die pad of the first lead from coming into contact with the electronic components mounted on the second die pad and the third die pad.

[0007] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. [Diagram 2] FIG. 2 is a perspective view showing the semiconductor device of FIG. 1, taken through the sealing resin with some of the second leads omitted. [Diagram 3] FIG. 3 is a plan view showing the semiconductor device of FIG. 1, seen through a sealing resin. [Figure 4] FIG. 4 is a bottom view showing the semiconductor device of FIG. [Diagram 5] FIG. 5 is a front view showing the semiconductor device of FIG. [Figure 6] FIG. 6 is a right side view showing the semiconductor device of FIG. [Figure 7] FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. [Figure 8] FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. [Figure 9] FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. [Figure 10] FIG. 10 is a cross-sectional view taken along line XX in FIG. [Figure 11] FIG. 11 is a plan view showing the semiconductor device according to the second embodiment of the present disclosure, seen through a sealing resin. [Figure 12] FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. [Figure 13] FIG. 13 is a partially enlarged view of FIG. [Figure 14] FIG. 14 is a cross-sectional view showing a semiconductor device according to a first modified example of the second embodiment of the present disclosure. [Figure 15] FIG. 15 is a partially enlarged view of FIG. [Figure 16] FIG. 16 is a cross-sectional view showing a semiconductor device according to a second modification of the second embodiment of the present disclosure. [Figure 17] FIG. 17 is a partially enlarged view of FIG. [Figure 18] FIG. 18 is a bottom view showing the semiconductor device according to the third embodiment of the present disclosure. [Figure 19] FIG. 19 is a cross-sectional view showing the semiconductor device of FIG. [Figure 20] FIG. 20 is a cross-sectional view showing the semiconductor device of FIG. [Figure 21]FIG. 21 is a cross-sectional view showing a semiconductor device according to a first modified example of the third embodiment of the present disclosure. [Figure 22] FIG. 22 is a cross-sectional view showing a semiconductor device according to a second modified example of the third embodiment of the present disclosure. [Diagram 23] FIG. 23 is a cross-sectional view showing a semiconductor device according to a fourth embodiment of the present disclosure. [Figure 24] FIG. 24 is a bottom view showing the semiconductor device according to the fifth embodiment of the present disclosure. [Diagram 25] FIG. 25 is a cross-sectional view showing the semiconductor device of FIG. [Figure 26] FIG. 26 is a plan view showing a semiconductor device according to a sixth embodiment of the present disclosure, seen through a sealing resin. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0010] In this disclosure, "a certain object A is formed on a certain object B" and "a certain object A is formed on a certain object B" include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed on a certain object B" include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on a certain object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is located on a certain object B" includes "a certain object A is located on a certain object B in contact with a certain object B" and "a certain object A is located on a certain object B with another object interposed between the certain object A and the certain object B". In addition, unless otherwise specified, "an object A overlaps with an object B when viewed in a certain direction" includes "an object A overlaps with the entirety of an object B" and "an object A overlaps with a part of an object B."

[0011] First Embodiment 1 to 10 show an example of a semiconductor device according to the present disclosure. The semiconductor device A10 of this embodiment includes a first semiconductor element 11, a second semiconductor element 12, a third semiconductor element 13, a conductive support member 2, wires 61, 62, 63, 641, 642, metal layers 65, 66, 67, bonding layers 691, 692, 693, and a sealing resin 7. The conductive support member 2 includes a first lead 3 and a plurality of second leads 4. The use and function of the semiconductor device A10 are not limited. In this embodiment, the package format of the semiconductor device A10 is a SOP (Small Outline Package). However, the package format of the semiconductor device A10 is not limited to the SOP.

[0012] FIG. 1 is a perspective view showing the semiconductor device A10. FIG. 2 is a perspective view showing the semiconductor device A10. In FIG. 2, for ease of understanding, the outer shape of the sealing resin 7 is shown by an imaginary line (two-dot chain line) through the sealing resin 7. Also, in FIG. 2, for ease of understanding, a part of each second lead 4 is omitted. FIG. 3 is a plan view showing the semiconductor device A10. In FIG. 3, for ease of understanding, the outer shape of the sealing resin 7 is shown by an imaginary line (two-dot chain line) through the sealing resin 7. FIG. 4 is a bottom view showing the semiconductor device A10. FIG. 5 is a front view showing the semiconductor device A10. FIG. 6 is a right side view showing the semiconductor device A10. FIG. 7 is a cross-sectional view taken along the line VII-VII in FIG. 3. FIG. 8 is a cross-sectional view taken along the line VIII-VIII in FIG. 3. FIG. 9 is a cross-sectional view taken along the line IX-IX in FIG. 3. FIG. 10 is a cross-sectional view taken along the line XX in FIG. 3.

[0013] The semiconductor device A10 has an oblong shape when viewed in the thickness direction (when viewed in a plane). For convenience of explanation, the thickness direction (when viewed in a plane) of the semiconductor device A10 is defined as the z direction, the direction along the long side of the semiconductor device A10 perpendicular to the z direction (the vertical direction in Figs. 3 and 4) is defined as the x direction, and the direction perpendicular to the z direction and the x direction (the horizontal direction in Figs. 3 and 4) is defined as the y direction. In addition, one side of the z direction (the lower side in Figs. 5 to 6) is defined as the z1 side, and the other side (the upper side in Figs. 5 to 6) is defined as the z2 side. One side of the x direction (the lower side in Fig. 3) is defined as the x1 side, and the other side (the upper side in Fig. 3) is defined as the x2 side. One side of the y direction (the left side in Figs. 3 and 4) is defined as the y1 side, and the other side (the right side in Figs. 3 and 4) is defined as the y2 side. The z direction corresponds to the "thickness direction" of this disclosure, and the x direction corresponds to the "first direction" of this disclosure. The shape and dimensions of the semiconductor device A10 are not limited.

[0014] The conductive support member 2 is a member that constitutes a conductive path between the first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 in the semiconductor device A10 and a wiring board on which the semiconductor device A10 is mounted. The conductive support member 2 is made of an alloy containing Cu in its composition. The material of the conductive support member 2 is not limited, and may be Cu, Ni, or an alloy containing these in its composition. The conductive support member 2 is formed from a lead frame described later. The conductive support member 2 mounts the first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13. As shown in FIG. 3, the conductive support member 2 includes a first lead 3 and a plurality of second leads 4.

[0015] The first lead 3 is disposed at the center of the semiconductor device A10 in the y direction. The first lead 3 also spreads across the entire semiconductor device A10 in the x direction. A first semiconductor element 11, a second semiconductor element 12, and a third semiconductor element 13 are mounted on the first lead 3. The first lead 3 includes a first die pad 31, a second die pad 32, a third die pad 33, a first connecting portion 34, a second connecting portion 35, and fixing portions 36 and 37.

[0016] The first die pad 31 is disposed at the center of the first lead 3 in the x direction. The first die pad 31 has a rectangular shape when viewed in the z direction. The first die pad 31 has a main surface 311 and a back surface 312. The main surface 311 and the back surface 312 are spaced apart in the z direction as shown in FIGS. 7 and 10. The main surface 311 faces the z2 side, and the back surface 312 faces the z1 side. The main surface 311 and the back surface 312 are each approximately flat. The first semiconductor element 11 is mounted on the main surface 311. The back surface 312 is exposed from the sealing resin 7 to serve as a back surface terminal, and is joined to a wiring board on which the semiconductor device A10 is mounted.

[0017] As shown in FIG. 3, a metal layer 65 is disposed on the main surface 311. The metal layer 65 covers a portion on which the first semiconductor element 11 is mounted. In this embodiment, the metal layer 65 is rectangular when viewed in the z direction and is located at the center of the main surface 311. The metal layer 65 is included in the main surface 311 when viewed in the z direction. That is, the metal layer 65 does not extend to each edge of the main surface 311. The metal layer 65 is formed, for example, by plating. The metal layer 65 contains, for example, Ag. The metal layer 65 may be formed of a material having better solder wettability than the material of the first die pad 31. In addition to Ag, the material of the metal layer 65 may be, for example, Ni. In this embodiment, since the material of the first die pad 31 is a Cu alloy, the metal layer 65 may be Cu, which has better solder wettability than the Cu alloy. In addition, the metal layer 65 is not limited to being made of a single layer, and may be made of a laminate of multiple metal layers. For example, the metal layer 65 may be formed by stacking Ni, Pd, and Au in this order.

[0018] The second die pad 32 is disposed on the x2 side of the first die pad 31 in the x direction, side by side with the first die pad 31 in the x direction. The second die pad 32 is disposed at a position different from the first die pad 31 in the z direction. Specifically, the second die pad 32 is disposed on the main surface 311 side (z2 side in the z direction) of the first die pad 31 in the z direction. The second die pad 32 has a rectangular shape as viewed in the z direction. The second die pad 32 has a main surface 321 and a back surface 322. The main surface 321 and the back surface 322 are spaced apart in the z direction, as shown in FIG. 8 and FIG. 10. The main surface 321 faces the z2 side, and the back surface 322 faces the z1 side. The main surface 321 and the back surface 322 are each approximately flat. The second semiconductor element 12 is mounted on the main surface 321. The back surface 322 is not exposed from the sealing resin 7. The second die pad 32 is entirely covered with the sealing resin 7. In this embodiment, when viewed in the z direction, the first die pad 31 and the second die pad 32 have approximately the same size, and the area of ​​the main surface 311 and the area of ​​the main surface 321 are approximately the same.

[0019] As shown in FIG. 3, a metal layer 66 is disposed on the main surface 321. The metal layer 66 covers a portion on which the second semiconductor element 12 is mounted. In this embodiment, the metal layer 66 is rectangular when viewed in the z direction, and is located at the center of the main surface 321. The metal layer 66 is included in the main surface 321 when viewed in the z direction. In other words, the metal layer 66 does not extend to each edge of the main surface 321. The metal layer 66 is formed, for example, by a plating process. The material of the metal layer 66 is the same as that of the metal layer 65.

[0020] The third die pad 33 is disposed on the x1 side of the first die pad 31 in the x direction, side by side with the first die pad 31 in the x direction. That is, the third die pad 33 is disposed on the opposite side of the first die pad 31 from the second die pad 32 in the x direction. The third die pad 33 is disposed at a position different from that of the first die pad 31 in the z direction. Specifically, the third die pad 33 is disposed on the main surface 311 side (z2 side in the z direction) of the first die pad 31 in the z direction. In this embodiment, the third die pad 33 is disposed at the same position as the second die pad 32 in the z direction. Note that the position of the third die pad 33 in the z direction may be different from that of the second die pad 32. The third die pad 33 has a rectangular shape as viewed in the z direction. The third die pad 33 has a main surface 331 and a back surface 332. The main surface 331 and the back surface 332 are spaced apart in the z direction, as shown in FIG. 9 and FIG. 10. The main surface 331 faces the z2 side, and the back surface 332 faces the z1 side. The main surface 331 and the back surface 332 are each approximately flat. The third semiconductor element 13 is mounted on the main surface 331. The back surface 332 is not exposed from the sealing resin 7. The third die pad 33 is entirely covered by the sealing resin 7. In this embodiment, when viewed in the z direction, the first die pad 31 and the third die pad 33 are approximately the same size, and the area of ​​the main surface 311 and the area of ​​the main surface 331 are approximately the same.

[0021] As shown in FIG. 3, a metal layer 67 is disposed on the main surface 331. The metal layer 67 covers a portion on which the third semiconductor element 13 is mounted. In this embodiment, the metal layer 67 is rectangular when viewed in the z direction, and is located at the center of the main surface 331. The metal layer 67 is included in the main surface 331 when viewed in the z direction. In other words, the metal layer 67 does not extend to each edge of the main surface 331. The metal layer 67 is formed, for example, by a plating process. The material of the metal layer 67 is the same as that of the metal layer 65.

[0022] The first connecting portion 34 is disposed between the first die pad 31 and the second die pad 32 in the x direction, and is connected to the first die pad 31 and the second die pad 32. The first connecting portion 34 is inclined with respect to the first die pad 31 and the second die pad 32. The first connecting portion 34 has a rectangular shape when viewed in the z direction. The first connecting portion 34 has a main surface 341 and a back surface 342. The main surface 341 and the back surface 342 face in opposite directions to each other, as shown in FIG. 10. The main surface 341 and the back surface 342 are each approximately flat. The main surface 341 is connected to the main surface 311 of the first die pad 31 and the main surface 321 of the second die pad 32. The back surface 342 is connected to the back surface 312 of the first die pad 31 and the back surface 322 of the second die pad 32. The first connecting portion 34 is entirely covered with the sealing resin 7.

[0023] The second connecting portion 35 is disposed between the first die pad 31 and the third die pad 33 in the x direction, and is connected to the first die pad 31 and the third die pad 33. The second connecting portion 35 is inclined with respect to the first die pad 31 and the third die pad 33. The second connecting portion 35 has a rectangular shape when viewed in the z direction. The second connecting portion 35 has a main surface 351 and a back surface 352. The main surface 351 and the back surface 352 face in opposite directions to each other, as shown in FIG. 10. The main surface 351 and the back surface 342 are each approximately flat. The main surface 351 is connected to the main surface 311 of the first die pad 31 and the main surface 331 of the third die pad 33. The back surface 352 is connected to the back surface 312 of the first die pad 31 and the back surface 332 of the third die pad 33. The second connecting portion 35 is entirely covered with the sealing resin 7. The first die pad 31, the second die pad 32, the third die pad 33, the first connecting portion 34, and the second connecting portion 35 as a whole have an elongated rectangular shape when viewed in the z direction, and are formed by processing a elongated rectangular portion of the lead frame.

[0024] The fixing parts 36, 37 are portions for fixing the first lead 3 to the lead frame. As shown in FIG. 3, the fixing part 36 has an elongated rectangular shape when viewed in the z direction, and extends in the x direction. An end of the fixing part 36 on the x1 side in the x direction is connected to an end of the second die pad 32 on the x2 side in the x direction. An end of the fixing part 36 on the x2 side in the x direction is exposed from the sealing resin 7. As shown in FIG. 10, the fixing part 36 has an end face 361. The end face 361 is a face facing the x2 side in the x direction and is a face exposed from the sealing resin 7. The end face 361 is a face that is formed when the first lead 3 is separated from the lead frame by dicing in the manufacturing process. In this embodiment, the fixing part 36 has a parallel part 362 and an inclined part 363 as shown in FIG. 10. The parallel part 362 has an end face 361 and extends parallel to the second die pad 32. The parallel portion 362 is disposed on the z-direction z2 side of the second die pad 32. The inclined portion 363 is connected to the parallel portion 362 and the second die pad 32, and extends at an angle with respect to the parallel portion 362 and the second die pad 32.

[0025] As shown in FIG. 3, the fixing portion 37 has an elongated rectangular shape when viewed in the z direction and extends in the x direction. An end portion of the fixing portion 37 on the x2 side in the x direction is connected to an end portion of the third die pad 33 on the x1 side in the x direction. An end portion of the fixing portion 37 on the x1 side in the x direction is exposed from the sealing resin 7. As shown in FIGS. 1, 2, 5, and 10, the fixing portion 37 has an end face 371. The end face 371 is a face facing the x1 side in the x direction and is exposed from the sealing resin 7. The end face 371 is a face that is formed when the first lead 3 is separated from the lead frame by dicing in the manufacturing process. In this embodiment, the fixing portion 37 has a parallel portion 372 and an inclined portion 373 as shown in FIG. 10. The parallel portion 372 has an end face 371 and extends parallel to the third die pad 33. The parallel portion 372 is disposed on the z2 side of the third die pad 33 in the z direction. The inclined portion 373 is connected to the parallel portion 372 and the third die pad 33 , and extends at an angle with respect to the parallel portion 372 and the third die pad 33 .

[0026] The second leads 4 are members that are joined to a wiring board on which the semiconductor device A10 is mounted, thereby forming a conductive path between the semiconductor device A10 and the wiring board. Each second lead 4 is appropriately conductive to the first semiconductor element 11, the second semiconductor element 12, or the third semiconductor element 13. In this embodiment, the semiconductor device A10 has eight second leads 4. As shown in FIG. 3 and FIG. 4, the four second leads 4 are arranged on the y-direction y1 side with respect to the first lead 3. The four second leads 4 are arranged at equal intervals along the x-direction while being spaced apart from each other. The four second leads 4 protrude from the sealing resin 7 (side surface 73 described later) in the y-direction y1 side. As shown in FIG. 3 and FIG. 4, the other four second leads 4 are arranged on the y-direction y2 side with respect to the first lead 3. The four second leads 4 are arranged at equal intervals along the x-direction while being spaced apart from each other. The four second leads 4 protrude from the sealing resin 7 (a side surface 74 described later) toward the y2 side in the y direction. The number of second leads 4 is not limited. Some of the second leads 4 may be electrically connected to the first lead 3. The conductive support member 2 may include a second lead 4 that is not electrically connected to any of the first leads.

[0027] Each second lead 4 includes a pad portion 41 and a terminal portion 42. The terminal portion 42 has an elongated rectangular shape when viewed in the z direction and extends along the y direction, and includes a portion protruding from the sealing resin 7 and a portion covered by the sealing resin 7. As shown in FIGS. 7 to 9, the portion of the terminal portion 42 protruding from the sealing resin 7 is bent into a gull-wing shape. The portion of the terminal portion 42 protruding from the sealing resin 7 may be plated. A plating layer formed by the plating process is made of an alloy containing Sn, such as solder, and covers the portion protruding from the sealing resin 7. When the semiconductor device A10 is surface-mounted on a wiring board by soldering, the plating layer improves the adhesion of solder to the protruding portion and prevents erosion of the protruding portion caused by soldering.

[0028] The pads 41 are connected to the portions of the terminals 42 that are covered with the sealing resin 7. The shape of the pads 41 as viewed in the z direction is not limited, but in this embodiment, the pads 41 are rectangular and elongated in the x direction. The upper surface of the pads 41 (the surface facing the z2 side) is substantially flat, and the wires 61 to 63 are bonded to the upper surface of the pads 41. The upper surface of the pads 41 may be plated. A plating layer formed by the plating is made of a metal containing Ag, for example, and covers the upper surface of the pads 41. The plating layer protects the lead frame from impact during wire bonding of the wires 61 to 63 while increasing the bonding strength of the wires 61 to 63. The pads 41 are entirely covered with the sealing resin 7. As shown in FIG. 2, the pads 41 are located at the same position as the parallel portion 362 of the fixed portion 36 of the first lead 3 and the parallel portion 372 of the fixed portion 37 in the z direction, and are located on the z2 side of the first die pad 31, the second die pad 32, and the third die pad 33 in the z direction.

[0029] The first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 are elements that are central to the function of the semiconductor device A10.

[0030] The first semiconductor element 11 is a switching element, and in this embodiment, is a power MOSFET (metal-oxide-semiconductor field-effect transistor). The first semiconductor element 11 may be another transistor such as an IGBT (insulated gate bipolar transistor) or a HEMT (high electron mobility transistor), and the type and internal structure of the first semiconductor element 11 are not limited.

[0031] 7 and 10, the first semiconductor element 11 has an element main surface 111 and an element back surface 112. The element main surface 111 and the element back surface 112 are spaced apart in the z direction. The element main surface 111 faces the z2 side, and the element back surface 112 faces the z1 side. A source electrode and a gate electrode (not shown) are arranged on the element main surface 111. A drain electrode (not shown) is arranged on the element back surface 112.

[0032] As shown in FIG. 3, FIG. 7, and FIG. 10, the first semiconductor element 11 is mounted at the center of the main surface 311 of the first die pad 31 via a bonding layer 691. That is, the bonding layer 691 is interposed between the main surface 311 and the first semiconductor element 11. In this embodiment, the bonding layer 691 has electrical conductivity and is, for example, solder. The bonding layer 691 may be a solidified metal paste such as silver paste, or a sintered metal such as sintered silver. The element back surface 112 of the first semiconductor element 11 is bonded to the metal layer 65 arranged on the main surface 311 by the bonding layer 691. The drain electrode of the first semiconductor element 11 is conductively connected to the first die pad 31 via the bonding layer 691 and the metal layer 65. As a result, the first die pad 31 (first lead 3) is conductively connected to the drain electrode of the first semiconductor element 11 and functions as a drain terminal.

[0033] A source electrode (not shown) of the first semiconductor element 11 is conductively connected to the second lead 4 via a wire 61 as shown in FIG. 3. As a result, the second lead 4 that is conductive to the source electrode functions as a source terminal or a sense source terminal. The sense source terminal is a terminal for detecting the potential of the source electrode. In addition, a gate electrode (not shown) of the first semiconductor element 11 is conductively connected to the second semiconductor element 12 via a wire 642 as shown in FIG. 3. A drive signal is input to the gate electrode from the second semiconductor element 12 via the wire 642.

[0034] The second semiconductor element 12 is a drive element for driving the first semiconductor element 11. The second semiconductor element 12 generates a drive signal based on a control signal input from the outside, and outputs the drive signal to the first semiconductor element 11.

[0035] As shown in Figs. 8 and 10, the second semiconductor element 12 has an element main surface 121 and an element back surface 122. The element main surface 121 and the element back surface 122 are spaced apart in the z direction. The element main surface 121 faces the z2 side, and the element back surface 122 faces the z1 side. A plurality of electrodes (not shown) are arranged on the element main surface 121. The plurality of electrodes include, for example, a power electrode to which a voltage is supplied, a ground electrode, an input electrode to which a control signal is input, and an output electrode to which a generated drive signal is output. Note that the electrodes are not limited to these. No electrodes are arranged on the element back surface 122.

[0036] As shown in FIG. 3, FIG. 8, and FIG. 10, the second semiconductor element 12 is mounted at the center of the main surface 321 of the second die pad 32 via a bonding layer 692. That is, the bonding layer 692 is interposed between the main surface 321 and the second semiconductor element 12. In this embodiment, the bonding layer 692 is, for example, solder. The bonding layer 692 may be a solidified metal paste, a sintered metal, or an insulating bonding layer. The element back surface 122 of the second semiconductor element 12 is bonded to the metal layer 66 arranged on the main surface 321 by the bonding layer 692. Each electrode (not shown) of the second semiconductor element 12 is conductively connected to the second lead 4 via the wire 62 as shown in FIG. 3. The second lead 4 that is conductive to the power electrode functions as a power terminal, the second lead 4 that is conductive to the ground electrode functions as a ground terminal, and the second lead 4 that is conductive to the input electrode functions as an input terminal. 3, an output electrode of the second semiconductor element 12 is conductively connected to a gate electrode of the first semiconductor element 11 via a wire 642. The second semiconductor element 12 outputs a generated drive signal from the output electrode and inputs the signal to the gate electrode of the first semiconductor element 11 via the wire 642. One of the electrodes of the second semiconductor element 12 is conductively connected to the third semiconductor element 13 via a wire 641 as shown in FIG.

[0037] The third semiconductor element 13 is an element for adding added value to the semiconductor device A 10. The third semiconductor element 13 may be, for example, an element for suppressing power supply noise. The function added by the third semiconductor element 13 is not limited.

[0038] 9 and 10, the third semiconductor element 13 has an element main surface 131 and an element back surface 132. The element main surface 131 and the element back surface 132 are spaced apart in the z direction. The element main surface 131 faces the z2 side, and the element back surface 132 faces the z1 side. A plurality of electrodes (not shown) are arranged on the element main surface 131. The plurality of electrodes include, for example, a power supply electrode to which a voltage is supplied, a ground electrode, an input / output electrode, and the like. Note that the electrodes are not limited to these. No electrodes are arranged on the element back surface 132.

[0039] As shown in FIG. 3, FIG. 9, and FIG. 10, the third semiconductor element 13 is mounted at the center of the main surface 331 of the third die pad 33 via a bonding layer 693. That is, the bonding layer 693 is interposed between the main surface 331 and the third semiconductor element 13. In this embodiment, the bonding layer 693 is, for example, solder. The bonding layer 693 may be a solidified metal paste, a sintered metal, or an insulating bonding layer. The element back surface 132 of the third semiconductor element 13 is bonded to the metal layer 67 arranged on the main surface 331 by the bonding layer 693. Each electrode (not shown) of the third semiconductor element 13 is conductively connected to the second lead 4 via the wire 63 as shown in FIG. 3. The second lead 4 that is conductive to the power electrode functions as a power terminal, and the second lead 4 that is conductive to the ground electrode functions as a ground terminal. 3, any one of the electrodes (not shown) of the third semiconductor element 13 is conductively connected to any one of the electrodes (not shown) of the second semiconductor element 12 via a wire 641. Note that a plurality of mutually different electrodes of the third semiconductor element 13 may be connected to a plurality of mutually different electrodes of the second semiconductor element 12 via mutually different wires 641, respectively.

[0040] 3, the wires 61, 62, 63, 641, and 642, together with the conductive support member 2, form a conductive path for the first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 to perform predetermined functions. The material of each of the wires 61, 62, 63, 641, and 642 is a metal containing, for example, Au, Ag, Cu, or Al. The material of the wires 61, 62, 63, 641, and 642 is not limited. Also, instead of the wires 61, 62, 63, 641, and 642, a metal plate or a metal ribbon may be used.

[0041] The plurality of wires 61 form a conductive path between the first semiconductor element 11 and the plurality of second leads 4. Each of the plurality of wires 61 is joined to any of the electrodes of the first semiconductor element 11 and the pad portion 41 of any of the second leads 4. The number of wires 61 connecting each electrode and each of the second leads 4 is not limited. Each of the plurality of wires 62 is joined to any of the electrodes of the second semiconductor element 12 and the pad portion 41 of any of the second leads 4. The number of wires 62 connecting each electrode and each of the second leads 4 is not limited. The plurality of wires 63 form a conductive path between the third semiconductor element 13 and the plurality of second leads 4. Each of the plurality of wires 63 is joined to any of the electrodes of the third semiconductor element 13 and the pad portion 41 of any of the second leads 4. The number of wires 63 connecting each electrode and each of the second leads 4 is not limited. Wire 642 is joined to the gate electrode of first semiconductor element 11 and the output electrode of second semiconductor element 12, and forms a conductive path for inputting a drive signal output from the output electrode of second semiconductor element 12 to the gate electrode of first semiconductor element 11. The number of wires 642 is not limited. Wire 641 is joined to any electrode of second semiconductor element 12 and any electrode of third semiconductor element 13, and forms a conductive path for inputting and outputting signals between second semiconductor element 12 and third semiconductor element 13. The number of wires 641 is not limited.

[0042] The sealing resin 7 covers the first semiconductor element 11, the second semiconductor element 12, the third semiconductor element 13, and the wires 61, 62, 63, 641, 642, as well as a portion of each of the first lead 3 and the multiple second leads 4. The sealing resin 7 has electrical insulation properties. The sealing resin 7 is made of a material containing, for example, a black epoxy resin. When viewed in the z direction, the sealing resin 7 has a rectangular shape that is long in the x direction. The sealing resin 7 has a top surface 71, a bottom surface 72, and side surfaces 73 to 76.

[0043] The top surface 71 and the bottom surface 72 are located apart from each other in the z direction. The top surface 71 and the bottom surface 72 face opposite each other in the z direction. The top surface 71 is located on the z2 side in the z direction and faces the z2 side in the z direction, similar to the main surface 311 of the first die pad 31. The bottom surface 72 is located on the z1 side in the z direction and faces the z1 side in the z direction, similar to the back surface 312 of the first die pad 31. Each of the top surface 71 and the bottom surface 72 is approximately flat. As shown in FIG. 4, the back surface 312 of the first die pad 31 of the first lead 3 is exposed from the bottom surface 72. The bottom surface 72 and the back surface 312 are flush with each other.

[0044] Each of the side surfaces 73 to 76 is connected to the top surface 71 and the bottom surface 72, and is sandwiched between the top surface 71 and the bottom surface 72 in the z direction. The side surface 73 and the side surface 74 are located apart from each other in the y direction. The side surface 73 and the side surface 74 face opposite sides to each other in the y direction. The side surface 73 is located on the y1 side in the y direction, and the side surface 74 is located on the y2 side in the y direction. The side surface 75 and the side surface 76 are located apart from each other in the x direction, and are connected to the side surfaces 73 and 74. The side surface 75 and the side surface 76 face opposite sides to each other in the x direction. The side surface 75 is located on the x1 side in the x direction, and the side surface 76 is located on the x2 side in the x direction. A part of the terminal portion 42 of the plurality of second leads 4 protrudes from the side surface 73. A part of the terminal portion 42 of the plurality of second leads 4 protrudes from the side surface 74. 1 and 10, an end face 371 of the fixed portion 37 of the first lead 3 is exposed from the side surface 75. Also, as shown in Fig. 10, an end face 361 of the fixed portion 36 of the first lead 3 is exposed from the side surface 76.

[0045] Next, an example of a method for manufacturing the semiconductor device A10 will be described.

[0046] First, a lead frame is prepared. The lead frame is a plate-shaped material. In this embodiment, the base material of the lead frame is made of a Cu alloy. The lead frame is formed by performing an etching process or the like on a metal plate. The lead frame may be formed by performing a punching process on a metal plate. The lead frame includes a frame-shaped frame and a plurality of tie bars connecting the conductive support member 2 and the frame in addition to a portion that becomes the conductive support member 2 (the first lead 3 and the plurality of second leads 4). The frame and the tie bars do not constitute the semiconductor device A10. The lead frame includes an elongated rectangular portion (hereinafter referred to as an "elongated rectangular portion") that becomes the first die pad 31, the second die pad 32, the third die pad 33, the first connecting portion 34, and the second connecting portion 35 of the first lead 3.

[0047] Next, the lead frame is subjected to a depression process. In this embodiment, two depression processes are performed. The lead frame is deformed by the first depression process so that the long rectangular portion is located on the z-direction z1 side of the frame. At this time, the portion connected to the long rectangular portion and the frame is deformed to form the fixing portion 36 and the fixing portion 37. Next, the long rectangular portion is deformed by the second depression process. As a result, the second die pad 32 and the third die pad 33, the first die pad 31 located on the z-direction z1 side with respect to them, the first connecting portion 34 connected to the first die pad 31 and the second die pad 32, and the second connecting portion 35 connected to the first die pad 31 and the third die pad 33 are formed. Note that the long rectangular portion may be deformed into the first die pad 31, the second die pad 32, the third die pad 33, the first connecting portion 34, and the second connecting portion 35 by one depression process.

[0048] Next, a metal layer 65 is formed on the main surface 311 of the first die pad 31, for example, by plating. A metal layer 66 is formed on the main surface 321 of the second die pad 32, for example, by plating. A metal layer 67 is formed on the main surface 331 of the third die pad 33, for example, by plating.

[0049] Next, the first semiconductor element 11 is bonded to the metal layer 65 formed on the main surface 311 of the first die pad 31 via a bonding layer 691. The second semiconductor element 12 is bonded to the metal layer 66 formed on the main surface 321 of the second die pad 32 via a bonding layer 692, and the third semiconductor element 13 is bonded to the metal layer 67 formed on the main surface 331 of the third die pad 33 via a bonding layer 693. In this bonding process, first, the solder paste that becomes the bonding layers 691 to 693 is applied to the center of each of the metal layers 65 to 67. Next, the first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 are placed on the applied solder paste. Next, a reflow process is performed to melt the solder paste and then solidify it. Since the metal layers 65 to 67 have better solder wettability than the lead frame, the molten solder paste is prevented from flowing beyond the boundary between the metal layers 65 to 67 and the lead frame.

[0050] Next, the wires 61, 62, 63, 641, and 642 are formed by wire bonding. Next, the sealing resin 7 is formed. The sealing resin 7 is formed, for example, by transfer molding. Next, dicing is performed to separate the first lead 3 and the multiple second leads 4 that were connected to each other by the frame and the multiple tie bars, and the first lead 3 and the multiple second leads 4 are appropriately separated. Next, the portions of the multiple second leads 4 that protrude from the sealing resin 7 are bent. By going through the steps described above, the semiconductor device A10 is manufactured.

[0051] Next, the effects of the semiconductor device A10 will be described.

[0052] According to this embodiment, the first lead 3 includes a first die pad 31, a second die pad 32, and a third die pad 33. The second die pad 32 and the third die pad 33 are arranged side by side with the first die pad 31 in the x direction, but are arranged at positions different from the first die pad 31 in the z direction. The first semiconductor element 11 is mounted on a main surface 311 of the first die pad 31, the second semiconductor element 12 is mounted on a main surface 321 of the second die pad 32, and the third semiconductor element 13 is mounted on a main surface 331 of the third die pad 33. Therefore, the first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 are mounted side by side with the first die pad 31 in the x direction on a common first lead 3, but are arranged at positions different from each other in the z direction. As a result, the semiconductor device A10 can prevent the first semiconductor element 11 from being mounted in contact with the second semiconductor element 12 or the third semiconductor element 13, as compared to a case where the first semiconductor element 11 is disposed at the same position in the z direction as the second semiconductor element 12 and the third semiconductor element 13. The first semiconductor element 11 is mounted on the main surface 311 of the first die pad 31 via a bonding layer 691. The second semiconductor element 12 is mounted on the main surface 321 of the second die pad 32 via a bonding layer 692, and the third semiconductor element 13 is mounted on the main surface 331 of the third die pad 33 via a bonding layer 693. The semiconductor device A10 can also prevent the bonding layer 691 from contacting the bonding layer 692 or the bonding layer 693, as compared to a case where the first die pad 31 is disposed at a different position in the z direction from the second die pad 32 and the third die pad 33.

[0053] Moreover, according to the present embodiment, the second die pad 32 and the third die pad 33 are disposed at the same position in the z direction. Therefore, the position in the z direction of the element main surface 121 of the second semiconductor element 12 mounted on the second die pad 32 and the element main surface 131 of the third semiconductor element 13 mounted on the third die pad 33 becomes closer to each other than when they are disposed at different positions in the z direction. This makes it easier to form the wire 641 connecting the second semiconductor element 12 and the third semiconductor element 13, and suppresses the occurrence of defects in the wire 641. Furthermore, the first die pad 31 is disposed on the z1 side of the second die pad 32 and the third die pad 33 in the z direction. Therefore, it is possible to suppress the first semiconductor element 11 mounted on the first die pad 31 from interfering with the wire 641. As a result, the semiconductor device A10 can suppress the loop height of the wire 641 compared to when the first die pad 31 is disposed at the same position in the z direction as the second die pad 32 and the third die pad 33.

[0054] Furthermore, in this embodiment, the back surface 312 of the first die pad 31 is exposed from the bottom surface 72 of the sealing resin 7. The back surface 312 is joined to the wiring board when the semiconductor device A10 is mounted on the wiring board. Therefore, heat generated by the first semiconductor element 11 is dissipated from the back surface 312 to the wiring board. This allows the semiconductor device A10 to appropriately dissipate the heat of the first semiconductor element 11.

[0055] Moreover, according to this embodiment, a metal layer 66 is interposed between the main surface 321 of the second die pad 32 and the second semiconductor element 12. The metal layer 66 is formed of a material having better solder wettability than the material of the second die pad 32. Therefore, the melted solder paste during manufacturing is prevented from flowing over the boundary between the metal layer 66 and the main surface 321. This allows the semiconductor device A10 to prevent the melted solder paste from flowing over the main surface 341 of the first coupling portion 34. Moreover, according to this embodiment, a metal layer 67 is interposed between the main surface 331 of the third die pad 33 and the third semiconductor element 13. The metal layer 67 is formed of a material having better solder wettability than the material of the third die pad 33. Therefore, the melted solder paste during manufacturing is prevented from flowing over the boundary between the metal layer 67 and the main surface 331. This allows the semiconductor device A10 to prevent the melted solder paste from flowing over the main surface 351 of the second coupling portion 35. Moreover, in this embodiment, a metal layer 65 is interposed between the main surface 311 of the first die pad 31 and the first semiconductor element 11. The metal layer 65 is made of a material having better solder wettability than the material of the first die pad 31. Therefore, the semiconductor device A10 can prevent the solder paste melted during manufacturing from flowing beyond the boundary between the metal layer 65 and the main surface 311.

[0056] In the present embodiment, the case where the metal layer 65 is disposed at the center of the main surface 311 so as to be included in the main surface 311 when viewed in the z direction has been described, but the present embodiment is not limited thereto. The shape of the metal layer 65 is not limited thereto, and the metal layer 65 may not be included in the main surface 311. For example, the metal layer 65 may cover the entire main surface 311. Furthermore, the metal layer 65 may not be disposed. In the present embodiment, the case where the metal layer 66 is disposed at the center of the main surface 321 so as to be included in the main surface 321 when viewed in the z direction has been described, but the present embodiment is not limited thereto. The shape of the metal layer 66 is not limited thereto, and the metal layer 66 may not be included in the main surface 321. For example, the metal layer 66 may cover the entire main surface 321. Furthermore, the metal layer 66 may not be disposed. In the present embodiment, the case where the metal layer 67 is disposed at the center of the main surface 331 so as to be included in the main surface 331 when viewed in the z direction has been described, but the present embodiment is not limited thereto. The shape of the metal layer 67 is not limited, and the metal layer 67 does not have to be included in the main surface 331. For example, the metal layer 67 may cover the entire main surface 331. Moreover, the metal layer 67 does not have to be disposed.

[0057] In addition, in the present embodiment, the case where the back surface 312 of the first die pad 31 is exposed from the bottom surface 72 of the sealing resin 7 has been described, but this is not limited thereto. The back surface 312 does not have to be exposed from the bottom surface 72 of the sealing resin 7.

[0058] In the present embodiment, the semiconductor device A10 is packaged in a small outline package (SOP), but the package format of the semiconductor device A10 is not limited to the SOP.

[0059] In the present embodiment, the case has been described in which only the first semiconductor element 11 is mounted on the first die pad 31, only the second semiconductor element 12 is mounted on the second die pad 32, and only the third semiconductor element 13 is mounted on the third die pad 33, but this is not limiting. The first die pad 31 may further have another semiconductor element or electronic component mounted thereon, or the first semiconductor element 11 may not be mounted thereon. The second die pad 32 may further have another semiconductor element or electronic component mounted thereon, or the second semiconductor element 12 may not be mounted thereon. The third die pad 33 may further have another semiconductor element or electronic component mounted thereon, or the third semiconductor element 13 may not be mounted thereon.

[0060] Moreover, the first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 are not limited to the semiconductor elements described above. The first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 may be electronic components other than semiconductor elements.

[0061] 11 to 26 show other embodiments of the present disclosure. In these figures, elements that are the same as or similar to those in the above embodiment are denoted by the same reference numerals as those in the above embodiment.

[0062] <Second embodiment> 11 to 13 are diagrams for explaining a semiconductor device A20 according to a second embodiment of the present disclosure. FIG. 11 is a plan view showing the semiconductor device A20, and corresponds to FIG. 3. In FIG. 11, for ease of understanding, the outer shape of the sealing resin 7 is shown by an imaginary line (two-dot chain line) through the sealing resin 7. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 11, and corresponds to FIG. 10. FIG. 13 is a partially enlarged view of FIG. 12. The semiconductor device A20 of this embodiment differs from the first embodiment in that the first connecting portion 34 and the second connecting portion 35 are provided with grooves. The configuration and operation of the other parts of this embodiment are similar to those of the first embodiment. Note that the parts of the first embodiment may be combined in any combination.

[0063] In this embodiment, the first connecting portion 34 includes a groove portion 343, and the second connecting portion 35 includes a groove portion 353. In Fig. 11, the groove portion 343 and the groove portion 353 are hatched for ease of understanding.

[0064] The groove 343 is disposed near the center in the x direction of the main surface 341 of the first connecting portion 34. The groove 343 is recessed from the main surface 341 of the first connecting portion 34 toward the back surface 342 side and extends along the y direction. In this embodiment, the groove 343 extends to both ends of the main surface 341 in the y direction. As shown in FIG. 13, the shape of the groove 343 as viewed in the y direction is substantially rectangular. The shape of the groove 343 as viewed in the y direction is not limited, and may be, for example, a semicircular shape. The groove 343 is formed, for example, by half etching when producing a lead frame. The method of forming the groove 343 is not limited. The groove 343 may be formed so as to be recessed from the main surface 341 by stamping, for example.

[0065] The groove 343 is provided to prevent the flow of the molten solder paste during the reflow process in the manufacturing process. The solder paste for joining the second semiconductor element 12 to the lead frame is melted by the reflow process. At this time, the molten solder paste may flow beyond the boundary between the metal layer 66 and the lead frame, and flow from the main surface 321 of the second die pad 32 onto the main surface 341 of the first coupling portion 34. The groove 343 is provided to prevent the molten solder paste that has flowed onto the main surface 341 of the first coupling portion 34 from flowing to the main surface 311 of the first die pad 31.

[0066] The depth dimension (dimension in a direction perpendicular to the main surface 341) T2 of the groove portion 343 is about 1 / 3 of the thickness dimension (dimension in a direction perpendicular to the main surface 341) T1 of the first connecting portion 34. If the dimension T2 is too large, the strength of the first connecting portion 34 is weakened. On the other hand, if the dimension T2 is too small, the flow inhibition function of the molten solder paste is reduced. It is desirable that the dimension T2 be 1 / 4 or more and 1 / 2 or less of the dimension T1. Note that the dimension T2 is not limited. The dimension T2 may be appropriately determined depending on the dimension T1 of the first connecting portion 34, the strength of the first connecting portion 34, the position of the second semiconductor element 12 on the second die pad 32, the amount of solder paste to be applied, and the like.

[0067] The groove portion 343 only needs to be able to inhibit the flow of the molten solder paste. The groove portion 343 does not have to extend to both ends of the main surface 341 in the y direction. The groove portion 343 may be a broken-line groove in which multiple grooves extending in the y direction are arranged in the y direction. The groove portion 343 may not extend in a straight line, but may be, for example, curved. The arrangement position of the groove portion 343 is not limited to near the center of the main surface 341 in the x direction. Multiple groove portions 343 may be arranged side by side in the x direction.

[0068] The groove 353 is disposed near the center of the main surface 351 of the second connecting portion 35 in the x direction. The groove 353 is recessed from the main surface 351 of the second connecting portion 35 toward the back surface 352 side and extends along the y direction. In this embodiment, the groove 353 extends to both ends of the main surface 351 in the y direction. The shape of the groove 353 as viewed in the y direction is substantially rectangular. The groove 353 is formed in the same manner as the groove 343. Note that the method of forming the groove 353 is not limited. The depth dimension (dimension in a direction perpendicular to the main surface 341) of the groove 353 is not limited, but like the groove 343, it is desirably 1 / 4 to 1 / 2 of the thickness dimension (dimension in a direction perpendicular to the main surface 351) of the second connecting portion 35, and is about 1 / 3 in this embodiment.

[0069] Like groove portion 343, groove portion 353 is provided to inhibit the flow of molten solder paste during reflow processing in the manufacturing process. That is, groove portion 353 inhibits the molten solder paste from flowing to main surface 311 of first die pad 31 even if the molten solder paste flows beyond the boundary between metal layer 67 and the lead frame and flows from main surface 331 of third die pad 33 onto main surface 351 of second coupling portion 35. Since groove portion 353 only needs to inhibit the flow of molten solder paste, similar to groove portion 343, various variations are possible.

[0070] In this embodiment as well, the second die pad 32 and the third die pad 33 are disposed at positions different from the first die pad 31 in the z direction, so that the first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 are disposed at positions different from each other in the z direction. This makes it possible for the semiconductor device A20 to prevent the first semiconductor element 11 from being mounted in a state of contact with the second semiconductor element 12 or the third semiconductor element 13. The semiconductor device A20 can also prevent the bonding layer 691 from contacting the bonding layer 692 or the bonding layer 693. In this embodiment as well, the metal layer 66 is interposed between the main surface 321 of the second die pad 32 and the second semiconductor element 12. Therefore, the semiconductor device A20 can prevent the solder paste melted during manufacturing from flowing over the boundary between the metal layer 66 and the main surface 321 and onto the main surface 341 of the first coupling portion 34. In addition, the metal layer 67 is interposed between the main surfaces 331 and 13 of the third die pad 33. Therefore, the semiconductor device A20 can prevent the solder paste melted during manufacturing from crossing the boundary between the metal layer 67 and the main surface 331 and flowing onto the main surface 351 of the second coupling portion 35. Furthermore, the semiconductor device A20 has a common configuration with the semiconductor device A10, and thus provides the same effects as the semiconductor device A10.

[0071] Further, according to the present embodiment, the first connecting portion 34 includes a groove portion 343. The groove portion 343 can prevent the solder paste melted during manufacturing from flowing to the main surface 311 of the first die pad 31 even if the solder paste flows from the main surface 321 of the second die pad 32 to the main surface 341 of the first connecting portion 34. Furthermore, the second connecting portion 35 includes a groove portion 353. The groove portion 353 can prevent the solder paste melted during manufacturing from flowing to the main surface 311 of the first die pad 31 even if the solder paste flows from the main surface 331 of the third die pad 33 to the main surface 351 of the second connecting portion 35. Therefore, the solder paste for bonding the first semiconductor element 11 is prevented from increasing due to the addition of a part of the solder paste for bonding the second semiconductor element 12 or the third semiconductor element 13. This can prevent the semiconductor device A20 from moving the first semiconductor element 11 due to the increased amount of solder paste, causing misalignment.

[0072] In the present embodiment, the first coupling portion 34 includes the groove portion 343, and the second coupling portion 35 includes the groove portion 353, but this is not limited to the above. In the semiconductor device A20, the second coupling portion 35 does not need to include the groove portion 353, and the first coupling portion 34 does not need to include the groove portion 343.

[0073] In the present embodiment, the bonding layers 691-693 are solder, but the present invention is not limited to this. The bonding layers 691-693 may be a solidified metal paste such as silver paste, a sintered metal such as sintered silver, or an insulating bonding layer. Even in these cases, some components contained in the material of the bonding layers 691-693 may flow out during the reflow process for forming the bonding layers 691-693. The groove 343 can prevent the fluid from flowing on the main surface 341 of the first connecting portion 34, and the groove 353 can prevent the fluid from flowing on the main surface 351 of the second connecting portion 35.

[0074] <First Modification> Figures 14 and 15 are diagrams for explaining a semiconductor device A21 according to a first modified example of the second embodiment. Figure 14 is a cross-sectional view showing the semiconductor device A21, and corresponds to Figure 12. Figure 15 is a partially enlarged view of Figure 14. The semiconductor device A21 of this modified example differs from the semiconductor device A20 in that the first coupling portion 34 has a metal layer instead of the groove portion 343, and the second coupling portion 35 has a metal layer instead of the groove portion 353.

[0075] In this modification, the first connecting portion 34 includes a metal layer 344 instead of the groove 343, and the second connecting portion 35 includes a metal layer 354 instead of the groove 353. The metal layer 344 is disposed near the center in the x direction of the main surface 341 of the first connecting portion 34. The metal layer 344 protrudes from the main surface 341 of the first connecting portion 34 and extends along the y direction. In this embodiment, the metal layer 344 extends to both ends of the main surface 341 in the y direction. As shown in FIG. 15, the shape of the metal layer 344 as viewed in the y direction is substantially rectangular. The shape of the metal layer 344 as viewed in the y direction is not limited.

[0076] The metal layer 344 is a plating layer formed by, for example, a plating process. The metal layer 344 may be formed by other methods. The material of the metal layer 344 is a material having a lower solder wettability than the material of the first connecting portion 34. The material of the metal layer 344 may be, for example, Al (aluminum). For example, if the material of the first die pad 31 is Cu, the metal layer 344 may be a Cu alloy having a lower solder wettability than Cu. The metal layer 344 is not limited to a single layer, and may be a laminate of multiple metal layers. The metal layer 344 is provided to hinder the flow of the molten solder paste during the reflow process in the manufacturing process, similar to the groove portion 343. The metal layer 344 is formed of a material having a lower solder wettability than the material of the first connecting portion 34, so that the flow of the molten solder paste can be hindered. Note that, as long as the height dimension of metal layer 344 (the dimension in the direction perpendicular to main surface 341) can be formed sufficiently high and the height can hinder flow, the material of metal layer 344 is not limited.

[0077] The metal layer 344 only needs to be able to inhibit the flow of the molten solder paste. The metal layer 344 does not have to extend to both ends of the main surface 341 in the y direction. The metal layer 344 may be a dashed-line plating layer in which a plurality of plating layers extending in the y direction are arranged in the y direction. The metal layer 344 may not extend in a straight line, but may be, for example, curved. The position of the metal layer 344 is not limited to near the center of the main surface 341 in the x direction. A plurality of metal layers 344 may be arranged side by side in the x direction.

[0078] The metal layer 354 is disposed near the center of the main surface 351 of the second connecting portion 35 in the x direction. The metal layer 354 protrudes from the main surface 351 of the second connecting portion 35 and extends along the y direction. In this embodiment, the metal layer 354 extends to both ends of the main surface 351 in the y direction. The shape of the metal layer 354 as viewed in the y direction is substantially rectangular. The metal layer 354 is a plating layer formed by, for example, a plating process, and is formed in the same manner as the metal layer 344. The method of forming the metal layer 354 is not limited. The metal layer 354 is made of the same material as the metal layer 344. The metal layer 354 is provided to hinder the flow of the molten solder paste during the reflow process in the manufacturing process, similar to the metal layer 344. Since the metal layer 354 only needs to hinder the flow of the molten solder paste, various variations are possible, similar to the metal layer 344.

[0079] The semiconductor device A21 can achieve the same effects as the semiconductor device A20. Note that in the semiconductor device A21, the second coupling portion 35 does not need to include the metal layer 354, and the first coupling portion 34 does not need to include the metal layer 344.

[0080] <Second Modification> Figures 16 and 17 are diagrams for explaining a semiconductor device A22 according to a second modified example of the second embodiment. Figure 16 is a cross-sectional view showing the semiconductor device A22, and corresponds to Figure 12. Figure 17 is a partially enlarged view of Figure 16. The semiconductor device A22 of this modified example differs from the semiconductor device A20 in that the first coupling portion 34 includes a paste layer instead of the groove portion 343, and the second coupling portion 35 includes a paste layer instead of the groove portion 353.

[0081] In this modification, the first connecting portion 34 includes a paste layer 345 instead of the groove portion 343, and the second connecting portion 35 includes a paste layer 355 instead of the groove portion 353. The paste layer 345 is disposed near the center in the x direction of the main surface 341 of the first connecting portion 34. The paste layer 345 protrudes from the main surface 341 of the first connecting portion 34 and extends along the y direction. In this embodiment, the paste layer 345 extends to both ends of the main surface 341 in the y direction. As shown in FIG. 17, the shape of the paste layer 345 as viewed in the y direction is substantially rectangular. The shape of the paste layer 345 as viewed in the y direction is not limited. It is desirable that the height dimension T3 of the paste layer 345 (the dimension in the direction perpendicular to the main surface 341) is 20 μm or more. The dimension T3 is not limited.

[0082] The paste layer 345 is formed, for example, by applying an insulating paste to the main surface 341 of the first connecting portion 34 and solidifying it. The paste layer 345 may be formed by applying a conductive paste to the main surface 341 of the first connecting portion 34 and solidifying it. The paste layer 345 may also be formed by other methods. For example, the paste layer 345 may be formed by attaching a die attach film to the main surface 341. The material of the paste layer 345 may be any material that can withstand the heat of the reflow process. The paste layer 345, like the groove portion 343, is provided to hinder the flow of the molten solder paste during the reflow process in the manufacturing process.

[0083] It is sufficient that the paste layer 345 is capable of preventing the flow of the molten solder paste. The paste layer 345 does not have to extend to both ends of the main surface 341 in the y direction. The paste layer 345 may be in the form of a broken line in which a plurality of layers extending in the y direction are arranged in the y direction. The paste layer 345 may not extend in a straight line, but may be, for example, in a curved shape. The position of the paste layer 345 is not limited to the vicinity of the center of the main surface 341 in the x direction. A plurality of paste layers 345 may be arranged side by side in the x direction.

[0084] The paste layer 355 is disposed near the center of the main surface 351 of the second connecting portion 35 in the x direction. The paste layer 355 protrudes from the main surface 351 of the second connecting portion 35 and extends along the y direction. In this embodiment, the paste layer 355 extends to both ends of the main surface 351 in the y direction. The shape of the paste layer 355 as viewed in the y direction is substantially rectangular. The height dimension of the paste layer 355 (the dimension in the direction perpendicular to the main surface 351) is not limited, but is desirably 20 μm or more. The paste layer 355 is formed in the same manner as the paste layer 345 using the same material as the paste layer 345. The paste layer 355 is provided to hinder the flow of the molten solder paste during the reflow process in the manufacturing process, similar to the paste layer 345. Since the paste layer 355 only needs to hinder the flow of the molten solder paste, various variations are possible, similar to the paste layer 345.

[0085] The semiconductor device A22 can achieve the same effects as the semiconductor device A20. Note that in the semiconductor device A22, the second coupling portion 35 does not need to include the paste layer 355, and the first coupling portion 34 does not need to include the paste layer 345.

[0086] <Third embodiment> 18 to 20 are diagrams for explaining a semiconductor device A30 according to a third embodiment of the present disclosure. FIG. 18 is a bottom view showing the semiconductor device A30, and corresponds to FIG. 4. FIG. 19 is a cross-sectional view showing the semiconductor device A30, and corresponds to FIG. 8. FIG. 20 is a cross-sectional view showing the semiconductor device A30, and corresponds to FIG. 10. The semiconductor device A30 of this embodiment is different from the first embodiment in that it further includes a heat transfer member. The configuration and operation of other parts of this embodiment are similar to those of the first embodiment. Note that the parts of the first and second embodiments may be combined in any combination.

[0087] In this embodiment, the first semiconductor element 11 and the second semiconductor element 12 are switching elements, and the third semiconductor element 13 is a driving element that drives the first semiconductor element 11 and the second semiconductor element 12. The type and internal structure of the first semiconductor element 11 and the second semiconductor element 12 are not limited. The first semiconductor element 11 and the second semiconductor element 12 may be the same type of switching element or different types of switching elements. For example, the first semiconductor element 11 and the second semiconductor element 12 may be a switching element (power MOSFET) similar to the first semiconductor element 11 of the first embodiment. In this case, each drain electrode has the same potential. The first semiconductor element 11 may be a switching element (power MOSFET) similar to the first semiconductor element 11 of the first embodiment, and the second semiconductor element 12 may be a transistor with a horizontal structure that does not have an electrode on the element back surface 122. The first semiconductor element 11 and the second semiconductor element 12, which are switching elements, generate more heat than the third semiconductor element 13, which is a driving element.

[0088] In the present embodiment, the semiconductor device A30 further includes a heat transfer member 5. The heat transfer member 5 is an electrical conductor, and is made of, for example, Cu. The material of the heat transfer member 5 is not limited, and may be any material having high thermal conductivity. The heat transfer member 5 has a substantially rectangular parallelepiped shape and is disposed on the back surface 322 of the second die pad 32. The heat transfer member 5 includes a main surface 51 and a back surface 52. The main surface 51 and the back surface 52 are spaced apart in the z direction as shown in FIG. 19 and FIG. 20. The main surface 51 faces the z2 side, and the back surface 52 faces the z1 side. The main surface 51 and the back surface 52 are each substantially flat. The main surface 51 is in contact with the back surface 322 of the second die pad 32. A sheet having high thermal conductivity may be disposed between the main surface 51 of the heat transfer member 5 and the back surface 322 of the second die pad 32. As shown in FIG. 18, the back surface 52 is exposed from the bottom surface 72 of the sealing resin 7 to serve as a back surface terminal, and is joined to a wiring board on which the semiconductor device A30 is mounted.

[0089] 19, the heat transfer member 5 includes two engaging portions 53. The engaging portions 53 protrude in the z2 direction from both ends of the main surface 51 in the y direction and engage with the second die pad 32. The heat transfer member 5 is attached to the second die pad 32 by a crimping process. Specifically, the engaging portions 53 of the heat transfer member 5 are engaged with both ends of the second die pad 32 in the y direction from the back surface 322 side of the second die pad 32. Then, the heat transfer member 5 is attached by applying heat and crimping the main surface 51 to the back surface 322 of the second die pad 32 so that the main surface 51 is in close contact with the back surface 322 of the second die pad 32. The position, shape, and number of the engaging portions 53 are not limited. The method of attaching the heat transfer member 5 is not limited. For example, the second die pad 32 may be provided with a through hole, and the engaging portion 53 may be passed through the through hole, and then the tip portion may be crushed to attach the heat transfer member 5 to the second die pad 32. The heat transfer member 5 may be attached in any manner so long as it can transfer heat from the second die pad 32 appropriately.

[0090] In this embodiment as well, the second die pad 32 and the third die pad 33 are disposed at positions different from the first die pad 31 in the z direction, so that the first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 are disposed at positions different from each other in the z direction. This makes it possible for the semiconductor device A30 to prevent the first semiconductor element 11 from being mounted in a state of contact with the second semiconductor element 12 or the third semiconductor element 13. The semiconductor device A30 can also prevent the bonding layer 691 from contacting the bonding layer 692 or the bonding layer 693. In this embodiment as well, the rear surface 312 of the first die pad 31 is exposed from the bottom surface 72 of the sealing resin 7, so that the semiconductor device A30 can appropriately dissipate heat from the first semiconductor element 11. The semiconductor device A30 has a common configuration with the semiconductor device A10, and thus has the same effects as the semiconductor device A10.

[0091] Furthermore, according to this embodiment, the semiconductor device A30 includes a heat transfer member 5. The heat transfer member 5 is made of a material with high thermal conductivity, and the main surface 51 is in contact with the back surface 322 of the second die pad 32, and the back surface 52 is exposed from the sealing resin 7. The back surface 52 is joined to the wiring board when the semiconductor device A30 is mounted on the wiring board. Therefore, the heat generated by the second semiconductor element 12 is dissipated from the back surface 52 of the heat transfer member 5 to the wiring board via the second die pad 32. This allows the semiconductor device A30 to appropriately dissipate the heat of the second semiconductor element 12.

[0092] The first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 are not limited to the semiconductor elements described above. The first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 may be electronic components other than semiconductor elements.

[0093] <First Modification> Fig. 21 is a diagram for explaining a semiconductor device A31 according to a first modified example of the third embodiment. Fig. 21 is a cross-sectional view showing the semiconductor device A31, and corresponds to Fig. 19. The semiconductor device A31 of this modified example is different from the semiconductor device A30 in the method of attaching the heat transfer member 5.

[0094] In this modification, the heat transfer member 5 does not include the engagement portion 53, and the main surface 51 is bonded to the back surface 322 of the second die pad 32 via a conductive bonding material (not shown). The bonding material bonding the heat transfer member 5 and the second die pad 32 may be an insulating bonding material. Any bonding material may be used as long as it has high thermal conductivity. The method of bonding the heat transfer member 5 to the back surface 322 of the second die pad 32 may be ultrasonic bonding or spot welding. The semiconductor device A31 can also achieve the same effects as the semiconductor device A30.

[0095] <Second Modification> Fig. 22 is a diagram for explaining a semiconductor device A32 according to a second modified example of the third embodiment. Fig. 22 is a cross-sectional view showing the semiconductor device A32 and corresponds to Fig. 20. The semiconductor device A32 of this modified example differs from the semiconductor device A30 in that the heat transfer member 5 is also attached to the third die pad 33.

[0096] In this modification, the second semiconductor element 12 and the third semiconductor element 13 are switching elements, and the first semiconductor element 11 is a driving element that drives the second semiconductor element 12 and the third semiconductor element 13. The type and internal structure of the second semiconductor element 12 and the third semiconductor element 13 are not limited. The second semiconductor element 12 and the third semiconductor element 13 may be the same type of switching element or different types of switching elements. The second semiconductor element 12 and the third semiconductor element 13, which are switching elements, generate more heat than the first semiconductor element 11, which is a driving element. The second semiconductor element 12 and the third semiconductor element 13 are small in thickness dimension (dimension in the z direction), and are smaller in thickness dimension than the first semiconductor element 11, as shown in FIG. 22.

[0097] In this modification, the heat transfer member 5 is attached not only to the second die pad 32 but also to the third die pad 33. The heat transfer member 5 attached to the third die pad 33 is similar to the heat transfer member 5 attached to the second die pad 32.

[0098] The semiconductor device A32 can also achieve the same effect as the semiconductor device A30. Furthermore, in the semiconductor device A32, since the heat transfer member 5 is also attached to the third die pad 33, the heat generated by the third semiconductor element 13 can also be appropriately dissipated. Moreover, according to this modification, the second semiconductor element 12 and the third semiconductor element 13 have a smaller compression dimension than the first semiconductor element 11. Therefore, in a state where they are mounted on the first lead 3, the element main surface 111 of the first semiconductor element 11 is closer to the element main surface 121 of the second semiconductor element 12 and the element main surface 131 of the third semiconductor element 13 in the z direction than when they are mounted on the first lead 3, compared to when the compression dimensions are the same. This makes it easier to form the wire 643 connecting the first semiconductor element 11 and the second semiconductor element 12, and the wire 644 connecting the first semiconductor element 11 and the third semiconductor element 13, and thus suppresses the occurrence of defects in the wires 643 and 644. In the semiconductor device A32, the heat transfer member 5 may not be attached to the second die pad 32, and the heat transfer member 5 may be attached only to the third die pad 33.

[0099] In the third embodiment, the heat transfer member 5 is described as being an electrical conductor, but the present invention is not limited to this. The heat transfer member 5 may be an insulator such as aluminum oxide (alumina). The heat transfer member 5 may be made of a resin material having high thermal conductivity. The material of the heat transfer member 5 is not limited as long as it is a material having high thermal conductivity. The heat transfer member 5 may be attached using a conventionally known technique so as to appropriately transfer heat from the second die pad 32 (third die pad 33).

[0100] <Fourth embodiment> Fig. 23 is a diagram for explaining a semiconductor device A40 according to a fourth embodiment of the present disclosure. Fig. 23 is a cross-sectional view showing the semiconductor device A40, and corresponds to Fig. 10. The semiconductor device A40 of this embodiment differs from the first embodiment in that it has both the features of the second and third embodiments. The configuration and operation of other parts of this embodiment are similar to those of the first embodiment.

[0101] In this embodiment, similarly to the second embodiment, the first connecting portion 34 includes a groove portion 343, and the second connecting portion 35 includes a groove portion 353. The configuration of the groove portions 343, 353 is similar to that of the second embodiment. Note that the groove portions 343, 353 can adopt various variations described in the second embodiment. Also, the first connecting portion 34 and the second connecting portion 35 may include metal layers 344, 354 as described in the first modified example, instead of the groove portions 343, 353, or may include paste layers 345, 355 as described in the second modified example.

[0102] Moreover, in this embodiment, the semiconductor device A50 includes a heat transfer member 5, similar to the third embodiment. The configuration of the heat transfer member 5 is similar to that of the third embodiment. Note that the heat transfer member 5 can adopt various variations described in the third embodiment. Also, the heat transfer member 5 may be attached as described in the first modified example, or may be attached to the second die pad 32 and the third die pad 33, respectively, as in the second modified example. Note that the types of the first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 are not limited.

[0103] According to this embodiment, it is possible to obtain the effects described in the first to third embodiments.

[0104] <Fifth embodiment> 24 and 25 are diagrams for explaining a semiconductor device A50 according to a fifth embodiment of the present disclosure. FIG. 24 is a bottom view showing the semiconductor device A50, and corresponds to FIG. 4. FIG. 25 is a cross-sectional view showing the semiconductor device A50, and corresponds to FIG. 10. The semiconductor device A50 of this embodiment differs from the first embodiment in the arrangement position of the third die pad 33 in the z direction. The configuration and operation of other parts of this embodiment are similar to those of the first embodiment. Note that the parts of the first to fourth embodiments may be combined in any desired manner.

[0105] In this embodiment, the third die pad 33 is disposed on the back surface 312 side (z1 side in the z direction) of the first die pad 31 in the z direction. That is, the third die pad 33, the first die pad 31, and the second die pad 32 are disposed in this order from the z1 side to the z2 side in the z direction. In addition, the back surface 332 of the third die pad 33 is exposed from the sealing resin 7 to serve as a back surface terminal, and is joined to a wiring board on which the semiconductor device A50 is mounted. On the other hand, in this embodiment, the back surface 312 of the first die pad 31 is not exposed from the sealing resin 7. The first die pad 31 is entirely covered with the sealing resin 7. Also, in this embodiment, the third semiconductor element 13 is a switching element, and the first semiconductor element 11 is an element for adding added value.

[0106] In this embodiment, the second die pad 32 and the third die pad 33 are also disposed at positions different from the first die pad 31 in the z direction, so that the first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 are disposed at positions different from each other in the z direction. This makes it possible for the semiconductor device A50 to prevent the first semiconductor element 11 from being mounted in a state of contact with the second semiconductor element 12 or the third semiconductor element 13. The semiconductor device A50 can also prevent the bonding layer 691 from contacting the bonding layer 692 or the bonding layer 693. In addition, according to this embodiment, the rear surface 332 of the third die pad 33 is exposed from the bottom surface 72 of the sealing resin 7, so that the semiconductor device A50 can appropriately dissipate heat from the third semiconductor element 13. The semiconductor device A50 has a configuration in common with the semiconductor device A10, and thus has the same effects as the semiconductor device A10.

[0107] The first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 are not limited to the semiconductor elements described above. The first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 may be electronic components other than semiconductor elements.

[0108] In the first to fifth embodiments, a case has been described in which only the first semiconductor element 11 is mounted on the first die pad 31, only the second semiconductor element 12 is mounted on the second die pad 32, and only the third semiconductor element 13 is mounted on the third die pad 33, but this is not limiting. Other electronic components (including semiconductor elements) may be further mounted on the first die pad 31, the second die pad 32, or the third die pad 33, or no semiconductor element may be mounted.

[0109] Sixth embodiment FIG. 26 is a diagram for explaining a semiconductor device A60 according to a sixth embodiment of the present disclosure. FIG. 26 is a plan view showing the semiconductor device A60, and is a diagram corresponding to FIG. 3. In FIG. 26, for ease of understanding, the outer shape of the sealing resin 7 is shown by an imaginary line (two-dot chain line) through the sealing resin 7. The semiconductor device A60 of this embodiment differs from the first embodiment in that it does not include the second semiconductor element 12 and the third semiconductor element 13. The configuration and operation of other parts of this embodiment are similar to those of the first embodiment. Note that the respective parts of the above first to fifth embodiments may be arbitrarily combined.

[0110] In this embodiment, the semiconductor device A60 does not include the second semiconductor element 12 and the third semiconductor element 13, and only the first semiconductor element 11 is mounted. The first semiconductor element 11 is a HEMT. The sizes of the second die pad 32 and the third die pad 33 as viewed in the z direction are smaller than those of the second die pad 32 and the third die pad 33 of the semiconductor device A10. The area of ​​the main surface 321 of the second die pad 32 and the area of ​​the main surface 331 of the third die pad 33 are half or less of the area of ​​the main surface 311 of the first die pad 31. The number of second leads 4 is smaller than that of the semiconductor device A10, that is, six.

[0111] In the first semiconductor element 11 according to this embodiment, a source electrode, a drain electrode, and a gate electrode (not shown) are arranged on the element main surface 111, and no electrodes are arranged on the element back surface 112. The first semiconductor element 11 is mounted on the main surface 311 of the first die pad 31 via a bonding layer 691, which is an insulating bonding layer. The source electrode and the gate electrode of the first semiconductor element 11 are conductively connected to the second lead 4 via a wire 61. The drain electrode of the first semiconductor element 11 is conductively connected to the second die pad 32 or the third die pad 33 via a plurality of wires 645. Each wire 645 is bonded to the drain electrode of the first semiconductor element 11 and the metal layer 66 arranged on the main surface 321 of the second die pad 32 or the metal layer 67 arranged on the main surface 331 of the third die pad 33. As a result, the second die pad 32 and the third die pad 33 (the first lead 3) are conductively connected to the drain electrode of the first semiconductor element 11 and function as a drain terminal. The number of wires 645 is not limited.

[0112] In this embodiment, the second die pad 32 and the third die pad 33 are also disposed at positions different from the first die pad 31 in the z direction. Therefore, even when an electronic component is mounted on the second die pad 32 or the third die pad 33, the semiconductor device A60 can prevent the electronic component and the first semiconductor element 11 from being mounted in contact with each other. The semiconductor device A60 can also prevent the bonding layer that bonds the electronic component from contacting the bonding layer 691. Furthermore, since the metal layer 66 is disposed on the main surface 321 of the second die pad 32, the semiconductor device A60 can prevent the solder paste for bonding the electronic component to the metal layer 66 from flowing over the boundary between the metal layer 66 and the main surface 321 and onto the main surface 341 of the first coupling portion 34, even if the solder paste is melted during manufacturing. Moreover, since the metal layer 67 is disposed on the main surface 331 of the third die pad 33, even if the solder paste for joining the electronic component to the metal layer 67 is melted during manufacturing, the semiconductor device A60 can prevent the solder paste from flowing over the boundary between the metal layer 67 and the main surface 331 and onto the main surface 351 of the second coupling portion 35. Also in this embodiment, the second die pad 32 and the third die pad 33 are disposed at the same position in the z direction, and the first die pad 31 is disposed on the z1 side of the second die pad 32 and the third die pad 33 in the z direction. Therefore, even when the electronic component mounted on the second die pad 32 or the second die pad 32 and the electronic component mounted on the third die pad 33 or the third die pad 33 are connected by a wire, the first semiconductor element 11 mounted on the first die pad 31 can be prevented from interfering with the wire. As a result, the semiconductor device A60 can reduce the loop height of the wire. Furthermore, the semiconductor device A60 has a common configuration with the semiconductor device A10 and therefore provides the same effects as the semiconductor device A10.

[0113] Furthermore, according to this embodiment, each wire 645 is bonded to the main surface 321 of the second die pad 32 via the metal layer 66, or is bonded to the main surface 331 of the third die pad 33 via the metal layer 67. The main surface 321 and the main surface 331 are located on the z-direction z2 side of the main surface 311 of the first die pad 31. In addition, since the first semiconductor element 11 is mounted on the main surface 311, the area for bonding the wire 645 is narrow. Therefore, in the semiconductor device A60, the wire 645 is easier to form and the occurrence of defects in the wire 645 is suppressed compared to the case where the wire 645 is bonded to the main surface 311.

[0114] In this embodiment, the area of ​​the main surface 321 of the second die pad 32 and the main surface 331 of the third die pad 33 is half or less of the area of ​​the main surface 311 of the first die pad 31, but this is not limited to the above. If the areas of the main surfaces 321 and 331 are approximately the same as the area of ​​the main surface 311, the semiconductor device A60 and the semiconductor device A10 can share the first lead 3.

[0115] The semiconductor device according to the present disclosure is not limited to the above-described embodiment. The specific configuration of each part of the semiconductor device according to the present disclosure can be freely designed in various ways.

[0116] [Appendix 1] First lead (3) and a first semiconductor element (11) mounted on the first lead (3); a sealing resin (7) that covers the first semiconductor element (11); Equipped with The first lead (3) has a first die pad (31), a second die pad (32), a third die pad (33), a first connecting portion (34), and a second connecting portion (35); The first die pad (31) has a first main surface (311) and a first back surface (312) facing in opposite directions in a thickness direction, the second die pad (32) is arranged alongside the first die pad (31) in a first direction perpendicular to the thickness direction, and is located on the first main surface (311) side of the first die pad (31) in the thickness direction; the third die pad (33) is disposed on an opposite side of the first die pad (31) from the second die pad (32) in the first direction, and is disposed at a position different from that of the first die pad (31) in the thickness direction; the first connecting portion (34) is connected to the first die pad (31) and the second die pad (32); the second connecting portion (35) is connected to the first die pad (31) and the third die pad (32); the second die pad (32) has a second main surface (321) facing the same side as the first main surface (311) in the thickness direction, the third die pad (33) has a third main surface (331) facing the same side as the first main surface (311) in the thickness direction, The first semiconductor element (11) is mounted on any one of the first main surface (311), the second main surface (321), and the third main surface (331). Semiconductor device. [Appendix 2] the third die pad (33) is located on the first main surface (311) side of the first die pad (31) in the thickness direction; 2. The semiconductor device according to claim 1. [Appendix 3] the second die pad (32) and the third die pad (33) are disposed at the same position in the thickness direction; 3. The semiconductor device according to claim 2. [Appendix 4] The first back surface (312) is exposed from the sealing resin (7). 4. The semiconductor device according to claim 2 or 3. [Appendix 5, Fifth embodiment, FIG. 25] the third die pad (33) is located on the first back surface (312) side of the first die pad (31) in the thickness direction; 2. The semiconductor device according to claim 1. [Appendix 6] the third die pad (33) has a third back surface (332) facing the same side as the first back surface (312) in the thickness direction, The third back surface (332) is exposed from the sealing resin (7). 6. The semiconductor device according to claim 5. [Appendix 7] The first semiconductor element (11) is mounted on the first main surface (311). 7. The semiconductor device according to claim 1, [Appendix 8] a second semiconductor element (12) mounted on the second main surface (321); a third semiconductor element (13) mounted on the third main surface (331); Further comprising: 8. The semiconductor device according to claim 7. [Appendix 9] Further comprising a connection member (641) connected to the second semiconductor element (12) and the third semiconductor element (13). 9. The semiconductor device according to claim 8. [Appendix 10] The first semiconductor element (11) is a switching element, The second semiconductor element (12) is a driving element that drives the first semiconductor element (11). 10. The semiconductor device according to claim 8 or 9. [Appendix 11, Third embodiment, FIG. 20] the first semiconductor element (11) and the second semiconductor element (12) are switching elements, The third semiconductor element (13) is a driving element that drives the first semiconductor element (11) and the second semiconductor element (12). 10. The semiconductor device according to claim 8 or 9. [Appendix 12] Further comprising a metal layer (66) disposed on the second major surface (321). 12. The semiconductor device according to any one of claims 1 to 11. [Appendix 12-1] The metal layer (66) includes Ag. 13. The semiconductor device according to claim 12. [Appendix 12-2] The metal layer (66) is included in the second main surface (321) when viewed in the thickness direction. 13. The semiconductor device according to claim 12. (Appendix 13, Second embodiment, FIG. 13) The first connecting portion (34) is a first connecting portion main surface (341) connected to the first main surface (311) and the second main surface (321); an obstruction portion (343) disposed on the first connecting portion main surface (341) and obstructing the flow of fluid; Equipped with 13. The semiconductor device according to any one of claims 1 to 12. [Appendix 13-1] The inhibition portion (343) is a groove recessed from the main surface (341) of the connecting portion. 14. The semiconductor device according to claim 13. [Appendix 13-2] The depth dimension of the groove is 1 / 4 or more and 1 / 2 or less of the thickness dimension of the connecting portion (34). The semiconductor device according to claim 13-1. (Supplementary Note 13-3, First and Second Modifications of the Second Embodiment, Figs. 15 and 17) The inhibition portion (343) protrudes from the connecting portion main surface (341). 14. The semiconductor device according to claim 13. [Appendix 13-4] The inhibition portion (343) is a plating layer formed on the connecting portion main surface (341). The semiconductor device according to claim 13-3. [Appendix 13-5] The material of the plating layer has poorer solder wettability than the material of the connecting portion (341). The semiconductor device according to claim 13-4. [Appendix 13-6] The inhibition portion (343) is an insulating paste layer formed on the main surface (341) of the connection portion. The semiconductor device according to claim 13-3. [Appendix 13-7] The height dimension of the inhibition portion (343) from the main surface (341) of the connection portion is 20 μm or more. The semiconductor device according to claim 13-3. [Appendix 14, Third embodiment, FIG. 20] Further comprising a heat transfer member (5), the second die pad (32) has a second back surface (322) facing the same side as the first back surface (312) in the thickness direction, The heat transfer member (5) is disposed on the second back surface (322) and is exposed from the sealing resin (7). 14. The semiconductor device according to any one of claims 1 to 13. [Appendix 14-1] The heat transfer member (5) is engaged with the second die pad (32). 15. The semiconductor device according to claim 14. (Supplementary Note 14-2, First Modification of Third Embodiment, FIG. 21) The heat transfer member (5) is joined to the second back surface (322). 15. The semiconductor device according to claim 14. [Appendix 14-3] The heat transfer member (5) is an electrical conductor. 15. The semiconductor device according to claim 14. [Appendix 14-4] The heat transfer member (5) contains Cu. The semiconductor device according to claim 14-3. [Appendix 14-5] The heat transfer member (5) is an insulator. 15. The semiconductor device according to claim 14. [Appendix 14-6] The heat transfer member (5) contains aluminum oxide. The semiconductor device according to claim 14-5. (Appendix 14-7, Second Modification of Third Embodiment, FIG. 22) The second semiconductor element (12) has a smaller dimension in the thickness direction than the first semiconductor element (11). 15. The semiconductor device according to claim 14. [Appendix 14-8] Further comprising a second connection member (643) connected to the first semiconductor element (11) and the second semiconductor element (12). 15. The semiconductor device according to claim 14. [Explanation of symbols]

[0117] A10, A20, A21, A22, A30, A31, A32, A40, A50, A60: Semiconductor device 11: First semiconductor element 111: Element main surface 112: Back side of element 12: Second semiconductor element 121: Element main surface 122: Back side of element 13: Third semiconductor element 131: Element main surface 132: Back side of element 2: Conductive support member 3: 1st lead 31: First die pad 311: Main surface 312: Back side 32: Second die pad 321: Main surface 322: Back side 33: 3rd die pad 331: Main surface 332: Back side 34: 1st connection part 341: Main surface 342: Back side 343: Groove 344: Metal layer 345: Paste layer 35:Second connection part 351: Main surface 352: Back side 353: Groove 354: Metal layer 355: Paste layer 36:Fixed part 361: End face 362: Parallel section 363: Inclined part 37:Fixed part 371: End face 372: Parallel section 373: Inclined part 4: 2nd lead 41: Pad section 42:Terminal section 5: Heat transfer material 51: Main surface 52: Back side 53: Engagement part 61~63,641~645: Wire 65,66,67: Metal layer 691,692,693: Bonding layer 7: Sealing resin 71:Top surface 72: Bottom 73, 74, 75, 76: Side

Claims

1. The first lead; a first semiconductor element mounted on the first lead; a sealing resin covering the first semiconductor element; Equipped with the first lead has a first die pad, a second die pad, a third die pad, a first connecting portion, and a second connecting portion; the first die pad has a first main surface and a first back surface facing in opposite directions in a thickness direction; the second die pad is arranged alongside the first die pad in a first direction perpendicular to the thickness direction, and is located on the first main surface side of the first die pad in the thickness direction; the third die pad is disposed on an opposite side of the first die pad to the second die pad in the first direction, and is disposed at a position different from that of the first die pad in the thickness direction; the first connection portion is connected to the first die pad and the second die pad, the second connection portion is connected to the first die pad and the third die pad, the second die pad has a second main surface facing the same side as the first main surface in the thickness direction, the third die pad has a third main surface facing the same side as the first main surface in the thickness direction, the first semiconductor element is mounted on any one of the first main surface, the second main surface, and the third main surface; the third die pad is located on the first back surface side with respect to the first die pad in the thickness direction; Semiconductor device.

2. the third die pad is located on the first main surface side with respect to the first die pad in the thickness direction; The semiconductor device according to claim 1 .

3. the second die pad and the third die pad are disposed at the same position in the thickness direction. The semiconductor device according to claim 2 .

4. The first back surface is exposed from the sealing resin.

4. The semiconductor device according to claim 2.

5. the third die pad has a third back surface facing the same side as the first back surface in the thickness direction, The third back surface is exposed from the sealing resin. The semiconductor device according to claim 1 .

6. The first semiconductor element is mounted on the first main surface.

6. The semiconductor device according to claim 1.

7. a second semiconductor element mounted on the second main surface; and a third semiconductor element mounted on the third main surface. Further comprising: The semiconductor device according to claim 6.

8. Further comprising a connection member connected to the second semiconductor element and the third semiconductor element. The semiconductor device according to claim 7.

9. the first semiconductor element is a switching element, The second semiconductor element is a driving element that drives the first semiconductor element.

9. The semiconductor device according to claim 7 or 8.

10. The first lead; a first semiconductor element, a second semiconductor element, and a third semiconductor element mounted on the first lead; a sealing resin covering the first semiconductor element; Equipped with the first lead has a first die pad, a second die pad, a third die pad, a first connecting portion, and a second connecting portion; the first die pad has a first main surface and a first back surface facing in opposite directions in a thickness direction; the second die pad is arranged alongside the first die pad in a first direction perpendicular to the thickness direction, and is located on the first main surface side of the first die pad in the thickness direction; the third die pad is disposed on an opposite side of the first die pad to the second die pad in the first direction, and is disposed at a position different from that of the first die pad in the thickness direction; the first connection portion is connected to the first die pad and the second die pad, the second connection portion is connected to the first die pad and the third die pad, the second die pad has a second main surface facing the same side as the first main surface in the thickness direction, the third die pad has a third main surface facing the same side as the first main surface in the thickness direction, the first semiconductor element is mounted on the first main surface, the second semiconductor element is mounted on the second main surface, the third semiconductor element is mounted on the third main surface, the first semiconductor element and the second semiconductor element are switching elements, the third semiconductor element is a driving element that drives the first semiconductor element and the second semiconductor element; Semiconductor device.

11. further comprising a metal layer disposed on the second major surface.

11. The semiconductor device according to claim 1.

12. The first connecting portion is a first connecting portion main surface connected to the first main surface and the second main surface; An obstruction portion that is disposed on a main surface of the first connecting portion and obstructs the flow of fluid; Equipped with 12. The semiconductor device according to claim 1.

13. The first lead; a first semiconductor element mounted on the first lead; a sealing resin covering the first semiconductor element; A heat transfer member; Equipped with the first lead has a first die pad, a second die pad, a third die pad, a first connecting portion, and a second connecting portion; the first die pad has a first main surface and a first back surface facing in opposite directions in a thickness direction; the second die pad is arranged alongside the first die pad in a first direction perpendicular to the thickness direction, and is located on the first main surface side of the first die pad in the thickness direction; the third die pad is disposed on an opposite side of the first die pad to the second die pad in the first direction, and is disposed at a position different from that of the first die pad in the thickness direction; the first connection portion is connected to the first die pad and the second die pad, the second connection portion is connected to the first die pad and the third die pad, the second die pad includes a second main surface facing the same side as the first main surface in the thickness direction, and a second back surface facing the same side as the first back surface, the third die pad has a third main surface facing the same side as the first main surface in the thickness direction, the first semiconductor element is mounted on any one of the first main surface, the second main surface, and the third main surface; the heat transfer member is disposed on the second back surface and is exposed from the sealing resin; Semiconductor device.

Images