Starting adjustment of plasma deposition
The semiconductor deposition method addresses the challenge of controlled stress effects by varying the flow rate of a silicon-containing precursor within a plasma of an oxygen-containing precursor, resulting in reduced film shrinkage and improved interfacial density.
Patent Information
- Application Number
- JP2022531428
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2019-11-27
- Filing Date
- 2020-11-24
- Publication Date
- 2025-03-25
- Estimated Expiration
- 2040-11-24
AI Technical Summary
Existing semiconductor manufacturing processes face challenges in depositing materials with controlled stress effects, leading to issues like film shrinkage, warping, and undercutting during etching.
A deposition method involving the formation of a plasma of an oxygen-containing precursor in a semiconductor processing chamber, where a silicon-containing precursor is flowed at varying rates to deposit silicon-containing material on a semiconductor substrate, allowing for controlled stress adjustment and improved interfacial density.
The method produces films with reduced film shrinkage and improved interfacial density, minimizing undercutting during etching and maintaining high-quality interfaces, even at lower deposition temperatures.
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Abstract
Description
[Technical field]
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims the benefit of priority to U.S. patent application Ser. No. 16 / 698,500, filed Nov. 27, 2019, the contents of which are incorporated by reference in their entirety for all purposes.
[0002] Technical Field
[0002] The present technology relates to semiconductor systems and processes. More particularly, the present technique relates to methods for depositing materials with controlled stress effects. [Background technology]
[0003] background
[0003] Integrated circuits are made possible by processes that produce intricately patterned layers of material on substrate surfaces. Fabricating patterned materials on substrates requires controlled methods of formation and removal of exposed material. The material properties of the produced films can contribute to substrate effects, which can cause wafer warping and other problems during processing.
[0004]
[0004] Therefore, there is a need for improved systems and methods that can be used to manufacture high quality devices and structures. These and other needs are addressed by the present technique. Summary of the Invention
[0005] An exemplary deposition method may include forming a plasma of an oxygen-containing precursor in a processing region of a semiconductor processing chamber. The processing region may contain a semiconductor substrate on a substrate support. The method may include flowing a silicon-containing precursor at a first flow rate into the processing region of the semiconductor processing chamber while maintaining the plasma of the oxygen-containing precursor. The method may include ramping the first flow rate of the silicon-containing precursor to a second flow rate greater than the first flow rate for a period of time. The method may include depositing a silicon-containing material on the semiconductor substrate.
[0006] In some embodiments, the silicon-containing precursor can be or include tetraethylorthosilicate. The time period can be about 10 seconds or less. The ramping of the first flow rate can occur in a steady increase from about 2 grams of silicon-containing precursor per second to about 5 grams of silicon-containing precursor per second. The depositing can be performed at a temperature of about 450° C. or less. The processing region of the semiconductor processing chamber can be maintained free of the silicon-containing precursor while forming the plasma of the oxygen-containing precursor. The semiconductor substrate can be or include silicon, and forming the plasma of the oxygen-containing precursor can generate an oxygen radicalized surface termination of the silicon of the semiconductor substrate. The method can further include stopping the delivery of the silicon-containing precursor following depositing the first amount of silicon-containing material while maintaining the flow rate of the oxygen-containing precursor. The method can further include extinguishing the plasma in the processing region of the semiconductor processing chamber while maintaining the flow rate of the oxygen-containing precursor. The method can include reforming the plasma of the oxygen-containing precursor and backflowing the silicon-containing precursor into the processing region of the semiconductor processing chamber.
[0007]
[0007] Some embodiments of the present technique may include a deposition method. The method may include flowing an oxygen-containing precursor into a processing region of a semiconductor processing chamber. The processing region may contain a semiconductor substrate on a substrate support. The method may include forming a plasma of the oxygen-containing precursor. The method may include flowing a silicon-containing precursor into a processing region of the semiconductor processing chamber. The method may include increasing a flow rate of the silicon-containing precursor for a period of time. The method may include depositing a first amount of silicon-containing material on the semiconductor substrate. The method may include stopping the flow of the silicon-containing precursor and forming the plasma while maintaining the flow rate of the oxygen-containing precursor.
[0008] In some embodiments, the oxygen-containing precursor can be or include diatomic oxygen. The method can include reforming a plasma of the oxygen-containing precursor. The method can include backflowing the silicon-containing precursor into a processing region of the semiconductor processing chamber. The method can include increasing a flow rate of the silicon-containing precursor for a period of time. The method can be repeated at least five times. The semiconductor substrate can be characterized by a recessed feature, and a sidewall extent proximate a bottom of the recessed feature can be about 75% or greater in thickness than a sidewall extent proximate a top of the recessed feature.
[0009] The present technique may include a deposition method. The method may include forming a plasma of an oxygen-containing precursor in a processing region of a semiconductor processing chamber. The processing region may contain a semiconductor substrate on a substrate support. The method may include flowing a silicon-containing precursor into the processing region of the semiconductor processing chamber at a first flow rate while maintaining the plasma of the oxygen-containing precursor. The method may include ramping a first flow rate of the silicon-containing precursor to a second flow rate greater than the first flow rate for a first period of time. The method may include depositing a first amount of silicon-containing material on the semiconductor substrate. The first amount of silicon-containing material may be characterized by a tensile stress. The method may include ramping a first flow rate of the silicon-containing precursor from a second flow rate to the first flow rate for a second period of time. The method may include depositing a second amount of silicon-containing material on the semiconductor substrate. The second amount of silicon-containing material may be characterized by a compressive stress.
[0010] In some embodiments, the deposited stack of silicon-containing materials can be characterized by a substantially neutral stress. The first amount of silicon-containing material can be characterized by a different thickness than the second amount of silicon-containing material on the semiconductor substrate. The method can be repeated at least five times. The silicon-containing precursor can be or include tetraethylorthosilicate, and the oxygen-containing precursor can be or include diatomic oxygen.
[0011]
[0011] Such techniques may offer many advantages over conventional systems and techniques. For example, the present process may produce films that are characterized by reduced film shrinkage. Additionally, operation of embodiments of the present technique may result in improved interface density of materials on a substrate, which may reduce undercutting during subsequent etching. These and other embodiments, along with many of their advantages and features, are described in more detail in conjunction with the following description and accompanying figures.
[0012] A further understanding of the nature and advantages of the disclosed technology may be realized by reference to the remaining portions of the specification and drawings. [Brief description of the drawings]
[0013] [Figure 1] 1 shows a schematic cross-sectional view of an exemplary processing chamber in accordance with some embodiments of the present technique. [Diagram 2]
[0014] 1 illustrates exemplary operations in a deposition method according to some embodiments of the present technique. [Figure 3A-3C]
[0015] 3A-3C show schematic cross-sectional views of exemplary substrates according to some embodiments of the present technology. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0014]
[0016] Some of the figures are included as schematic diagrams. It is understood that these figures are for illustrative purposes and should not be considered to be to scale unless specifically stated to be to scale. Furthermore, as schematic diagrams, the figures are provided to aid in understanding and may not include all aspects or information compared to realistic representations and may include exaggerated material for illustrative purposes.
[0015]
[0017] In the accompanying figures, similar components or features may have the same reference label. Additionally, various components of the same type may be distinguished by tracing the reference numbers with a letter that distinguishes the similar components. When only a first reference number is used in this specification, the description is applicable to any one of the similar components having the same first reference number, regardless of the letter.
[0016]
[0018] During semiconductor manufacturing, various deposition and etching operations can be utilized to fabricate structures on a substrate. Silicon oxide and other silicon-containing materials are routinely formed in many operations to develop semiconductor substrates. As an example, silicon oxide can be deposited by many processes including chemical vapor deposition and plasma deposition. Silicon oxide deposited or formed by some processes can be characterized by the amount of hydrogen and / or carbon incorporated into the film, which may be contained in precursors such as silane and tetraethylorthosilicate. During subsequent processing, such as during subsequent annealing, the silicon oxide film may be exposed to high temperatures. This high temperature exposure can cause outgassing of residual materials incorporated during the deposition process and shrinkage of the film.
[0017]
[0019] To limit shrinkage effects, some conventional techniques may produce denser oxide films, but denser films may exhibit elevated internal stresses. Silicon oxide may be characterized by compressive stresses, which may increase as it shrinks or densifies. This may cause high aspect ratio features to buckle, and in some circumstances, substrate or wafer warpage. In addition, silicon oxide may be a relatively porous film, and treatment with certain silicon precursors, such as tetraethyl orthosilicate, may produce less dense and more porous films. Although some processes, such as gap filling and poor quality formation, may be improved, the interface region of the film and the underlying substrate may be characterized by a porous and weaker film area. During subsequent etching processes, such as dry or wet etching, upon reaching the underlying substrate, the etchant may undercut the deposited film along the interface region between the deposited film and the substrate, which may lead to further delamination and film degradation during subsequent polishing or processing operations.
[0018]
[0020] Prior art has addressed this issue by often utilizing alternative precursors for deposition or by performing deposition at higher temperatures that may increase film density. Some techniques also utilize nitrous oxide as an oxidizer, which may significantly reduce deposition rates and may also incorporate nitrogen into the film, affecting film properties. The present technology can overcome these limitations by priming the substrate surface and forming a higher quality interface. The present technology can, in some embodiments, benefit from the improved deposition rate of using oxygen without detrimentally compromising quality. Furthermore, by improving the quality of the film at the interface, deposition can be performed at lower temperatures, which may increase deposition rates over conventional processes. The present technology can also allow for controlled tuning of film stress in situ by adjusting formation parameters. After describing the general aspects of the chamber according to an embodiment of the present technology in which plasma processing may be performed, specific methodologies and component configurations may be discussed. It should be understood that the techniques described can be used to improve many film formation processes, and therefore the techniques are not intended to be limited to the particular films and processes discussed, but rather can be applied to a variety of processing chambers and operations.
[0019]
[0021] 1 shows a cross-sectional view of an exemplary processing chamber 100 according to some embodiments of the present technology. This diagram may provide an overview of a system incorporating one or more aspects of the present technology and / or capable of performing one or more operations according to embodiments of the present technology. Additional details of the chamber 100 or the method performed may be further described below. Although the chamber 100 may be utilized to form a film layer according to some embodiments of the present technology, it should be understood that the method may similarly be performed in any chamber in which film formation may occur. The processing chamber 100 may include a chamber body 102, a substrate support 104 disposed within the chamber body 102, and a lid assembly 106 coupled to the chamber body 102 and enclosing the substrate support 104 within a processing volume 120. The substrate 103 may be provided in the processing volume 120 through an opening 126, which may be sealed in a conventional manner for processing using a slit valve or door. The substrate 103 may be seated on a surface 105 of the substrate support during processing. The substrate support 104 can be rotatable along an axis 147, as indicated by arrow 145, where the shaft 144 of the substrate support 104 can be disposed. Alternatively, the substrate support 104 can be elevated and rotated as needed during the deposition process.
[0020]
[0022] The plasma profile modulator 111 may be disposed within the processing chamber 100 to control the plasma distribution across the substrate 103 disposed on the substrate support 104. The plasma profile modulator 111 may include a first electrode 108 that may be disposed adjacent to the chamber body 102 and may separate the chamber body 102 from other components of the lid assembly 106. The first electrode 108 may be part of the lid assembly 106 or may be a separate sidewall electrode. The first electrode 108 may be an annular or ring-shaped member and may be a ring electrode. The first electrode 108 may be a continuous loop around the circumference of the processing chamber 100 surrounding the processing region 120 or may be discontinuous at selected locations as needed. The first electrode 108 may also be a perforated electrode, such as a perforated ring or mesh electrode, or may be a plate electrode, such as a secondary gas distributor, for example.
[0021]
[0023] One or more isolators 110a, 110b, which may be a dielectric material such as a ceramic or metal oxide, e.g., aluminum oxide and / or aluminum nitride, may contact the first electrode 108 and electrically and thermally isolate the first electrode 108 from the gas distributor 112 and the chamber body 102. The gas distributor 112 may define an aperture 118 for distributing the process precursors to the processing region 120. The gas distributor 112 may be coupled to a first power source 142, such as an RF generator, an RF power source, a DC power source, a pulsed DC power source, a pulsed RF power source, or any other power source capable of being coupled to a processing chamber. In some embodiments, the first power source 142 may be an RF power source.
[0022]
[0024] The gas distributor 112 can be a conductive gas distributor or a non-conductive gas distributor. The gas distributor 112 can also be formed from conductive and non-conductive components. For example, the body of the gas distributor 112 can be conductive, while the faceplate of the gas distributor 112 can be non-conductive. The gas distributor 112 can be powered, for example, by a first power source 142 as shown in FIG. 1, or the gas distributor 112 can be coupled to ground in some embodiments.
[0023]
[0025] The first electrode 108 can be coupled to a first conditioning circuit 128 that can control the ground path of the processing chamber 100. The first conditioning circuit 128 can include a first electronic sensor 130 and a first electronic controller 134. The first electronic controller 134 can be or include a variable capacitor or other circuit element. The first conditioning circuit 128 can be or include one or more inductors 132. The first conditioning circuit 128 can be any circuit that allows for a variable or controllable impedance under the plasma conditions present in the processing region 120 during processing. In some illustrated embodiments, the first conditioning circuit 128 can include a first circuit leg and a second circuit leg coupled in parallel between ground and the first electronic sensor 130. The first circuit leg can include a first inductor 132A. The second circuit leg can include a second inductor 132B coupled in series with the first electronic controller 134. The second inductor 132B can be disposed between the first electronic controller 134 and a node connecting both the first and second circuit legs to the first electronic sensor 130. The first electronic sensor 130 can be a voltage or current sensor and can be coupled to the first electronic controller 134, which can allow for some closed-loop control of the plasma conditions in the processing region 120.
[0024]
[0026] The second electrode 122 may be coupled to the substrate support 104. The second electrode 122 may be embedded in the substrate support 104 or coupled to a surface of the substrate support 104. The second electrode 122 may be a plate, a perforated plate, a mesh, a wire screen, or any other distributed arrangement of conductive elements. The second electrode 122 may be a conditioning electrode and may be coupled to a second conditioning circuit 136 by a conduit 146, such as a cable having a selected resistance, such as, for example, 50 ohms, disposed on a shaft 144 of the substrate support 104. The second conditioning circuit 136 may include a second electronic sensor 138 and a second electronic controller 140, which may be a second variable capacitor. The second electronic sensor 138 may be a voltage or current sensor and may be coupled to the second electronic controller 140 to further control the plasma conditions in the processing region 120.
[0025]
[0027] A third electrode 124, which may be a bias electrode and / or an electrostatic chucking electrode, may be coupled to the substrate support 104. The third electrode may be coupled to a second power source 150 through a filter 148, which may be an impedance matching circuit. The second power source 150 may be DC power, pulsed DC power, RF bias power, pulsed RF source or bias power, or a combination of these or other power sources. In some embodiments, the second power source 150 may be RF bias power.
[0026]
[0028] The lid assembly 106 and substrate support 104 of FIG. 1 can be used with any processing chamber for plasma or thermal processing. During operation, the processing chamber 100 can provide real-time control of plasma conditions in the processing region 120. The substrate 103 can be placed on the substrate support 104, and process gases can flow through the lid assembly 106 using the inlet 114 according to any desired flow plan. The gases can exit the processing chamber 100 through the outlet 152. Power can be coupled with the gas distributor 112 to establish a plasma in the processing region 120. In some embodiments, the substrate can be subjected to an electrical bias using the third electrode 124.
[0027]
[0029] Upon energizing the plasma in the processing region 120, a potential difference may be established between the plasma and the first electrode 108. A potential difference may also be established between the plasma and the second electrode 122. The electronic controllers 134, 140 may then be used to adjust the flow characteristics of the ground path represented by the two adjustment circuits 128 and 136. Set points may be provided to the first adjustment circuit 128 and the second adjustment circuit 136 to provide independent control of the deposition rate and center-to-edge plasma density uniformity. In an embodiment where the electronic controllers can both be variable capacitors, the electronic sensor may adjust the variable capacitors to maximize the deposition rate and independently minimize the thickness non-uniformity.
[0028]
[0030] Each of the conditioning circuits 128, 136 may have a variable impedance that can be adjusted using the respective electronic controller 134, 140. If the electronic controller 134, 140 is a variable capacitor, the capacitance range of each variable capacitor and the inductance of the first inductor 132A and the second inductor 132B may be selected to provide an impedance range. This range may depend on the frequency and voltage characteristics of the plasma, and the capacitance range of each variable capacitor may be minimum. Thus, when the capacitance of the first electronic controller 134 is minimum or maximum, the impedance of the first conditioning circuit 128 may be high, resulting in a plasma shape with minimum aerial or lateral reach on the substrate support. When the capacitance of the first electronic controller 134 approaches a value that minimizes the impedance of the first conditioning circuit 128, the aerial reach of the plasma is maximized, effectively covering the entire working area of the substrate support 104. As the capacitance of the first electronic controller 134 deviates from the minimum impedance setting, the plasma shape may shrink from the chamber walls and the aerial coverage of the substrate support may decrease. The second electronic controller 140 may have a similar effect, increasing and decreasing the aerial coverage of the plasma above the substrate support as the capacitance of the second electronic controller 140 may change.
[0029]
[0031] Electronic sensors 130, 138 may be used to regulate the respective circuits 128, 136 in a closed loop. Depending on the sensor type used, a current or voltage set point may be attached to each sensor, which may be equipped with control software that determines adjustments to the respective electronic controllers 134, 140 to minimize deviations from the set point. As a result, the plasma shape can be selected and dynamically controlled during processing. Although the above discussion is based on the electronic controllers 134, 140 being variable capacitors, it should be understood that any electronic component with adjustable characteristics may be used to provide adjustable impedance to the regulation circuits 128 and 136.
[0030]
[0032] Tetraethyl orthosilicate ("TEOS") may feature a lower sticking coefficient than other silicon-containing precursors such as silanes. While this effect may improve gap fill with reduced voids and overhangs, it may also produce films that are more porous and less dense. These properties may be desired in the bulk of the deposited film, which may provide easier removal or etching, but the increased porosity at the interface region may introduce other challenges, such as when subsequent deposition and etching processes can be performed. When these etching materials reach the substrate, they may cause undercutting of the film at the interface region as the film becomes more porous. This may result in delamination or chipping of the film, which may be further exacerbated by polishing operations.
[0031]
[0033] Densification operations such as annealing can improve this density, but annealing can also densify the bulk of the film, eliminating the desired low density and increasing the tensile stress throughout the film. This increased stress can also cause film delamination and other effects. As a result, many conventional operations perform these depositions at relatively high temperatures, e.g., above about 400°C or above about 500°C, which increases the overall density of the film, but may be less than the density derived from annealing. Since TEOS may deposit with a more condensation-type effect, the deposition rate may also decrease as the temperature increases.
[0032]
[0034] The present technique may also improve the low temperature deposition of oxide films deposited with TEOS by improving the interfacial density of the film and increasing the deposition rate over conventional techniques. Additionally, the present technique may allow modification of film properties during deposition. The present process may include increasing the rate of TEOS introduction into the processing chamber after radicalizing the interfacial surface of the substrate. This may improve bonding and lower porosity of the interfacial layer, promoting the formation of denser films.
[0033]
[0035] FIG. 2 illustrates exemplary operations in a deposition method 200 according to some embodiments of the present technique. The method can be performed in one or more chambers, including any of the chambers described above, which may include the components described above, or may utilize the methodology of subsequent processing described above. The method 200 can include several optional operations that may or may not be specifically related to some embodiments of the method according to the present technique. For example, many of the operations are described to provide a broader scope of structure formation, but are not critical to the technique or may be performed by alternative methodologies as will be readily understood. For example, as described above, operations can be performed before delivering a substrate to a processing chamber, such as the processing chamber 100 described above, and the method 200 can be performed in this manner.
[0034]
[0036] The method 200 may include, in optional operation 205, flowing an oxygen-containing precursor into a processing region of a semiconductor processing chamber. In embodiments of the present technology, any number of oxygen-containing precursors may be used, but in some embodiments, the oxygen-containing precursor may be diatomic oxygen. The method may include, in operation 210, forming a plasma of the oxygen-containing precursor in a processing region of the semiconductor processing chamber. The processing region may contain a substrate, such as on a substrate support, on which a deposition process may be performed. Any number of oxygen-containing precursors may be utilized, including nitrogen-containing precursors incorporating diatomic oxygen, ozone, oxygen, water, alcohol, or other materials. During the initial plasma formation, the processing region may be maintained substantially or completely free of silicon-containing precursors, such as TEOS or other silicon-containing precursors. For example, any number of inert or carrier gases may be delivered along with the oxygen, including helium, argon, nitrogen, or other materials.
[0035]
[0037] In operation 215, following the first period of time and while the plasma of the oxygen-containing precursor is maintained, a silicon-containing precursor may be flowed into a processing region of the semiconductor processing chamber. The silicon-containing precursor may be delivered at a first flow rate, which in some embodiments may be lower than a target flow rate for deposition. The flow rate of the silicon-containing precursor may be increased over a period of time in operation 220. During a second period of time until the silicon-containing precursor reaches a target flow rate, such as a second flow rate, the flow rate may be increased at a constant rate over this second period of time or at a decreasing or increasing scaling rate. Then, several deposition operations may be performed in operation 225, which may include proceeding with the deposition at the target flow rate to produce a desired film thickness. By performing a process according to method 200, undercut etching at the film interface with an underlying structure may be minimized or prevented during subsequent etching operations, such as during wet or dry etching.
[0036]
[0038] In some embodiments, denser films can be produced by further adjusting the flow rate and process conditions. For example, in some embodiments, upon reaching a target flow rate that may contribute to the deposition of a first amount of silicon-containing material, one or more additional operations can be performed. In some embodiments, the process can include stopping the delivery of the silicon-containing precursor at optional operation 230. The stopping can be performed while maintaining the flow rate of the oxygen-containing precursor and can include maintaining the plasma. Additionally, the flow rate can be reduced to the first flow rate while deposition continues. This can produce a film section characterized by different film properties than the first section in some embodiments.
[0037]
[0039] For example, by increasing the TEOS or silicon precursor concentration as part of the deposition precursor, a more tensile film can be produced, which may contain additional carbon and / or hydrogen. Furthermore, by decreasing the percentage of TEOS, a more compressive film can be produced, which can be additionally or alternatively performed if the plasma power can be increased. As a result, deposition can be continued while performing these flow rate changes, which can tailor the film properties through the layer. These adjustments between more compressive and more tensile films can produce films with tailored stresses, since the layers can be formed to similar or different thicknesses. Thus, films with substantially neutral stress can be produced, but a range of compressive and tensile stress portions of the film can be produced as well to provide a range of stress characteristics.
[0038]
[0040] Additionally, in some embodiments, the method may also include extinguishing the plasma at optional operation 235. In some embodiments, an oxygen-containing precursor, such as oxygen, may be continuously flowed throughout the process, which may maintain pressure characteristics within the processing chamber and may also serve as a purge of deposition by-products. As a result, the surface of the initially deposited material may be cleaned by the flowing oxygen precursor. The process may then be repeated to form another section. For example, the plasma may be reformed from the oxygen-containing precursor, and the silicon-containing precursor may be backflowed into the processing region. The operations may be similar to those previously performed to generate the second section of deposited material, where the flow rate of the silicon-containing precursor may be ramped over a period of time, which may be the same or different than the first section of deposited material. As a result, a film characterized by an increased density may be formed by these repeated operations, which may be repeated any number of times. Utilizing diatomic oxygen as the oxidizing precursor may provide an enhanced deposition rate, which may produce a film characterized by improved shrinkage characteristics over conventional techniques.
[0039]
[0041] As mentioned above, the silicon-containing precursor may be TEOS in some embodiments, but other silicon-containing precursors are encompassed by the present technology as well. The duration of either the ramp up or ramp down may vary based on the shape and characteristics of the substrate and the target and initial flow rates of the precursor. In some embodiments, either or both durations may be about 1 minute or less, about 30 seconds or less, about 20 seconds or less, about 15 seconds or less, about 10 seconds or less, about 9 seconds or less, about 8 seconds or less, about 7 seconds or less, about 6 seconds or less, about 5 seconds or less, about 4 seconds or less, about 3 seconds or less, about 2 seconds or less, about 1 second or less, or less than that.
[0040]
[0042] In some embodiments, the first flow rate may be about 50% or less of the target flow rate of the silicon-containing precursor, about 40% or less of the target flow rate, about 30% or less of the target flow rate, about 20% or less of the target flow rate, about 10% or less of the target flow rate, or less. By utilizing a lower flow rate, less silicon material may be formed in the first deposition. This allows sufficient time for by-products to leave the film, reducing porosity and increasing film density.
[0041]
[0043] Although the process can be performed on any other material as well, by first utilizing an oxygen plasma, such as on a silicon or silicon-containing substrate, the oxygen can radicalize the surface to form an oxygen radicalized surface termination. This radicalized interfacial region can thus enhance reaction with the radical TEOS molecules when delivered, which can improve deposition at the surface. This can increase the density of the film, which can be maintained throughout the bulk or adjusted to deposit a lower density film.
[0042]
[0044] The ramping operation can be performed at a flow rate configured to reach the target flow rate slowly or quickly in some embodiments. For example, in some embodiments, the flow rate can be increased at a rate of about 1 gram per second or more, and can be increased at a rate of about 2 grams per second or more, about 3 grams per second or more, about 4 grams per second or more, about 5 grams per second or more, about 6 grams per second or more, about 7 grams per second or more, about 8 grams per second or more, about 9 grams per second or more, about 10 grams per second or more, or more. Furthermore, the flow rate can be increased within a range of about 2 grams per second of silicon-containing precursor to about 5 grams per second of silicon-containing precursor. The ramping of the flow rate can also be changed over the ramping period to be faster or slower over the ramping time. If the flow rate is increased more slowly than this range, the deposition of the film will not proceed uniformly and prolonged exposure to the plasma may affect the film. To improve uniformity of delivery, a carrier gas as described above can be provided at a flow rate of about 1 slm or greater, which can be about 2 slm or greater, about 3 slm or greater, about 4 slm or greater, about 4 slm or greater, about 5 slm or greater, about 6 slm or greater, or greater.
[0043]
[0045] If the flow rate is ramped faster than this range, deposition will occur faster, which can lead to increased porosity, lower density, and trap more by-products that, if in the interface region, can lead to undercutting of the film during etching. Thus, the flow rate can be increased at a measured rate to maintain a balance between film formation and quality at the interface. The interface region can be characterized by a thickness of about 10 nm or less before transitioning to a low density material, but can extend formation to maintain a higher density throughout the film section. In some embodiments, the thickness of the higher density interface region can be about 9 nm or less, about 8 nm or less, about 7 nm or less, about 6 nm or less, about 5 nm or less, about 4 nm or less, about 3 nm or less, about 2 nm or less, about 1 nm or less, or less.
[0044]
[0046] By providing an increased density film at the interface, lower temperature depositions can be performed while maintaining a high quality interface during subsequent operations, limiting or preventing undercutting during etching. As a result, the present technique can enable depositions to be performed at temperatures of about 450° C. or less, which can be performed at temperatures of about 440° C. or less, about 430° C. or less, about 420° C. or less, about 410° C. or less, about 400° C. or less, about 390° C. or less, about 380° C. or less, about 370° C. or less, about 360° C. or less, about 350° C. or less, about 340° C. or less, about 330° C. or less, about 320° C. or less, about 310° C. or less, about 300° C. or less, about 290° C. or less, or less.
[0045]
[0047] By producing a film with controlled stress characteristics, shrinkage of the film can be limited or substantially prevented while maintaining the desired stress characteristics of the combined film. For example, depending on the thickness of the first and second amounts of material, the combined layer can be characterized by an overall compressive stress of about -70 MPa or less, about -65 MPa or less, about -60 MPa or less, about -55 MPa or less, or less. Furthermore, shrinkage of the film can be reduced by about 10% or more, about 15% or more, about 20% or more, about 25% or more, about 30% or more, about 35% or more, about 40% or more, about 45% or more, about 50% or more, about 55% or more, about 60% or more, or more, compared to a conventionally formed film during subsequent processing or exposure to air.
[0046]
[0048] The formed film portions can be of any particular thickness, but by forming sections at thinner thicknesses, the stress characteristics may be more consistent throughout the layer. The generated sections can be characterized in some embodiments by a thickness of about 500 nm or less, and can be characterized by a thickness of about 450 nm or less, about 350 nm or less, about 300 nm or less, about 250 nm or less, about 200 nm or less, about 150 nm or less, about 100 nm or less, about 50 nm or less, or less. By repeating the process, characteristics can be generated throughout the entire formed thickness. Thus, aspects of the method can be repeated at least twice during processing, and can be repeated about 3 times or more, about 4 times or more, about 5 times or more, about 6 times or more, about 8 times or more, about 10 times or more, about 12 times or more, about 15 times or more, about 20 times or more, about 25 times or more, about 30 times or more, about 35 times or more, about 40 times or more, about 45 times or more, about 50 times or more, about 60 times or more, or more.
[0047]
[0049] 3A-3C show schematic cross-sectional views of an exemplary substrate according to some embodiments of the present technique. The figures illustrate aspects of the present technique that may provide improved step coverage or enhanced suitability for coverage of high aspect ratio features. For example, conventional techniques may produce films characterized by less uniform sidewall coverage. This may be due in part to the isotropic nature of some deposition techniques in which low frequency energy is utilized in combination with high frequency energy during plasma formation. High frequency energy may increase plasma density, while low frequency energy may provide directionality to the plasma species. However, low frequency energy, such as radio frequency signals below about 3 kHz, may increase the directionality of deposition, which may result in reduced sidewall coverage of the feature. As plasma species may be generated above the substrate, a higher percentage of material may be directed to the bottom and top of the feature, which may cause pinch-offs and void formation. The present technique may overcome these issues, at least in part, by cycling the deposition as described above.
[0048]
[0050] FIG. 3A can show a film 305 being deposited on a substrate 310, which can define features such as high aspect ratio features as illustrated, although any number of features or profiles can be included in the present technique as well. The substrate can be any of the substrates described above and can be a substrate processed by one or more operations of the method 200 performed in a processing chamber, such as the processing chamber 100 described above. After a first portion of the film is formed, the flow of the silicon-containing precursor can be stopped along with the delivery of one or more radio frequency signals, such as high frequency signals and / or low frequency signals, which can also stop the formation of the plasma. However, the oxygen-containing precursor, such as diatomic oxygen, can continue to flow. As a result, the oxygen molecules 315 can penetrate into the recesses of the feature, as shown in FIG. 3A. Thus, when the plasma is reignited, particle collisions within the feature can increase, as shown in FIG. 3B, and more radical species can be directed to the sidewall. This can increase reactive terminations and otherwise improve the surface for deposition. As a result, deposition can occur more conformally along the sidewall features, as shown in FIG. 3C.
[0049]
[0051] For example, in some embodiments, the thickness of the deposited material can be characterized by a film formation thickness that is about 75% or more of the film thickness of the material deposited along the adjacent sidewall or at the bottom of the feature, along the sidewall near the feature, or at the top of the feature. Additionally, the thickness near the bottom can be about 80% or more of the thickness near the top, about 85% or more of the thickness, about 90% or more of the thickness, about 95% or more of the thickness, about 99% or more of the thickness, or in some embodiments, the thickness near the bottom can be substantially the same or equal to the thickness near the top. Thus, a more conformal area may be provided, which can reduce the formation of voids.
[0050]
[0052] Methods according to embodiments of the present technology can be used to improve the deposition or formation of materials. By providing densified material at the interface, film shrinkage can be reduced and undercutting can be limited or prevented. These improvements can reduce delamination of the film on the substrate and limit downstream damage to the film.
[0051]
[0053] In the foregoing description, for purposes of explanation, numerous details are set forth in order to provide an understanding of various embodiments of the present technology. However, it will be apparent to one skilled in the art that particular embodiments may be practiced without some of these details, or with additional details.
[0052]
[0054] Although several embodiments have been disclosed, those skilled in the art will recognize that various modifications, alternative constructions, and equivalents may be used without departing from the spirit of the embodiments. Moreover, some well-known processes and elements have not been described to avoid unnecessarily obscuring the present technology. Thus, the above description should not be interpreted as limiting the scope of the present technology. Furthermore, although a method or process may be described sequentially or stepwise, it should be understood that the operations may be performed simultaneously or in a different order than that described.
[0053]
[0055] Where a range of values is presented, unless the context clearly dictates otherwise, it is understood that each intervening value between the upper and lower limit of that range is also specifically disclosed to the smallest unit of the unit of the lower limit. Any narrower range between any stated value or unstated intervening value in a stated range, as well as any other stated or intervening value in that stated range, are also encompassed. The upper and lower limits of these smaller ranges may be individually included or excluded in the range, and each range in which either, neither, or both limits are included in the narrower range is also encompassed within the technology and subject to the specifically excluded limit in the stated range. Where a stated range includes one or both of the limits, ranges excluding either or both of those included limits are also included.
[0054]
[0056] As used in this specification and the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to "a precursor" includes a reference to a plurality of such precursors, reference to "a layer" includes reference to one or more layers and equivalents thereof known to those skilled in the art, and so forth.
[0055]
[0057] Additionally, the terms "comprise(s)", "comprising", "contain(s)", "containing", "include(s)", and "including", when used in this specification and claims, are intended to specify the presence of stated features, integers, components, or steps, but do not exclude the presence or addition of one or more other features, integers, components, steps, operations, or groups.
Claims
1. forming a plasma of an oxygen-containing precursor in a processing region of a semiconductor processing chamber, the processing region containing a semiconductor substrate on a substrate support; flowing a silicon-containing precursor at a first flow rate into the processing region of the semiconductor processing chamber while maintaining the plasma of the oxygen-containing precursor; ramping the first flow rate of the silicon-containing precursor to a second flow rate greater than the first flow rate over a period of time; and depositing a silicon-containing material onto the semiconductor substrate; A deposition method comprising:
11. The method of claim 10, wherein forming the plasma of the oxygen-containing precursor comprises maintaining the processing region of the semiconductor processing chamber free of the silicon-containing precursor.
2. The deposition method of claim 1 , wherein the silicon-containing precursor comprises tetraethylorthosilicate.
3. The method of claim 1 , wherein the period of time is about 10 seconds or less.
4. 10. The deposition method of claim 1, wherein ramping the first flow rate occurs at a steady increase from about 2 grams of the silicon-containing precursor per second to about 5 grams of the silicon-containing precursor per second.
5. The deposition method of claim 1 , wherein said depositing is performed at a temperature of about 450° C. or less.
6. Forming a plasma of an oxygen-containing precursor in a processing region of a semiconductor processing chamber, the processing region containing a semiconductor substrate on a substrate support; flowing a silicon-containing precursor at a first flow rate into the processing region of the semiconductor processing chamber while maintaining the plasma of the oxygen-containing precursor; ramping the first flow rate of the silicon-containing precursor to a second flow rate greater than the first flow rate over a period of time; and depositing a silicon-containing material onto the semiconductor substrate; A deposition method comprising: A deposition method wherein the semiconductor substrate comprises silicon, and forming the plasma of the oxygen-containing precursor produces an oxygen radical surface termination of the silicon of the semiconductor substrate.
7. Forming a plasma of an oxygen-containing precursor in a processing region of a semiconductor processing chamber, the processing region containing a semiconductor substrate on a substrate support; flowing a silicon-containing precursor at a first flow rate into the processing region of the semiconductor processing chamber while maintaining the plasma of the oxygen-containing precursor; ramping the first flow rate of the silicon-containing precursor to a second flow rate greater than the first flow rate over a period of time; depositing a silicon-containing material onto the semiconductor substrate; subsequent to depositing a first amount of the silicon-containing material, stopping delivery of the silicon-containing precursor while maintaining a flow rate of the oxygen-containing precursor; and extinguishing a plasma in the processing region of the semiconductor processing chamber while maintaining a flow rate of the oxygen-containing precursor. The deposition method comprising:
8. re-forming a plasma of the oxygen-containing precursor; and re-flowing the silicon-containing precursor into the processing region of the semiconductor processing chamber. The deposition method of claim 7 further comprising:
9. flowing an oxygen-containing precursor into a processing region of a semiconductor processing chamber, the processing region containing a semiconductor substrate on a substrate support; flowing the oxygen-containing precursor into the processing region of the semiconductor processing chamber; forming a plasma of the oxygen-containing precursor; flowing a silicon-containing precursor into the processing region of the semiconductor processing chamber; increasing the flow rate of the silicon-containing precursor over a period of time; depositing a first amount of a silicon-containing material onto the semiconductor substrate; and stopping the flow of the silicon-containing precursor and forming the plasma while maintaining a flow rate of the oxygen-containing precursor. The deposition method comprising:
10. The deposition method of claim 9 , wherein the oxygen-containing precursor comprises diatomic oxygen.
11. re-forming the plasma of the oxygen-containing precursor; reflowing the silicon-containing precursor into the processing region of the semiconductor processing chamber; and increasing the flow rate of the silicon-containing precursor over the period of time. The deposition method of claim 9 further comprising:
12. The deposition method of claim 11 , which is repeated at least five times.
13. 10. The method of claim 9, wherein the semiconductor substrate is characterized by a recessed feature, and a thickness of the silicon-containing material deposited along an area of a sidewall proximate a bottom of the recessed feature is about 75% or greater than a thickness of the silicon-containing material deposited along an area of a sidewall proximate a top of the recessed feature.
14. forming a plasma of an oxygen-containing precursor in a processing region of a semiconductor processing chamber, the processing region containing a semiconductor substrate on a substrate support; flowing a silicon-containing precursor at a first flow rate into the processing region of the semiconductor processing chamber while maintaining the plasma of the oxygen-containing precursor; ramping the first flow rate of the silicon-containing precursor to a second flow rate greater than the first flow rate for a first period of time; depositing a first amount of silicon-containing material on the semiconductor substrate, the first amount of silicon-containing material being characterized by a tensile stress; ramping the first flow rate of the silicon-containing precursor from the second flow rate to the first flow rate over a second period of time; and depositing a second amount of silicon-containing material on the semiconductor substrate, the second amount of silicon-containing material being characterized by a compressive stress. The deposition method comprising:
15. The deposition method of claim 14 , wherein the stack of deposited silicon-containing materials is characterized by a substantially neutral stress.
16. 15. The deposition method of claim 14, wherein the first amount of silicon-containing material is characterized by a different thickness than the second amount of silicon-containing material on the semiconductor substrate.
17. The deposition method of claim 14 , which is repeated at least five times.
18. 15. The deposition method of claim 14, wherein the silicon-containing precursor is tetraethylorthosilicate and the oxygen-containing precursor is diatomic oxygen.
Citation Information
Patent Citations
Formation of thin silicon oxide film by plasma CVD method
JP1991166372A
High-integration semiconductor device and manufacture thereof
JP1994120358A
Manufacturing method for semiconductor device
JP1997064025A
Manufacturing method of semiconductor device and plasma insulating film forming device which is used for that
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Manufacturing method of thin-film transistor
JP2002261285A