Display panel and electronic device including the same

Abstract

To provide a display panel having a structure for preventing moisture from being transmitted via an open, and an electrochemical device containing them.SOLUTION: A display panel comprises: a substrate having a front surface, a rear surface, and an open penetrated to the rear surface from the front surface; a light emission diode arranged to a display region surrounding the open; a sealing layer; a first group of a non-display region defined to the substrate between the display region and the open; a second group of the non-display region separated from the first group; and a separation wall that is arranged between the first group and the second group of the non-display region. The substrate contains: a first base layer; a first barrier layer; a second base layer; and a second barrier layer in this order. The first group includes a concave-like shape recessed to the second barrier layer and the second base layer. The second barrier layer includes a first tip part projected toward the first group so as to over a first ground point where a side surface of the second base layer and a bottom surface of the second barrier layer are matched. The first tip end part has a specific shape.SELECTED DRAWING: Figure 10

Description

[Technical field]

[0001] The present invention relates to a display panel including a groove and an electronic device including the same. [Background technology]

[0002] Recently, display devices have become more and more versatile, and their thickness and weight have become thinner and lighter, allowing them to be used in a wider range of applications.

[0003] As the area occupied by the display area of ​​a display device increases, various functions that can be combined or linked to the display device are added. As a method for adding various functions while increasing the area, research is being conducted on a display device having an opening formed in the display area.

[0004] In the case of a display device having a conventional opening, if a foreign substance such as moisture penetrates from the side of the opening, the display element surrounding the opening may be damaged. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] U.S. Patent No. 9,632,487 Summary of the Invention [Problem to be solved by the invention]

[0006] The present invention has been made in consideration of the above-mentioned problems in the conventional art, and an object of the present invention is to provide a display panel having a structure that prevents moisture from penetrating through an opening, and an electronic device including the same. [Means for solving the problem]

[0007] A display panel according to one aspect of the present invention, which has been made to achieve the above-mentioned object, includes a substrate having a front surface, a rear surface, and an opening penetrating from the front surface to the rear surface; a light emitting diode disposed in a display region surrounding the opening, the light emitting diode including a pixel electrode, a counter electrode on the pixel electrode, and an intermediate layer between the pixel electrode and the counter electrode; a sealing layer on the light emitting diode including a first inorganic sealing layer, an organic sealing layer on the first inorganic sealing layer, and a second inorganic sealing layer on the organic sealing layer; a first groove in a non-display region defined in the substrate between the display region and the opening, a second groove in the non-display region spaced from the first groove, and a partition disposed between the first groove and the second groove in the non-display region, the substrate including a first base layer including a rear surface of the substrate, a first barrier layer on the first base layer, a second base layer on the first barrier layer, and a second barrier layer on the second base layer including a front surface of the substrate; The first groove has a concave shape recessed in the second barrier layer and the second base layer, and the second barrier layer has a first tip portion protruding toward the first groove beyond a first point where a side surface of the second base layer meets a bottom surface of the second barrier layer, and a length of the first tip portion is 0. .3 μm End 2 .0 μm less than and is the distance between the first point and a side surface of the first tip portion.

[0008] The first groove may be located between the display area and the partition wall, and the second groove may be located between the partition wall and the opening of the substrate. The second groove has a concave shape recessed into the second barrier layer and the second base layer, and the second barrier layer has a second tip portion protruding toward the second groove beyond a second point where a side surface of the second base layer facing the second groove meets a bottom surface of the second barrier layer, and a length of the second tip portion is greater than or equal to 0.3 μm and less than 2.0 μm, and may be a distance between the second point and a side surface of the second tip portion. The width of the first groove may be smaller than the width of the second groove. A portion of the organic sealing layer may extend into the non-display area and overlap the first groove. A portion of the organic sealing layer may at least partially fill the first groove. A portion of the second inorganic sealing layer and a portion of the first inorganic sealing layer may each extend to the non-display region and directly contact each other in a region corresponding to a portion of an upper surface of the partition wall. A portion of the second inorganic sealing layer and a portion of the first inorganic sealing layer may each extend to the non-display region and directly contact each other in the second groove. The first inorganic sealing layer may continuously overlap a top surface of the first tip portion, a side surface of the first tip portion, a bottom surface of the first tip portion, and a side surface of the second base layer. A depth from a bottom surface of the second barrier layer to a bottom surface of the first groove may be smaller than a thickness of the second base layer. The electronic device further includes a planarizing organic layer on the second inorganic encapsulation layer in the non-display area. The second base layer may be made of a polymeric resin and the second barrier layer may be made of an inorganic material.

[0009] In order to achieve the above object, an electronic device according to one aspect of the present invention includes a display panel including an aperture region, a display region surrounding the aperture region, and a non-display region between the aperture region and the display region, and a component below the display panel corresponding to the aperture region, the display panel including a pixel electrode, a counter electrode on the pixel electrode, and an intermediate layer between the pixel electrode and the counter electrode. On the substrate of the display panel a light emitting diode within the display area; 、 an encapsulation layer on the light-emitting diode, the encapsulation layer including a first inorganic encapsulation layer, an organic encapsulation layer on the first inorganic encapsulation layer, and a second inorganic encapsulation layer on the organic encapsulation layer; and , on the substrate a first groove in the non-display area and a multilayer film defined by the first groove and the multilayer film; , on the substratea second groove in the non-display area and a partition wall in the non-display area, the multilayer film includes a first layer and a second layer on the first layer, the first groove has a concave shape recessed into the second layer and the first layer, and the second layer has a first tip portion protruding toward the first groove beyond a first point where a side surface of the first layer meets a bottom surface of the second layer, the first inorganic sealing layer extends continuously to overlap the top and side surfaces of the first chip and the side surfaces of the first layer, forming a structure that is relatively concave with respect to a portion of the first inorganic sealing layer that overlaps the first chip, and the concave structure is at least partially filled with a portion of the organic sealing layer; The length of the first tip portion is 0 .3 μm End 2 .0 μm less than and is the distance between the first point and a side of the first tip.

[0010] The first groove is located between the display area and the barrier rib, and the second groove is located between the barrier rib and the display panel. The above It may be located between the opening in the substrate. The second groove is of A second base layer and a second barrier layer on the second base layer have a recessed concave shape, and the second barrier layer has a second tip portion protruding toward the second groove beyond a second point where a side surface of the second base layer facing the second groove meets a bottom surface of the second barrier layer, and a length of the second tip portion is not less than 0.3 μm and is less than 2.0 μm, and may be a distance between the second point and a side surface of the second tip portion. A portion of the organic sealing layer may extend into the non-display area and overlap the first groove. The width of the first groove may be smaller than the width of the second groove. A portion of the organic sealing layer may at least partially fill the first groove. A portion of the second inorganic sealing layer and a portion of the first inorganic sealing layer may each extend to the non-display region and directly contact each other in the second groove. A portion of the second inorganic sealing layer and a portion of the first inorganic sealing layer may each extend to the non-display region and directly contact each other in a region corresponding to a portion of an upper surface of the partition wall. The substrate includes a first base layer, a first barrier layer, a second base layer, and a second barrier layer, which are stacked in sequence; The display panel The above substrate The above Formed on the second base layer The above A depth from a bottom surface of the second barrier layer to a bottom surface of the first groove may be smaller than a thickness of the second base layer. The display panel may further include a transistor electrically connected to the light emitting diode, and the multilayer film may be located in the display area and the non-display area, and may be located below the transistor in the display area. The first layer may be made of a polymeric resin and the second layer may be made of an inorganic material. The multilayer film may be located in the display area and the non-display area, and may be located below the transistor in the display area. The component may include a sensor or a camera.

[0011] Other aspects, features, and advantages of the above-described configurations will be apparent from the drawings, claims, and detailed description of the invention. Effect of the Invention

[0012] According to the display panel of the present invention, the groove can be prevented from being damaged by the undercut cross section, and therefore the display element can be prevented from being damaged by foreign matter such as external moisture. However, such effects are merely examples and are not intended to limit the scope of the present invention. [Brief description of the drawings]

[0013] [Figure 1] 1 is a schematic perspective view of a display device according to an embodiment of the present invention; [Diagram 2] 1 is a cross-sectional view illustrating a display device according to an embodiment of the present invention; [Diagram 3] 1 is a plan view illustrating a display panel according to an embodiment of the present invention; [Figure 4] 2 is an equivalent circuit diagram that illustrates a schematic diagram of one pixel of a display panel. [Diagram 5]4 is a diagram showing signal lines located in a first non-display area in a display panel according to an embodiment of the present invention; FIG. [Figure 6] 4A and 4B are diagrams illustrating grooves located in a first non-display area of ​​a display panel according to an embodiment of the present invention. [Figure 7] 2 is a cross-sectional view of one pixel provided in a display panel according to an embodiment of the present invention. [Figure 8A] 3 is a cross-sectional view of a first example of a groove provided in a display panel according to an embodiment of the present invention. FIG. [Figure 8B] 6 is a cross-sectional view of a second example of a groove provided in a display panel according to an embodiment of the present invention; FIG. [Figure 8C] 11 is a cross-sectional view of a third example of a groove provided in a display panel according to an embodiment of the present invention. FIG. [Figure 8D] 11 is a cross-sectional view of a fourth example of a groove provided in a display panel according to an embodiment of the present invention. FIG. [Figure 9] 1 is a cross-sectional view of a display panel according to an embodiment of the present invention; [Figure 10] 3 is a cross-sectional view showing a first example of a groove in a display panel according to an embodiment of the present invention. FIG. [Figure 11] 11 is a cross-sectional view showing a second example of a groove in a display panel according to an embodiment of the present invention. FIG. [Figure 12] 11 is a cross-sectional view showing a third example of a groove in a display panel according to an embodiment of the present invention. FIG. [Figure 13] FIG. 11 is a cross-sectional view illustrating an example of a groove in a display panel according to another embodiment of the present invention. [Figure 14] 11 is a cross-sectional view illustrating another example of a groove in a display panel according to another embodiment of the present invention. [Figure 15] 11 is a cross-sectional view showing an example of a groove in a display panel according to still another embodiment of the present invention. [Figure 16] 11 is a cross-sectional view illustrating another example of a groove in a display panel according to still another embodiment of the present invention. [Figure 17] 11 is a cross-sectional view of a display panel according to another embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] The present invention can be modified in various ways and can have various embodiments, but specific embodiments are illustrated in the drawings and will be described in detail in this specification. The effects, features, and methods of achieving the present invention will become clear when referring to the embodiments described in detail together with the drawings. However, the present invention is not limited to the embodiments disclosed below, and can be embodied in various forms.

[0015] Hereinafter, specific examples of embodiments of the present invention will be described in detail with reference to the drawings. In the description with reference to the drawings, the same or corresponding elements are designated by the same reference numerals, and duplicated description thereof will be omitted.

[0016] In the following embodiments, terms such as first and second are not used in a limiting sense but are used for the purpose of distinguishing one component from another component.

[0017] In the following embodiments, the singular expression includes the plural expression unless otherwise clearly indicated in the context.

[0018] In the following embodiments, the terms "comprise" or "have" mean the presence of features or components described in the specification, and do not preclude the possibility that one or more other features or components may be added.

[0019] In the following embodiments, when a part such as a film, region, or component is said to be on or above another part, this does not only mean that it is directly on top of the other part, but also means that there is another film, region, component, etc. in between.

[0020] In the drawings, the size of components may be exaggerated or reduced for the convenience of explanation. For example, the size and thickness of each component shown in the drawings are arbitrarily shown for the convenience of explanation, and the present invention is not necessarily limited to those shown in the drawings.

[0021] Certain steps may be performed out of the order described when certain embodiments may be implemented differently. For example, two steps described as successive may be performed substantially simultaneously or may be performed in the reverse order from that described.

[0022] In the following embodiments, when a membrane, region, component, etc. is said to be connected, it includes not only the case where the membrane, region, component, etc. are directly connected, but also the case where the membrane, region, component, etc. are indirectly connected with another membrane, region, component, etc. being interposed between them. For example, in this specification, when a membrane, region, component, etc. is said to be electrically connected, it includes not only the case where the membrane, region, component, etc. are directly electrically connected, but also the case where the membrane, region, component, etc. are indirectly electrically connected with another membrane, region, component, etc. being interposed between them.

[0023] FIG. 1 is a perspective view illustrating a display device according to an embodiment of the present invention.

[0024] 1, the display device 1 includes a display area DA that emits light and a non-display area NDA that does not emit light. The non-display area NDA is disposed adjacent to the display area DA. The display device 1 provides a predetermined image using light emitted from each of a plurality of pixels disposed in the display area DA.

[0025] The display device 1 includes an opening area OA that is at least partially surrounded by a display area DA. In this embodiment, FIG. 1 shows the opening area OA being entirely surrounded by the display area DA. The non-display area NDA includes a first non-display area NDA1 that surrounds the opening area OA, and a second non-display area NDA2 that surrounds the periphery of the display area DA. The first non-display area NDA1 entirely surrounds the opening area OA, the display area DA entirely surrounds the first non-display area NDA1, and the second non-display area NDA2 entirely surrounds the display area DA.

[0026] Hereinafter, an organic light emitting display device will be described as an example of a display device 1 according to an embodiment of the present invention, but the display device of the present invention is not limited thereto. In other embodiments, various types of display devices such as an inorganic light emitting display device and a quantum dot light emitting display device may be used.

[0027] FIG. 2 is a cross-sectional view showing a display device according to an embodiment of the present invention, and corresponds to the cross section taken along line II-II' in FIG.

[0028] 2, the display device 1 includes a display panel 10, an input sensing member 20 disposed on the display panel 10, and an optically functional member 30, which are covered by a window 40. The display device 1 may be any of a variety of electronic devices, such as a mobile phone, a notebook computer, or a smart watch.

[0029] The display panel 10 displays an image. The display panel 10 includes pixels arranged in a display area DA. The pixels include a display element and a pixel circuit coupled thereto. The display element may include an organic light emitting diode, an inorganic light emitting diode, a quantum dot light emitting diode, etc.

[0030] The input sensing member 20 acquires coordinate information based on an external input, for example, a touch event. The input sensing member 20 includes a sensing electrode (or touch electrode) and a signal line (trace line) connected to the sensing electrode. The input sensing member 20 is disposed on the display panel 10.

[0031] The input sensing member 20 is formed directly on the display panel 10, or is formed separately and then bonded to the display panel 10 via an adhesive layer such as an optically clear adhesive (OCA). For example, the input sensing member 20 is formed continuously after the process of forming the display panel 10. In that case, no adhesive layer is interposed between the input sensing member 20 and the display panel 10. Although FIG. 2 shows the input sensing member 20 interposed between the display panel 10 and the optically functional member 30, in other embodiments, the input sensing member 20 is disposed on the optically functional member 30.

[0032] The optically functional member 30 includes an anti-reflection layer. The anti-reflection layer reduces the reflectance of light (external light) incident from the outside toward the display panel 10 through the window 40. The anti-reflection layer includes a phase retarder and a polarizer. The phase retarder is a film type or a liquid crystal coating type, and includes a λ / 2 phase retarder and / or a λ / 4 phase retarder. The polarizer is also a film type or a liquid crystal coating type. The film type is a stretched synthetic resin film, and the liquid crystal coating type includes liquid crystals arranged in a predetermined array. Each of the phase retarders and polarizers further includes a protective film. The phase retarder and polarizer themselves or the protective film are defined as the base layer of the anti-reflection layer.

[0033] In another embodiment, the anti-reflection layer includes a black matrix and a color filter. The color filters are arranged taking into consideration the hue of light emitted from each pixel of the display panel 10. In yet another embodiment, the anti-reflection layer includes a destructive interference structure. The destructive interference structure includes a first reflective layer and a second reflective layer disposed on different layers. The first reflected light and the second reflected light reflected by the first reflective layer and the second reflective layer, respectively, are destructively interfered with, thereby reducing the external light reflectance.

[0034] The optically functional member 30 includes a lens layer. The lens layer improves the light output efficiency or reduces color deviation of the light emitted from the display panel 10. The lens layer includes a layer having a concave or convex lens shape and / or includes a plurality of layers having different refractive indices. The optically functional member 30 includes both the anti-reflection layer and the lens layer described above, or includes any one of them.

[0035] The display panel 10, the input sensing member 20, and the optically functional member 30 each include an opening. In this regard, FIG. 2 shows that the display panel 10, the input sensing member 20, and the optically functional member 30 each include a first opening 10H, a second opening 20H, and a third opening 30H, and the first opening 10H, the second opening 20H, and the third opening 30H overlap each other. The first opening 10H, the second opening 20H, and the third opening 30H are positioned to correspond to the opening area OA. In another embodiment, at least one of the display panel 10, the input sensing member 20, and the optically functional member 30 does not include an opening. For example, any one or two components selected from the display panel 10, the input sensing member 20, and the optically functional member 30 does not include an opening.

[0036] The component 50 corresponds to the opening area OA. The component 50 is located within the first opening 10H, the second opening 20H, and the third opening 30H as shown by solid lines in Fig. 2, or is disposed below the display panel 10 as shown by dotted lines.

[0037] The component 50 includes an electronic element. For example, the component 50 is an electronic element that uses light or sound. For example, the electronic element includes a sensor that receives and uses light, such as an infrared sensor, a camera that receives light and captures an image, a sensor that outputs and senses light or sound to measure distance or recognize fingerprints, a small lamp that outputs light, a speaker that outputs sound, and the like. In the case of an electronic element that uses light, light of various wavelength bands, such as visible light, infrared light, and ultraviolet light, is used. In one embodiment, the opening area OA is understood to be a transmission area through which light and / or sound that is output from the component 50 to the outside or travels from the outside toward the electronic element passes.

[0038] In another embodiment, when the display device 1 is used in a smart watch or a vehicle instrument panel, the component 50 is a member including a clock hand or a hand indicating predetermined information (e.g., vehicle speed, etc.) When the display device 1 includes a clock hand or a vehicle instrument panel, the component 50 penetrates the window 40 and is exposed to the outside, and the window 40 includes an opening corresponding to the opening area OA.

[0039] The components 50 may include components related to the functions of the display panel 10 as described above, or may include components such as accessories that enhance the aesthetic appeal of the display panel 10.

[0040] FIG. 3 is a plan view illustrating a display panel according to an embodiment of the present invention, and FIG. 4 is an equivalent circuit diagram illustrating one pixel of the display panel.

[0041] 3, the display panel 10 includes a display area DA, a first non-display area NDA1, and a second non-display area NDA2. Fig. 3 is understood to be an appearance of a substrate 100 in the display panel 10. For example, it is understood that the substrate 100 has an opening area OA, a display area DA, a first non-display area NDA1, and a second non-display area NDA2.

[0042] The display panel 10 includes a plurality of pixels P arranged in a display area DA. Each pixel P includes a pixel circuit PC and an organic light emitting diode OLED as a display element connected to the pixel circuit PC, as shown in Fig. 4. The pixel circuit PC includes a first thin film transistor T1, a second thin film transistor T2, and a storage capacitor Cst. Each pixel P emits light of, for example, red, green, blue, or white color through the organic light emitting diode OLED.

[0043] The second thin film transistor T2 is a switching thin film transistor connected to the scan line SL and the data line DL and transmits a data voltage input from the data line DL to the first thin film transistor T1 according to a switching voltage input from the scan line SL. The storage capacitor Cst is connected to the second thin film transistor T2 and the driving voltage line PL and stores a voltage corresponding to a difference between the voltage transmitted from the second thin film transistor T2 and the first power supply voltage ELVDD supplied to the driving voltage line PL.

[0044] The first thin film transistor T1 is a driving thin film transistor, and is connected to the driving voltage line PL and the storage capacitor Cst, and controls a driving current flowing from the driving voltage line PL to the organic light emitting diode OLED in response to the voltage value stored in the storage capacitor Cst. The organic light emitting diode OLED emits light having a predetermined brightness according to the driving current. A counter electrode (e.g., a cathode) of the organic light emitting diode OLED supplies a second power supply voltage ELVSS.

[0045] 4 illustrates the pixel circuit PC including two thin film transistors and one storage capacitor, the present invention is not limited thereto, and it goes without saying that the number of thin film transistors and the number of storage capacitors may be varied according to the design of the pixel circuit PC.

[0046] 3, the first non-display area NDA1 surrounds the opening area OA. The first non-display area NDA1 is an area where display elements such as organic light emitting diodes that emit light are not arranged, and in the first non-display area NDA1, signal lines that provide signals to pixels P provided around the opening area OA pass through or grooves, which will be described later, are arranged. In the second non-display area NDA2, a scan driver 1100 that provides scan signals to each pixel P, a data driver 1200 that provides data signals to each pixel P, main power wiring (not shown) for providing a first power supply voltage and a second power supply voltage, etc. are arranged. Although the data driver 1200 is shown to be arranged adjacent to one side of the substrate 100 in FIG. 4, in another embodiment, the data driver 1200 is arranged on a flexible printed circuit board (FPCB) that is electrically connected to a pad arranged on one side of the display panel 10.

[0047] FIG. 5 is a plan view showing a portion of a display panel according to an embodiment of the present invention, illustrating signal lines located in a first non-display area.

[0048] Referring to FIG. 5, pixels P are arranged in a display area DA with an aperture area OA at the center, and a first non-display area NDA1 is located between the aperture area OA and the display area DA.

[0049] The pixels P are spaced apart from one another with the opening region OA at the center. The pixels P are spaced apart up and down with the opening region OA at the center, and / or spaced apart left and right with the opening region OA at the center.

[0050] Among the signal lines that supply signals to the pixels P, the signal lines adjacent to the opening region OA bypass the opening region OA. Some of the data lines DL among the data lines that pass through the display region DA are extended in the y direction to provide data signals to the pixels P arranged above and below the opening region OA, but bypass the opening region OA in the first non-display region NDA1 along the edge of the opening region OA. Some of the scan lines SL among the scan lines that pass through the display region DA are extended in the x direction to provide scan signals to the pixels P arranged to the left and right of the opening region OA, but bypass the opening region OA in the first non-display region NDA1 along the edge of the opening region OA.

[0051] FIG. 6 is a plan view showing a portion of a display panel according to an embodiment of the present invention, illustrating grooves located in a first non-display area NDA1.

[0052] Between the opening area OA and the display area DA, one or more grooves are located. In this regard, although Fig. 6 shows three grooves G located between the opening area OA and the display area DA, the present invention is not limited thereto. In other embodiments, one, two, or four or more grooves are arranged in the first non-display area NDA1.

[0053] The groove G is annular in shape and entirely surrounds the opening area OA in the first non-display area NDA1. The diameter of each groove G is greater than the diameter of the opening area OA. The grooves G surrounding the opening area OA on a plane are spaced apart at a predetermined interval.

[0054] 5 and 6, the groove G is positioned closer to the aperture area OA than the bypass portions of the data lines and / or scan lines that bypass the edges of the aperture area OA.

[0055] FIG. 7 is a cross-sectional view of a pixel provided in a display panel according to an embodiment of the present invention, and corresponds to a cross-section taken along line VII-VII' in FIG.

[0056] Referring to FIG. 7, a pixel circuit PC and an organic light emitting diode OLED electrically connected to the pixel circuit PC are arranged in a display area DA.

[0057] A thin film transistor TFT, a storage capacitor Cst, and a pixel electrode 221 electrically connected thereto are formed on a substrate 100. A pixel circuit PC is disposed on the substrate 100, and an organic light emitting diode OLED is disposed on the pixel circuit PC.

[0058] The substrate 100 includes a polymer resin or glass. In one embodiment, the substrate 100 includes a polymer resin such as polyethersulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyimide (PI), polycarbonate (PC), cellulose triacetate (TAC), or / and cellulose acetate propionate (CAP), and has a flexible property. The substrate 100 includes a SiO 2 It contains a glass material mainly composed of glass or resin such as reinforced plastic, and has rigid properties.

[0059] A buffer layer 201 is formed on the substrate 100 to prevent impurities from penetrating into the semiconductor layer Act of the thin film transistor TFT. The buffer layer 201 includes an inorganic insulator such as silicon nitride or silicon oxide, and is a single layer or a multilayer including the above-mentioned inorganic insulator.

[0060] A pixel circuit PC is disposed on the buffer layer 201. The pixel circuit PC includes a thin film transistor TFT and a storage capacitor Cst. The thin film transistor TFT includes a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE. The thin film transistor TFT shown in FIG. 7 corresponds to the driving thin film transistor described with reference to FIG. 4. In this embodiment, a top gate type in which the gate electrode GE is disposed on the semiconductor layer Act with the gate insulating layer 203 sandwiched therebetween is illustrated, but according to other embodiments, the thin film transistor TFT is a bottom gate type.

[0061] The semiconductor layer Act includes polysilicon. Alternatively, the semiconductor layer Act includes amorphous silicon, an oxide semiconductor, an organic semiconductor, etc. The gate electrode GE includes a low-resistance metal material. The gate electrode GE includes a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and is formed in a multilayer or single layer including the above-mentioned materials.

[0062] The gate insulating layer 203 between the semiconductor layer Act and the gate electrode GE includes an inorganic insulator such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, etc. The gate insulating layer 203 is a single layer or a multilayer including the above-mentioned materials.

[0063] The source electrode SE and the drain electrode DE include materials with good electrical conductivity. The source electrode SE and the drain electrode DE include conductive materials including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and are formed in a multi-layer or single layer including the above-mentioned materials. In one embodiment, the source electrode SE and the drain electrode DE are formed in a Ti / Al / Ti multi-layer.

[0064] The storage capacitor Cst includes a lower electrode CE1 and an upper electrode CE2 overlapping with a first interlayer insulating layer 205 sandwiched therebetween. The storage capacitor Cst overlaps the thin film transistor TFT. In this regard, FIG. 7 shows that the gate electrode GE of the thin film transistor TFT is the lower electrode CE1 of the storage capacitor Cst. In another embodiment, the storage capacitor Cst does not overlap the thin film transistor TFT. The storage capacitor Cst is covered by a second interlayer insulating layer 207.

[0065] The first interlayer insulating layer 205 and the second interlayer insulating layer 207 include inorganic insulators such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, etc. The first interlayer insulating layer 205 and the second interlayer insulating layer 207 are single or multi-layers including the above-mentioned materials.

[0066] The pixel circuit PC including the thin film transistor TFT and the storage capacitor Cst is covered by the first insulating layer 209. The first insulating layer 209 is a planarized insulating layer and includes a substantially flat upper surface. The first insulating layer 209 includes an organic insulator such as a general-purpose polymer such as PMMA (polymethylmethacrylate) or PS (polystylene), a polymer derivative having a phenol group, an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a p-xylene polymer, a vinyl alcohol polymer, and a blend thereof. In one embodiment, the first insulating layer 209 includes a polyimide. Alternatively, the first insulating layer 209 includes an inorganic insulator, or includes an inorganic insulator and an organic insulator.

[0067] The pixel electrode 221 is formed on the first insulating layer 209. The pixel electrode 221 is made of a material such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3In another embodiment, the pixel electrode 221 includes a reflective film including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or a combination thereof. In yet another embodiment, the pixel electrode 221 includes a reflective film including ITO, IZO, ZnO, or In above and below the reflective film. 2 O 3 The present invention further includes a membrane formed of

[0068] A second insulating layer 211 is formed on the pixel electrode 221. The second insulating layer 211 is a pixel defining layer. The second insulating layer 211 includes an opening that exposes the top surface of the pixel electrode 221, but covers the edge of the pixel electrode 221. The second insulating layer 211 includes an organic insulator. Alternatively, the second insulating layer 211 may be made of silicon nitride (SiN x ), silicon oxynitride (SiON), or silicon oxide (SiO x Alternatively, the second insulating layer 211 may include an organic insulator and an inorganic insulator.

[0069] The intermediate layer 222 includes a light-emitting layer 222b. The intermediate layer 222 includes a first functional layer 222a disposed under the light-emitting layer 222b and / or a second functional layer 222c disposed on the light-emitting layer 222b. The light-emitting layer 222b includes a polymer organic material or a small molecule organic material that emits light of a predetermined hue.

[0070] The first functional layer 222a is a single layer or a multilayer. For example, when the first functional layer 222a is made of a polymeric material, the first functional layer 222a is a hole transport layer (HTL) having a single layer structure and is made of polyethylene dihydroxythiophene (PEDOT) or polyaniline (PANI). When the first functional layer 222a is made of a low molecular weight material, the first functional layer 222a includes a hole injection layer (HIL) and a hole transport layer (HTL).

[0071] The second functional layer 222c is not always provided. For example, when the first functional layer 222a and the light-emitting layer 222b are formed of a polymeric substance, it is preferable to form the second functional layer 222c. The second functional layer 222c is a single layer or a multilayer. The second functional layer 222c includes an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0072] The light-emitting layer 222b in the intermediate layer 222 is disposed for each pixel in the display area DA. The light-emitting layer 222b contacts the upper surface of the pixel electrode 221 exposed through the opening in the second insulating layer 211. In the intermediate layer 222, the first functional layer 222a and the second functional layer 222c are formed not only in the display area DA in Fig. 7 but also on a first non-display area NDA1 described with reference to Figs. 8A and 8B.

[0073] The counter electrode 223 is made of a conductive material with a low work function. For example, the counter electrode 223 includes a (semi-)transparent layer including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), alloys thereof, or the like. Alternatively, the counter electrode 223 includes a (semi-)transparent layer including the above-mentioned material and a (semi-)transparent layer including ITO, IZO, ZnO, or In. 2 O 3 The counter electrode 223 is formed not only in the display area DA but also in the first non-display area NDA1. The intermediate layer 222 and the counter electrode 223 are formed by a thermal evaporation method.

[0074] A spacer 213 is formed on the second insulating layer 211. The spacer 213 may include an organic insulator such as polyimide, or may include an inorganic insulator such as silicon nitride or silicon oxide, or may include both an organic insulator and an inorganic insulator.

[0075] The spacers 213 may include a different material than the second insulating layer 211. Alternatively, the spacers 213 may include the same material as the second insulating layer 211, in which case the second insulating layer 211 and the spacers 213 may be formed together by a mask process using a half-tone mask, etc. In one embodiment, the second insulating layer 211 and the spacers 213 include polyimide.

[0076] Capping layer 230 is disposed on counter electrode 223. Capping layer 230 includes LiF, inorganic, and / or organic. In one embodiment, capping layer 230 is omitted.

[0077] 8A to 8D are cross-sectional views of various examples of grooves provided in a display panel according to an embodiment of the present invention, and each of FIGS. 8A to 8D corresponds to a cross section taken along line VIII-VIII' in FIG.

[0078] Referring to Figures 8A and 8B, the groove G is formed of a multilayer film ML. The multilayer film ML includes at least two layers having different materials. In this regard, Figures 8A and 8B show a multilayer film ML including a first layer L1 including an organic material and a second layer L2 including an inorganic material. The first layer L1 includes an organic insulator. For example, the first layer L1 includes a polymer resin such as polyimide. The second layer L2 includes an inorganic insulator such as silicon nitride, silicon oxynitride, or silicon oxide. Alternatively, the second layer L2 includes a metal.

[0079] The multilayer film ML in Figures 8A and 8B corresponds to a part of the components of the display panel described with reference to Figure 7. For example, the multilayer film ML is a sub-layer of the substrate 100 described with reference to Figure 7. Alternatively, the multilayer film ML corresponds to a layer constituting the display panel, for example, a part of a layer on the substrate 100.

[0080] The groove G is formed along the depth direction of the multilayer film ML. As shown in FIG. 8A, the second layer L2 is etched to form a second hole H2 penetrating the second layer L2, and the first layer L1 is etched to form a first recess R1 concave in the thickness direction of the first layer L1. The first recess R1 and the second hole H2 are spatially connected to form the groove G. Alternatively, as shown in FIG. 8B, the second layer L2 is etched to form a second hole H2 penetrating the second layer L2, and the first layer L1 is etched to form a first hole H1 penetrating the first layer L1. The first hole H1 and the second hole H2 are spatially connected to form the groove G. The above-mentioned etching is isotropic etching and / or anisotropic etching.

[0081] In the groove G, the width of the portion passing through the second layer L2 is formed narrower than the width of the portion passing through the first layer L1. For example, the width (or diameter) W2 of the second hole H2 is formed narrower than the width (or diameter) W1 of the first recess R1 or the first hole H1.

[0082] The groove G has an undercut cross section. The side surface of the second layer L2 that defines the second hole H2 protrudes further than the side surface of the first layer L1 that defines the first recess R1 or the first hole H1 along a direction (e.g., x direction) parallel to the upper surface (or lower surface) of the substrate 100. The portion of the second layer L2 that protrudes toward the center of the groove G forms a pair of overhangs (a pair of protruding tips, or simply referred to as tips) PT.

[0083] The groove G is formed before the step of forming the intermediate layer 222 described with reference to FIG. 7 above, but the capping layer 230 contains LiF, which is formed by thermal evaporation, as are the sub-layer 222′ and the counter electrode 223. The sub-layer 222′ of the intermediate layer, the counter electrode 223, and the capping layer 230 are interrupted by the groove G. In this regard, FIGS. 8A and 8B show that the first and second functional layers 222a and 222c, the counter electrode 223, and the capping layer 230 are interrupted around the tip PT of the groove G. Although FIGS. 8A and 8B show that the first and second functional layers 222a and 222c, the counter electrode 223, and the capping layer 230 are interrupted around the groove G or the tip PT, the present invention is not limited thereto. As another example, any one of the first functional layer 222a and the second functional layer 222c and / or the capping layer 230 are omitted.

[0084] The length l of each of the pair of tip portions PT is shorter than 2.0 μm. Here, the length l of the tip portion PT is measured in the cross section from the point where the side surface and the top surface of the first layer L1 located directly below the second layer L2 having the tip portion PT meet toward the center of the groove G along the horizontal direction (or the direction perpendicular to the top or bottom surface of the substrate, the x direction). The length l of the tip portion PT being shorter than 2 μm does not include the case where it is 0 μm. The length l of the tip portion PT is selected from the range longer than 0 μm and shorter than 2 μm. For example, the length l of the tip portion PT is 0.3 μm≦l<2.0 μm, 0.5 μm≦l<2.0 μm, 0.8 μm≦l<2.0 μm, or 1.0 μm≦l<2.0 μm. If the length l of the tip portion PT is shorter than 0.3 μm, the sub-layer 222' and the counter electrode 223 will not be interrupted at the center of the tip portion PT, causing a problem in which moisture will penetrate through the uninterrupted sub-layer 222' toward the organic light-emitting diode in the display area.

[0085] If the length l of the tip PT is outside the above upper limit, the tip PT may crack or break during or after the manufacturing process of the display panel. As an experimental example of the present invention, display panel samples having different lengths of tip were manufactured. The samples were manufactured to have tip lengths of 0.8 μm to 2.0 μm, and the manufactured samples were left in a chamber with a humidity of 85% and a temperature of 85° C. for a predetermined time (e.g., 240 hours or more) and then measured whether the tip was damaged or not. As a result of the measurement, it was confirmed that when the length l of the tip PT is shorter than 2.0 μm, there is no damaged tip, whereas when the length l of the tip PT is 2.0 μm or more, damaged tips are found, and when the length l of the tip PT is 2.0 μm or more, the tip damage rate (number of damaged tips / total number of tips) is about 46.7%.

[0086] The groove G has a predetermined depth dp. Here, the depth dp of the groove G indicates the depth of the portion of the groove G that passes through the first layer L1. For example, the depth dp of the groove G corresponds to the vertical distance from the top surface of the first layer directly below the tip portion PT to the bottom surface of the groove G.

[0087] The depth dp of the groove G is deeper than the length l of the tip portion PT. In one embodiment, the depth dp of the groove G and the length l of the tip portion PT are, for example, 0.05<(l / dp)<0.50, 0.1<(l / dp)<0.50, 0.15<(l / dp)<0.50, 0.2<(l / dp)<0.50, 0.25<(l / dp)<0.50, 0.25<(l / dp)<0.45, 0.25<(l / dp)<0.40, or 0.25<(l / dp)<0.35.

[0088] The depth dp of the groove G is greater than the sum ts of the thicknesses of the first functional layer 222a and the second functional layer 222c, the counter electrode 223, and the capping layer 230, which are interrupted at the center of the groove G. In one embodiment, the depth dp of the groove G is 2.0 μm or greater. Alternatively, the depth dp of the groove G is 3.0 μm or greater.

[0089] Referring to FIG. 8A, the depth dp of the groove G is shallower than the thickness t of the first layer L1, and the bottom surface of the groove G is located between the top surface and the bottom surface of the first layer L1. Alternatively, as shown in FIG. 8B, the depth dp of the groove G is equal to the thickness t of the first layer L1. Thus, the bottom surface of the groove G is located on the bottom surface of the first layer L1 or on the top surface of the lower layer LL below the first layer L1. The lower layer LL includes an insulator, such as an organic insulator or an inorganic insulator. In one embodiment, the depth dp of the groove G is 6.0 μm or shallower. The depth dp of the groove G is, for example, 2.0 μm≦dp≦6.0 μm, 2.5 μm≦dp≦6.0 μm, 3.0 μm≦dp≦6.0 μm, 3.5 μm≦dp≦6.0 μm, 4.0 μm≦dp≦6.0 μm, 4.5 μm≦dp≦6.0 μm, 5.0 μm≦dp≦6.0 μm, or 5.5 μm≦dp≦6.0 μm.

[0090] The distance between the pair of tip portions PT, i.e., the second width W2, is longer than the length l of the tip portions PT, and in one embodiment, the second width W2 is, for example, in the range of 3 to 100 times, 5 to 70 times, 5 to 50 times, 5 to 30 times, 5 to 20 times, or 7 to 20 times the length l of the tip portions PT. The second width W2 is longer than the depth dp of the groove G. For example, the second width W2 is 1.5 times or more, 2 times or more, or 2.5 times or more of the depth dp of the groove G.

[0091] 8A and 8B show the first functional layer 222a and the second functional layer 222c, the counter electrode 223, and the capping layer 230, which are interrupted around the groove G or a pair of tip portions PT, but the present invention is not limited thereto. As another example (third example), as shown in FIG. 8C, the capping layer is omitted. In that case, the layers interrupted by the groove G are the first functional layer 222a and the second functional layer 222c, and the counter electrode 223. As another embodiment, one of the first functional layer 222a and the second functional layer 222c is omitted. As described above, the depth dp of the groove G is deeper than the thickness ts' of the laminate of the first functional layer 222a, the second functional layer 222c, and the counter electrode 223. In addition, the features related to the length l of the tip portion PT and the depth dp of the groove G are as described with reference to FIG. 8A and FIG. 8B. It goes without saying that the structure in which the capping layer is omitted as described with reference to FIG. 8C also applies to the embodiment described with reference to FIG. 8B.

[0092] As yet another example (fourth example), the capping layer 230 is not interrupted around the groove G as shown in FIG. 8D. The capping layer 230 includes an inorganic insulator such as silicon oxide, silicon nitride, or silicon oxynitride, and the inorganic insulator is formed by chemical vapor deposition (CVD). The capping layer 230, which is an inorganic insulator, has relatively better step coverage than the first functional layer 222a and the second functional layer 222c, which are formed by thermal evaporation, and the counter electrode 223, and can cover the entire inner surface of the groove G continuously as shown in FIG. 8D. The other features of the capping layer 230, except for the fact that the capping layer 230 continuously covers the inner surface of the groove G, are the same as those described above with reference to FIGS. 8A and 8B.

[0093] In another embodiment, if the capping layer 230 comprises an organic material, it is discontinued around the grooves G as described above with reference to FIGS. 8A and 8B.

[0094] Fig. 9 is a cross-sectional view of a display panel according to an embodiment of the present invention, Fig. 10 is a cross-sectional view of a first example of a groove in a display panel according to an embodiment of the present invention, and Fig. 11 is a cross-sectional view of a second example of a groove in a display panel according to an embodiment of the present invention. Fig. 9 corresponds to a cross section taken along line IX-IX' in Fig. 6, and Fig. 10 corresponds to an enlarged cross-sectional view of the groove in Fig. 9.

[0095] 9, the display panel 10 includes an opening area OA, a display area DA, and a first non-display area NDA1 therebetween. The display panel 10 includes a first opening 10H corresponding to the opening area OA.

[0096] Referring to a display area DA in FIG. 9, a thin film transistor TFT and a storage capacitor Cst are disposed on a substrate 100 in the display area DA.

[0097] The substrate 100 is multi-layered. For example, the substrate 100 includes a first base layer 101, a first barrier layer 102, a second base layer 103, and a second barrier layer 104, which are stacked in sequence.

[0098] The first base layer 101 and the second base layer 103 each include a polymer resin. For example, the first base layer 101 and the second base layer 103 include a polymer resin such as polyethersulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyimide (PI), polycarbonate (PC), cellulose triacetate (TAC), and cellulose acetate propionate (CAP). The above-mentioned polymer resins are transparent.

[0099] The first barrier layer 102 and the second barrier layer 104 are barrier layers that prevent the penetration of external foreign matter, and are made of silicon nitride (SiN x ) and / or silicon oxide (SiO x ) and may be a single layer or multilayer.

[0100] Insulating layers 201-209 are interposed between the semiconductor layer and the electrode of the thin film transistor TFT and between the electrodes of the storage capacitor Cst. In the display area DA, a pixel electrode 221 electrically connected to the thin film transistor TFT, an intermediate layer 222, a counter electrode 223, and a capping layer 230 are arranged, and the above-mentioned configuration is as described with reference to FIG.

[0101] The display element including the pixel electrode 221, the intermediate layer 222, and the counter electrode 223 is covered by a thin film encapsulation layer 300. The thin film encapsulation layer 300 includes at least one organic encapsulation layer and at least one inorganic encapsulation layer. Figure 9 shows the thin film encapsulation layer 300 including a first inorganic encapsulation layer 310 and a second inorganic encapsulation layer 330, and an organic encapsulation layer 320 interposed therebetween. In other embodiments, the number of organic encapsulation layers and the number of inorganic encapsulation layers, as well as the stacking order, are changed.

[0102] The first inorganic encapsulation layer 310 includes one or more inorganic insulators, such as aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, or silicon oxynitride, and is formed by a chemical vapor deposition (CVD) method or the like. The organic encapsulation layer 320 includes a polymer-based material, such as an acrylic resin, an epoxy resin, a polyimide, or a polyethylene.

[0103] Referring to the first non-display area NDA1 in Figure 9, the first non-display area NDA1 includes a first sub-non-display area SNDA1 relatively adjacent to the display area DA, and a second sub-non-display area SNDA2 relatively adjacent to the opening area OA or the first opening 10H.

[0104] The first non-display sub-area SNDA1 is an area through which a signal line, for example, the data line DL described with reference to Fig. 5, passes. The data line DL shown in Fig. 9 corresponds to a data line that bypasses the opening area OA. The first non-display sub-area SNDA1 is a wiring area or a bypass area through which the data line DL passes.

[0105] The data lines DL are alternately arranged with an insulating layer therebetween as shown in FIG. 9. Alternatively, the data lines DL are arranged on the same insulating layer, although not shown. When adjacent data lines DL are arranged above and below each other with an insulating layer (e.g., the second interlayer insulating layer 207) therebetween, the gap (pitch) between the adjacent data lines DL can be narrowed, and the width of the first non-display area NDA1 can be reduced. FIG. 9 shows the data lines DL located in the first sub-non-display area SNDA1, but the scan lines bypassing the opening area OA described with reference to FIG. 5 above are also located in the first sub-non-display area SNDA1.

[0106] The second sub-non-display area SNDA2 is a type of groove area in which grooves are arranged, and Fig. 9 shows three grooves located in the second sub-non-display area SNDA2. As described above with reference to Figs. 8A and 8B, the groove G is formed by a multi-layer film having a first layer and a second layer containing different materials, but Fig. 9 shows the groove G formed in a sub-layer provided on the substrate 100 as an embodiment.

[0107] 9 and 10, the groove G is formed by removing a part of the second barrier layer 104 and a part of the second base layer 103. For example, a hole penetrating the second barrier layer 104 and the buffer layer 201 and a recess formed in the second base layer 103 are spatially connected to form the groove G. The second base layer 103 corresponds to the first layer L1 of the multilayer film ML described with reference to FIGS. 8A and 8B, and the second barrier layer 104 corresponds to the second layer L2 of the multilayer film ML.

[0108] As described above, in the process of forming the groove G, the buffer layer 201 on the second barrier layer 104 is removed together with the second barrier layer 104 to form the groove G. Although the buffer layer 201 and the second barrier layer 104 are described herein as separate components, the buffer layer 201 of the substrate 100 is a sub-layer of the second barrier layer 104 having a multi-layer structure.

[0109] The tip portion PT of the groove G has a predetermined length l, and the characteristics regarding the length l of the tip portion PT are as described above with reference to Figures 8A and 8B. For example, the length l of the tip portion PT is shorter than 2.0 μm.

[0110] The depth dp of the groove G is shallower than the thickness t of the second base layer 103 as shown in Fig. 10. Alternatively, the depth dp of the groove G is equal to the thickness t of the second base layer 103 as shown in Fig. 11, and the characteristics related to the depth dp are the same as those described with reference to Figs. 8A and 8B above.

[0111] As described above, the groove G of the second sub-non-display area SNDA2 disconnects the first functional layer 222a and the second functional layer 222c, which correspond to the sub-layer 222' of the intermediate layer, the counter electrode 223, and / or the capping layer 230.

[0112] The first inorganic sealing layer 310 of the thin film sealing layer 300 has relatively better step coverage than the intermediate sub-layer 222′, the counter electrode 223, and / or the capping layer 230. Therefore, the first inorganic sealing layer 310 is formed continuously without being interrupted around the groove G.

[0113] 9, the first inorganic sealing layer 310 entirely covers the display area DA and the first non-display area NDA1. In the first non-display area NDA1, the first inorganic sealing layer 310 entirely and continuously covers the inner surface of the groove G. A stack of the first functional layer 222a and the second functional layer 222c, which are interrupted at the pair of tip portions PT, the counter electrode 223, and the capping layer 230 is disposed on the bottom surface of the groove G, and the first inorganic sealing layer 310 contacts the layer below the second base layer 103, for example, the first barrier layer 102, while covering the above-mentioned stack.

[0114] The organic sealing layer 320 is formed by applying a monomer and then curing the monomer. The flow of the monomer is controlled by a partition, for example, a first partition 510 and a second partition 520. In this regard, FIGS. 9 to 11 show an example in which an end of the organic sealing layer 320 is located on one side of the first partition 510. The organic sealing layer 320 fills one of the grooves G. For example, the space on the first inorganic sealing layer 310 in the groove G located between the non-display area NDA and the first partition 510 is filled with the organic sealing layer 320.

[0115] The second inorganic sealing layer 330, like the first inorganic sealing layer 310, entirely and continuously covers the inner surface of the groove G. A portion of the second inorganic sealing layer 330 directly contacts the first inorganic sealing layer 310 in the second sub-non-display area SNDA2. On at least one groove G among the multiple grooves G, the second inorganic sealing layer 330 directly contacts the first inorganic sealing layer 310. The first inorganic sealing layer 310 and the second inorganic sealing layer 330 contact each other on the upper surfaces of the first partition wall 510 and the second partition wall 520.

[0116] FIG. 12 is a cross-sectional view showing a third example of a groove in a display panel according to an embodiment of the present invention.

[0117] Referring to FIG. 12, unlike the display panel described with reference to FIG. 10, the capping layer 230 is omitted. The features other than the feature in which the capping layer 230 is omitted are as described with reference to FIG. 10. For example, the features regarding the length l of the tip portion PT of the groove G are as described with reference to FIG. 8A to FIG. 8C. For example, the length l of the tip portion PT is shorter than 2.0 μm. At the same time, the depth dp of the groove G is thinner than the thickness t of the second base layer 103 as shown in FIG. 10. Alternatively, the depth dp of the groove G is the same as the thickness t of the second base layer 103 as shown in FIG. 11, and the features regarding the depth dp are the same as those described with reference to FIG. 8A to FIG. 8C. It goes without saying that the structure in which the capping layer 230 described with reference to FIG. 12 is omitted is also applied to the embodiments described with reference to FIG. 14 to FIG. 17 and the embodiments derived therefrom.

[0118] The capping layer 230 described with reference to Figures 9 to 11 includes a material with relatively low step coverage, such as LiF, and therefore, although Figures 9 to 11 show a structure in which the groove G is interrupted, the present invention is not limited thereto.

[0119] FIG. 13 is a cross-sectional view showing an example of a groove in a display panel according to another embodiment of the present invention.

[0120] 13, the capping layer 230 includes an inorganic insulator. The capping layer 230 of the inorganic insulator formed through a process such as a chemical vapor deposition method has relatively excellent step coverage, so that the capping layer 230 can continuously cover the inner surface of the groove G without being interrupted at the center of the groove G.

[0121] The capping layer 230 includes an inorganic material such as silicon nitride, silicon oxide, or silicon oxynitride, and a first inorganic sealing layer 310 is disposed on the capping layer 230. The first inorganic sealing layer 310 also includes the inorganic insulator described above. In one embodiment, the capping layer 230 including the inorganic insulator is a sub-layer of the first inorganic sealing layer 310 which is a multi-layer. In one embodiment, any one layer of the first inorganic sealing layer 310 including at least two layers of silicon oxynitride having different film properties is the capping layer 230.

[0122] It goes without saying that the structure of the capping layer 230 described with reference to FIG. 13 is also applied to the embodiments described with reference to FIGS. 14 to 17 and embodiments derived therefrom.

[0123] FIG. 14 is a cross-sectional view showing another example of a groove in a display panel according to another embodiment of the present invention.

[0124] 14, the groove G has a plurality of undercut cross sections overlapped along the depth direction (or the thickness direction of the substrate). For example, the first base layer 101 and the first barrier layer 102 have an undercut cross section (hereinafter referred to as the first undercut cross section), and the second base layer 103 and the second barrier layer 104 have an undercut cross section (hereinafter referred to as the second undercut cross section). The groove G has a structure in which the above-mentioned first undercut cross section and second undercut cross section are overlapped.

[0125] The tip portions PT of the first barrier layer 102 and the second barrier layer 104 each have a first length l1 and a second length l2. The characteristics of the first length l1 and the second length l2 are the same as the characteristics of the length l described with reference to Figures 8A and 8B above. For example, each of the first length l1 and the second length l2 is shorter than 2.0 μm.

[0126] The first base layer 101 and the second base layer 103 each have a first depth dp1 and a second depth dp2. The second depth dp2 of the second base layer 103 is also the same as the thickness t2 of the second base layer 103, and the first depth dp1 of the first base layer 101 is thinner than the thickness t1 of the first base layer 101. When the above-mentioned characteristics are satisfied, the characteristics regarding the depth dp described with reference to FIG. 8A and FIG. 8B are also applied to the first depth dp1 and the second depth dp2 shown in FIG. 14. The first depth dp1 and the second depth dp2 are deeper than the length l of the tip portion PT. In addition, the first depth dp1 and the second depth dp2 are deeper than the first length l1 and the second length l2 of the corresponding tip portion PT, respectively. On the other hand, the first depth dp1 is deeper than the sum ts of the thicknesses of the first functional layer 222a and the second functional layer 222c, the counter electrode 223, and the capping layer 230, which are interrupted around the groove G. In one embodiment, the first depth dp1 is, for example, 2.0 μm or more, or 3.0 μm or more.

[0127] 9 to 14 show a multilayer film in which the grooves G are formed in a sub-layer of the substrate 100, but the present invention is not limited thereto. As will be described with reference to FIGS. 15 and 16, the grooves G may be located on the substrate 100.

[0128] FIG. 15 is a cross-sectional view showing an example of a groove in a display panel according to still another embodiment of the present invention.

[0129] 15, one of the grooves G (hereinafter referred to as a first groove G1) is located on the substrate 100, and the other groove G (hereinafter referred to as a second groove G2) is formed by removing a part of the sub-layer of the substrate 100. The features of the second groove G2 are the same as those described with reference to FIGS. 8A to 11 above, so the following description will focus on the first groove G1.

[0130] The first groove G1 is formed by removing the first insulating layer 209 and the second insulating layer 211' on the first insulating layer 209. The first insulating layer 209 corresponds to the first layer L1 of the multilayer film ML described with reference to Figures 8A and 8B, and the second insulating layer 211' corresponds to the second layer L2 of the multilayer film ML. The first insulating layer 209 contains an organic material such as polyimide, and the second insulating layer 211' contains an inorganic material such as silicon nitride or silicon oxide.

[0131] The first groove G1 has an undercut cross section. For example, as shown in FIG. 15, a hole in the second insulating layer 211' and a recess in the first insulating layer 209 form the first groove G1. In another embodiment, not shown, the hole in the second insulating layer 211' and the hole in the first insulating layer 209 can of course form the first groove G1.

[0132] The length l' of the tip portion PT of the second insulating layer 211' is the same as the length l described above with reference to Figures 8A and 8B. For example, the length l' of the tip portion PT is shorter than 2.0 μm.

[0133] The characteristics of the depth dp' of the first groove G1, i.e., the depth of the recess or hole in the first insulating layer 209, are the same as the characteristics of the depth dp described with reference to Figures 8A and 8B above. For example, the depth dp' of the first groove G1 is deeper than the length l' of the tip portion PT. The depth dp' of the first groove G1 is the same as or shallower than the thickness t' of the first insulating layer 209, for example, 2.0 μm or more, or 3.0 μm or more.

[0134] Here, the thickness of first insulating layer 209 is the vertical distance between the upper and lower surfaces of first insulating layer 209 in the area where first groove G1 is located, and in Figure 15, the upper surface of second interlayer insulating layer 207 is the lower surface of first insulating layer 209.

[0135] As described with reference to Figures 8A and 8B, the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and the capping layer 230 are interrupted around the first groove G1 and the second groove G2, and the depth dp' of the first groove G1 and the depth dp of the second groove G2 are deeper than the thickness ts of the stack of the above-mentioned first functional layer 222a, the second functional layer 222c, the counter electrode 223, and the capping layer 230.

[0136] The first groove G1 and the second groove G2 have their respective inner surfaces continuously covered by a first inorganic sealing layer 310. In the first groove G1, the space above the first inorganic sealing layer 310 is filled with an organic sealing layer 320. A first partition 510 is positioned between the first groove G1 and the second groove G2, and an end of the organic sealing layer 320 is positioned on one side of the first partition 510.

[0137] In Fig. 15, the second groove G2 has been described as having the same structure as the groove shown in Fig. 10, but the invention is not limited thereto. In another embodiment, the second groove G2 has the same structure as the groove described with reference to Figs. 11 to 14.

[0138] The features described with reference to Fig. 15, for example, the feature that the grooves in the first non-display area NDA1, for example, the first groove G1 and the second groove G2, are formed in different multilayer films, are also applicable to other embodiments. For example, it goes without saying that the above-mentioned features are also applicable to the embodiment described with reference to Figs. 10 to 14, the embodiment described with reference to Fig. 16, and / or embodiments derived therefrom.

[0139] FIG. 16 is a cross-sectional view showing another example of a groove in a display panel according to still another embodiment of the present invention.

[0140] 16, one or more grooves G are formed by a multilayer film, such as an insulating layer 200 and a buffer layer 201, located on a substrate 100. The insulating layer 200 includes a different material from the buffer layer 201, such as an organic material such as polyimide. The buffer layer 201 includes an inorganic material, as described with reference to FIG. 7. Although not shown, the insulating layer 200 exists not only in the first non-display area NDA1 but also in the display area, as shown in FIG. 16, and even in the display area, the insulating layer 200 is located between the substrate 100 and the buffer layer 201.

[0141] The groove G has an undercut cross section. The groove G is formed by spatially connecting a hole in the buffer layer 201 and a recess or hole in the insulating layer 200. The length l of the tip portion PT of the buffer layer 201 extended toward the center of the groove G is as described with reference to FIGS. 8A and 8B. For example, the length l of the tip portion PT is shorter than 2.0 μm. The depth dp of the groove G is equal to or shallower than the thickness t of the insulating layer 200. Other characteristics related to the depth dp are the same as those described with reference to FIGS. 8A and 8B, and therefore are substituted by the above description.

[0142] Since the groove G is formed in the multilayer film of the insulating layer 200 and the buffer layer 201 disposed on the substrate 100, the substrate 100 includes various materials. For example, the substrate 100 includes an inorganic material, an organic material, or both. For example, the substrate 100 includes various materials such as glass, metal, and resin.

[0143] FIG. 17 is a cross-sectional view of a display panel according to another embodiment of the present invention.

[0144] 17 differs from the display panel 10 described above with reference to Fig. 9 in that it further includes a planarizing layer 410. For the sake of convenience, the following description will focus on the differences.

[0145] The planarization layer 410 includes an organic insulator. In one embodiment, the planarization layer 410 is formed by applying a photoresist (negative or positive)-based or polymer-based organic material on the thin-film encapsulation layer 300 and patterning it. An end 410E of the planarization layer 410 is located on a vertical line passing through any one of the grooves G, as shown in FIG. 17. In another embodiment, the end 410E of the planarization layer 410 is located on the same vertical line as the end 100E of the substrate 100.

[0146] The planarization layer 410 covers an area in the second sub-non-display area SNDA2 where the organic encapsulation layer 320 is not present, thereby improving the flatness of the display panel 10. Therefore, an input sensing member or an optical functional member formed directly on the display panel 10 or attached thereto by an adhesive layer can be prevented from being separated or detached from the display panel 10.

[0147] Although the embodiments of the present invention have been described in detail above with reference to the drawings, the present invention is not limited to the above-described embodiments and can be modified in various ways without departing from the technical scope of the present invention. [Industrial Applicability]

[0148] The display panel of the present invention can be effectively applied to, for example, display-related technical fields. [Explanation of symbols]

[0149] 1 Display device 10, 10' Display Panel 10H, 20H, 30H 1st, 2nd, 3rd opening 20 Input sensing member 30 Optical functional components 40 Windows 50 Components 100 Substrates 101, 103 1st and 2nd base layers 102, 104 First and second barrier layers 200 Insulation layer 201 Buffer Layer 203 Gate Insulation Layer 205, 207 First and second interlayer insulating layers 209 First insulating layer 211, 211' Second insulating layer 213 Spacer 221 Pixel electrode 222 Middle Class 222' Middle layer sublayer 222a, 222c 1st and 2nd functional layer 222b Light-emitting layer 223 Counter Electrode 230 Capping Layer 300 Thin film sealing layer 310, 330 First and second inorganic sealing layers 320 Organic sealing layer 410 Planarization layer 410E Flattening layer edge 510, 520 1st and 2nd bulkhead 1100 Scan Driver 1200 Data Driver Act semiconductor layer CE1, CE2 lower and upper electrodes Cst Storage Capacitor DA display area DE Drain electrode DL Data Line ELVDD, ELVSS First and second power supply voltages G Groove GE gate electrode H2 Hall 2 L1, L2 1st, 2nd layer LL lower layer ML multilayer film NDA Hidden Area NDA1 1st hidden area NDA2 2nd hidden area OA opening area OLED Organic Light Emitting Diode P pixels PC pixel circuit PL drive voltage line PT Pair of tips (eaves) R1 First recess SE source electrode SL Scanline SNDA1 1st sub hidden area SNDA2 Second sub-hidden area T1 First thin film transistor T2 Second thin film transistor TFT Thin Film Transistor

Claims

1. a substrate having a front surface, a rear surface, and an opening extending from the front surface to the rear surface; a light-emitting diode disposed in a display region surrounding the opening, the light-emitting diode including a pixel electrode, a counter electrode on the pixel electrode, and an intermediate layer between the pixel electrode and the counter electrode; an encapsulation layer over the light emitting diode, the encapsulation layer including a first inorganic encapsulation layer, an organic encapsulation layer over the first inorganic encapsulation layer, and a second inorganic encapsulation layer over the organic encapsulation layer; a first groove in a non-display area defined in the substrate between the display area and the opening; a second groove in a non-display area spaced apart from the first groove; a partition wall disposed between the first groove and the second groove in the non-display area, The substrate is a first base layer including a back surface of the substrate; a first barrier layer on the first base layer; a second base layer on the first barrier layer; a second barrier layer on the second base layer, the second barrier layer including a front surface of the substrate; the first groove is located between the display area and the partition wall, the first groove has a concave shape recessed in the second barrier layer and the second base layer; the second barrier layer has a first tip portion protruding toward the first groove beyond a first point where a side surface of the second base layer meets a bottom surface of the second barrier layer; A display panel, wherein a length of the first end portion is equal to or greater than 0.3 μm and less than 2.0 μm, and is a distance between the first point and a side surface of the first end portion.

2. A display panel as described in claim 1, characterized in that the second groove is located between the partition and the opening of the substrate.

3. the second groove has a concave shape recessed in the second barrier layer and the second base layer; the second barrier layer has a second tip portion protruding toward the second groove beyond a second point where a side surface of the second base layer facing the second groove meets a bottom surface of the second barrier layer, The display panel of claim 2 , wherein the length of the second end portion is equal to or greater than 0.3 μm and less than 2.0 μm, and is a distance between the second point and a side surface of the second end portion.

4. The display panel of claim 2 , wherein the width of the first groove is smaller than the width of the second groove.

5. The display panel of claim 2 , wherein a portion of the organic sealing layer extends to the non-display area and overlaps the first groove.

6. The display panel of claim 5 , wherein the portion of the organic sealing layer at least partially fills the first groove.

7. The display panel of claim 1 , wherein a portion of the second inorganic sealing layer and a portion of the first inorganic sealing layer each extend to the non-display area and directly contact each other in an area corresponding to a portion of an upper surface of the partition.

8. The display panel of claim 1 , wherein a portion of the second inorganic sealing layer and a portion of the first inorganic sealing layer each extend to the non-display area and directly contact each other in the second groove.

9. The display panel according to claim 1 , wherein the first inorganic sealing layer continuously overlaps the top surface of the first tip portion, the side surface of the first tip portion, the bottom surface of the first tip portion, and the side surface of the second base layer.

10. 2 . The display panel according to claim 1 , wherein a depth from a bottom surface of the second barrier layer to a bottom surface of the first groove is smaller than a thickness of the second base layer.

11. The display panel of claim 1 , further comprising a planarizing organic layer on the second inorganic sealing layer in the non-display area.

12. The second base layer is made of a polymer resin, The display panel according to claim 1 , wherein the second barrier layer is made of an inorganic material.

13. a display panel including an opening region, a display region surrounding the opening region, and a non-display region between the opening region and the display region; a component below the display panel corresponding to the aperture area; The display panel includes: a light emitting diode in the display area on a substrate of the display panel, the light emitting diode including a pixel electrode, a counter electrode on the pixel electrode, and an intermediate layer between the pixel electrode and the counter electrode; an encapsulation layer over the light emitting diode, the encapsulation layer including a first inorganic encapsulation layer, an organic encapsulation layer over the first inorganic encapsulation layer, and a second inorganic encapsulation layer over the organic encapsulation layer; a first groove in the non-display area on the substrate, the first groove being defined by a multilayer film; a second groove in the non-display area on the substrate defined by the multilayer film; a partition wall in the non-display area; the multilayer film includes a first layer and a second layer on the first layer; the first groove is located between the display area and the partition wall, the first groove has a concave shape recessed in the second layer and the first layer; the second layer has a first tip portion that protrudes toward the first groove beyond a first point where a side surface of the first layer meets a bottom surface of the second layer; the first inorganic sealing layer extends continuously so as to overlap an upper surface and a side surface of the first tip portion and a side surface of the first layer, and forms a structure that is relatively concave with respect to a portion of the first inorganic sealing layer that overlaps the first tip portion; the recessed structure is at least partially filled by a portion of the organic encapsulation layer; An electronic device, wherein the length of the first tip is greater than or equal to 0.3 μm and less than 2.0 μm, and is the distance between the first point and a side of the first tip.

14. The electronic device of claim 13, characterized in that the second groove is located between the partition and an opening in the substrate of the display panel.

15. the second groove has a concave shape recessed in a second base layer of the substrate and a second barrier layer on the second base layer; the second barrier layer has a second tip portion protruding toward the second groove beyond a second point where a side surface of the second base layer facing the second groove meets a bottom surface of the second barrier layer, The electronic device of claim 14 , wherein the length of the second tip is equal to or greater than 0.3 μm and less than 2.0 μm, and is the distance between the second point and a side of the second tip.

16. The electronic device of claim 13 , wherein a portion of the organic encapsulation layer extends into the non-display area and overlaps the first groove.

17. 17. The electronic device of claim 16, wherein a width of the first groove is smaller than a width of the second groove.

18. 17. The electronic device of claim 16, wherein a portion of the organic encapsulation layer at least partially fills the first groove.

19. The electronic device of claim 13 , wherein a portion of the second inorganic encapsulation layer and a portion of the first inorganic encapsulation layer each extend to the non-display area and directly contact each other in the second groove.

20. The electronic device of claim 13 , wherein a portion of the second inorganic sealing layer and a portion of the first inorganic sealing layer each extend to the non-display area and directly contact each other in an area corresponding to a portion of an upper surface of the partition wall.

21. The substrate includes a first base layer, a first barrier layer, a second base layer, and a second barrier layer, which are stacked in sequence; 14. The electronic device of claim 13, wherein a depth from a bottom surface of the second barrier layer formed on the second base layer of the substrate of the display panel to a bottom surface of the first groove is smaller than a thickness of the second base layer.

22. the display panel further includes a transistor electrically connected to the light emitting diode; The electronic device according to claim 13 , wherein the multilayer film is located in the display area and the non-display area, and is located below the transistor in the display area.

23. the first layer is made of a polymer resin; 23. The electronic device of claim 22, wherein the second layer is made of an inorganic material.

24. 23. The electronic device according to claim 22, wherein the multilayer film is located in the display area and the non-display area, and is located below the transistor in the display area.

25. The electronic device of claim 13 , wherein the component includes a sensor or a camera.

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