High aspect ratio electroplated structures and anisotropic electroplating processes
High aspect ratio electroplating structures and associated manufacturing methods address the need for improved circuitry by enabling the creation of high-density precision coils with enhanced performance and efficiency, overcoming limitations of current technologies.
Patent Information
- Application Number
- JP2019526467
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2017-11-17
- Filing Date
- 2017-11-17
- Publication Date
- 2025-04-07
- Estimated Expiration
- 2037-11-17
AI Technical Summary
There is a need for improved circuitry structures and efficient electroplating processes to manufacture circuits and other structures with high aspect ratios, which current technologies struggle to achieve effectively.
The development of high aspect ratio electroplating structures and methods for forming these structures, including the use of semi-additive techniques, crown plating, and conformal plating, to create conductive stacks with increased cross-sectional area and precise layer alignment.
The high aspect ratio electroplating structures enable the formation of high-density precision coils with improved electromagnetic performance, reduced thickness, and increased efficiency, while also reducing costs and installation area requirements.
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Abstract
Description
[Technical field]
[0001] [CROSS REFERENCE TO RELATED APPLICATIONS] This application claims priority to U.S. Patent Application No. 15 / 817,049, filed November 17, 2017, and further benefits from U.S. Provisional Patent Application No. 62 / 423,995, filed November 18, 2016, each of which is incorporated by reference in its entirety.
[0002] [Technical field] The present invention relates generally to electroplating structures and processes. [Background technology]
[0003] Electroplating processes for fabricating structures such as copper or copper alloy circuit structures, such as leads, traces, and via interconnects, are generally known and are disclosed, for example, in U.S. Patent No. 5,399,323 to Castellani et al. entitled Fine Line Circuit Fabrication and Photoresist Coating Therefor. These types of processes are described, for example, in U.S. Pat. No. 6,399,433 (Bennin et al., "Low Resistance Ground Joints for Dual Stage Actuation Disk Drive Suspensions"), U.S. Pat. No. 6,399,433 (Rice et al., "Integrated Lead Suspension with Multiple Trace Configurations"), U.S. Pat. No. 6,399,433 (Hentges et al., "Multi-Layer Ground Plane Structures for Integrated Lead Suspensions"), U.S. Pat. No. 6,399,433 (Hentges et al., "Multi-Layer Ground Plane Structures for Integrated Lead Suspensions"), U.S. Pat. No. 6,399,433 (Swanson et al., "Method for Making Noble Metal Conductive Leads for Suspension Assemblies"), and U.S. Pat. No. 6,399,433 (Peltoma et al., "Plated Ground Features for Integrated Lead Suspensions"). Such suspensions are used in connection with the manufacture of disk drive head suspensions, such as those disclosed in the "Magnetic Head Suspensions" patent application.These types of processes are also used in connection with the manufacture of camera lens suspensions, such as those disclosed in US Pat. No. 5,399,363 (Miller, "Camera Lens Suspension with Polymer Bearings").
[0004] Superfilling and superconformal plating processes and compositions are also known and have been published, for example, in articles such as "The chemistry of additives in damascene copper plating" by Vereecken et al., IBM J. of Res. & Dev., vol. 49, no. 1, January 2005, "Damascene copper electroplating for chip interconnections" by Andricacos et al., IBM J. of Res. & Dev., vol. 42, no. 5, September 1998, and "Curvature enhanced adsorbate coverage mechanism for bottom-up superfilling and bump control in damascene processing" by Moffat et al., Electrochimica Acta 53, pp. 145-154, 2007. With these processes, electroplating within trenches (e.g., photoresist masked trenches that define the spaces of the structures to be electroplated) occurs preferentially at the bottom. In that way, voids in the deposited structures can be avoided. All of the above-mentioned patents and articles are incorporated herein by reference in their entirety and for all purposes. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] U.S. Pat. No. 4,315,985 [Patent Document 2] U.S. Patent No. 8,885,299 [Patent Document 3] U.S. Pat. No. 8,169,746 [Patent Document 4] U.S. Patent No. 8,144,430 [Patent Document 5] U.S. Patent No. 7,929,252 [Patent Document 6] U.S. Patent No. 7,388,733 [Patent Document 7] U.S. Patent No. 7,384,531 [Patent Document 8] U.S. Pat. No. 9,366,879 Summary of the Invention [Problem to be solved by the invention]
[0006] There is a continuing need for improved circuit structures and for efficient and effective processes, including electroplating processes, for fabricating circuits and other structures. [Means for solving the problem]
[0007] Devices including high aspect ratio electroplated structures and methods of forming high aspect ratio electroplated structures are described. A method of manufacturing a metal structure includes providing a substrate having a metal base characterized by an aspect ratio of height to width, and electroplating a metal crown onto the base to form a metal structure having an aspect ratio of height to width that is greater than the aspect ratio of the base.
[0008] Other features and advantages of embodiments of the present invention will become apparent from the accompanying drawings and the detailed description that follows.
[0009] Embodiments of the present invention are illustrated by way of example and not limitation in the figures of the accompanying drawings in which like reference symbols represent similar elements and in which: [Brief description of the drawings]
[0010] [Figure 1] FIG. 1 shows a coil manufactured using current printed circuit technology. [Diagram 2] FIG. 2 shows a high density precision coil including high aspect ratio electroplated structures according to an embodiment. [Diagram 3] FIG. 3 shows a schematic diagram used to represent the electromagnetic force generated by a high density precision coil including high aspect ratio electroplated structures according to an embodiment. [Figure 4] FIG. 4 shows a device including a multi-layer, high aspect ratio electroplated structure according to an embodiment configured for a linear motor type application. [Diagram 5] FIG. 5 illustrates a high aspect ratio electroplated structure according to some embodiments. [Figure 6] FIG. 6 illustrates a high aspect ratio electroplating structure according to some embodiments. [Figure 7] FIG. 7 illustrates a high aspect ratio electroplated structure according to some embodiments. [Figure 8] FIG. 8 shows a device having a multi-layer, high aspect ratio electroplated structure according to some embodiments having a high density cross-sectional area. [Figure 9] FIG. 9 shows a graph illustrating the SPS coverage in the high current density plating technique and the low current density plating technique according to the embodiment. [Figure 10] In FIG. 10, FIGS. 10a-10f illustrate a process for forming a high aspect ratio electroplated structure according to an embodiment. [Figure 11] FIG. 11 illustrates a high aspect ratio electroplated structure according to some embodiments. [Figure 12] FIG. 12 illustrates a perspective view of a high aspect ratio electroplating structure according to some embodiments. [Figure 13]In FIG. 13, FIGS. 13a and 13b show high density precision coils formed using high aspect ratio electroplated structures according to an embodiment. [Figure 14] FIG. 14 illustrates a high aspect ratio electroplated structure including a high resolution laminated conductor layer according to an embodiment. [Figure 15] FIG. 15 shows a high density precision coil including high aspect ratio electroplated structures according to an embodiment. [Figure 16] In FIG. 16, FIGS. 16a-16c show a process for forming a high aspect ratio electroplated structure according to another embodiment. [Figure 17] FIG. 17 illustrates selective formation of high aspect ratio electroplated structures according to an embodiment. [Figure 18] FIG. 18 illustrates a perspective view of a high aspect ratio electroplated structure according to an embodiment formed with metal crown portions selectively formed on the traces. [Figure 19] FIG. 19 illustrates a hard drive disk suspension flexure including high aspect ratio electroplated structures according to an embodiment. [Figure 20] FIG. 20 illustrates a cross-sectional view of the hard disk drive suspension flexure shown in FIG. [Figure 21] In FIG. 21, FIGS. 21a and 21b show a process of forming high aspect ratio electroplating structures according to an embodiment using photoresist during the conformal plating process. [Figure 22] FIG. 22 shows example chemical compositions used in the processes for forming the initial metal layer, the standard conformal plating process, and the crown plating process according to various embodiments. [Figure 23] FIG. 23 illustrates a top perspective view of an inductively coupled coil formed from high aspect ratio electroplated structures according to an embodiment. [Figure 24] FIG. 24 illustrates a perspective view of the underside of the embodiment of the inductively coupled coil shown in FIG. [Diagram 25]FIG. 25 illustrates a top perspective view of an inductive coupling coil 2502 according to an embodiment coupled to a radio frequency identification chip. [Figure 26] In FIG. 26, FIGS. 26a-26j illustrate a method of forming an inductively coupled coil formed from a high aspect ratio electroplated structure according to an embodiment. [Figure 27] FIG. 27 illustrates a plan view of a flexure for a suspension of a hard disk drive including a high aspect ratio electroplated structure according to an embodiment. [Figure 28] FIG. 28 shows a cross-sectional view of the gap portion of the flexure taken along line A shown in FIG. [Figure 29] FIG. 29 illustrates a gimbal portion having a mass structure according to an embodiment. [Diagram 30] FIG. 30 illustrates a cross-sectional view of a proximal portion of a flexure including high aspect ratio electroplated structures according to embodiments taken along line B shown in FIG. [Diagram 31] FIG. 31 illustrates a cross-sectional view of a proximal portion of a flexure including high aspect ratio structures according to an embodiment taken along line C shown in FIG. [Diagram 32] FIG. 32 illustrates a plan view of a proximal portion of a flexure including high aspect ratio structures according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0011] High aspect ratio electroplating structures and methods of manufacture in embodiments of the present invention are described. The high aspect ratio electroplating structures provide a tighter conductor pitch than current technology. By way of example, the high aspect ratio electroplating structures, in various embodiments, include conductor stacks with a cross-sectional area of the conductor stack that is greater than 50%. In addition, the high aspect ratio electroplating structures allow for multiple layers of conductors in embodiments. Furthermore, the high aspect ratio electroplating structures, in various embodiments, allow for precise alignment between layers. By way of example, the high aspect ratio electroplating structures can have alignment between layers of less than 0.030 mm. The high aspect ratio electroplating structures, in various embodiments, can reduce the overall stack height.
[0012] High aspect ratio electroplated structures, in various embodiments, allow for a thin film dielectric material between the coil and magnet formed using the high aspect ratio electroplated structures, which allows the coil to generate a stronger electromagnetic field than current printed circuit coils, such as that shown in FIG. 1. Thus, high aspect ratio electroplated structures produce lower cost, higher performance devices, and require a smaller device footprint than current technology.
[0013] 2 shows a high density precision coil including high aspect ratio electroplated structures according to an embodiment. The high aspect ratio electroplated structures 202 are formed in rows with dielectric material between each row and each high aspect ratio electroplated structure 204. The high density precision coil can be formed as a helical coil or other type of coil.
[0014] 3 shows a schematic diagram used to represent the electromagnetic force generated by a high density precision coil including high aspect ratio electroplated structures according to an embodiment. The schematic diagram includes a coil cross section 302 proximate to a magnet 304. The highest electromagnetic force 306 is at coil layer 308, which is closer to the magnet. Coil layer 310, which is further from the magnet 304, exerts less force. The main factors influencing the force are: This is derived from the Lorentz equation in JPEG0007657546000001.jpg1231. The intensity of the magnitude of JPEG0007657546000002.jpg1210 decreases with the distance between the coil and the magnet, so JPEG0007657546000003.jpg1210 is the current flowing through copper. The area of any cross section 302 that is not a conductor is Does not contribute to the power of JPEG0007657546000004.jpg1210.
[0015] The primary factors that affect the force characteristics of a coil include the number of turns within the magnetic field (turns closest to the poles of the magnet provide the most force), the distance of the coil from the magnet (layers closer to the magnet add more force), and the total percentage of the copper cross-sectional area within the magnetic field. The use of high aspect ratio electroplated structures in various embodiments improves on these factors as compared to coils using current coil technology.
[0016] As an example, a coil with two layers using current technology has a total thickness of about 210 micrometers, a conductor pitch of 38 micrometers, a copper cross-sectional percentage of about 20%, an estimated resistance of 3.1 ohms, an estimated force ratio of 1.0 (estimated B ratio of 1.0 and estimated J ratio of 1.0), and an estimated power ratio of 1.0. In comparison, a high-density precision coil including high-aspect ratio electroplated structures has a total thickness of about 116 micrometers, a conductor pitch of 40 micrometers, a copper cross-sectional percentage of about 60%, an estimated resistance of 5.5 ohms, an estimated force ratio of 1.2 (estimated B ratio of 1.5 and estimated J ratio of 0.8), and an estimated power ratio of 0.71, in various embodiments. That is, a high-density precision coil including high-aspect ratio electroplated structures is, in various embodiments, a higher performance device. As such, such a high-density precision coil provides 20% more force with 30% less power at half the thickness of a coil using current technology, in some embodiments.
[0017] 4 illustrates a device including a multi-layer, high aspect ratio electroplated structure according to an embodiment configured for a linear motor type application. Because of the dimensional advantages over current technology, each layer 402a-402d of the high aspect ratio electroplated structure is closer to a magnet 404 than is possible with current technology, such as that shown in FIG. 1. Furthermore, the closer proximity of each layer 402a-402d to the magnet 404 reduces the volume JPEG0007657546000005.jpg1210 Utilizing the magnetic field (magnetic flux density) improves the force characteristics of the linear motor. Thus, using multi-layer high aspect ratio electroplated structures in linear motors may require fewer layers than those using current technology. Furthermore, such structures are more flexible in obtaining electrical properties such as low resistance.
[0018] 5 illustrates a high aspect ratio electroplated structure according to some embodiments at a stage during the manufacturing process. The layers of the high aspect ratio electroplated structure 602 at this stage during the manufacturing process are formed using semi-additive techniques to create conductors with fine pitch, defined resist, and an initial aspect ratio of height to width (A / B) of about 1:1. By way of example, the high aspect ratio electroplated structure may have a height of 20 micrometers and a width of 20 micrometers. In some embodiments, the plating process is stopped at this point to remove the defining work and seed layer, such as a photoresist mask, using techniques including those known in the art.
[0019] FIG. 6 illustrates a high aspect ratio electroplated structure according to some embodiments at another stage in the manufacturing process. At this stage in the manufacturing process, a layer of high aspect ratio electroplated structure 702 is formed using crown plating techniques to convert semi-additive conductors into high aspect ratio, high percentage metal conductor circuits. By way of example, the high aspect ratio electroplated structure has a final height to width ratio (A / S) greater than 1:1. The final height to width ratio can range from 1.2 to 3.0 in various embodiments. Other embodiments include a final height to width ratio greater than 3.0. However, one skilled in the art will appreciate that any final height to width ratio can be obtained using the techniques described herein to meet design and performance criteria. There is no particular limit to the final height of the high aspect ratio electroplated structure as disclosed in various embodiments at the stage of formation as shown in FIG. 6 formed from the previous stage as shown in FIG. 5.
[0020] 7 shows a high aspect ratio electroplated structure according to some embodiments at yet another stage in the manufacturing process. At this stage in the manufacturing process, the layers of the high aspect ratio electroplated structure 802a, 802b are formed using planarization techniques that render the multi-layer high aspect ratio electroplated structure stackable using semi-additive techniques to form subsequent layers. FIG. 8 shows a device having a multi-layer high aspect ratio electroplated structure according to some embodiments, having a high percentage of conductor cross-sectional area 901.
[0021] The method used to form the high aspect ratio electroplated structures from structures such as those shown in FIG. 5 includes using a low current density plating technique, where the sidewalls are plated until the desired spacing between the high aspect ratio electroplated structures is achieved. In various embodiments, if the spacing between the high aspect ratio electroplated structures is not narrowed enough, unwanted pinching at the top can occur. Pinching occurs where the top edges of adjacent structures grow together eliminating the gap, which results in shorts. In various embodiments, the low current density plating process is enhanced by sufficient fluid exchange, such that fresh plating bath is continually used on the surface undergoing copper plating. Additionally, the method used to form the high aspect ratio electroplated structures includes using a high current density plating technique, where the high current density plating technique is performed at a high percentage of mass transport limit. It plates primarily or only on the top of the conductive material forming the high aspect ratio electroplated structures. The high current density plating process is enhanced by precise current density control. FIG. 9 depicts a graph including an upper line 1002 illustrating high SPS coverage in a high current density plating technique according to an embodiment, and a lower line 1004 illustrating highly uniform low accelerator coverage in a low current density plating technique according to an embodiment.
[0022] 10a-10f illustrate a process for forming a high aspect ratio electroplated structure according to an embodiment. FIG. 10a illustrates a trace 1102 formed at the thickness limit of resist capability at time T1 of the process. In some embodiments, pre-plated conventional traces are formed from copper using a process such as a damascene process or using etching and deposition techniques including those known in the art. FIG. 10b illustrates the formation of a high aspect ratio electroplated structure at time T2 during a low current density or conformal plating process. The conformal plating process, in embodiments, grows all surfaces of the trace at approximately the same rate. Additionally, the conformal plating process inhibits plating kinetics (low accelerator coverage). Also, the conformal plating process obtains a very uniform metal concentration with a uniform high inhibitor coverage for compensation. This inhibiting plating kinetics effect can be improved by including a leveler in the plating bath. A lower current density is required to obtain a uniform metal concentration and a uniform high inhibitor coverage. In some embodiments, a conformal plating process using 2 amperes per square decimeter is used for plating such as copper, brightening additives, temperature, and fluid dynamics of the plating target. Examples of such conformal plating processes include, but are not limited to, low current density plating processes. At low current densities, the plating bath maintains a uniform inhibition state that results in conformal plating. In other embodiments, the addition of levelers can be used in the plating bath to obtain higher current densities and faster plating. In yet other embodiments, increasing the copper content in the plating bath to near the solubility limit of copper sulfate can be used to further increase the current density. This provides the ability to double or even increase the current density to achieve the same conformal plating characteristics. As an example, the copper content may be as low as 40 grams per liter with the acid content reduced to prevent the common ion effect.
[0023] In some embodiments, a low current density plating process deposits a conductive material such as copper on the top and sidewalls of the traces 1102, e.g., T2 is about 5 minutes in the process (T1+5 minutes) during the low current density plating process. Figure 10c shows the formation of a high aspect ratio electroplated structure at time T3 of the process during the low current density plating process. In embodiments, a low current density plating process deposits a conductive material such as copper on the top and sidewalls of the traces 1102, e.g., T3 is about 5 minutes in the process (T1+15 minutes) during the low current density plating process.
[0024] FIG. 10d shows the formation of high aspect ratio electroplating structures at time T4 of the process during a crown plating process such as a high current anisotropic super plating process. As an example, T4 is about 15 minutes 10 seconds (T1+15 minutes 10 seconds) into the process. In some embodiments, the high current anisotropic super plating process is crown plating. Crown plating is based on balancing the interactions between factors that are metal concentration of the solution, brightening additives, suppression additives, mass transfer, i.e., fluid exchange rate at the surface, levelers, and current density at the substrate. The metal concentration of the solution can include, but is not limited to, copper. Brightening additives can include, but are not limited to, SPS (bis(3-sulfopropyl)-disulfide), DPS (3-N,N-dimethylaminodithiocarbamoyl-1-propanesulfonic acid), and MPS (mercaptopropylsulfonic acid). Inhibitory additives may include, but are not limited to, linear PEGs of various molecular weights including those known to those skilled in the art, poloxamines, block copolymers of polyethylene and polypropylene glycol such as water soluble poloxamers known under various trade names such as BASF Pluronic f127, random copolymers such as the DOW® UCON family of high performance fluids, also in various monomer ratios and various molecular weights, polyvinylpyrrolidones of various molecular weights.
[0025] The high current anisotropic super plating process, in some embodiments, includes a suppressed exchange current that is 1% of the accelerator current. Additionally, the sidewalls of the high aspect ratio electroplated structures formed have near zero accelerator coverage. Near zero accelerator coverage can be achieved by altering the Nernst potential of the copper deposit to favor the suppressor coverage. Additionally, high overpotential and copper utilization (migration phenomenon) results in high accelerator coverage at the top of the structures formed. The copper bulk concentrate can also be adjusted to achieve near zero accelerator coverage during the process. As an example, the copper bulk concentrate concentrate for the high current anisotropic super plating process is 14 grams per liter or less. In some embodiments, the copper bulk concentrate depends on the specific fluid dynamics. Various embodiments of the process are performed at a high rate of mass transport limitation, and since small differences in fluid velocity at the article being plated affect the mass transport limitation itself, it is difficult to adequately control the gap between the plated lines without a high degree of control over the fluid velocity over the entire area of the article being plated. The high current anisotropic super plating process, in some embodiments, includes a leveller additive that interferes with accelerator coverage to minimize or eliminate plating on the sidewalls of the structures being formed, while in other embodiments the plating bath is used without a leveller additive.
[0026] At elevated current densities, such as those used during high current anisotropic super plating processes, a three-fold feedback mechanism is used in some embodiments. Mass transport effects reduce copper in the spaces between the traces. In addition, high current densities favor the promoter (e.g., SPS) dominated surface. To maintain a depressed sidewall, mass transport is adjusted to lower the Nernst potential via the copper mass transport effect. As an example, the fluid boundary layer thickness and the spacing between each trace are designed to lower the Nernst potential.
[0027] Additionally, the high current anisotropic super plating process includes operating at copper concentrations where these differences can be greater than a factor of four in some embodiments. In such conditions, the lower copper concentration and Nernst potential contribute to a decrease in plating speed. As an example, a change in Nernst potential in the range of approximately 50 millivolts ("mV") to 60 mV can contribute to a 20-fold decrease in plating speed. Such conditions induce Tafel kinetics, where copper plating changes current by a factor of 10 for every 120 mV change in applied voltage, not rectifier voltage. The lower sidewall current feeds back to the top surface of the structure being formed, where the diffusion length is shorter, which delivers metal from the plating bath (solution) to the surface more quickly, resulting in higher accelerator coverage rather than inhibition, and higher Nernst potential. In some embodiments, two additive systems (e.g., brightener and suppressor) are used. The leveler reduces the feedback mechanism by inhibiting SPS action at the top surface of the plated feature.
[0028] As the spacing between the metal conductors or traces continues to decrease, the aspect ratio of the height to width of the space between the metal conductors increases substantially, in some embodiments, the electroplating process methods described herein achieve plating into spaces between metal conductors with aspect ratios of 7:1 or greater.
[0029] A method for forming high aspect ratio electroplated structures, in some embodiments, includes selective formation of metal crown plating at selective locations or regions. In one exemplary embodiment, the selective formation of metal crown plating includes: This is achieved by conducting an electroplating process according to the relationship: JPEG0007657546000006.jpg1833, where C is the concentration of the metal being plated (copper in this case) and C∞ is the bulk concentration of the plating bath. This relationship is also: In another embodiment, the selective formation of the metal crown may be expressed as performing an electroplating process in which the mass transport limit is equal to or greater than 67 percent (%). According to the relationship JPEG0007657546000008.jpg1831, or In another embodiment, the selective formation of the metal crown is achieved by performing an electroplating process in which the mass transport limit of the metal crown is equal to or greater than 80 percent (%) of the mass transport limit. This can be obtained by performing an electroplating process according to the relationship: JPEG0007657546000010.jpg1838, where i is the current density and ilimit is the current density limit.
[0030] FIG. 10e illustrates the formation of high aspect ratio electroplated structures at time T5 during the high current anisotropic super plating process. As an example, T5 is about 15 minutes 30 seconds into the process (T1+15 minutes 30 seconds). In other embodiments, the formation of high aspect ratio electroplated structures as shown in FIG. 10e occurs at time T5=T1+5 minutes. FIG. 10f illustrates the formation of high aspect ratio electroplated structures at time T6 during the high current anisotropic super plating process. This indicates the end of the crown plating process which completes the formation of high aspect ratio electroplated structures in some embodiments. As an example, T6 is about 20 minutes into the process (T1+20 minutes). In other embodiments, the formation of high aspect ratio electroplated structures as shown in FIG. 10f occurs at time T6=T1+10 minutes.
[0031] In some embodiments, the method of forming high aspect ratio electroplated structures uses a process including conformal plating and anisotropic plating as described herein. The conformal plating process uses 2 / 3 of the total plating time in some embodiments. In other embodiments, the conformal plating process uses 1 / 3 of the total plating time. Furthermore, the conformal plating process starts at 2 amperes per square decimeter ("ASD") for low metal plating baths, or 4 ASD for high metal plating baths. By way of example, the plating bath contains 12 grams per liter of copper and 1.85 moles (moles per liter) of sulfuric acid. Alternatively, the conformal plating process is a process that plates at a rate of 0.4 to 1.2 micrometers per minute. The conformal plating process continues, in embodiments, until the spacing between the traces is in the range of 6 to 8 micrometers. As the surface area of the structure being formed increases, the current density becomes gradually lower. However, the process obtains a uniform current density and growth rate on all surfaces being formed. In some embodiments, the increased surface area of the high aspect ratio structures formed allows the current to be increased to maintain the current density.
[0032] The anisotropic plating process, in some embodiments, uses 1 / 3 of the total plating time to form high aspect ratio electroplated structures. The anisotropic plating process increases the ASD to 7 ASD (3.5 times the current of the conformal plating process), but on average, doubles at the top of the metal structure being formed. The same fluid flow used in the conformal plating process can be maintained. As an example, the plating rate is 3 micrometers per minute at the top of the structure being formed, while the plating rate is near zero at the sidewalls of the structure. As the structure grows, the average current drops by half, but the peak current density remains at about 14 ASD at the top of the structure in embodiments. As an example, the peak current density is slightly more than 50% of the mass transport limit at the top surface, and even though the sidewalls are exposed to about 3 grams per liter of copper, the sidewalls are plated at less than 10% of the mass transport limit, or a plating rate of 5:1. With a higher percentage of mass transport limit, a higher plating rate ratio can be obtained.
[0033] Embodiments of the methods for forming high aspect ratio electroplated structures include variations of those described above to form high aspect ratio electroplated structures incorporating various characteristics. By way of example, the copper content of the plating bath configured as an anisotropic bath may be different from 13.5 grams per liter as described above. Varying the copper content of the flat trace bath while using the same current density can be used to control the spacing between the high aspect ratio electroplated structures. Other embodiments of the methods described herein include using a flat trace bath having a flat trace bath with a copper content of 12 grams per liter to form high aspect ratio electroplated structures spaced 8 micrometers apart. Yet other embodiments of the methods described herein include using a flat trace bath having a flat trace bath with a copper content of 15 grams per liter to form high aspect ratio electroplated structures spaced 4 micrometers apart. Thus, one skilled in the art will appreciate that adjustment of other parameters in the methods described herein can be used to vary the characteristics of the high aspect ratio electroplated structures. Some embodiments of the methods described herein include adjusting the current density to accommodate the current conditions to be plated, such as mass transfer rate, metals contained in the plating bath, fluid velocity, copper concentration, additives used, and temperature.
[0034] The method of forming the high aspect ratio electroplated structures also includes using a thin film dielectric process. In some embodiments, a photosensitive polyimide is used as the dielectric between each high aspect ratio electroplated structure. Liquid photosensitive polyimide allows for small via features, good coverage between high aspect ratio conductors, good alignment and margin properties, is a highly reliable material, and has a coefficient of thermal expansion ("CTE") similar to copper. Liquid photosensitive polyimide can easily fill gaps between high aspect ratio electroplated structures. In some embodiments, the use of liquid photosensitive polyimide is used to form via accesses up to 0.030 millimeters. Other dielectrics that may be used include, but are not limited to, KMPR and SU-8.
[0035] 11 illustrates high aspect ratio electroplated structures according to some embodiments formed using methods described herein. Each high aspect ratio electroplated structure 1202 includes a number of texture lines 1204 that indicate how the electroplating process proceeds to form the structure. A thin dielectric film 1206 is formed between and disposed over the high aspect ratio electroplated structures 1202. FIG. 12 illustrates a perspective view of a high aspect ratio electroplated structure 1302 according to some embodiments formed using methods described herein.
[0036] The methods described herein can be used to form high aspect ratio electroplated structures that form high density precision coils. FIG. 13a shows a high density precision coil formed using a high aspect ratio electroplated structure according to an embodiment. A coil 1402 is formed from a high aspect ratio electroplated structure such as those described herein. The high density precision coil also includes a central coil via 1404. The central coil via 1404 reduces the voltage drop in the coil during the manufacturing steps described herein. Additionally, the central coil via 1404 allows for better control of the voltage drop and current during the anisotropic plating process described herein, thereby allowing for better control of pitch variations in the coil. Additionally, the central coil via 1404 allows for better control of the voltage drop in the formed high density precision coil. FIG. 13b shows a cross-sectional view of the central coil via 1404 as part of a high density precision coil as described herein.
[0037] FIG. 14 illustrates a high aspect ratio electroplating structure including a high resolution stacked conductor layer according to an embodiment. The first conductor layer 1502a includes high aspect ratio electroplating structures 1504 formed using techniques including those described herein. The first dielectric layer 1508 is formed using a thin film dielectric process using techniques including those described herein. The first dielectric layer 1508 fills all spaces between the high aspect ratio electroplating structures of the first conductor layer 1502a to form a coating on the high aspect ratio electroplating structures 1504. The first dielectric layer 1508 is planarized using techniques known in the art. The second conductor layer 1502b includes high aspect ratio electroplating structures 1506 formed on the planarized surface of the first dielectric layer 1508. The second dielectric layer 1510 is formed using a thin film dielectric process using techniques including those described herein to fill all spaces between the high aspect ratio electroplated structures 1506 of the second conductor layer 1502b and to form a coating on the high aspect ratio electroplated structures 1506. The second dielectric layer 1510 can also be planarized. Further layers, including high aspect ratio electroplated structures, can be formed using techniques described herein.
[0038] FIG. 15 shows a high density precision coil including high aspect ratio electroplated structures in an embodiment including high resolution stacked conductor layers. The first conductor layer 1602a includes high aspect ratio electroplated structures formed using techniques including those described herein. The first dielectric layer 1608 is formed using a thin film dielectric process using techniques including those described herein. The first dielectric layer 1608 fills all spaces between the high aspect ratio electroplated structures of the first conductor layer 1602a to form a coating on the high aspect ratio electroplated structures. The first dielectric layer 1608 is planarized using techniques known in the art. The second conductor layer 1602b includes high aspect ratio electroplated structures formed on the planarized surface of the first dielectric layer 1608. The second dielectric layer 1610 is formed using a thin film dielectric process using techniques including those described herein to fill all spaces between the high aspect ratio electroplated structures of the second conductor layer 1602b and to form a coating on the high aspect ratio electroplated structures. The second dielectric layer 1610 can also be planarized. Further layers including high aspect ratio electroplated structures can be formed using techniques described herein.
[0039] The high density precision coil is formed having a first distance 1614 between the high aspect ratio electroplated structures of the first conductor layer 1602a and the high aspect ratio electroplated structures of the second conductor layer 1602b. In various embodiments, the first distance 1614 is less than 0.020 millimeters. In other embodiments, the first distance 1614 is 0.010 millimeters. The high density precision coil is formed having a second distance 1616 between the surface 1618 of the second dielectric layer 1610 and the high aspect ratio electroplated structures of the first conductor layer 1602a. In various embodiments, the second distance 1616 is less than 0.010 millimeters. In some embodiments, the second distance 1616 is 0.005 millimeters. In some embodiments, the second distance 1616 can be the starting gap minus the desired final gap divided by two. The high density precision coil is formed having a third distance 1620 between the high aspect ratio electroplated structures of the first conductor layer 1602a and the surface 1622 of the first dielectric layer. In various embodiments, the third distance 1620 is less than 0.020 millimeters. In some embodiments, the third distance 1620 is less than 0.015 millimeters. In other embodiments, the third distance 1620 is 0.010 millimeters. In various embodiments, the first dielectric layer is formed on a substrate 1624 using techniques including those described herein. In some embodiments, the substrate 1624 is a stainless steel layer. One skilled in the art will appreciate that the substrate 1624 can be formed from other materials including, but not limited to, alloy steel, copper alloys such as bronze, pure copper, nickel alloys, beryllium copper alloys, and other metals including those known in the art.
[0040] Other advantages of forming devices using high aspect ratio electroplated structures as described herein include devices with high structural strength, high reliability, and high heat dissipation capabilities. High structural strength is obtained by forming metal high aspect ratio electroplated structures that are highly dense and concentrated in all layers of the device. Additionally, the process of forming metal high aspect ratio electroplated structures described herein provides cross-directional alignment of structures layer by layer to provide high structural strength. The high structural strength of devices formed using the process of forming metal high aspect ratio electroplated structures described herein is also a result of good adhesion of dielectric layer materials, such as photosensitive polyimide layers, to the structures. In some embodiments, the high aspect ratio electroplated structures formed using the techniques described herein are coated with a non-magnetic nickel layer to increase the adhesion of the dielectric layer. This further increases the high structural strength in the final devices formed using the high aspect ratio electroplated structures described herein.
[0041] The reliability of devices formed using the high aspect ratio electroplating structures described herein is also high due to the use of high reliability materials such as photosensitive polyimide layers in the dielectric layers which provide high electrical performance. Using the techniques described herein, devices are formed which contain less dielectric material while achieving the property of reducing the overall thickness of the formed devices. Thus, heat dissipation is increased by increasing the thermal conductivity in devices using the present process techniques.
[0042] 16a-16c illustrate a process for forming high aspect ratio electroplating structures according to another embodiment. FIG. 16a illustrates traces 1802 formed on a substrate 1804 using subtractive etching. In some embodiments, a metal layer is formed on the substrate 1804. A photoresist layer is formed on the metal layer using techniques including those known in the art. In some embodiments, the photoresist layer is a photosensitive polyimide that is deposited on the metal layer in liquid form. The photoresist is patterned and developed using techniques including those known in the art. The metal layer is then etched using techniques including those known in the art. After the etching process, the traces 1802 are formed.
[0043] FIG 16b illustrates the formation of high aspect ratio electroplated structures using a conformal plating process such as those described herein. FIG 16c illustrates the formation of high aspect ratio electroplated structures using a crown plating process such as those described herein. In various embodiments, the high aspect ratio electroplated structures are formed without using a conformal plating process such as that described with respect to FIG 16b. Instead, a crown plating process such as that described with respect to FIG 16c is used after the formation of traces 1802 as described with respect to FIG 16a.
[0044] FIG. 17 illustrates selective formation of high aspect ratio electroplating structures according to embodiments. Once traces 1902 are formed using techniques including those described herein, a photoresist layer 1904 is formed on one or more portions of the formed traces 1902. The photoresist layer 1904 is a photosensitive polyimide that can be deposited and formed using techniques including those described herein. A metal crown 1906 is formed on the traces 1902 using one or both of the conformal plating process and the crown plating process described herein. FIG. 18 illustrates a perspective view of a high aspect ratio electroplating structure according to some embodiments formed with a metal crown portion selectively formed on the trace. In some embodiments, selectively forming a metal crown portion on the trace is used to improve structural properties of the high aspect ratio electroplating structure, improve electrical performance of the high aspect ratio electroplating structure, improve heat transfer, and meet special dimensional requirements of devices formed using the high aspect ratio electroplating structure. Examples of improvements in electrical performance include, but are not limited to, the capacitance, inductance, and resistance properties of the high aspect ratio electroplated structures. Additionally, the selective formation of metal crown portions on traces can be used to tailor the mechanical or electrical properties of circuits formed using the high aspect ratio electroplated structures.
[0045] FIG. 19 illustrates a hard drive disk suspension flexure 2102 including high aspect ratio electroplated structures according to embodiments formed using selective formation as described herein. FIG. 20 illustrates a cross-sectional view of the hard disk drive suspension flexure shown in FIG. 19 at line AA. The cross-section of the flexure 2102 includes high aspect ratio electroplated structures 2104 and traces 2106. The high aspect ratio electroplated structures 2104 are formed using selective formation techniques as described herein. Forming the high aspect ratio electroplated structures 2104 for use as conductors in predefined areas of the flexure can reduce DC resistance. This allows for fine lines and spaces required on the flexure to improve the electrical performance of the flexure while still meeting the design requirements for DC resistance.
[0046] 21a-b illustrate a process for forming high aspect ratio electroplated structures according to an embodiment using photoresist during a conformal plating process. FIG. 21a illustrates traces 2302 formed on a substrate 2304 using techniques including those described herein. FIG. 21b illustrates the formation of high aspect ratio electroplated structures using a plating process as described herein. Photoresist portions 2306 are formed on the substrate 2304 using deposition and patterning techniques including those described herein. Once the photoresist portions 2306 are formed, one or both of a conformal plating process and a crown plating process are performed to form metal portions 2308 on the traces 2302. The photoresist portions 2306 can be used to better define the spacing between the high aspect ratio electroplated structures.
[0047] FIG. 22 shows example chemical compositions used in the processes for forming the initial metal layer according to various embodiments, the standard conformal plating process, and the crown plating process.
[0048] 23 illustrates a perspective view of a top surface 2501 of an inductively coupled coil 2502 formed from a high aspect ratio electroplated structure 2504, including an integrated tuning capacitor, according to an embodiment. The use of high aspect ratio electroplated structures to form the inductively coupled coil reduces the footprint of the inductively coupled coil compared to inductively coupled coils using current techniques for forming coils. As such, the inductively coupled coil 2502 can be used in applications where space is limited. Additionally, the use of an integrated capacitor in the inductively coupled coil further reduces the footprint of the inductively coupled coil since no extra space requirements are needed to accommodate a discrete capacitor, such as a surface mount technology ("SMT") capacitor.
[0049] Figure 24 illustrates a perspective view of the bottom surface 2604 of an embodiment of the inductive coupling coil 2502 shown in Figure 23. Figure 25 illustrates a perspective view of the top surface of an embodiment of the inductive coupling coil 2502 coupled to a radio frequency identification ("RFID") chip 2704.
[0050] 26a-26j illustrate a method of forming an inductively coupled coil 2502 formed from high aspect ratio electroplated structures 2504 according to an embodiment. In various embodiments, the inductively coupled coil includes an integrated tuning capacitor. FIG. 26a illustrates a substrate 2802 formed using techniques including those known in the art. In some embodiments, the substrate 2802 is formed from stainless steel. Other materials that can be used for the substrate include, but are not limited to, alloy steel, copper, copper alloys, aluminum, and non-conductive materials that can be metallized using techniques including plasma vapor deposition, chemical vapor deposition, and electroless chemical deposition. A shadow mask 2804 is formed on the substrate 2802. The shadow mask 2804 is a high-K dielectric in some embodiments. Examples of high-K dielectrics that may be used include, but are not limited to, titanium dioxide (TiO2), niobium oxide (Nb2O5), tantalum oxide (TaO), aluminum oxide (Al2O3), silicon dioxide (SiO2), polyimide, SU-8, KMPR, and other high-k dielectric materials. In some embodiments, the shadow mask 2804 is formed using a sputtering process using techniques including those known in the art. The shadow mask 2804 is formed to have a thickness in some embodiments ranging from 500 to 1000 angstroms, including. In other embodiments, the shadow mask 2804 is formed using screen printing of a high-k ink. Examples of high-k inks include inks containing an epoxy loaded with particles of one or more of titanium dioxide (TiO2), niobium oxide (Nb2O5), tantalum oxide (TaO), aluminum oxide (Al2O3), silicon dioxide (SiO2), polyimide, and other high-k dielectric materials. In yet another embodiment, the shadow mask 2804 is formed using slot-die coating of a photoimageable dielectric doped with a high-K filler. An example of a high-K filler includes zirconium dioxide (ZrO2).
[0051] 26b shows a metal capacitor plate 2806 formed on a shadow mask 2804. The metal capacitor plate 2806 and the substrate 2802 form the two capacitor plates of an integrated capacitor. The thickness of the shadow mask 2804 can be used to set the effective capacitance of the integrated capacitor. Additionally, the purity of the high-K dielectric used to form the shadow mask 2804 can be used to set the effective capacitance of the integrated capacitor. The surface area of the metal capacitor plate 2806 can also be used to set the effective capacitance of the integrated capacitor.
[0052] FIG. 26c shows a base dielectric layer 2808 formed on the shadow mask 2804, the metal capacitor plate 2806, and at least a portion of the substrate 2802. In some embodiments, the base dielectric layer 2808 is formed by depositing a dielectric material, patterning the dielectric material, and curing the dielectric material using techniques including those known in the art. Examples of dielectric materials that can be used include, but are not limited to, polyimide, SU-8, KMPR, and hard baked photoresists such as those sold by IBM®. The base dielectric layer 2808 can also be patterned or etched to form vias. By way of example, jumper vias 2812 and shunt capacitor vias 2810 are formed in the base dielectric layer 2808. The shunt capacitor vias 2810 are formed to interconnect the integrated capacitors to the remainder of the circuit being formed. Similarly, the jumper vias 2812 are used to interconnect the circuit elements being formed to the substrate 2802.
[0053] FIG. 26d shows a coil 2814 formed on a base dielectric layer 2808 using high aspect ratio electroplating structures to form the coil 2814 using techniques including those described herein. In some embodiments, the coil 2814 is a single layer coil. The coil 2814 includes a central connection portion 2816 that connects to one of the shunt capacitor vias 2810 and one of the jumper vias 2812 that electrically connect to the metal capacitor plate 2806 of the integrated capacitor. The coil 2814 also includes a capacitor connection portion 2818 that connects the coil 2814 to the other of the shunt capacitor vias 2810 that electrically connects to the substrate 2802 configured as the bottom plate of the integrated capacitor. In various embodiments, a terminal pad 2820 is formed from the high aspect ratio electroplating structures using techniques including those described herein. The terminal pad 2820 can be formed during the same process used to form the coil 2814.
[0054] 26e shows a covercoat 2822 formed over the coil 2814, terminal pads 2820, and base dielectric layer 2808 to cover the coil side of the inductively coupled coil. The covercoat 2822 is formed using deposition, etching, and patterning steps including those known in the art. The covercoat 2822 can be formed, for example, from a polyimide solder mask, SU-8, KMPR, or epoxy.
[0055] 26f shows the backside of the inductively coupled coil formed in an embodiment. At least a first solder pad 2824 and a second solder pad 2826 are formed on the substrate 2802 opposite the coil 2814. In some embodiments, the first solder pad 2824 and the second solder pad 2826 are formed from gold using deposition and patterning techniques, including those known in the art. The first solder pad 2824 and the second solder pad 2826 are formed to provide electrical contact for attaching an integrated circuit chip, such as an RFID chip, to the substrate 2802.
[0056] FIG. 26g shows a backside dielectric layer 2828 formed on the backside of the inductively coupled coil formed in an embodiment. The method of forming the inductively coupled coil can optionally include forming a backside dielectric layer 2828 on the substrate 2802. The backside dielectric layer 2828 is formed using a technique similar to that for forming the base dielectric layer 2808. The backside dielectric layer 2828 is patterned in some embodiments to prevent shorting between the substrate 2802 and the attached integrated circuit chip. The backside dielectric layer 2828 is patterned in various embodiments to obtain a jumper pattern 2830 on the substrate 2802 to be etched in a subsequent step to form a jumper path. Other patterns of the backside dielectric layer can be formed to etch other portions of the substrate 2802 as well.
[0057] FIG. 26h shows an embodiment of the inductive coupling coil 2834 formed into its final shape. The portions of the substrate 2802 not covered by the backside dielectric layer 2828 are etched. These etched portions include a jumper pattern 2830 to form a jumper path 2832. Etching is performed using techniques including those known in the art. One skilled in the art will appreciate that other portions of the substrate 2802 can be etched to form other conductive paths similar to the jumper path 2832. FIG. 26i shows the coil side of an embodiment of the inductive coupling coil 2834 including the jumper path 2832.
[0058] 26j shows the coil side of the inductively coupled coil 2834 in an embodiment that includes an integrated chip 2836 attached to the back side of the inductively coupled coil 2834. A method of forming the inductively coupled coil 2834 can optionally include attaching an integrated chip 2836, such as an RFID chip, to the inductively coupled coil 2834 using techniques including those known in the art. Such an integrated chip 2836 can be attached using adhesives including but not limited to conductive epoxies, solders, and other materials used to make electrical connections.
[0059] Integrating capacitors into devices that include high aspect ratio electroplated structures takes advantage of the small footprint requirements enabled by the use of high aspect ratio electroplated structures. Other embodiments of inductively coupled coils include inductively coupled coils having multiple integrated capacitors. The integrated capacitors can be connected in parallel or series as known in the art. Other devices that include high aspect ratio electroplated structures that may also include integrated capacitors include, but are not limited to, step-down transformers, signal conditioning devices, tuning devices, and other devices that may include one or more inductors and one or more capacitors.
[0060] The high aspect ratio electroplated structures of the embodiments described herein can be used to form or form part of devices to optimize performance and obtain a small footprint, such as power converters (e.g., step-down transformers, voltage dividers, AC transformers), actuators (e.g., linear, VCM), antennas (e.g., RFID, wireless power transfer for battery charging, and security chips), wireless passive coils, batteries for mobile phones and medical devices that are charged, proximity sensors, pressure sensors, contactless connectors, micromotors, microfluidic devices, cool and heat sinks for packaging, elongated flexible circuits with air-core capacitance and inductance (e.g., for catheters), interdigital acoustic wave transducers, haptic vibrators, implants (e.g., pacemakers, stimulators, bone growth devices), magnetic resonance for treatments, and other applications. Examples of applications include, but are not limited to, imaging ("MRI") devices (e.g., esophageal, colonoscopy), Beyond Haptics (e.g., clothing, gloves), coated surfaces for detection and filter removal, security systems, high energy density batteries, inductive heating devices (for small localized applications), magnetic fields and channel pulsed dose delivery for fluid and drug dispersion, tracking and information devices (e.g., agriculture, food, valuables), credit card security, audio systems (e.g., speaker coils, charging mechanisms for headphones and earphones), thermal transfer, mechanical heat transfer seals, energy harvesters, and interlocking features (similar to hook and loop fasteners). Additionally, the high aspect ratio electroplated structures as described herein can be used to form high bandwidth, low impedance interconnects. The use of high aspect ratio electroplated structures in interconnects can be used to improve electrical properties (e.g., resistance, inductance, capacitance), improve heat transfer properties, and customize dimensional requirements (thickness control). Interconnects including high aspect ratio electroplated structures as described herein can be used to adjust the bandwidth of one or more circuits in a given frequency range. Other interconnect uses including high aspect ratio electroplated structures can integrate one or more circuits of different currents (e.g., signal and power).The use of high aspect ratio electroplating structures allows for circuits with various cross sections to be fabricated close together to maintain a small overall package size, with some circuits having more current carrying capabilities. High aspect ratio electroplating structures can also be used in interconnects for mechanical purposes. For example, it may be desirable to have some areas of a circuit protrude more than others to act as mechanical stops, bearings, electrical contact areas, or to provide robustness.
[0061] 27 shows a top view of a flexure for a suspension of a hard disk drive including a high aspect ratio electroplated structure according to an embodiment. The flexure 2900 includes a distal portion 2901, a gimbal portion 2902, a mid-portion 2904, a gap portion 2906, and a proximal portion 2908. The proximal portion 2908 is configured to be attached to a base plate such that the distal portion 2901 extends above a rotating disk media. The gimbal portion 2902 is configured in some embodiments to include one or more motors, such as a piezoelectric motor, and one or more electrical components, such as a head slider for reading and writing the disk media, and components for heat-assisted magnetic recording ("HAMR"), heat-assisted magnetic recording ("TAMR"), or microwave-assisted magnetic recording ("MAMR"). The one or more motors and one or more electrical components are electrically connected to other circuit components through one or more traces formed on the conductor layer of the flexure that extend from the distal portion 2901 of the flexure 2900 through the mid-portion 2904, over the gap portion 2906, and beyond the proximal portion 2908. The gap portion 2906 is a portion of the flexure where a substrate layer, such as a stainless steel layer, has been partially or completely removed. Thus, one or more traces in the conductor layer of the flexure extend over the gap portion 2906 without any support. One skilled in the art will appreciate that a flexure can have one or more gap portions 2906 at any location along the flexure.
[0062] FIG. 28 shows a cross-sectional view of the gap portion of the flexure at the gap portion along line A shown in FIG. 27. The gap portion 2906 includes a trace 3002 disposed on a dielectric layer 3004. A dielectric layer, such as a polyimide layer, is disposed on a substrate 3006, such as a stainless steel layer. The substrate 3006 and the dielectric layer 3004 define a gap 3008 such that the trace 3002 extends over the gap 3008. The trace 3002 includes a metal crown portion to form a high aspect ratio structure. The metal crown portion is selectively formed on the trace 3002 using techniques described herein. The metal crown portion is formed on the trace 3002 to provide additional strength to span the gap 3008 and as it is used to electrically connect with an interconnect in the region of the gap 3008.
[0063] FIG. 29 illustrates a gimbal portion 2902 having a mass structure 3102 according to an embodiment. The mass structure 3102 is formed using high aspect ratio electroplating structures using techniques described herein. In some embodiments, the mass structure 3102 is used as a weight to tune the resonance of the gimbal portion 2902. Thus, the shape, size, and position of the mass structure 3102 can be determined to tune the resonance of the gimbal portion 2902 to enhance the performance of the hard drive suspension. The process described herein used to form the high aspect ratio structures can be used to preserve the size of the high aspect ratio structures so that the resonance can be fine-tuned. Furthermore, the process can form high aspect ratio structures with dimensions that exceed the capabilities of current lithography processes, providing further control over the final structure formed.
[0064] The mass structure 3102 can also be configured for use as a mechanical stop. By way of example, one or more mechanical stops can be formed in any shape to act as a backstop and / or can be used to align the mounting of components in the gimbal portion 2902 or other portions of the flexure.
[0065] FIG. 30 illustrates a cross-sectional view of a proximal portion of a flexure including a high aspect ratio electroplated structure according to an embodiment taken along line B shown in FIG. 27. The proximal portion 2904 includes a conductor layer including traces 3002a, 3002b, 3002c, 3002d disposed on a dielectric layer 3004. The dielectric layer 3004 is disposed on a substrate 3006. A cover layer 3001 is disposed on the conductor layer and the dielectric layer. The conductor layer includes conventional traces 3002a, 3002b and traces 3002c, 3002d formed with at least some of the traces including metal crown portions 3202a, 3202b to form the high aspect ratio electroplated structure using the techniques described herein. One or more portions of the traces 3002a, 3002b, 3002c, 3002d can be formed to include metal crown portions 3202a, 3202b to adjust the impedance of each trace. As an example, the resistance of the traces can be adjusted as needed to meet desired operating characteristics. Other examples include using metal crown portions to adjust impedance by closing the distance between adjacent traces 3002a, 3002b, 3002c, 3002d.
[0066] FIG. 31 shows a cross-sectional view of a proximal portion of a flexure including a high aspect ratio structure according to an embodiment taken along line C shown in FIG. 27. The proximal portion of the flexure includes a conductor layer including at least a trace 3002 disposed on a dielectric layer 3004. The dielectric layer 3004 is disposed on a substrate 3006. Additionally, a cover layer 3001 is disposed over the formed to include a metal crown portion to form a high aspect ratio electroplated structure using the techniques described herein. The trace 3002 is configured as a high aspect ratio structure to match the impedance of the trace to a terminating connector and provide strength to the joint electrically connecting the trace 3002 to the connector. FIG. 32 shows a top view of a proximal portion 2908 of a flexure including a high aspect ratio structure according to an embodiment. The use of high aspect ratio structures as described for use in flexures is also applicable to other circuit board technologies, such as those used in microcircuits and radio frequency ("RF") circuits.
[0067] Although described with respect to these embodiments, those skilled in the art will recognize that changes may be made in form and detail without departing from the spirit and scope of the invention.
Claims
1. 1. A method for manufacturing metal structures, including but not limited to circuit leads and vias, comprising: providing a substrate having traces characterized by a height to width aspect ratio A / B; and electroplating a metal crown onto at least a portion of the trace to form the metal structure having a height to width aspect ratio A / S greater than the aspect ratio A / B of the trace; During the electroplating step, a current density is adjusted based on one or more conditions of a plating bath, the conditions including an amount of copper and / or an amount of leveler additive to the plating solution, and the metal structure is disposed on a dielectric layer.
2. 2. The method of claim 1, wherein electroplating the metal crown includes depositing metal on top and sides of the traces, the rate of deposition on the tops of the traces being greater than the rate of deposition on the sides of the traces.
3. The method of claim 1 , wherein electroplating the metal crown comprises depositing metal only on top of the traces.
4. The method of any of claims 1 to 3, wherein electroplating comprises electroplating to form the metal structure wherein the ratio A / S is 1.2 or greater.
5. The method of any of claims 1 to 4, wherein electroplating includes electroplating to form metal structures whose height is greater than twice the height of the traces.
6. The method of any of claims 1 to 5, wherein electroplating includes electroplating to form metal structures having widths that are no greater than twice the width of the traces.
7. 7. The method of claim 1, wherein the spacing between the structures prior to the electroplating step is less than or equal to 1.5 times the width of the trace.
8. A method according to any preceding claim, wherein providing the substrate comprises electroplating the trace onto the substrate.
9. Electroplating the metal crown comprises: a conformal electroplating phase using a first current density; A method according to any of claims 1 to 8, comprising an anisotropic electroplating phase after said conformal electroplating phase, said anisotropic electroplating phase using a second current density higher than said first current density.
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