Image sensor

Abstract

An image capture element according to an embodiment of the present disclosure is provided with a plurality of pixels. Each of the plurality of pixels comprises: a first photoelectric conversion layer which converts light into a first electric charge; a first pixel electrode which collects the first electric charge; a second photoelectric conversion layer which is positioned above the first photoelectric conversion layer and converts light into a second electric charge; and a second pixel electrode which collects the second electric charge. The surface area of the first pixel electrode is smaller than the surface area of the second pixel electrode (14).

Description

[Technical field]

[0001] The present disclosure relates to an imaging device. [Background technology]

[0002] Conventionally, imaging elements that utilize photoelectric conversion have been widely used.

[0003] Patent Document 1 discloses an imaging element having a plurality of stacked photoelectric conversion units. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. 2016 / 002576 Summary of the Invention [Problem to be solved by the invention]

[0005] One challenge for imaging devices is to improve image quality. [Means for solving the problem]

[0006] An imaging element according to one aspect of the present disclosure includes: It comprises a plurality of pixels. Each of the plurality of pixels is a first photoelectric conversion layer that converts light into a first charge; a first pixel electrode that collects the first charges; A second photoelectric conversion layer disposed above the first photoelectric conversion layer and configured to convert light into a second charge; a second pixel electrode for collecting the second charges; Includes. The area of ​​the first pixel electrode is smaller than the area of ​​the second pixel electrode. Effect of the Invention

[0007] According to the techniques of the present disclosure, image quality can be improved. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a configuration diagram of an imaging device according to a first embodiment of the present disclosure. [Figure 2A] FIG. 2A is a cross-sectional view of the imaging element shown in FIG. [Figure 2B] FIG. 2B is a cross-sectional view of an imaging element having a different configuration of multiple counter electrodes. [Figure 2C] FIG. 2C is a cross-sectional view of an imaging element having yet another configuration of multiple counter electrodes. [Figure 3A] FIG. 3A is a diagram showing the arrangement of pixel electrodes and plugs when the imaging element according to the first embodiment is viewed from the normal direction of a semiconductor substrate. [Figure 3B] FIG. 3B is a diagram showing another arrangement of pixel electrodes when the imaging element according to the first embodiment is viewed from the normal direction of the semiconductor substrate. [Figure 4A] FIG. 4A is a cross-sectional view of an imaging element according to Modification 1. FIG. [Figure 4B] FIG. 4B is a cross-sectional view of another image sensor according to Modification 1. As shown in FIG. [Diagram 5] FIG. 5 is a cross-sectional view of an imaging element according to the second modification. [Figure 6A] FIG. 6A is a cross-sectional view of an imaging element according to Modification 3. FIG. [Figure 6B] FIG. 6B is a diagram showing the arrangement of the first charge accumulation region, the second charge accumulation region, the third charge accumulation region, and the first pixel electrode when the image sensor according to Modification 3 is viewed from the normal direction of the semiconductor substrate. [Figure 6C] FIG. 6C is a diagram showing another arrangement of the first charge accumulation region, the second charge accumulation region, the third charge accumulation region, and the first pixel electrode when the imaging element according to Modification 3 is viewed from the normal direction of the semiconductor substrate. [Figure 7A] FIG. 7A is a cross-sectional view of an imaging element according to the second embodiment. [Figure 7B] FIG. 7B is a diagram showing the arrangement of pixel electrodes and plugs when the imaging element according to the second embodiment is viewed from the normal direction of the semiconductor substrate. [Figure 8] FIG. 8 is a cross-sectional view of an imaging element according to the third embodiment. [Figure 9] FIG. 9 is a diagram showing the arrangement of pixel electrodes and photodiodes when the image sensor according to the third embodiment is viewed from the normal direction of the semiconductor substrate. [Figure 10] FIG. 10 is a cross-sectional view of an imaging element according to the fourth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] (Findings on which this disclosure is based) The present inventors have conducted extensive research into the causes of impeding improvements in image quality achieved by the imaging element of Patent Document 1. As a result, they have found the following problems.

[0010] According to the imaging element of Patent Document 1, color mixing caused by obliquely incident light is likely to be a problem. In other words, light that is obliquely incident on a specific pixel also enters adjacent pixels, causing color mixing between pixels. Suppressing color mixing caused by obliquely incident light is beneficial for improving image quality.

[0011] The present disclosure provides a technique for suppressing color mixing caused by obliquely incident light.

[0012] (Summary of one aspect of the present disclosure) The imaging element according to the first aspect of the present disclosure includes: A plurality of pixels are provided, Each of the plurality of pixels is a first photoelectric conversion layer that converts light into a first charge; a first pixel electrode that collects the first charges; A second photoelectric conversion layer disposed above the first photoelectric conversion layer and configured to convert light into a second charge; a second pixel electrode for collecting the second charges; Including, The area of ​​the first pixel electrode is smaller than the area of ​​the second pixel electrode.

[0013] According to the first aspect, even if light is obliquely incident on a particular pixel, the area of ​​the first pixel electrode is limited, so that the charge generated by the oblique incidence is unlikely to be collected by the first pixel electrode, and as a result, color mixing between adjacent pixels can be suppressed.

[0014] In the second aspect of the present disclosure, for example, the imaging element according to the first aspect may further include a semiconductor substrate, and when the imaging element is viewed from a normal direction of the semiconductor substrate, the first pixel electrode may be located inside an outer edge of the second pixel electrode. With this configuration, color mixing due to oblique incidence can be more sufficiently suppressed.

[0015] In a third aspect of the present disclosure, for example, in the image sensor according to the first or second aspect, the material of the first pixel electrode may be different from the material of the second pixel electrode. With this configuration, photoelectric conversion caused by light incident on the semiconductor substrate can be suppressed, and parasitic sensitivity can be reduced.

[0016] In a fourth aspect of the present disclosure, for example, in the image sensor according to any one of the first to third aspects, the first pixel electrode may be thicker than the second pixel electrode. With this configuration, photoelectric conversion caused by light incident on the semiconductor substrate can be further suppressed, and parasitic sensitivity can be reduced.

[0017] In a fifth aspect of the present disclosure, for example, the imaging element according to any one of the first to fourth aspects may further include a semiconductor substrate, a first charge accumulation region provided on the semiconductor substrate and electrically connected to the first pixel electrode, and a second charge accumulation region provided on the semiconductor substrate and electrically connected to the second pixel electrode, and the first charge accumulation region and the second charge accumulation region may overlap the first pixel electrode when the imaging element is viewed from a normal direction of the semiconductor substrate. With this configuration, light is blocked by the first pixel electrode, making it difficult for light to enter each charge accumulation region.

[0018] In a sixth aspect of the present disclosure, for example, the imaging element according to any one of the first to fifth aspects may further include a third photoelectric conversion layer disposed between the first photoelectric conversion layer and the second photoelectric conversion layer, the third photoelectric conversion layer converting light into a third charge, and a third pixel electrode collecting the third charge. Such a configuration is suitable for forming a full-color image.

[0019] In the seventh aspect of the present disclosure, for example, in the imaging element according to the sixth aspect, the area of ​​the third pixel electrode may be smaller than the area of ​​the second pixel electrode. With this configuration, since the area of ​​the second pixel electrode is limited, the electric charge generated by oblique incidence is less likely to be collected by the second pixel electrode. As a result, color mixing between adjacent pixels can be suppressed.

[0020] In the eighth aspect of the present disclosure, for example, in the imaging element according to the sixth or seventh aspect, the area of ​​the first pixel electrode may be smaller than the area of ​​the third pixel electrode. With this configuration, the effect obtained when the area of ​​the first pixel electrode is smaller than the area of ​​the second pixel electrode and the effect obtained when the area of ​​the third pixel electrode is smaller than the area of ​​the second pixel electrode are obtained in a superimposed manner.

[0021] In a ninth aspect of the present disclosure, for example, the imaging element according to any one of the sixth to eighth aspects may further include a semiconductor substrate, and when the imaging element is viewed from a normal direction of the semiconductor substrate, the third pixel electrode may be located inside an outer edge of the second pixel electrode. With this configuration, color mixing due to oblique incidence can be more sufficiently suppressed.

[0022] In a tenth aspect of the present disclosure, for example, the imaging element according to any one of the sixth to ninth aspects may further include a semiconductor substrate, and the first pixel electrode may be located inside an outer edge of the third pixel electrode when the imaging element is viewed from a normal direction of the semiconductor substrate. With this configuration, the effect obtained when the first pixel electrode is located inside the outer edge of the second pixel electrode and the effect obtained when the third pixel electrode is located inside the outer edge of the second pixel electrode are obtained in a superimposed manner.

[0023] In an eleventh aspect of the present disclosure, for example, in the image sensor according to any one of the sixth to tenth aspects, the material of the first pixel electrode may be different from the material of the third pixel electrode. With this configuration, photoelectric conversion caused by light incident on the semiconductor substrate can be further suppressed, and parasitic sensitivity can be reduced.

[0024] In a twelfth aspect of the present disclosure, for example, in the image sensor according to any one of the sixth to eleventh aspects, the first pixel electrode may be thicker than the third pixel electrode. With this configuration, photoelectric conversion caused by light incident on the semiconductor substrate can be further suppressed, and parasitic sensitivity can be reduced.

[0025] In a thirteenth aspect of the present disclosure, for example, the imaging element according to any one of the sixth to twelfth aspects may further include a semiconductor substrate, a first charge accumulation region provided on the semiconductor substrate and electrically connected to the first pixel electrode, a second charge accumulation region provided on the semiconductor substrate and electrically connected to the second pixel electrode, and a third charge accumulation region provided on the semiconductor substrate and electrically connected to the third pixel electrode, and when the imaging element is viewed from a normal direction of the semiconductor substrate, the first charge accumulation region, the second charge accumulation region, and the third charge accumulation region may overlap the first pixel electrode. With this configuration, light is blocked by the first pixel electrode, so that light is less likely to be incident on each charge accumulation region.

[0026] In a fourteenth aspect of the present disclosure, for example, the imaging device according to any one of the sixth to thirteenth aspects may further include a semiconductor substrate, and in a direction parallel to a surface of the semiconductor substrate, a distance between an outer edge of the first pixel electrode and an outer edge of the third pixel electrode may be longer than a distance between an outer edge of the second pixel electrode and an outer edge of the third pixel electrode. With this configuration, color mixing due to oblique incidence can be significantly suppressed.

[0027] In a fifteenth aspect of the present disclosure, for example, in the imaging device according to any one of the first to fourteenth aspects, a part of the first photoelectric conversion layer in a first pixel arbitrarily selected from the plurality of pixels may be electrically connected to a part of the first photoelectric conversion layer in a pixel adjacent to the first pixel among the plurality of pixels, and a part of the second photoelectric conversion layer in a second pixel arbitrarily selected from the plurality of pixels may be electrically connected to a part of the second photoelectric conversion layer in a pixel adjacent to the second pixel among the plurality of pixels. By applying the technology of the present disclosure to such a structure, the effect of suppressing color mixing can be more sufficiently obtained.

[0028] An imaging element according to a sixteenth aspect of the present disclosure, A semiconductor substrate; A plurality of pixels; An imaging element comprising: Each of the plurality of pixels is The first photoelectric conversion layer is disposed above the semiconductor substrate; a first pixel electrode electrically connected to the first photoelectric conversion layer and configured to collect charges corresponding to light in a first wavelength range; a first charge storage region provided on the semiconductor substrate and electrically connected to the first pixel electrode; a second photoelectric conversion layer disposed above the first photoelectric conversion layer; a second pixel electrode electrically connected to the second photoelectric conversion layer and configured to collect charges corresponding to light in a second wavelength range; a second charge storage region provided on the semiconductor substrate and electrically connected to the second pixel electrode; having When the imaging element is viewed from a normal direction of the semiconductor substrate, both the first charge accumulation region and the second charge accumulation region overlap the first pixel electrode.

[0029] According to the sixteenth aspect, since the light is blocked by the first pixel electrode, the light is less likely to be incident on each charge accumulation region, and as a result, the parasitic sensitivity of the semiconductor substrate can be reduced.

[0030] In a seventeenth aspect of the present disclosure, for example, an imaging element relating to any one of the first to sixteenth aspects may further include a semiconductor substrate, and the first pixel electrode may include a first storage electrode that accumulates the first charge in the first photoelectric conversion layer and a first readout electrode electrically connected to the semiconductor substrate, and the second pixel electrode may include a second storage electrode that accumulates the second charge in the second photoelectric conversion layer and a second readout electrode electrically connected to the semiconductor substrate.

[0031] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. The present disclosure is not limited to the following embodiments.

[0032] (First embodiment) 1 shows a configuration of an imaging device 100A according to a first embodiment of the present disclosure. The imaging device 100A includes an imaging element 100. The imaging element 100 includes a semiconductor substrate 1 and a plurality of pixels 10. The plurality of pixels 10 are provided on the semiconductor substrate 1. Each pixel 10 is supported by the semiconductor substrate 1. A portion of the pixel 10 may be formed by the semiconductor substrate 1.

[0033] The semiconductor substrate 1 may be a circuit board including various electronic circuits, and is made of, for example, a Si substrate.

[0034] Each pixel 10 includes a photoelectric conversion unit 12. The photoelectric conversion unit 12 generates positive and negative charges, typically hole-electron pairs, upon receiving incident light. The photoelectric conversion unit 12 includes at least one photoelectric conversion layer disposed above the semiconductor substrate 1. In FIG. 1, the photoelectric conversion units 12 of each pixel 10 are shown spatially separated from one another. However, this is merely for convenience of explanation. The photoelectric conversion units 12 of the multiple pixels 10 may be continuously disposed on the semiconductor substrate 1 without any gaps between them.

[0035] 1, the pixels 10 are arranged in a plurality of rows and a plurality of columns, i.e., m rows and n columns. m and n are, independently, integers of 1 or more. The pixels 10 are arranged, for example, two-dimensionally on the semiconductor substrate 1 to form an imaging region. When the imaging device 100A is viewed in a plan view, the imaging element 100 can be defined as a region in which a photoelectric conversion layer exists.

[0036] The number and arrangement of the pixels 10 are not particularly limited. In Fig. 1, the center of each pixel 10 is located on a lattice point of a square lattice. A plurality of pixels 10 may be arranged so that the center of each pixel 10 is located on a lattice point of a triangular lattice, a hexagonal lattice, or the like. By arranging the pixels 10 one-dimensionally, the image sensor 100 can be used as a line sensor.

[0037] The imaging device 100A has peripheral circuits formed on a semiconductor substrate 1.

[0038] The peripheral circuits include a vertical scanning circuit 52 and a horizontal signal readout circuit 54. The peripheral circuits may additionally include a control circuit 56 and a voltage supply circuit 58. The peripheral circuits may further include a signal processing circuit, an output circuit, and the like. Each circuit is provided on the semiconductor substrate 1. A part of the peripheral circuits may be disposed on a substrate other than the semiconductor substrate 1 on which the pixels 10 are formed.

[0039] The vertical scanning circuit 52 is also called a row scanning circuit. An address signal line 44 is provided corresponding to each row of the pixels 10, and the address signal line 44 is connected to the vertical scanning circuit 52. The signal line provided corresponding to each row of the pixels 10 is not limited to the address signal line 44, and a plurality of types of signal lines can be connected to the vertical scanning circuit 52 for each row of the pixels 10. The horizontal signal readout circuit 54 is also called a column scanning circuit. A vertical signal line 45 is provided corresponding to each column of the pixels 10, and the vertical signal line 45 is connected to the horizontal signal readout circuit 54.

[0040] The control circuit 56 receives command data, a clock, and the like provided from outside the imaging device 100A to control the entire imaging device 100A. Typically, the control circuit 56 has a timing generator and supplies drive signals to the vertical scanning circuit 52, the horizontal signal read circuit 54, the voltage supply circuit 58, and the like. The control circuit 56 can be realized, for example, by a microcontroller including one or more processors. The functions of the control circuit 56 may be realized by a combination of a general-purpose processing circuit and software, or may be realized by hardware specialized for such processing.

[0041] The voltage supply circuit 58 supplies a predetermined voltage to each pixel 10 via the voltage line 48. The voltage supply circuit 58 is not limited to a specific power supply circuit, and may be a circuit that converts a voltage supplied from a power source such as a battery into a predetermined voltage, or may be a circuit that generates a predetermined voltage. The voltage supply circuit 58 may be a part of the above-mentioned vertical scanning circuit 52. These circuits that constitute the peripheral circuits may be arranged in a peripheral region R2 outside the image sensor 100.

[0042] FIG. 2A shows a cross section of the imaging element 100.

[0043] Each pixel 10 has a plurality of photoelectric conversion layers 121, 122, and 123. The plurality of photoelectric conversion layers 121, 122, and 123 include a first photoelectric conversion layer 121, a second photoelectric conversion layer 122, and a third photoelectric conversion layer 123. The first photoelectric conversion layer 121 may be a single layer shared by the plurality of pixels 10. The second photoelectric conversion layer 122 may be a single layer shared by the plurality of pixels 10. The third photoelectric conversion layer 123 may be a single layer shared by the plurality of pixels 10. However, each of the photoelectric conversion layers 121, 122, and 123 may be divided for each pixel. "Shared by a plurality of pixels" means that it is shared between a specific pixel and at least one pixel adjacent to the specific pixel.

[0044] Compared to a case where each of the photoelectric conversion layers 121, 122, and 123 is divided into pixels, when each of the photoelectric conversion layers 121, 122, and 123 is a single layer, color mixing due to oblique incidence is likely to occur. Therefore, the technology of the present disclosure can be particularly effective when each of the photoelectric conversion layers 121, 122, and 123 is a single layer.

[0045] The following structure may be adopted even if the photoelectric conversion layer is a single layer or is divided into pixels. The first photoelectric conversion layer 121 is electrically connected between adjacent pixels. The second photoelectric conversion layer 122 is electrically connected between adjacent pixels. The third photoelectric conversion layer 123 is electrically connected between adjacent pixels. That is, a part of the first photoelectric conversion layer 121 in a specific pixel 10 (first pixel) arbitrarily selected from the plurality of pixels 10 is electrically connected to a part of the first photoelectric conversion layer 121 in a pixel 10 adjacent to the specific pixel 10 among the plurality of pixels 10. A part of the second photoelectric conversion layer 122 in a specific pixel 10 (second pixel) arbitrarily selected from the plurality of pixels 10 is electrically connected to a part of the second photoelectric conversion layer 122 in a pixel 10 adjacent to the specific pixel 10 among the plurality of pixels 10. A part of the third photoelectric conversion layer 123 in a specific pixel 10 (third pixel) arbitrarily selected from the multiple pixels 10 is electrically connected to a part of the third photoelectric conversion layer 123 in a pixel 10 adjacent to the specific pixel 10 among the multiple pixels 10. When the technology of the present disclosure is applied to such a structure, the effect of suppressing color mixing can be more sufficiently obtained.

[0046] The photoelectric conversion layers 121, 122, and 123 are made of a photoelectric conversion material. The photoelectric conversion material is typically an organic material.

[0047] The first photoelectric conversion layer 121 collects charges (first charges) corresponding to light in a first wavelength range. The second photoelectric conversion layer 122 collects charges (second charges) corresponding to light in a second wavelength range. The third photoelectric conversion layer 123 collects charges (third charges) corresponding to light in a third wavelength range. The first wavelength range is, for example, the wavelength range of red light. The first photoelectric conversion layer 121 is made of a material sensitive to red light. The second wavelength range is, for example, the wavelength range of blue light. The second photoelectric conversion layer 122 is made of a material sensitive to blue light. The third wavelength range is, for example, the wavelength range of green light. The third photoelectric conversion layer 123 is made of a material sensitive to green light.

[0048] In this embodiment, the semiconductor substrate 1, the first photoelectric conversion layer 121, the third photoelectric conversion layer 123, and the second photoelectric conversion layer 122 are arranged in this order. The first photoelectric conversion layer 121 is arranged above the semiconductor substrate 1. The third photoelectric conversion layer 123 is arranged above the first photoelectric conversion layer 121. The second photoelectric conversion layer 122 is arranged above the third photoelectric conversion layer 123. In the normal direction of the semiconductor substrate 1, the first photoelectric conversion layer 121 is arranged between the third photoelectric conversion layer 123 and the semiconductor substrate 1. In the normal direction of the semiconductor substrate 1, the third photoelectric conversion layer 123 is arranged between the second photoelectric conversion layer 122 and the first photoelectric conversion layer 121. The arrangement order of the photoelectric conversion layers 121, 122, and 123 is not limited to this order. In general, since the sensitivity of a photoelectric conversion material that absorbs blue light is low, it is advantageous to have a layer sensitive to blue light in the uppermost layer.

[0049] In this specification, "upper" and "lower" are defined based on the traveling direction of light. The side approaching the light incident surface is "upper", and the side away from the light incident surface is "lower".

[0050] Each pixel 10 further has a plurality of pixel electrodes 13, 14, and 15. The plurality of pixel electrodes 13, 14, and 15 include a first pixel electrode 13, a second pixel electrode 14, and a third pixel electrode 15. The first pixel electrode 13 is electrically connected to a first photoelectric conversion layer 121. The second pixel electrode 14 is electrically connected to a second photoelectric conversion layer 122. The third pixel electrode 15 is electrically connected to a third photoelectric conversion layer 123.

[0051] The second pixel electrode 14 and the third pixel electrode 15 are transparent electrodes that are translucent to visible light and / or near infrared light. The transparent electrodes are made of a transparent conductive oxide such as ITO (Indium Tin Oxide). The first pixel electrode 13 is a non-transparent electrode that is not translucent to visible light and / or near infrared light. Examples of materials for the non-transparent electrodes include metals, metal oxides, metal nitrides, conductive polysilicon, and the like.

[0052] In this specification, "having light transmissivity" means that the transmittance of light in a specific wavelength range is 40% or more. The wavelength range of visible light is, for example, 400 nm to 780 nm. The wavelength range of near-infrared light is, for example, 780 nm to 2000 nm. The transmittance can be calculated by the method specified in Japanese Industrial Standard JIS R3106 (1998).

[0053] Each pixel 10 further has a plurality of counter electrodes 17, 18, and 19. The plurality of counter electrodes 17, 18, and 19 include a first counter electrode 17, a second counter electrode 18, and a third counter electrode 19. Each of the counter electrodes 17, 18, and 19 can be a transparent electrode that is translucent to visible light and / or near-infrared light.

[0054] The first counter electrode 17 is provided in correspondence with the first pixel electrode 13. The first photoelectric conversion layer 121 is sandwiched between the first counter electrode 17 and the first pixel electrode 13. The second counter electrode 18 is provided in correspondence with the second pixel electrode 14. The second photoelectric conversion layer 122 is sandwiched between the second counter electrode 18 and the second pixel electrode 14. The third counter electrode 19 is provided in correspondence with the third pixel electrode 15. The third photoelectric conversion layer 123 is sandwiched between the third counter electrode 19 and the third pixel electrode 15. The first counter electrode 17 is electrically connected to the first photoelectric conversion layer 121. The second counter electrode 18 is electrically connected to the second photoelectric conversion layer 122. The third counter electrode 19 is electrically connected to the third photoelectric conversion layer 123.

[0055] The first counter electrode 17 may be a single layer shared by multiple pixels 10. The second counter electrode 18 may be a single layer shared by multiple pixels 10. The third counter electrode 19 may be a single layer shared by multiple pixels 10. However, each of the counter electrodes 17, 18, and 19 may be divided for each pixel.

[0056] The following structure may be adopted whether the counter electrode is a single layer or divided for each pixel. That is, a part of the first counter electrode 17 in a specific pixel 10 arbitrarily selected from the plurality of pixels 10 is electrically connected to a part of the first counter electrode 17 in a pixel 10 adjacent to the specific pixel 10. A part of the second counter electrode 18 in a specific pixel 10 arbitrarily selected from the plurality of pixels 10 is electrically connected to a part of the second counter electrode 18 in a pixel 10 adjacent to the specific pixel 10. A part of the third counter electrode 19 in a specific pixel 10 arbitrarily selected from the plurality of pixels 10 is electrically connected to a part of the third counter electrode 19 in a pixel 10 adjacent to the specific pixel 10.

[0057] Fig. 2B shows an imager 100b having another configuration of the plurality of counter electrodes 17, 18, and 19. Fig. 2C shows an imager 100c having yet another configuration of the plurality of counter electrodes 17, 18, and 19. As shown in Figs. 2B and 2C, the plurality of counter electrodes 17, 18, and 19 may each have a different thickness.

[0058] 2B, the second opposing electrode 18 may be thicker than the third opposing electrode 19. The third opposing electrode 19 may be thicker than the first opposing electrode 17. That is, the thickness of the opposing electrode may increase as it approaches the light incidence surface from the semiconductor substrate 1. This makes it possible to reduce steps on the upper surface of the insulating layer formed during the manufacture of the image sensor 100.

[0059] 2C, the first opposing electrode 17 may be thicker than the third opposing electrode 19. The third opposing electrode 19 may be thicker than the second opposing electrode 18. That is, the thickness of the opposing electrode may increase from the light incident surface toward the semiconductor substrate 1. This can further suppress photoelectric conversion caused by light incident on the semiconductor substrate 1, and reduce parasitic sensitivity.

[0060] 2A, an insulating layer 7 is provided between the semiconductor substrate 1 and the first pixel electrode 13. An insulating layer 8 is provided between the third pixel electrode 15 and the first counter electrode 17. An insulating layer 9 is provided between the second pixel electrode 14 and the third counter electrode 19. The insulating layers 7, 8, and 9 are made of an insulating material such as SiO2.

[0061] The insulating layers 7, 8, and 9 may have different dielectric constants. For example, the dielectric constant of the insulating layer 8 and the dielectric constant of the insulating layer 9 may be lower than the dielectric constant of the insulating layer 7. This is expected to have the effect of suppressing the capacitive coupling between the second pixel electrode 14 and the third pixel electrode 15, and the capacitive coupling between the third pixel electrode 15 and the first pixel electrode 13. In order to make the dielectric constants different, an appropriate material can be selected from materials such as SiO2, SiOF, and SiOC. The same material may be used to make the dielectric constants different.

[0062] Each pixel 10 further includes a plurality of plugs 31, 32, and 33. Each of the plugs 31, 32, and 33 extends in a normal direction of the semiconductor substrate 1. The plurality of plugs 31, 32, and 33 include a first plug 31, a second plug 32, and a third plug 33. The first plug 31 electrically connects the semiconductor substrate 1 to the first pixel electrode 13. The second plug 32 electrically connects the semiconductor substrate 1 to the second pixel electrode 14. The third plug 33 electrically connects the semiconductor substrate 1 to the third pixel electrode 15.

[0063] The plugs 31, 32 and 33 are made of a conductive material, such as a metal, a metal oxide, a metal nitride, or conductive polysilicon.

[0064] The semiconductor substrate 1 has a plurality of charge storage regions 3, 4, and 5. The charge storage regions 3, 4, and 5 may be part of a pixel 10. Each of the charge storage regions 3, 4, and 5 is an n-type or p-type impurity region. The plurality of charge storage regions 3, 4, and 5 includes a first charge storage region 3, a second charge storage region 4, and a third charge storage region 5. The first plug 31 electrically connects the first charge storage region 3 to the first pixel electrode 13. The second plug 32 electrically connects the second charge storage region 4 to the second pixel electrode 14. The third plug 33 electrically connects the third charge storage region 5 to the third pixel electrode 15.

[0065] The semiconductor substrate 1 may have a number of transistors for reading out the charges stored in the charge storage regions 3, 4 and 5 and for resetting the stored charges.

[0066] When the imaging element 100 is irradiated with light, electron-hole pairs are generated in each of the photoelectric conversion layers 121 , 122 , and 123 .

[0067] For example, when a voltage is applied between the first counter electrode 17 and the first pixel electrode 13 so that the potential of the first counter electrode 17 exceeds the potential of the first pixel electrode 13, holes which are positive charges are collected in the first pixel electrode 13, and electrons which are negative charges are collected in the first counter electrode 17. The holes collected in the first pixel electrode 13 are accumulated in the first plug 31 and the first charge accumulation region 3.

[0068] The thickness of the first opposing electrode 17 may be different from the thickness of the first pixel electrode 13. The first opposing electrode 17 may be thicker than the first pixel electrode 13. By making the first opposing electrode 17 thicker, the resistance value of the first opposing electrode 17 can be reduced. This provides the effect of suppressing a decrease in the bias voltage caused by the resistance value of the first opposing electrode 17.

[0069] When a voltage is applied between the second opposing electrode 18 and the second pixel electrode 14 so that the potential of the second opposing electrode 18 exceeds the potential of the second pixel electrode 14, holes which are positive charges are collected in the second pixel electrode 14, and electrons which are negative charges are collected in the second opposing electrode 18. The holes collected in the second pixel electrode 14 are accumulated in the second plug 32 and the second charge accumulation region 4.

[0070] The thickness of the second opposing electrode 18 may be different from the thickness of the second pixel electrode 14. Moreover, the second opposing electrode 18 may be thicker than the second pixel electrode 14. By making the second opposing electrode 18 thicker, the resistance value of the second opposing electrode 18 can be reduced. This provides the effect of suppressing a decrease in the bias voltage caused by the resistance value of the second opposing electrode 18.

[0071] When a voltage is applied between the third opposing electrode 19 and the third pixel electrode 15 so that the potential of the third opposing electrode 19 exceeds the potential of the third pixel electrode 15, holes which are positive charges are collected in the third pixel electrode 15, and electrons which are negative charges are collected in the third opposing electrode 19. The holes collected in the third pixel electrode 15 are accumulated in the third plug 33 and the third charge accumulation region 5.

[0072] The thickness of the third opposing electrode 19 may be different from the thickness of the third pixel electrode 15. Moreover, the third opposing electrode 19 may be thicker than the third pixel electrode 15. By making the third opposing electrode 19 thicker, the resistance value of the third opposing electrode 19 can be reduced. This provides the effect of suppressing a decrease in the bias voltage caused by the resistance value of the third opposing electrode 19.

[0073] The first counter electrode 17 and the third counter electrode 19 may be configured by a single counter electrode. That is, the first photoelectric conversion layer 121 and the third photoelectric conversion layer 123 may share the counter electrode. Alternatively, the second counter electrode 18 and the third counter electrode 19 may be configured by a single counter electrode. That is, the second photoelectric conversion layer 122 and the third photoelectric conversion layer 123 may share the counter electrode.

[0074] A blocking layer that prevents electric charges from flowing into the pixel electrode in the dark may be provided between the pixel electrode and the photoelectric conversion layer.

[0075] The imaging element 100 of this embodiment has a multi-layer structure. "Multi-layer" means that a plurality of photoelectric conversion layers are present in the normal direction of the semiconductor substrate 1. The multi-layer structure is advantageous in increasing the sensitivity of the pixel since it is possible to secure a sufficient area for the pixel electrode. In this embodiment, since there are three photoelectric conversion layers 121, 122, and 123, it can be said that the imaging element 100 has a three-layer structure. The photoelectric conversion layers 121, 122, and 123 typically have different photoelectric conversion characteristics from each other.

[0076] According to the imaging element 100 having a three-layer structure, the three photoelectric conversion layers may include a photoelectric conversion layer sensitive to blue light, a photoelectric conversion layer sensitive to green light, and a photoelectric conversion layer sensitive to red light. Therefore, the three-layer structure is suitable for forming a full-color image.

[0077] FIG. 3A shows the arrangement of the pixel electrodes 13, 14, 15 and the plugs 31, 32, 33 when the image sensor 100 is viewed from the normal direction of the semiconductor substrate 1. In this embodiment, the area of ​​the first pixel electrode 13 is smaller than the area of ​​the second pixel electrode 14. With this configuration, even if light in the first wavelength range (red light) is obliquely incident on a specific pixel 10, the area of ​​the first pixel electrode 13 is limited, so that the charge generated by the oblique incidence is not easily collected by the first pixel electrode 13. As a result, color mixing between adjacent pixels 10 can be suppressed. In order to suppress parasitic sensitivity, the first pixel electrode 13 may be made small to the extent that too much light is not incident on the semiconductor substrate 1.

[0078] In this specification, viewing the imaging element 100 from the normal direction of the semiconductor substrate 1 is synonymous with viewing the imaging element 100 from a planar view.

[0079] The area of ​​the third pixel electrode 15 is also smaller than the area of ​​the second pixel electrode 14. With this configuration, even if light in the third wavelength range (green light) is obliquely incident on a specific pixel 10, the area of ​​the second pixel electrode 14 is limited, so that the charge generated by the oblique incidence is unlikely to be collected by the second pixel electrode 14. As a result, color mixing between adjacent pixels 10 can be suppressed.

[0080] In this embodiment, the area of ​​the third pixel electrode 15 is smaller than the area of ​​the second pixel electrode 14, and the area of ​​the first pixel electrode 13 is smaller than the area of ​​the third pixel electrode 15. With this configuration, the effect obtained when the area of ​​the first pixel electrode 13 is smaller than the area of ​​the second pixel electrode 14 and the effect obtained when the area of ​​the third pixel electrode 15 is smaller than the area of ​​the second pixel electrode 14 are obtained in a superimposed manner.

[0081] In this embodiment, the area of ​​the pixel electrodes decreases toward the semiconductor substrate 1. The farther away from the top surface of the imaging element 100, the more likely color mixing due to oblique incidence occurs. Therefore, the effect obtained by the relationship in area between the first pixel electrode 13, the third pixel electrode 15, and the second pixel electrode 14 in this embodiment is high.

[0082] The image sensor 100 of this embodiment does not have a condenser lens. The influence of obliquely incident light is reduced by the configuration of the pixel electrodes 13, 14, and 15. Therefore, even if the image sensor does not have a condenser lens, the problem of color mixing between adjacent pixels 10 is unlikely to become apparent.

[0083] In this specification, the area of ​​a pixel electrode means the area of ​​each pixel electrode when the image sensor 100 is viewed from the normal direction of the semiconductor substrate 1. In other words, the area of ​​a pixel electrode is equal to the area of ​​a projected image obtained by orthogonally projecting the pixel electrode onto a plane perpendicular to the normal direction of the semiconductor substrate 1.

[0084] 3A, when the imaging element 100 is viewed from the normal direction of the semiconductor substrate 1, the first pixel electrode 13 is contained inside the outer edge of the second pixel electrode 14. In detail, the entire first pixel electrode 13 is contained inside the outer edge of the second pixel electrode 14. With this configuration, color mixing due to oblique incidence can be more sufficiently suppressed.

[0085] Similarly, when the imaging element 100 is viewed from the normal direction of the semiconductor substrate 1, the third pixel electrode 15 is contained inside the outer edge of the second pixel electrode 14. In detail, the entire third pixel electrode 15 is contained inside the outer edge of the second pixel electrode 14. With this configuration, color mixing due to oblique incidence can be more sufficiently suppressed.

[0086] In this embodiment, the first pixel electrode 13 is located inside the outer edge of the third pixel electrode 15. With this configuration, the effect obtained when the first pixel electrode 13 is located inside the outer edge of the second pixel electrode 14 and the effect obtained when the third pixel electrode 15 is located inside the outer edge of the second pixel electrode 14 are obtained in a superimposed manner.

[0087] FIG. 3B shows another arrangement of the pixel electrodes 13, 14, and 15 when the image sensor 100 is viewed from the normal direction of the semiconductor substrate 1. In a direction parallel to the surface of the semiconductor substrate 1, the distance between the outer edge of the first pixel electrode 13 and the outer edge of the third pixel electrode 15 is represented by distance L2. In a direction perpendicular to the normal direction of the semiconductor substrate 1, the distance between the outer edge of the second pixel electrode 14 and the outer edge of the third pixel electrode 15 is represented by distance L1. Distance L2 is greater than distance L1. The first pixel electrode 13 is located in the bottom layer and is more susceptible to the influence of oblique incidence than the third pixel electrode 15. Therefore, if the sizes of the pixel electrodes 13, 14, and 15 are adjusted to satisfy the relationship of distance L2>distance L1, color mixing due to oblique incidence can be significantly suppressed. "Distance" represents the shortest distance.

[0088] 3B, no notch is provided in the first pixel electrode 13 and the third pixel electrode 15. The second plug 32 extends in the normal direction of the semiconductor substrate 1 at a position outside the first pixel electrode 13 and the third pixel electrode 15. The third plug 33 extends in the normal direction of the semiconductor substrate 1 at a position outside the first pixel electrode 13. However, there is no particular limitation on the presence or absence of a notch.

[0089] In the example shown in FIG. 3B, the pixel electrodes 13, 14, and 15 each have a rectangular shape in a plan view. All four sides constituting the outer edge of the second pixel electrode 14 are separated from the outer edge of the third pixel electrode 15 by a distance L1. All four sides constituting the outer edge of the third pixel electrode 15 are separated from the outer edge of the first pixel electrode 13 by a distance L2. In other words, the reduction width of the size of the pixel electrodes is isotropic. With this configuration, the influence of oblique incidence can be suppressed in all directions. Furthermore, the effect of suppressing the capacitive coupling between pixel electrodes in adjacent pixels 10 can be maximized.

[0090] 3B, the pixel electrodes 13, 14, and 15 have a square shape. The positions of the centers of gravity of the first pixel electrode 13, the third pixel electrode 15, and the second pixel electrode 14 are aligned. The first pixel electrode 13, the third pixel electrode 15, and the second pixel electrode 14 are similar to each other.

[0091] In adjacent pixels 10, the distance between the first pixel electrodes 13 is represented by distance L5. In adjacent pixels 10, the distance between the second pixel electrodes 14 is represented by distance L3. In adjacent pixels 10, the distance between the third pixel electrodes 15 is represented by distance L4. The relationship of distance L3<distance L4 is satisfied. The relationship of distance L4<distance L5 is satisfied. With this configuration, capacitive coupling between the pixel electrodes in the lower layer can be sufficiently suppressed.

[0092] In this embodiment, the material of the first pixel electrode 13 is different from the material of the second pixel electrode 14. Since the second pixel electrode 14 is located in the top layer, a transparent electrode is used as the second pixel electrode 14. On the other hand, since the first pixel electrode 13 is located in the bottom layer, it does not have to be a transparent electrode. When the first pixel electrode 13 is made of a light-shielding material, it is possible for the first pixel electrode 13 to prevent light from being incident on the semiconductor substrate 1. As a result, photoelectric conversion caused by light being incident on the semiconductor substrate 1 is suppressed, and parasitic sensitivity can be reduced.

[0093] The light-shielding material may be a metal, a conductive metal compound, etc. The metal may be tungsten or titanium, and the conductive metal compound may be a metal nitride such as titanium nitride.

[0094] The material of the first pixel electrode 13 may be different from the material of the third pixel electrode 15. The third pixel electrode 15 may be a transparent electrode. The first pixel electrode 13 may be a non-transparent electrode. With this configuration, photoelectric conversion caused by light incident on the semiconductor substrate 1 is further suppressed, and parasitic sensitivity may be reduced.

[0095] (Variation 1) FIG. 4A shows a cross section of an image sensor 200 according to Modification 1. Each pixel 10 of the image sensor 200 further includes a condenser lens 21 in addition to the configuration of the image sensor 100 described with reference to FIG. 2A. The condenser lens 21 is disposed above the semiconductor substrate 1 so as to form the surface of the image sensor 200. In this embodiment, the condenser lens 21 is disposed above the second photoelectric conversion layer 122. The condenser lens 21 can reduce the amount of obliquely incident light itself. The effect obtained by the condenser lens 21 and the effect obtained by limiting the area of ​​the pixel electrode work together to more sufficiently suppress color mixing caused by oblique incidence.

[0096] As shown in FIG. 4A, the focus of the condenser lens 21 may be adjusted to the first pixel electrode 13.

[0097] FIG. 4B shows a cross section of another image sensor 200 according to the first modification. As shown in FIG. 4B, the focus of the condenser lens 21 may be adjusted below the first pixel electrode 13. In the example shown in FIG. 4B, the focus of the condenser lens 21 is between the lower surface of the first pixel electrode 13 and the upper surface of the semiconductor substrate 1. When the focus is adjusted below the first pixel electrode 13, the area through which the light condensed by the condenser lens 21 passes may be within the inner periphery of the first pixel electrode 13. This makes it possible to suppress the generation of electric charges due to the light being incident on the semiconductor substrate 1. In FIGS. 4A and 4B, the dashed lines indicate the paths of the condensed light. The intersections of the dashed lines indicate the focal points.

[0098] In this specification, the position of the focal point can be specified by the focal length f of the collecting lens 21. The focal length f of the collecting lens 21 is expressed by the following formula (1). R is the radius of curvature of the collecting lens 21, n1 is the refractive index of the material of the collecting lens 21, and n0 is the refractive index of the medium in contact with the light incident side of the collecting lens 21. Formula (1) represents the focal length f of the collecting lens 21 when light is incident from a medium (e.g., an air layer) with a refractive index n0 to the collecting lens 21 having a refractive index n1 and a radius of curvature R.

[0099] f = {n1 / (n1-n0)}R (1)

[0100] As shown in FIG. 4B, an insulating layer 20 may be provided between the second opposing electrode 18 and the condenser lens 21.

[0101] (Variation 2) 5 shows a cross section of an imaging element 300 according to Modification 2. The imaging element 300 includes a thick first pixel electrode 13A. Specifically, the first pixel electrode 13A is thicker than the second pixel electrode 14. With this configuration, light is less likely to pass through the first pixel electrode 13A, and therefore light can be prevented from entering the semiconductor substrate 1. As a result, photoelectric conversion caused by light entering the semiconductor substrate 1 is further suppressed, and parasitic sensitivity can be reduced.

[0102] The first pixel electrode 13A is thicker than the third pixel electrode 15. With this configuration, light is less likely to pass through the first pixel electrode 13A, and it is therefore possible to sufficiently suppress the incidence of light on the semiconductor substrate 1. As a result, photoelectric conversion caused by the incidence of light on the semiconductor substrate 1 is further suppressed, and parasitic sensitivity can be reduced.

[0103] Typically, the second pixel electrode 14 and the third pixel electrode 15 are formed to have the same thickness, and the first pixel electrode 13A is formed to be thicker than the second pixel electrode 14 and the third pixel electrode 15.

[0104] The thickness of the pixel electrode can be determined by the following method: A cross section parallel to the normal direction of the semiconductor substrate 1 is formed. The cross section is observed with an electron microscope (e.g., a scanning electron microscope). The thickness of the pixel electrode is measured at any multiple positions (e.g., five positions) included in the obtained image. The average value of the measured values ​​can be regarded as the thickness of the pixel electrode. The "thickness" is the dimension in the direction parallel to the normal direction of the semiconductor substrate 1. The thickness of the counter electrode can also be determined in the same manner as the pixel electrode.

[0105] (Variation 3) Fig. 6A shows a cross section of an image sensor 400 according to Modification Example 3. Fig. 6B shows the arrangement of the first charge accumulation region 3, the second charge accumulation region 4, the third charge accumulation region 5, and the first pixel electrode 13 when the image sensor 400 is viewed from the normal direction of the semiconductor substrate 1.

[0106] As shown in FIG. 6A, in this modification, the second plug 32 and the third plug 33 are brought close to the first plug 31 via a wiring layer between the first pixel electrode 13A (or 13) and the semiconductor substrate 1.

[0107] In a conventional image sensor, a photoelectric conversion unit is supported by a semiconductor substrate. When light is incident on the semiconductor substrate, photoelectric conversion occurs in the semiconductor substrate. If the parasitic sensitivity of the semiconductor substrate can be reduced, it is beneficial for improving image quality.

[0108] 6B, according to this modification, when the imaging element 400 is viewed from the normal direction of the semiconductor substrate 1, the first charge accumulation region 3 and the second charge accumulation region 4 overlap the first pixel electrode. In detail, the first charge accumulation region 3, the second charge accumulation region 4, and the third charge accumulation region 5 overlap the first pixel electrode 13. With this configuration, light is blocked by the first pixel electrode 13, so that light is less likely to be incident on each charge accumulation region. As a result, the parasitic sensitivity of the semiconductor substrate 1 can be reduced.

[0109] 6C shows another arrangement of the first charge accumulation region 3, the second charge accumulation region 4, the third charge accumulation region 5, and the first pixel electrode 13. As shown in FIG. 6C, only a part of the second charge accumulation region 4 may overlap the first pixel electrode 13. Only a part of the third charge accumulation region 5 may overlap the first pixel electrode 13. Even with such a configuration, the effect of preventing obliquely incident light from being irradiated onto the second charge accumulation region 4 and the third charge accumulation region 5 can be obtained.

[0110] (Other variations) The pixel electrode may be electrically connected to the charge storage region via a plug that penetrates the semiconductor substrate and a wiring layer below the semiconductor substrate.

[0111] The above description of the first embodiment can be applied not only to the imaging elements 100, 200, 300, and 400 having a three-layer structure, but also to an imaging element having a two-layer structure. The third photoelectric conversion layer 123, the third pixel electrode 15, the third plug 33, and the third charge accumulation region 5 can be any elements. When the description of the first embodiment is applied to an imaging element having a two-layer structure, the description of the third photoelectric conversion layer 123, the third pixel electrode 15, the third plug 33, and the third charge accumulation region 5 is excluded.

[0112] Second embodiment Fig. 7A shows a cross section of an imaging element 500 according to the second embodiment. Fig. 7B shows the arrangement of pixel electrodes 13, 14 and plugs 31, 32 when the imaging element 500 is viewed from the normal direction of the semiconductor substrate 1. The imaging element 500 has a two-layer structure.

[0113] The first photoelectric conversion layer 121 has sensitivity to, for example, a wavelength range of near-infrared light. The first photoelectric conversion layer 121 can be made of a photoelectric conversion material having sensitivity to the wavelength range of near-infrared light. The second photoelectric conversion layer 122 has sensitivity to, for example, a wavelength range of visible light. The second photoelectric conversion layer 122 can be made of a photoelectric conversion material having sensitivity to the wavelength range of visible light. A color filter may be provided above the second photoelectric conversion layer 122. The imaging element 500 may include a condenser lens.

[0114] In the imaging element 500 of this embodiment as well, the area of ​​the first pixel electrode 13 is smaller than the area of ​​the second pixel electrode 14. Therefore, in the imaging element 500 of this embodiment as well, the same effects as those obtained in the imaging elements 100, 200, 300, and 400 described above can be obtained.

[0115] Third embodiment FIG. 8 shows a cross section of an imaging element 600 according to the third embodiment. Each pixel 10 further includes a photodiode PD in addition to the first photoelectric conversion layer 121 and the second photoelectric conversion layer 122. The photodiode PD is provided on a semiconductor substrate 1. The first pixel electrode 13 and the second pixel electrode 14 each have light transmissivity. A color filter 19r or a color filter 19b is provided between the photodiode PD and the first photoelectric conversion layer 121. Each of the photodiodes PD is covered with the color filter 19r or the color filter 19b. An insulating layer 25 is provided between the photodiode PD and the color filters 19r and 19b. The insulating layer 25 is made of an insulating material such as SiO2. An insulating layer 7 is present between the first pixel electrode 13 and the color filters 19r and 19b. The insulating layer 7 also functions as a planarization layer and can be made of a transparent resin such as an acrylic resin or an epoxy resin. The imaging element 600 includes a condenser lens 21. The condenser lens 21 serves to effectively guide the light to the photodiode PD.

[0116] The first photoelectric conversion layer 121 has sensitivity to, for example, the wavelength range of green light. The first photoelectric conversion layer 121 can be made using a photoelectric conversion material having sensitivity to the wavelength range of green light. The second photoelectric conversion layer 122 has sensitivity to, for example, the wavelength range of near-infrared light. The second photoelectric conversion layer 122 can be made using a photoelectric conversion material having sensitivity to the wavelength range of near-infrared light. The photodiode PD is typically a silicon photodiode. The color filter 19r is a filter that cuts off red light. The color filter 19b is a filter that cuts off blue light.

[0117] Since the first photoelectric conversion layer 121 has sensitivity to the wavelength region of green light, and the second photoelectric conversion layer 122 has sensitivity to the wavelength region of near-infrared light, the red light and blue light reach the color filters 19r and 19b. The red light is blocked by the color filter 19r, and only the blue light is incident on the photodiode PD. The blue light is blocked by the color filter 19b, and only the red light is incident on the photodiode PD. Therefore, the imaging element 600 can form an image based on near-infrared light and a full-color image.

[0118] 9 shows the arrangement of the pixel electrodes 13, 14 and the photodiode PD when the imaging element 600 is viewed from the normal direction of the semiconductor substrate 1. The area of ​​the first pixel electrode 13 is smaller than the area of ​​the second pixel electrode 14. The area of ​​the light receiving portion of the photodiode PD is smaller than the area of ​​the first pixel electrode 13. The first pixel electrode 13 is located inside the outer edge of the second pixel electrode 14. The light receiving portion of the photodiode PD is located inside the outer edge of the first pixel electrode 13.

[0119] In the imaging element 600 of this embodiment as well, the area of ​​the first pixel electrode 13 is smaller than the area of ​​the second pixel electrode 14. Therefore, in the imaging element 600 of this embodiment as well, the same effects as those obtained in the imaging elements 100, 200, 300, 400, and 500 described above can be obtained.

[0120] In a direction perpendicular to the normal direction of the semiconductor substrate 1, the distance between the outer edge of the light receiving portion of the photodiode PD and the outer edge of the first pixel electrode 13 is represented by distance L21. In a direction perpendicular to the normal direction of the semiconductor substrate 1, the distance between the outer edge of the first pixel electrode 13 and the outer edge of the second pixel electrode 14 is represented by distance L11. Distance L21 is greater than distance L11. The photodiode PD is provided on the semiconductor substrate 1 and is more susceptible to the influence of oblique incidence than the first pixel electrode 13. Therefore, if the sizes of the light receiving portion of the photodiode PD, the first pixel electrode 13, and the second pixel electrode 14 are adjusted so as to satisfy the relationship of distance L21>distance L11, color mixing due to oblique incidence can be significantly suppressed.

[0121] When the area of ​​the light receiving portion of the photodiode PD is small, the distance between the photodiodes PD between adjacent pixels 10 is sufficiently secured. In this case, the coupling between the photodiodes PD can be suppressed. Since the photodiodes PD between adjacent pixels 10 generate charges corresponding to different colors (red and blue in this embodiment), there is a risk of color mixing if coupling occurs. Therefore, it is worthwhile to suppress the coupling between the photodiodes PD between adjacent pixels 10.

[0122] (Fourth embodiment) 10 shows a cross section of an imaging element 700 according to a fourth embodiment of the present disclosure. The imaging element 700 differs from the imaging elements of the previous embodiments in the structure of the electrodes. In the imaging element 700, the first pixel electrode 13 has a first storage electrode 13a, a first readout electrode 13b, and a first transfer electrode 13c. The second pixel electrode 14 has a second storage electrode 14a, a second readout electrode 14b, and a second transfer electrode 14c. The third pixel electrode 15 has a third storage electrode 15a, a third readout electrode 15b, and a third transfer electrode 15c. The transfer electrodes 13c, 14c, and 15c may be omitted.

[0123] A first semiconductor layer 27 is provided between the first pixel electrode 13 and the first photoelectric conversion layer 121. A part of the insulating layer 7 is provided between the first semiconductor layer 27 and the first pixel electrode 13. A second semiconductor layer 28 is provided between the second pixel electrode 14 and the second photoelectric conversion layer 122. A part of the insulating layer 9 is provided between the second semiconductor layer 28 and the second pixel electrode 14. A third semiconductor layer 29 is provided between the third pixel electrode 15 and the third photoelectric conversion layer 123. A part of the insulating layer 8 is provided between the third semiconductor layer 29 and the third pixel electrode 15. The semiconductor layers 27, 28, and 29 are provided to more efficiently accumulate charges, and are made of a semiconductor material having light-transmitting properties.

[0124] The first storage electrode 13a and the first transfer electrode 13c face the first photoelectric conversion layer 121 through a part of the insulating layer 7, or through a part of the insulating layer 7 and the first semiconductor layer 27. At least a part of the first readout electrode 13b is in contact with the first photoelectric conversion layer 121 directly or through the first semiconductor layer 27. The first readout electrode 13b is connected to a first plug 31. The first storage electrode 13a, the first readout electrode 13b, and the first transfer electrode 13c are each electrically connected to a wiring not shown. A desired voltage can be applied to each of the first storage electrode 13a, the first readout electrode 13b, and the first transfer electrode 13c. The first storage electrode 13a can function as a charge storage electrode for attracting charges generated in the first photoelectric conversion film 121 according to the applied voltage and storing the charges in the first photoelectric conversion layer 121. When the imaging element 700 is viewed in plan, the first transfer electrode 13c is disposed between the first storage electrode 13a and the first readout electrode 13b. The first transfer electrode 13c plays a role of blocking the accumulated electric charge and controlling the transfer of the electric charge. By controlling the voltages applied to the first storage electrode 13a, the first readout electrode 13b, and the first transfer electrode 13c, the electric charge generated in the first photoelectric conversion layer 121 can be accumulated inside the first photoelectric conversion layer 121 or at the interface of the first photoelectric conversion layer 121, or the generated electric charge can be taken out to the first charge accumulation region 3. These explanations regarding the first pixel electrode 13 can also be applied to the second pixel electrode 14 and the third pixel electrode 15 by replacing "first" with "second" or "third."

[0125] According to this embodiment, each of the first pixel electrode 13, the second pixel electrode 14, and the third pixel electrode 15 is divided into a plurality of parts. In this case, the "area of ​​the pixel electrode" means the total area of ​​the plurality of parts. The size relationship of the pixel area may be applied to each of the storage electrode and the readout electrode. That is, the area of ​​the first readout electrode 13b may be smaller than the area of ​​the third readout electrode 15b, and the area of ​​the third readout electrode 15b may be smaller than the area of ​​the second readout electrode 14b. The area of ​​the first storage electrode 13a may be smaller than the area of ​​the third storage electrode 15a, and the area of ​​the third storage electrode 15a may be smaller than the area of ​​the second storage electrode 14a.

[0126] According to the electrode structure of this embodiment, the charges generated in the photoelectric conversion layer can be efficiently collected and transferred, leading to improved sensitivity. The electrode structure of this embodiment can be applied to all of the embodiments described above. [Industrial Applicability]

[0127] The technology disclosed in this specification is useful for an imaging element. The imaging element can be applied to an imaging device, an optical sensor, etc. Examples of the imaging device include a digital camera, a medical camera, a surveillance camera, a robot camera, and a vehicle camera. [Explanation of symbols]

[0128] 1. Semiconductor substrate 3 First charge storage region 4 Second charge storage region 5 Third charge storage region 10 pixels 12 Photoelectric conversion section 13, 13A First pixel electrode 14 Second pixel electrode 15 Third pixel electrode 17 First opposing electrode 18 Second counter electrode 19 Third counter electrode 31 First plug 32 2nd plug 33 3rd plug 100,100b,100c,200,300,400,500,600,700 Image sensor 100A Imaging Device 121 First photoelectric conversion layer 122 Second photoelectric conversion layer 123 Third photoelectric conversion layer PD Photodiode

Claims

1. A plurality of pixels; A semiconductor substrate; An imaging element comprising: Each of the plurality of pixels is a first photoelectric conversion layer that converts light into a first charge; a first pixel electrode for collecting the first charges; A second photoelectric conversion layer disposed above the first photoelectric conversion layer and configured to convert light into a second charge; a second pixel electrode for collecting the second charges; a third photoelectric conversion layer disposed between the first photoelectric conversion layer and the second photoelectric conversion layer and configured to convert light into a third charge; a third pixel electrode for collecting the third charges; Including, When the imaging element is viewed from a normal direction of the semiconductor substrate, the first pixel electrode is located inside an outer edge of the second pixel electrode, the first pixel electrode and the second pixel electrode do not have a convex shape that protrudes toward a side where light is incident, a distance between an outer edge of the first pixel electrode and an outer edge of the third pixel electrode in a direction parallel to a surface of the semiconductor substrate is longer than a distance between an outer edge of the second pixel electrode and an outer edge of the third pixel electrode; Image sensor.

2. the material of the first pixel electrode is different from the material of the second pixel electrode; The imaging device according to claim 1 .

3. The first pixel electrode is thicker than the second pixel electrode. The imaging device according to claim 1 .

4. a first charge storage region provided on the semiconductor substrate and electrically connected to the first pixel electrode; a second charge storage region provided on the semiconductor substrate and electrically connected to the second pixel electrode; Further equipped with When the imaging element is viewed from a normal direction of the semiconductor substrate, the first charge accumulation region and the second charge accumulation region overlap with the first pixel electrode. The imaging device according to claim 1 .

5. The area of ​​the third pixel electrode is smaller than the area of ​​the second pixel electrode. The imaging device according to claim 1 .

6. The area of ​​the first pixel electrode is smaller than the area of ​​the third pixel electrode. The imaging device according to claim 1 .

7. When the imaging element is viewed from a normal direction of the semiconductor substrate, the third pixel electrode is located inside an outer edge of the second pixel electrode. The imaging device according to claim 1 .

8. When the imaging element is viewed from a normal direction of the semiconductor substrate, the first pixel electrode is located inside an outer edge of the third pixel electrode. The imaging device according to claim 1 .

9. the material of the first pixel electrode is different from the material of the third pixel electrode; The imaging device according to claim 1 .

10. The first pixel electrode is thicker than the third pixel electrode. The imaging device according to claim 1 .

11. a first charge storage region provided on the semiconductor substrate and electrically connected to the first pixel electrode; a second charge storage region provided on the semiconductor substrate and electrically connected to the second pixel electrode; a third charge storage region provided on the semiconductor substrate and electrically connected to the third pixel electrode; Further equipped with When the imaging element is viewed from a normal direction of the semiconductor substrate, the first charge accumulation region, the second charge accumulation region, and the third charge accumulation region overlap with the first pixel electrode. The imaging device according to claim 1 .

12. a portion of the first photoelectric conversion layer in a first pixel arbitrarily selected from the plurality of pixels is electrically connected to a portion of the first photoelectric conversion layer in a pixel adjacent to the first pixel among the plurality of pixels; a part of the second photoelectric conversion layer in a second pixel arbitrarily selected from the plurality of pixels is electrically connected to a part of the second photoelectric conversion layer in a pixel adjacent to the second pixel among the plurality of pixels; The imaging device according to claim 1 .

13. the first pixel electrode includes a first storage electrode configured to store the first charge in the first photoelectric conversion layer, and a first readout electrode electrically connected to the semiconductor substrate; the second pixel electrode includes a second storage electrode configured to store the second charge in the second photoelectric conversion layer, and a second readout electrode electrically connected to the semiconductor substrate; The imaging device according to claim 1 .

14. the first pixel electrode and the second pixel electrode have a surface parallel to the semiconductor substrate; The imaging device according to claim 1 .

15. The area of ​​the first pixel electrode is smaller than the area of ​​the second pixel electrode. The imaging device according to claim 1 .

16. Further comprising a condenser lens disposed above the second photoelectric conversion layer. The imaging device according to claim 1 .

Images