Multilayer Electronic Components

Abstract

To provide a multilayer electronic component that can be improved in high-temperature load lifetime, and also suppressed from cracking.SOLUTION: A multilayer electronic component comprises a plurality of dielectric layers 3 and a plurality of electrode layers 4 laminated alternately with the plurality of dielectric layers 3. Skewness of a thickness distribution of dielectric layers 3 at a plurality of arbitrary positions among the plurality of dielectric layers 3 is 0.2 or larger. Consequently, a high-temperature load lifetime can be improved and cracking can be suppressed.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a laminated electronic component. [Background technology]

[0002] A multilayer ceramic capacitor, which is a type of multilayer electronic component, is described in Patent Document 1. The multilayer ceramic capacitor described in Patent Document 1 is configured by alternately laminating dielectric layers and internal electrode layers. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2016-160133 A Summary of the Invention [Problem to be solved by the invention]

[0004] In order to improve the reliability of the multilayer electronic components described above, it is necessary to improve the high temperature load life and also to suppress the occurrence of cracks.

[0005] SUMMARY OF THE PRESENT DISCLOSURE An object of the present invention is to provide a laminated electronic component that can improve the high temperature accelerated life and also suppress the occurrence of cracks. [Means for solving the problem]

[0006] The laminated electronic component of the present invention comprises a plurality of dielectric layers and a plurality of electrode layers alternately laminated with the plurality of dielectric layers, and the skewness of the distribution of the thicknesses of the dielectric layers at any plurality of locations on the plurality of dielectric layers is 0.2 or more.

[0007] In this laminated electronic component, the skewness of the thickness distribution of the dielectric layers at any of a plurality of arbitrary locations of the plurality of dielectric layers is 0.2 or more. As a result, the thickness distribution is biased toward the left side (thin side), and the thickness variation on the thin side is reduced. As a result, the thin parts of the dielectric layers can be reduced, and the high-temperature load life can be improved. In addition, since the skewness is 0.2 or more, the tail of the right side (thick side) of the thickness distribution becomes longer, and the dielectric layers can include thick parts. As a result, the contact area between the dielectric layers and the electrode layers can be increased to ensure the bonding strength, and the occurrence of cracks can be suppressed. Therefore, according to this laminated electronic component, the high-temperature load life can be improved and the occurrence of cracks can be suppressed.

[0008] The skewness of the distribution may be equal to or less than 0.6, which can prevent an excessively large skewness from increasing the variation in capacitance formed by the dielectric layer.

[0009] The kurtosis of the distribution may be 3.2 or more. In this case, the tail of the thickness distribution can be made thicker, and the dielectric layer can include many thick portions. As a result, the occurrence of cracks can be further suppressed.

[0010] The kurtosis of the distribution may be equal to or less than 5.0, which can prevent an excessively large kurtosis from increasing the variation in the capacitance formed by the dielectric layer.

[0011] The average thickness of the plurality of dielectric layers may be 0.4 μm or less. When the dielectric layers are thin like this, a high electric field strength acts on the dielectric layers, and the high temperature accelerated life is likely to be shortened. In addition, the proportion of the electrode layers in the laminated electronic component increases relatively, and cracks are likely to occur. In contrast, according to this laminated electronic component, even in such a case, the high temperature accelerated life can be improved and the occurrence of cracks can be suppressed. Effect of the Invention

[0012] According to the present invention, it is possible to provide a laminated electronic component that can improve the high temperature accelerated life and suppress the occurrence of cracks. [Brief description of the drawings]

[0013] [Figure 1] 1 is a cross-sectional view of a laminated electronic component according to an embodiment. [Diagram 2] 1 is a graph for explaining skewness. [Diagram 3] 1 is a graph for explaining kurtosis. [Figure 4] 4 is a graph showing an example of the distribution of thicknesses of dielectric layers in a laminated electronic component according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description, the same or corresponding elements are designated by the same reference numerals, and duplicated descriptions will be omitted. [Structure of multilayer electronic components]

[0015] FIG. 1 shows a multilayer electronic component 1, which is a multilayer ceramic capacitor. The multilayer electronic component 1 includes an element body 2. The element body 2 is formed, for example, in a substantially rectangular parallelepiped shape. The element body 2 has a pair of main surfaces 2a, a first side surface 2b, and a second side surface 2c. The pair of main surfaces 2a face each other in a first direction D1. The first side surface 2b and the second side surface 2c face each other in a second direction D2 perpendicular to the first direction D1. One of the main surfaces 2a constitutes a mounting surface. The multilayer electronic component 1 is mounted, for example, on a mounting target (for example, an electronic component or a board) by soldering on the one of the main surfaces 2a. The multilayer electronic component 1 is, for example, an in-vehicle laminated electronic component that is mounted on a vehicle for use. In this case, the laminated electronic component 1 is required to have a long high-temperature loaded life.

[0016] The element body 2 has a plurality of dielectric layers 3 and a plurality of electrode layers 4. The plurality of electrode layers 4 include a first electrode layer 10 and a plurality of second electrode layers 20. Each dielectric layer 3 is made of a sintered body of a ceramic green sheet (dielectric sheet) containing, for example, a dielectric material (dielectric ceramic such as BaTiO3-based, Ba(Ti,Zr)O3-based, (Ba,Ca)TiO3-based, CaZrO3-based, or (Ca,Sr)(Zr,Ti)O3-based). In the actual element body 2, adjacent dielectric layers 3 are integrated to such an extent that the boundaries between them cannot be visually recognized. The average thickness of the plurality of dielectric layers 3 is, for example, 10 μm or less, and in this example, 0.4 μm or less. The element body 2 includes, for example, at least 10 layers or 20 layers or more of dielectric layers 3.

[0017] The multiple dielectric layers 3 and the multiple electrode layers 4 are alternately stacked along a first direction D1. In this example, the multiple first electrode layers 10 and the multiple second electrode layers 20 are alternately arranged so as to face each other in the first direction D1 with the dielectric layers 3 interposed therebetween. The first electrode layers 10 extend to reach the first side surface 2b of the element body 2, and the second electrode layers 20 extend to reach the second side surface 2c of the element body 2.

[0018] The electrode layer 4 is formed of a conductive material such as Ni, Cu, Ag, Pd, or an alloy thereof. The electrode layer 4 is formed of, for example, a sintered body of a conductive paste (conductive layer) containing the conductive material. The electrode layer 4 functions as an internal electrode disposed in the element body 2. The first electrode layer 10 and the second electrode layer 20 have mutually different polarities. In the laminated electronic component 1, the first electrode layer 10 and the second electrode layer 20 face each other to form a capacitance.

[0019] The laminated electronic component 1 further includes a pair of external electrodes 5 electrically connected to an object to be mounted. The pair of external electrodes 5 are formed on the first side surface 2b and the second side surface 2c of the element body 2, respectively. One external electrode 5 is electrically connected to the first electrode layer 10 on the first side surface 2b, and the other external electrode 5 is electrically connected to the second electrode layer 20 on the second side surface 2c. [Manufacturing method for laminated electronic components]

[0020] When manufacturing the laminated electronic component 1, first, a plurality of dielectric sheets are prepared (preparation step). The dielectric sheets are ceramic members that will become the dielectric layers 3 after firing. Next, the plurality of dielectric sheets and a plurality of conductive layers are alternately laminated (lamination step). The conductive layers are layers that will become the electrode layers 4 after firing, and are, for example, conductive pastes.

[0021] Next, the laminate obtained in the lamination step is pressed in a first direction D1 (pressing step). This pressing step integrates adjacent layers to obtain a chip having a predetermined size. Note that a laminate having a plurality of portions that will each become a chip after cutting may be pressed in the pressing step, and then the laminate may be cut to obtain a plurality of chips having a predetermined size. The chips are then fired to obtain an element body 2. Thereafter, a step of providing external electrodes 5 on the outer surface of the element body 2 and other steps are performed to obtain a laminated electronic component 1. [Skewness and kurtosis of the distribution of dielectric layer thickness]

[0022] In the laminated electronic component 1, the skewness of the distribution of the thicknesses of the dielectric layers 3 at any given point on the dielectric layers 3 is 0.2 to 0.6, and the kurtosis of the distribution is 3.2 to 5.0. This point will be described below.

[0023] Figure 2 is a graph to explain skewness, and Figure 3 is a graph to explain kurtosis (Reference: Cain, Meghan K., Zhiyong Zhang, and Ke-Hai Yuan, "Univariate and multivariate skewness and kurtosis for measuring nonnormality: Prevalence, influence and estimation." Behavior research methods 49.5 (2017), 1716-1735). The skewness A of the probability distribution that the random variable X follows is defined by equation (1), and the kurtosis B is defined by equation (2).

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[0024] In formulas (1) and (2), E(X) is the expected value of the random variable X, μ is the mean value of the random variable X, and σ is the standard deviation of the random variable X. Skewness is an index of asymmetry, and is zero when the probability distribution is a normal distribution. Kurtosis is an index of the degree of peaking, and is three when the probability distribution is a normal distribution. That is, in this specification, kurtosis is defined to be three when the probability distribution is a normal distribution, unlike excess kurtosis, which is zero when the probability distribution is a normal distribution.

[0025] Figure 2 shows three probability distributions with skewness of 0.95, 0, and -0.3, respectively. As shown in Figure 2, when skewness is a positive value, the distribution is biased to the left (the side where the random variable is small) and the tail of the right side of the distribution (the side where the random variable is large) is long. As a result, events with large random variables, which correspond to the right side of the distribution, are more likely to occur. On the other hand, when skewness is a negative value, the distribution is biased to the right and the tail of the left side of the distribution is long. As a result, events with small random variables, which correspond to the left side of the distribution, are more likely to occur.

[0026] Figure 3 shows three probability distributions with kurtosis of 3, 0, and -1, respectively. The variance of each probability distribution is 1. As shown in Figure 3, when kurtosis is greater than 3, the tails of the distribution become thicker. In other words, events with extremely large random variables, which correspond to both ends of the distribution, become more likely to occur.

[0027] As described above, in the laminated electronic component 1, the skewness of the distribution of the thicknesses of the dielectric layers 3 at any of a plurality of locations for the plurality of dielectric layers 3 is 0.2 or more and 0.6 or less, and the kurtosis of the distribution is 3.2 or more and 5.0 or less. The distribution is calculated, for example, as follows. For the laminated electronic component 1, one image of a cross section along the stacking direction (first direction D1) is acquired. The image is acquired, for example, using a laser microscope. For the plurality of dielectric layers 3 included in the image, the thicknesses of the dielectric layers 3 are measured at any of a plurality of locations (for example, 3000 locations). The positions at which the thicknesses of the dielectric layers 3 are measured are selected, for example, randomly, but the thicknesses of the dielectric layers 3 may also be measured at a plurality of locations arranged at a predetermined interval. Based on the measured thickness, a probability distribution can be calculated in which the random variable is the thickness of the dielectric layer 3.

[0028] FIG. 4 is a graph showing an example of the distribution of the thickness of the dielectric layer 3 in the laminated electronic component 1. This distribution is calculated based on the thickness (μm) of the dielectric layer 3 measured at 3,000 locations. In this example, the skewness of the distribution is 0.42, and the kurtosis is 3.29. The average thickness of the dielectric layer 3 is 0.38 μm, and the standard deviation is 0.05. Thus, in the laminated electronic component 1, the skewness of the distribution of the thickness of the dielectric layer 3 is not less than 0.2 and not more than 0.6. In addition, the kurtosis of the distribution is not less than 3.2 and not more than 5.0.

[0029] A method for adjusting the skewness and kurtosis will be described. In summary, in the preparation step in the above-mentioned manufacturing process, a plurality of dielectric sheets are prepared so that the skewness of the thickness distribution of the dielectric sheets at any plurality of locations on the plurality of dielectric sheets is 0.2 to 0.6 and the kurtosis of the distribution is 3.2 to 5.0. As a result, in the laminate obtained in the lamination step, the skewness of the thickness distribution of the dielectric sheets is 0.2 to 0.6 and the kurtosis of the distribution is 3.2 to 5.0. Furthermore, in the laminated electronic component 1 finally obtained, the skewness of the thickness distribution of the dielectric layers 3 is 0.2 to 0.6 and the kurtosis of the distribution is 3.2 to 5.0.

[0030] More specifically, in the preparation step, for example, the thickness of the dielectric sheets is measured, and while the dielectric sheets having a thickness smaller than a predetermined threshold are excluded, the dielectric sheets having a thickness equal to or greater than the threshold are not excluded (used), and a plurality of dielectric sheets are prepared so that the skewness of the thickness distribution of the dielectric sheets is 0.2 or more. The thickness of the dielectric sheets is measured, for example, using X-rays or the like. As the threshold, for example, a value obtained by measuring the thicknesses of 100 dielectric sheets and multiplying the average value of the thicknesses by a predetermined coefficient (for example, 0.2) can be used. In this way, by not using dielectric sheets having a thickness smaller than the threshold, the skewness can be controlled to 0.2 or more.

[0031] In the preparation step, for example, a dielectric sheet having a dispersant content smaller than a predetermined value is used to prepare the dielectric sheet so that the kurtosis of the thickness distribution of the dielectric sheet is 3.2 or more. In this way, by reducing the dispersant content, a dielectric sheet with a large variation in thickness can be produced.

[0032] Alternatively, in the preparation step, a first dielectric sheet having an average thickness of a first value and a second dielectric sheet having an average thickness of a second value different from the first value may be prepared so that the kurtosis of the thickness distribution of the dielectric sheets is 3.2 or more. In this case, in the lamination step, the first dielectric sheet and the second dielectric sheet are used as dielectric sheets and laminated. The kurtosis can also be controlled by mixing and laminating dielectric sheets of different thicknesses in this way. For example, by preparing a smaller number of second dielectric sheets thicker than the first dielectric sheets (i.e., the second value is larger than the first value) than the first dielectric sheets and mixing the second dielectric sheets in a laminate mostly composed of the first dielectric sheets, the kurtosis can be increased compared to the case where all the dielectric sheets are composed of the first dielectric sheets. [Action and Effects]

[0033] In the laminated electronic component 1, the skewness of the thickness distribution of the dielectric layers 3 at any of a plurality of locations on the plurality of dielectric layers 3 is 0.2 or more. This causes the thickness distribution to be biased toward the left side (thinner side), and the thickness variation on the thinner side is reduced. As a result, the number of thin parts in the dielectric layers 3 can be reduced, and the high-temperature load life can be improved. That is, if the dielectric layers 3 contain many parts that are thinner than the reference value, the high-temperature load life may be reduced. However, in the laminated electronic component 1, the dielectric layers 3 contain few thin parts, and therefore the high-temperature load life can be improved. As described above, the high-temperature load life is particularly important when the laminated electronic component 1 is used in a vehicle and in a high-temperature environment. In addition, since the skewness is 0.2 or more, the tail on the right side (thicker side) of the thickness distribution becomes longer, and the dielectric layers 3 can include thicker parts. As a result, the contact area between the dielectric layers 3 and the electrode layers 4 can be increased to ensure the bonding strength, and the occurrence of cracks can be suppressed. Therefore, according to the laminated electronic component 1, the high-temperature load life can be improved and the occurrence of cracks can be suppressed.

[0034] That is, the distribution of the thickness of the dielectric layer in a multilayer ceramic capacitor is usually considered to be close to a normal distribution. In such a multilayer ceramic capacitor, for example, if the variation in the thickness of the dielectric layer 3 is simply reduced, the thin parts can be reduced and the high temperature load life can be improved, but the bonding strength between the dielectric layer and the electrode layer is reduced and cracks are likely to occur. In contrast, in the multilayer electronic component 1, by setting the skewness of the thickness distribution of the dielectric layer 3 to 0.2 or more, the thin parts in the dielectric layer 3 can be reduced to improve the high temperature load life, while the dielectric layer 3 can include thick parts to ensure the bonding strength between the dielectric layer 3 and the electrode layer 4, thereby suppressing the occurrence of cracks. In this way, the multilayer electronic component 1 can achieve both an improvement in the high temperature load life and suppression of the occurrence of cracks.

[0035] The skewness of the thickness distribution of the dielectric layer 3 is equal to or less than 0.6. This makes it possible to prevent an excessively large skewness from causing an increase in the variation in the capacitance formed by the dielectric layer 3.

[0036] The kurtosis of the thickness distribution of the dielectric layer 3 is 3.2 or more. This allows the tail of the thickness distribution to be thickened, and the dielectric layer 3 to include many thick parts. As a result, the occurrence of cracks can be further suppressed. In other words, by having the kurtosis of the thickness distribution of the dielectric layer 3 be 3.2 or more and the skewness be 0.2 or more, the dielectric layer 3 can include many thick parts to suppress the occurrence of cracks, while suppressing an increase in thin parts and suppressing a decrease in the high temperature load life.

[0037] The kurtosis of the thickness distribution of the dielectric layer 3 is equal to or less than 5.0. This makes it possible to suppress the occurrence of a situation in which the variation in the capacitance formed by the dielectric layer 3 increases due to an excessively large kurtosis.

[0038] The average thickness of the plurality of dielectric layers 3 is 0.4 μm or less. When the dielectric layers 3 are thin like this, a high electric field strength acts on the dielectric layers 3, and the high temperature accelerated life is likely to be shortened. In addition, the proportion of the electrode layers 4 in the laminated electronic component 1 increases relatively, and cracks are likely to occur. In contrast, according to the laminated electronic component 1, even in such a case, the high temperature accelerated life can be improved and the occurrence of cracks can be suppressed.

[0039] The present invention is not limited to the above-described embodiment. For example, the materials and shapes of the components are not limited to those described above, and various materials and shapes can be used. The laminated electronic component 1 may be a laminated piezoelectric actuator, a laminated varistor, a laminated thermistor, a laminated composite component, or the like. [Explanation of symbols]

[0040] 1...laminated electronic component, 3...dielectric layer, 4...electrode layer.

Claims

1. A plurality of dielectric layers; a plurality of electrode layers alternately stacked with the plurality of dielectric layers; A laminated electronic component, wherein a skewness of distribution of thicknesses of the dielectric layers at any one of a plurality of locations on the plurality of dielectric layers is 0.2 or more.

2. The laminated electronic component according to claim 1 , wherein the skewness of the distribution is 0.6 or less.

3. The laminated electronic component according to claim 1 , wherein the kurtosis of the distribution is 3.2 or more.

4. The laminated electronic component according to claim 3 , wherein the kurtosis of the distribution is equal to or less than 5.

0.

5. 5. The laminated electronic component according to claim 1, wherein the average thickness of the plurality of dielectric layers is 0.4 μm or less.

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