Image sensor and distance measuring device

Abstract

This imaging element comprises a light source (1) and a plurality of pixels (30). The pixels (30) each include: a light receiving element (31); a first capacitance (37); and a charge emission device (34) that is provided inside the pixel (30) and that emits an electric charge to the first capacitance (37) for a certain period of time ΔT when the light receiving element (31) detects light emitted by the light source (1) and reflected by a subject.

Description

[Technical field]

[0001] The present disclosure relates to an imaging element and a distance measuring device. [Background technology]

[0002] 2. Description of the Related Art There are distance measuring devices and distance measuring systems that measure the distance to a subject by using a light receiving array having a plurality of Single Photon Avalanche Diodes (SPADs).

[0003] For example, the distance measuring device in Patent Document 1 includes a control unit and a distance calculation unit. The control unit determines a distance range in which distance measurement is performed, and divides a time range corresponding to this distance range into multiple intervals. The control unit controls the distance measuring device so that pulsed light is emitted and the light receiving unit is exposed for each time range. Then, the distance calculation unit calculates the distance to the subject according to the exposure result of the light receiving unit. The accuracy of distance measurement at this time is determined by the pulse width of the pulsed light irradiated by the light emitting unit. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Patent No. 6910010 Summary of the Invention [Problem to be solved by the invention]

[0005] Incidentally, distance measuring devices such as those disclosed in Patent Document 1 may use a light receiving unit that performs photon counting by irradiating a subject with multiple pulsed light during one exposure period and counting the light (photons) reflected from the subject. In such a light receiving unit, a capacitance is provided within each pixel, and an amount of charge corresponding to the number of received photons is accumulated in the capacitance.

[0006] Such a light receiving section has an insufficient nonlinear compression ratio of the actual physical quantity (amount of charge) corresponding to the photon counting value, making it difficult to perform photocounting over a high dynamic range in an environment with strong background light.

[0007] An object of the present disclosure is to provide an image sensor and a distance measuring device that enable photocounting in a high dynamic range. [Means for solving the problem]

[0008] In order to solve the above problem, an imaging element according to one embodiment of the present disclosure includes a plurality of pixels, each of which includes a light receiving element, a first storage element, and a charge discharging device provided within each of the pixels, which discharges charge to the first storage element for a certain period of time when the light receiving element detects light irradiated by a light source and reflected by a subject. Effect of the Invention

[0009] According to the present disclosure, photocounting in a high dynamic range is possible. [Brief description of the drawings]

[0010] [Figure 1] FIG. 2 is a block diagram showing the configuration of a pixel according to the first embodiment. [Diagram 2] FIG. 2 is a diagram for explaining the operation principle of the charge emission device according to the first embodiment. [Diagram 3] FIG. 2 is a schematic diagram of a potential diagram of the charge emission device according to the first embodiment. [Figure 4] FIG. 2 is a block diagram showing the configuration of a light receiving sensor according to the first embodiment. [Diagram 5] FIG. 2 is a diagram for explaining an example of a circuit configured in a pixel according to the first embodiment. [Figure 6] 5 is a timing chart relating to a distance measurement operation during one frame period of the pixel according to the first embodiment. [Figure 7] FIG. 11 is a block diagram showing an example of the overall configuration of a distance measuring device according to a second embodiment. [Figure 8] 11A and 11B are diagrams for explaining the principle of distance measurement by a distance measuring device according to a second embodiment. [Figure 9] 13A to 13C are diagrams for explaining a method of generating a subrange image according to the second embodiment. [Figure 10] 13 is a timing chart relating to a distance measurement operation during one frame period of a pixel according to the second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, the embodiments of the present invention will be described in detail with reference to the drawings. The following description of the preferred embodiments is merely illustrative in nature and is not intended to limit the present invention, its application, or its uses.

[0012] (First embodiment) -Pixel configuration- Fig. 1 is a block diagram showing the configuration of a pixel according to the first embodiment. A pixel 30 shown in Fig. 1 is disposed in a light receiving sensor 2 (image sensor) of a distance measuring device, which will be described later.

[0013] 1, a pixel 30 includes a light receiving element 31, a reset transistor 32, a photocount control circuit 33, a charge discharging device 34, a source follower transistor 35, a selection transistor 36, and a first capacitance 37 (first storage element). A reset timing control device 38 and a charge supply device 39 are disposed outside the pixel 30.

[0014] The light receiving element 31 is, for example, a photodiode (PD) such as a SPAD or an avalanche photodiode (APD).

[0015] The reset transistor 32 has a source (or drain) connected to an output terminal of a reset timing control device 38, a drain (or source) connected to a cathode terminal of the light receiving element 31 and an input terminal of a photocount control circuit 33, and a gate connected to a reset signal V RSTThe reset timing control device 38 supplies the reset transistor 32 with a voltage for causing the reset transistor 32 to reset the light receiving element 31 and the like.

[0016] The photocount control circuit 33 has an output terminal connected to an input terminal of the charge discharging device 34. The photocount control circuit 33 performs a photocounting operation in response to an output from the cathode terminal of the light receiving element 31, and outputs the result from the output terminal. For example, the photocount control circuit 33 outputs a pulse voltage to the charge discharging device 34 when the light receiving element 31 detects light (photons).

[0017] The charge discharging device 34 receives signals from the photocount control circuit 33 and the charge supplying device 39, and outputs a charge to the floating diffusion FD. For example, when the photocount control circuit 33 outputs a pulse voltage, the charge discharging device 34 outputs a predetermined charge to the FD. The charge supplying device 39 supplies a charge to be output to the charge discharging device 34.

[0018] The source follower transistor 35 receives a pixel power supply bias signal Vc at its source (or drain), has its drain (or source) connected to the source (or drain) of the selection transistor 36, and has its gate connected to FD.

[0019] The selection transistor 36 has a drain (or source) connected to the output line 26 and a gate connected to the selection signal V SEL Receive.

[0020] The first capacitance 37 has one end connected to the FD and the other end connected to a ground voltage (earth). The first capacitance 37 accumulates the charge output from the charge discharging device 34 to the FD.

[0021] When the selection transistor 36 is turned on, the source follower transistor 35 outputs a pixel signal according to the charge accumulated in the first capacitance 37 to the output line 26.

[0022] Here, the capacity of the FD in Patent Document 1 is C F , the capacity of the storage capacity is C M The ratio of the two is r M =C M / (C F +C M ) and the saturation charge Q0 is transferred to the FD when each photon is detected. When the i-th photon is detected, the additional charge stored in the storage capacitor is r M i Q0. Therefore, the total charge stored in the storage capacitor when m photons are detected is

[0023]

number

[0024] Here, r M The closer to 1, the higher the photon count value can be obtained. However, under conditions where a practically high resolution of about 5 μm pixel size is possible, r M = 0.9 is the limit, and the maximum number of photons that can be accumulated in a pixel is only about 15.

[0025] In this embodiment, in order to obtain a high dynamic range of the minimum count value of the photon number from 1 to about 30, it is preferable that the amount of charge output from the charge emission device 34 to the FD is small. Incidentally, the minimum value of the amount of charge output from the charge emission device 34 to the FD is determined by the kTC noise generated when the first capacitance 37 is charged and discharged, and is typically about 63 electrons at room temperature with C=15 fF. In this embodiment, assuming that the effective S / N ratio is 2, the amount of charge required to output a pixel signal is about 125 electrons. In order to control the accumulation of such a small amount of charge for each photon count, the charge emission device 34 requires a precise circuit that (1) flows a small current (typically 10 nA) for (2) only for a very short time (typically 2 ns). However, it is extremely difficult to simultaneously satisfy (1) and (2) in consideration of the variation of parasitic components generated in the mass production process. Therefore, if it is possible to cause a minute current to flow into the first capacitance 37 and accumulate (reduce) a constant ratio of charge in the first capacitance 37 in accordance with the increment of the photon count value, the amount of signal charge will be compressed in the high count value region, making it possible to expand the dynamic range of the image sensor to higher values ​​without changing the actual voltage value.

[0026] 2 is a diagram for explaining the operation principle of the charge discharging device according to the first embodiment. The charge discharging device 34 is, for example, a MOSFET having a capacitance (second capacitance 343 in this case) connected to its source (or drain) and a first capacitance 37 connected to its drain (or source). By charging a certain amount of charge in the second capacitance 343 and operating the MOSFET in the subthreshold region, the charge discharging device 34 outputs a minute current to the drain (first capacitance 37). For example, when a certain bias voltage is applied to the gate of the MOSFET every time the light receiving element 31 detects one photon, the charge discharging device 34 discharges charge from the source to the drain for a certain period of time.

[0027] 3 is a schematic diagram of a potential diagram of the charge emission device 34 according to the first embodiment. In FIG. 3, n and k are parameters that indicate the number of electrons emitted from the second capacitance 343, counting from the initial state. In FIG. 3, the state of the MOSFET when k electrons have been emitted from the second capacitance 343 and a predetermined bias voltage is applied to the gate is referred to as S. k The MOSFET is in state S k The average charge emission rate from the second capacitance 343 when k The average discharge rate in the initial state S0 in which the second capacitance 343 does not discharge any charge is λ0. In this state, when the source of the MOSFET is in a floating state and a predetermined bias voltage is applied to the channel, the MOSFET enters the state S k When the voltage barrier between the source and channel is at V k =kq / C F Therefore, the charge emission rate at this time is calculated by taking into account the Boltzmann factor as follows:

[0028]

number

[0029] It becomes.

[0030] Here, each time the light receiving element 31 detects one photon, a predetermined bias voltage is applied to the gate of the charge emitting device 34 for a certain time ΔT. If the number of charges emitted from the source to the drain of the charge emitting device 34 when the light receiving element 31 detects the first photon is k(1), the time required for k(1) electrons to be emitted is t k(1) = ΔT, so

[0031]

number

[0032] Similarly, if the charge emitted when the mth photon is detected is k(m), then

[0033]

number

[0034] Therefore, the period during which charges are discharged from the source to the drain of the charge discharging device 34 while counting m photons is m·ΔT according to the operating conditions. k(1) From k(m) By taking the sum of the above, the function of the number of charges emitted by the charge emission device 34 is

[0035]

number

[0036] Then, solving equation (4) for k(m), we get

[0037]

number

[0038] The amount of charge emitted by the MOSFET is calculated as a function of the photon count value. As can be seen from equation (5), the amount of charge emitted by the charge emitter 34, k(m), is logarithmically compressed with respect to the photon count value m. Therefore, the increase in k(m) is suppressed with respect to the value of m, making it possible to count at a high value of m.

[0039] FIG. 3 shows the relationship between the photon count value and the amount of emitted charge of the charge emitting device according to the first embodiment. F = 15 fF, time ΔT = 10 ns, initial bias current 1 μA, the charge emission amount k(m) and the charge emission amount k(m)-k(m-1) emitted from the charge emission device 34 within time ΔT at each count value are shown as a function of the count value m. As mentioned above, k(m) increases logarithmically with respect to m. FFrom the value of m=15 fF, the charge k(m)-k(m-1) crosses the noise floor when m is 35 or more. With a certain margin, this embodiment allows counting up to m=30, achieving a dynamic range twice that of conventional methods.

[0040] -Light receiving sensor configuration- Fig. 4 is a block diagram showing the configuration of the light receiving sensor according to the first embodiment. As shown in Fig. 2, the light receiving sensor 2 includes a bias generating circuit 20, a pixel array 21, a readout circuit 22, a horizontal output circuit 23, a vertical drive circuit 24, and a sensor timing generator 25.

[0041] The bias generating circuit 20 supplies a bias signal (details omitted) necessary for driving the light receiving sensor 2. Note that the bias signal may be configured to be supplied from an external source.

[0042] The pixel array 21 includes a plurality of pixels 30 arranged in an array. The pixels 30 are each provided with a selection signal V SEL , reset signal V RST , PD bias control signal V D , charge charging signal V I , charge control signal V R、 Pixel power supply bias signal Vc and inverter bias signal V INV Each pixel 30 is supplied with a selection signal V SEL , reset signal V RST , PD bias control signal V D , charge charging signal V I , charge control signal V R , the pixel power supply bias signal Vc and the inverter bias signal V INV In response, a pixel signal indicating the detection result is output to an output line 26.

[0043] The readout circuit 22 includes a plurality of column circuits 221. The column circuits 221 include an amplifier and an AD converter, and are provided for each column of a plurality of pixels 30. The readout circuit 22 reads out signals output from each pixel 30 via the output line 26 using the column circuits 221.

[0044] The horizontal output circuit 23 sequentially outputs the signals output from the readout circuit 22 as output signals.

[0045] The vertical drive circuit 24 receives the selection signal V SEL , reset signal V RST , PD bias control signal V D , charge charging signal V I , charge control signal V R、 Pixel power supply bias signal Vc and inverter bias signal V INV and outputs it to each pixel 30 at a predetermined timing.

[0046] The sensor timing generator 25 outputs a drive timing signal indicating the drive timing of the horizontal output circuit 23 and the vertical drive circuit 24 .

[0047] -Example of a circuit configured in a pixel- FIG. 5(a) is a diagram showing an example of a circuit configured in a pixel according to the first embodiment. FIG. 5(a) is an example of a circuit configured in the pixel of FIG. 1. As shown in FIG. 5, a pixel 30 includes a light receiving element 31, a reset transistor 32, an inverting amplifier transistor 331, a load transistor 332, a charging transistor 341, a charge emission source transistor 342, a second capacitance 343 (second storage element), a source follower transistor 35, a selection transistor 36, and a first capacitance 37. The photocount control circuit 33 in FIG. 1 is composed of the inverting amplifier transistor 331 and the depletion type transistor 332. The charge emission device 34 in FIG. 1 is composed of the charging transistor 341, the charge emission source transistor 342, and the second capacitance 343.

[0048] A predetermined voltage is input to the anode terminal of the light receiving element 31. During exposure, the reset transistor 32 is turned on, and the drain of the reset transistor 32 (PD bias control signal V D ) and the anode terminal of the light receiving element 31 is maintained at a predetermined breakdown voltage or higher.D ) is set to 0 V and functions as a source, and the voltage between the cathode terminal and the anode terminal of the light receiving element 31 is set to the breakdown voltage or lower. As a result, when there is no exposure, no Geiger mode pulse is generated even if photons are incident on the light receiving element 31.

[0049] The inverting amplifier transistor 331 has a source (or drain) connected to the drain (or source) of the load transistor 332 and the gate of the charge emission source transistor 342, a drain connected to a ground voltage (earth), and a gate connected to the drain (or source) of the reset transistor 32 and the cathode terminal of the light receiving element 31.

[0050] The load transistor 332 has a source (or drain) connected to an inverter bias signal V INV The inverting amplifier transistor 331 configures an inverting amplifier (inverter) by using a depletion type transistor 332 as a load.

[0051] The charging transistor 341 has a source (or drain) connected to a charge signal V I The gate receives the charge control signal V R The charge discharge source transistor 342 receives a charge control signal V and has its drain (or source) connected to the source (or drain) of the charge discharge source transistor 342 and one end of a second capacitance 343. The charge discharge source transistor 342 has its drain (or source) connected to FD (not shown in the figure) and a first capacitance 37 (CM) connected in parallel therewith. The other end of the second capacitance 343 is connected to a ground voltage. The charging transistor 341 receives a charge control signal V R Accordingly, the second capacitor 343 is charged to a predetermined voltage.

[0052] When one photon is incident on the light receiving element 31 during exposure and a Geiger mode pulse is generated by avalanche multiplication, the voltage of the cathode terminal of the light receiving element 31 drops instantaneously. The voltage of the cathode terminal of the light receiving element 31 drops instantaneously with a time constant R P C S (C Sis the capacitance of the light receiving element 31 and the wiring, R P After the total resistance of the channel and wiring of the reset transistor 32 (corresponding to the quenching resistance) has elapsed, the source of the reset transistor 32 (PD bias control signal V D ) (see FIG. 5(b)). That is, the light receiving element 31 performs self-quenching and self-recovery operations. By inputting the voltage of the anode terminal of this light receiving element 31 to an inverter (photocount control circuit 33: inverting amplifier transistor 331 and depletion type transistor 332), the inverter generates a square wave signal having a width of a fixed time ΔT determined by the inverter threshold (see FIG. 5(c)). Specifically, by inputting the voltage of the anode terminal of the light receiving element 31 to the gate of the inverting amplifier transistor 331, the square wave signal is output to the gate of the charge emission source transistor 342. That is, the fixed time ΔT is expressed as follows, with a as a parameter:

[0053]

number

[0054] That is, in the pixel 30, a capacitance C S , resistance R P and an inverter form a circuit that generates a square wave signal that is at a high voltage for a fixed time ΔT. By inputting this square wave signal to the gate of the charge emission source transistor 342, the charge emission source transistor 342 is turned on for the fixed time ΔT. In other words, when the light receiving element 31 receives a photon, the charge emission source transistor 342 emits electrons from the second capacitance 343, which is charged with a predetermined voltage, to the first capacitance 37 for the fixed time ΔT.

[0055] Here, by setting the charging voltage of the second capacitance 343 to be equal to or lower than the subthreshold voltage of the charge emission source transistor 342, the charge emission rate of the charge emission source transistor 342 can be set to the state expressed by formula (1). This allows the pixel 30 to obtain the charge accumulation amount k(m) according to formula (5) for the photon count m, making it possible to obtain a high photon count value up to about 30. A voltage corresponding to this charge accumulation amount is read out from the pixel 30 by the source follower transistor 35 and the selection transistor 36, and is amplified and output by the column amplifier circuit 40 (inverse logarithmic conversion circuit). The column amplifier circuit 40 includes an inverse logarithmic conversion circuit, which outputs a voltage corresponding to the charge amount expressed by formula (5) as a linear function of the photon count m.

[0056] -About pixel operation- 6 is a timing chart showing the distance measurement operation of the pixel according to the first embodiment during one frame period. In FIG. RST , PD bias control signal V D , the gate voltage V of the charge emission source transistor 342 EG , charge control signal V R , charge charging signal V I , the charging voltage V of the second capacitor 343 CF , the charging voltage of the first capacitance V CM The driving signal for the light source 1 is generated by a vertical driving circuit 24 that receives a signal from a timing signal generator 4. During exposure, the light receiving element 31 receives a PD bias control signal V D is input to the anode terminal, and the voltage generated by the difference between this and a specified voltage input to the anode terminal exceeds the breakdown voltage by about 1 V, and the device is biased in Geiger mode.

[0057] At the initial time t0, a reset signal V RST becomes high level (H), and the reset transistor 32 is turned on. In addition, the PD bias control signal V Dbecomes low level (L), the voltage of the cathode terminal of the light receiving element 31 and the gate voltage of the inverting amplifier transistor 331 become low level. At this time, the inverting amplifier transistor 331 (inverter) outputs a high level voltage to the gate of the charge emission source transistor 342. This causes the charge emission source transistor 342 to be turned on. In addition, the charge control signal V R and the charge signal V I This causes the charging transistor 341 to be turned on, and the first capacitance 37 and the second capacitance 343 are charged to a high level (H'). At this time, the first capacitance 37 and the second capacitance 343 are charged to a high level (H') by the charge charging signal V I The battery is charged to a voltage about 0.5 to 1.0 V higher than the middle level.

[0058] At time t1, the PD bias control signal V D becomes high level, and the voltage at the cathode terminal of the light receiving element 31 and the gate voltage of the inverting amplifier transistor 331 become high level. This enables the light receiving element 31 to receive light. At this time, the inverting amplifier transistor 331 (inverter) outputs a low level voltage to the gate of the charge emission source transistor 342, so that the charge emission source transistor 342 is turned off. Therefore, the first capacitor 37 maintains a high level voltage until the light receiving element 31 detects a photon. In addition, the charge charging signal V I becomes a middle level (M) which is an intermediate voltage, and the second capacitor 343 is charged to the middle level.

[0059] At time t2, the reset signal V RST and the charge signal V I becomes low level, and the initialization of the light receiving element 31, the first capacitor 37, and the second capacitor 343 is completed.

[0060] At time t3, the reset signal V RSTbecomes high level, and the reset transistor 32 is turned on. As a result, a high-level voltage is applied to the cathode terminal of the light receiving element 31, so that a voltage higher than the break voltage is applied between the cathode terminal and the anode terminal of the light receiving element 31, and exposure begins.

[0061] In this embodiment, the exposure period is from time t3 to t10. In FIG. 6, the light receiving element 31 detects one photon immediately before times t4, t6, and t8. After receiving one photon at times t4, t6, and t8, the light receiving element 31 generates a Geiger mode pulse, and then outputs the rectangular signal of FIG. 5(b) by self-quenching and self-recovery. Then, the inverting amplifier transistor 331 (inverter) outputs a rectangular pulse (FIG. 5(c)) of a certain time ΔT according to equation (6). As a result, the gate voltage V EG becomes high level for a certain time ΔT, and the charge emission source transistor 342 is turned on for the certain time ΔT. As a result, during each of the periods t4 to t5, t6 to t7, and t8 to t9, the charge emission source transistor 342 emits electrons from the second capacitance 343 to the first capacitance 37 according to the formula (5). Therefore, the charging voltage V CF The voltage of the first capacitance gradually increases until it reaches the charging voltage V CM The change in voltage during each of the periods t4 to t5, t6 to t7, and t8 to t9 changes logarithmically (nonlinearly) with respect to the number of photons, as shown in formula (5).

[0062] At time t10, the reset signal V RST and the PD bias control signal V D becomes low level, ending the exposure period. Then, the readout period begins. After the readout of all pixels is completed, the next frame begins.

[0063] Second embodiment -Overall configuration of distance measuring device- Fig. 7 is a block diagram showing an example of the overall configuration of a distance measuring device according to the second embodiment. As shown in Fig. 7, the distance measuring device according to this embodiment includes a light source 1, a light receiving sensor 2, a signal processing device 3, and a timing signal generator 4. Note that the image sensor (light receiving sensor 2) of the first embodiment is used as the light receiving sensor 2.

[0064] The light receiving sensor 2 receives light that is irradiated by the light source 1 and reflected by the subject. The light receiving sensor 2 outputs an output signal indicative of the result of the light reception to the signal processing device 3.

[0065] The signal processing device 3 calculates the distance to the subject based on the signal received from the light receiving sensor 2. The signal processing device 3 outputs a signal indicating the calculation result.

[0066] The timing signal generator 4 outputs signals indicating the drive timing of each of the light source 1, the light receiving sensor 2, and the signal processing device 3. Specifically, the timing signal generator 4 outputs a signal whose phase is synchronized with the frame rate of the light receiving sensor 2 so that the light source 1, the light receiving sensor 2, and the signal processing device 3 perform simultaneous imaging of all pixels (global shutter) operation. Note that the frequencies of the signals output by the timing signal generator 4 may be different from each other.

[0067] -About subrange images- 8 is a diagram for explaining the principle of distance measurement by the distance measuring device according to the second embodiment. The distance measuring device according to the second embodiment can generate sub-range (SR) images SR1 to SR5 and a full-range (FR) image FR1 consisting of the sub-range images SR1 to SR5. In the following description, the same reference numerals are used for configurations similar to those of the above embodiment, and detailed description may be omitted.

[0068] For example, the flight time (the time it takes for light to be emitted from the light source 1, reflected by the subject, and returned to the light receiving sensor 2) differs depending on the distance from the light source 1 to the subject. By setting the exposure time of the light receiving sensor 2 based on the flight time, it is possible to detect a subject at a specified distance.

[0069] In the second embodiment, the exposure time in each sub-range is set to a timing delayed by a round-trip flight time of a distance corresponding to the center position between the previous and next sub-ranges (for example, in the case of sub-range image SR3, sub-range images SR2 and SR4) after the light source emits light. By repeating exposure for the exposure time (counting the returning light (photons)), a photon count value at a position corresponding to each sub-range can be obtained. When the count value exceeds a certain threshold, the light receiving sensor 2 determines that a subject is present, outputs a signal of a predetermined output level, and generates an image of the sub-range. The light receiving sensor 2 also generates a full-range image FR1 by superimposing the obtained multiple sub-range images (in FIG. 8, sub-range images SR1 to SR5).

[0070] Fig. 9 is a diagram for explaining a method for generating a sub-range image according to the second embodiment. Fig. 9 shows the generation timing of the sub-range image SR3.

[0071] As shown in Fig. 9, in the second embodiment, an exposure+exposure end pulse (a pulse whose rising edge corresponds to the start of exposure and whose falling edge corresponds to the end of exposure) is generated at a timing delayed by a time τ3 (distance measurement period) corresponding to the flight time corresponding to the subrange image SR3 after light (pulse) is emitted from the light source 1. That is, when generating the subrange image SR3, the light receiving sensor 2 performs exposure during a period when the exposure+exposure end pulse is high. In order to create the subrange image SR3, the light receiving sensor 2 performs this exposure operation multiple times (n times in this embodiment) and counts the number of photons reflected back from the subject.

[0072] Here, in distance measurement when the distance to the subject is close, as in the case of sub-range images SR1, SR2, and SR3, a larger number of photons (typically 20 or more) must be counted because the amount of light reflected from the subject is large. In contrast, in distance measurement when the distance to the subject is far, as in the case of sub-range images SR4 and SR5, the amount of light reflected from the subject is small, so the number of photons required for counting can be small (typically 2 or less). With conventional technology, it was difficult to capture distance measurements of such photon count values, which require a wide dynamic range that differs for each measurement distance range, in the same frame using the same pixel circuit.

[0073] -About pixel operation- FIG. 10 shows a timing chart of distance measurement operation during one frame period of a pixel according to the second embodiment. In the second embodiment, the image sensor (light receiving sensor 2) of FIG. 5 and the pixel 30 of FIG. 4(a) are used. Here, in the second embodiment, the timing signal generator 4 inputs an emission signal indicating the emission timing of the light source 1 to the sensor timing generator 25. The sensor timing generator 25 outputs each signal according to the emission signal. In this embodiment, when performing distance measurement at a short distance (for example, sub-range images SR1, SR2, SR3, etc.), the amount of reflected light from the subject is large, so the operation of FIG. 10 (time decreasing current source mode) is performed in order to count a larger number of photons.

[0074] The operation from time t0 to time t2 is the same as that in FIG.

[0075] After the timing signal generator 4 outputs a light emission signal (not shown in FIG. 10), exposure starts after a delay time (τ3 for the subrange image SR3) corresponding to the flight distance to the center of each subrange. In FIG. 10, exposure starts at times t3, t6, and t9, and ends at times t5, t8, and t10. These exposure periods are the same as the light emission period of the light source 1. The exposure end time at this time is set so that the exposure period is a time ΔT' that is longer than the charge emission time ΔT determined by equation (6). That is, the exposure time of the charge emission source transistor 342 is set taking into account the quenching time when a photon is detected in the latter half of the exposure period.

[0076] On the other hand, in long distance measurement (e.g., subrange images SR4, SR5, etc.), the amount of reflected light from the subject is small, so the operation of Fig. 10 is not necessary. Specifically, the charge emission source transistor 342 operates in a constant current mode by constantly applying a fixed bias voltage to the source. This makes it possible to count a small number of photons while maintaining the linearity of the charge capacitance.

[0077] As described above, the distance measuring device of the second embodiment can switch the charge emission source transistor 342 between a time-decreasing current source mode and a constant current source mode depending on the number of photons to be detected, from short distances to long distances, thereby realizing high-precision distance measurement through photon counting with a high dynamic range.

[0078] As described above, the embodiments have been described as examples of the technology disclosed in the present application. However, the technology in the present disclosure is not limited to these, and may be applied to embodiments in which modifications, substitutions, additions, omissions, etc. are made as appropriate. [Explanation of symbols]

[0079] 1 light source 2 Light receiving sensor (imaging element) 4 Timing Generator 26 Output line 30 pixels 31 Photodetector 34 Charge emission device 37 First capacitor (first storage element) 343 Second Capacitor (Second Storage Element) 40-series amplifier circuit (inverse logarithmic conversion circuit)

Claims

1. A light source; A plurality of pixels. Each pixel is A light receiving element; A first storage element; a charge discharging device provided in each of the pixels, discharging charge to the first storage element for a certain period of time in response to a rectangular wave signal having a certain duration that is input when the light receiving element detects light that is irradiated by the light source and reflected by a subject; An imaging element comprising:

2. The imaging element according to claim 1 , wherein the certain period of time is a period of time from when the light receiving element detects light to when self-quenching occurs.

3. The charge discharging device is A second storage element is provided, When the light receiving element detects light, the charge is discharged from the second storage element to the first storage element for the certain period of time; The imaging device according to claim 1 , wherein a predetermined amount of the charge is stored in the second storage element before the charge is released.

4. 2. The image sensor according to claim 1, wherein an anti-logarithmic conversion circuit for converting a pixel signal into an anti-logarithmic signal is connected to an output line of the pixel.

5. 2. The imaging element of claim 1, wherein the charge discharging device operates in either a reduced current source mode when discharging the charge to the first storage element for the fixed period of time, or a constant current mode when outputting a constant current to the first storage element, depending on the number of photons detected by the light receiving element.

6. The imaging device according to claim 1 , wherein the light receiving element is an avalanche photodiode.

7. The imaging element according to claim 1 , a timing signal generator that outputs an exposure start signal indicating a timing for starting exposure to the plurality of pixels; and a signal processing device that calculates a distance to a subject from pixel signals output from the plurality of pixels.

Images