Test circuitry that utilizes mounting area efficiently

Abstract

Provides a test circuit that tests the DUT upon receiving a test command from Automatic Test Equipment (ATE). [Solution] The test circuit according to the present invention includes a plurality of analog test circuits electrically connected to the DUT to test its operation, and a digital control circuit to control the operation of the analog test circuits, the digital control circuit and the analog test circuits being located separately from each other.

Description

[Technical field]

[0001] The present invention relates to a test circuit that can efficiently utilize the mounting area of ​​a probe card by forming and arranging a digital control circuit and an analog inspection circuit separately. [Background technology]

[0002] Fine patterns are formed on semiconductor wafers, which are then diced to form semiconductor dies, which are then packaged to form the final product. As semiconductor elements formed on the wafers become smaller, more dense, and more integrated, determining whether or not the semiconductor elements on the wafer perform their intended functions has become an important issue.

[0003] A probe card is a device that connects semiconductor chips to test equipment to inspect the operation of semiconductor devices formed on a wafer. Probe cards have probe pins that are electrically connected to the semiconductor devices formed on the wafer, and the probe pins are electrically connected to the semiconductor devices to provide electrical signals and detect signals provided by the semiconductor devices.

[0004] The probe card includes a number of power switch ICs connected to power elements (power element DUTs) of a device under test (DUT) and signal switch ICs connected to signal processing elements (signal processing DUTs) of the device under test.

[0005] Currently, semiconductor integration has reached a very high level, which requires a large number of switch ICs to be mounted on one probe card. However, since the area of ​​the probe card is limited due to the test environment, it is difficult to mount multiple switch ICs on the probe card, and the number of signal lines to control each switch IC increases according to the number of switch ICs, making the probe card board very complicated.

[0006] This increased complexity of the probe card leads to increased probe card design time and increased manufacturing costs due to the increased number of layers in the probe card, but it is difficult to resolve this issue because the complexity only increases as semiconductor integration increases. Summary of the Invention [Problem to be solved by the invention]

[0007] In order for a probe card to test a semiconductor device, it must accurately contact the probe pins with the I / O pads of the wafer to provide signals to the device under test (DUT) and receive signals from the device under test (DUT) to carry out the test. However, the process of aligning the I / O pads so that they accurately contact the probe pins takes a long time, which reduces semiconductor productivity.

[0008] It is ideal to perform only one contact process to test one wafer, but as miniaturization progresses, the number of devices under test (DUT) formed on a single wafer tends to increase. In order to reduce testing time, however, the number of probe pins that must be connected to input / output pads on the wafer must increase, and the number of power switch ICs and signal switch ICs that must be connected to the probe pins must also increase.

[0009] However, as the number of power switch ICs and signal switch ICs mounted on a probe card increases, there are problems in that the mounting area or mounting margin area decreases and the complexity of the substrate on which the lines that transmit electrical signals are formed increases. The problem to be solved by the present invention is to eliminate such drawbacks of the conventional techniques. [Means for solving the problem]

[0010] The present invention provides a test circuit for testing a DUT upon receiving a test command from an automatic test equipment (ATE), the test circuit including a plurality of analog test circuits electrically connected to the DUT to test its operation, and a digital control circuit for controlling the operation of the analog test circuits, the digital control circuit and the analog test circuits being located separately from each other.

[0011] According to one aspect of the present invention, the digital control circuit includes a decoder that decodes a digital command provided by a control unit, a test circuit selector that selects the analog test circuit that performs a test according to the decoded digital command, and an instruction encoder that encodes a test circuit control command that controls the analog test circuit that performs the test.

[0012] According to one aspect of the present invention, the analog test circuit includes a plurality of channels, each connected to the DUT, a control command decoder for decoding encoded test circuit control commands, and a channel controller for controlling the channels according to the decoded control commands.

[0013] According to one aspect of the invention, the digital control circuitry controls at least a portion of the plurality of analog test circuits.

[0014] According to one aspect of the present invention, any one or more of the analog test circuits include any one or more of an LDO (Low Dropout) regulator, a DC-DC converter, a power switch, an analog signal switch, or an analog-to-digital converter.

[0015] According to one aspect of the present invention, the analog test circuitry is located in an analog signal processing area, and the digital control circuitry is located in a digital signal processing area that is distinct from the analog signal processing area.

[0016] According to one aspect of the present invention, the analog test circuit and the digital control circuit belong to a probe card formed on a substrate, the analog signal processing area is formed on a first surface of the substrate, and the digital signal processing area is formed on a second surface of the substrate that is different from the first surface.

[0017] According to one aspect of the present invention, the board is a multi-layer board or a multi-wire board.

[0018] According to one aspect of the present invention, the analog signal processing regions are distributed and located within the probe card.

[0019] According to one aspect of the present invention, the analog signal processing area and the digital signal processing area are located in different areas of a substrate on which the probe card is formed.

[0020] According to one aspect of the present invention, the digital control circuitry can individually control a plurality of channels coupled to the analog test circuitry. Effect of the Invention

[0021] According to the present invention, the digital control circuit and the analog test circuit are formed and arranged separately, thereby providing an advantage that the mounting area of ​​the probe card can be efficiently utilized.

[0022] In addition, in the conventional technology, in order to control a plurality of channels connected to a plurality of DUTs, signal lines are required in the same number as the number of channels. However, in the present invention, since a digital control circuit controls a plurality of analog test circuits by commands, it is possible to individually control a plurality of channels connected to analog test circuits. Furthermore, it has an advantage that the number of control signals required for each channel for a plurality of channels connected to analog test circuits can be reduced, making the design easier.

[0023] The effects of the present invention are not limited to those mentioned above, and other problems to be solved that are not mentioned will be clearly understood by those skilled in the art from the following description. [Brief description of the drawings]

[0024] [Figure 1] 1 is a block diagram illustrating components of a probe card 10 and the connections between the components. [Diagram 2] 1 is a block diagram that illustrates a schematic of a test circuit 100 according to the present invention. [Diagram 3] 2A to 2C are schematic diagrams for explaining the operation of the probe card 10 according to the present embodiment. [Figure 4] 1 is a diagram illustrating a schematic cross section of a probe card 10 according to the present embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0025] A test circuit capable of efficiently utilizing an implementation area according to an embodiment of the present invention is a test circuit that tests a DUT upon receiving a test command from an automatic test equipment (ATE), and the test circuit includes a plurality of analog test circuits electrically connected to the DUT to test its operation, and a digital control circuit that controls the operation of the analog test circuits, and the digital control circuit and the analog test circuits are located separately from each other.

[0026] Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the drawings. Prior to this, the terms and words used in this specification should not be interpreted as being limited to their general or dictionary meanings, but should be interpreted as meanings and concepts that correspond to the technical ideas of the present invention, based on the principle that the inventor can appropriately define the concepts of terms in order to best describe his / her invention. Therefore, the embodiments described in this specification and the configurations shown in the drawings are merely preferred embodiments of the present invention, and do not represent the entire technical ideas of the present invention, so it should be understood that there may be various equivalents and modifications that can replace them at the time of filing this application.

[0027] The terms used in this specification are used to describe specific embodiments and are not intended to limit the present invention. As used in this specification, the singular form can include the plural form unless the context clearly indicates otherwise.

[0028] The probe card of the present invention will be described below with reference to the drawings. For a simple and clear description, an active high signaling scheme activated in a logic high state will be exemplified below. However, this is for illustrative purposes only, and it is of course possible to operate the probe card in an active low signaling scheme activated in a logic low state, unlike the illustrated example.

[0029] 1 is a block diagram showing components of a probe card 10 and connections between the components. Referring to FIG 1, the probe card 10 includes a plurality of analog test circuits 300 electrically connected to a device under test (DUT) to test its operation, a plurality of digital control circuits 200 to control the operation of the analog test circuits 300, and a control unit 500 to receive a test command (CMD) and provide a control command (COM_D) to control the digital control circuits 200 to test the corresponding DUT.

[0030] In one embodiment, the analog test circuit 300 is located in an analog signal processing area (AA), and the control unit 500 and the digital control circuit 200 are located in a digital signal processing area (DA) that is distinct from the analog signal processing area (AA).

[0031] FIG 2 is a block diagram showing a test circuit 100 according to the present invention, and FIG 3 is a schematic diagram for explaining the operation of the test circuit 100 according to the present embodiment. Referring to FIGS. 1 to 3, the test circuit 100 is connected to an automatic test equipment (ATE) for operation. The automatic test equipment (ATE) is a device that is electrically connected to a DUT and actually performs a test according to a test vector provided by a user, and receives a signal from the DUT to determine whether or not there is a defect. The automatic test equipment (ATE) forms a test command (CMD) according to a unique signal protocol and provides it to the control unit 500.

[0032] The control unit 500 receives a signal from the automatic test equipment (ATE) and forms a digital control command (COM_D) corresponding to the signal provided by the automatic test equipment (ATE) so that a target DUT can be tested. Information regarding a mapping relationship between each channel of the analog test circuit 300 and the DUT is not transmitted to the automatic test equipment (ATE). Therefore, the control unit 500 converts the test command (CMD) provided by the automatic test equipment (ATE) and forms a digital control command (COM_D) so that a proper device under test (DUT) is tested.

[0033] The command protocol of the ATE is generally different from the protocol used in the probe card 10. Therefore, the control unit 500 interprets the test command (CMD) provided by the ATE according to the protocol of the ATE, forms a control command (COM_D) according to the command protocol used in the probe card 10, and outputs it to the digital control circuit 200. All of these processes are performed in the digital domain.

[0034] The controller 500 receives a test command (CMD) provided by an automatic test equipment (ATE) in a specific protocol, forms a corresponding control command (COM_D), and provides the control command (COM_D) to the digital control circuit 200 to control the digital control circuit 200. In one embodiment, the control command (COM_D) provided by the controller 500 is provided to the digital control circuit 200 through an 8-bit line. In one example, the controller 500 is implemented as a field programmable gate array (FPGA).

[0035] The decoder 210 receives the digital control command (COM_D) provided by the control unit 500, decodes it, and controls the test circuit selector 220 to activate a target analog test circuit 300. The test circuit selector 220 provides a control command to activate a corresponding analog test circuit and a target channel, and the control command encoder 230 outputs the encoded test circuit control command (COM_A) to the analog test circuit 300 designated by the test circuit selector 220.

[0036] In one embodiment, the test circuit control command (COM_A) is a signal for selecting an analog test circuit 300 to perform a test among the plurality of analog test circuits 300, activating a channel, and / or controlling the analog test circuit 300. In one example, the analog test circuit control command (COM_A) is transmitted through a 1-bit to 2-bit transmission line connected between the digital control circuit 200 and the analog test circuit 300.

[0037] In one embodiment, the digital control circuit 200 is a circuit that performs digital calculations, inputs and outputs digital signals, and performs digital signal processing, and includes a microprocessor.

[0038] The control command decoder 310 of the analog test circuit 300 decodes the test circuit control command (COM_A) provided thereto and outputs the decoded command to the channel controller 320. The channel controller 320 activates a channel corresponding to the decoded test circuit control command so that a test can be performed on a target DUT.

[0039] In one embodiment, the analog test circuit 300 includes an analog multiplexer. Thus, a single analog test circuit 300 is connected to a plurality of devices under test (DUT) through a plurality of channels. Each channel is controlled by an analog test circuit control command (COM_A) to be driven. Thus, a plurality of devices under test (DUT) can be tested through one analog test circuit 300.

[0040] The analog test circuit 300 also includes an analog circuit that performs testing by providing an analog signal provided by an automatic test equipment (ATE) to a device under test (DUT). In one embodiment, the analog circuit includes at least one of an LDO (Low Dropout) regulator, a DC-DC converter, and an analog-to-digital converter.

[0041] In one embodiment, an analog signal provided to the DUT through analog test circuit 300 is used to measure characteristics of the DUT. In one example, when measuring the amount of current consumed by the DUT, an automatic test equipment (ATE) measures the magnitude of the current provided by the analog signal.

[0042] In another example, when testing whether the DUT is operating correctly while fine-tuning the power supply voltage of the DUT, the automatic test equipment (ATE) adjusts and provides a voltage to an analog signal line connected to the ATE's power supply to detect the operation of the DUT.

[0043] As another example, when measuring leakage current at an input / output of a DUT, an automatic test equipment (ATE) measures a current leaking into an analog signal line connected to an input / output pin of the DUT.

[0044] 4 is a schematic cross-sectional view of a probe card including a test circuit 100 according to an embodiment of the present invention. Referring to FIG. 4, an analog test circuit 300, a digital control circuit 200, and a control unit 500 are located on a substrate (sub). In one embodiment, the substrate (sub) is a printed circuit board (PCB), which is either a multi-layer board or a multi-wire board in which conductive lines are formed in multiple layers.

[0045] The control unit 500 and the digital control circuit 200 are connected by a conductive line, for example, an 8-bit line. The digital control circuit 200 and the analog inspection circuit 300 are connected by a conductive line formed on a substrate (sub), and each of the digital control circuit 200 and the analog inspection circuit 300 is connected by a 1-bit to 2-bit conductor.

[0046] The analog inspection circuit 300 is located in an analog signal processing area (AA) of the substrate (sub), and the control unit 500 and the digital control circuit 200 are located in a digital signal processing area (DA) that is distinct from the analog signal processing area (AA) of the substrate (sub). In the embodiment illustrated in Fig. 4, the digital signal processing area (DA) where the control unit 500 and the digital control circuit 200 are located is a first surface of the substrate (sub), and the analog signal processing area (AA) where the analog inspection circuit 300 is located is a second surface of the substrate (sub).

[0047] In the prior art, when designing the board of the probe card 10, the board must be laid out so that all analog and digital signals provided to the analog test circuit 300 are transmitted to the switch IC connected to the device under test. In the future, the complexity of the board will increase in the process of forming the wiring lines, and there will be a problem of a reduction in the mounting area due to the increase in the line area.

[0048] However, according to this embodiment, the control command (COM_D), which is a digital signal provided by the control unit 500 to the digital control circuit 200, only needs to be laid out up to the digital control circuit 200, thereby minimizing the consumption of mounting area on the board and reducing the complexity of the board design.

[0049] Furthermore, the analog testing circuit control command (COM_A) provided by the digital control circuit 200 to the analog testing circuit 300 is only 1 to 2 bits, and analog signals are mainly input and output to the analog testing circuit 300, which provides the advantage of simplifying the signal lines and board.

[0050] In an embodiment not shown, an analog signal processing area (AA) where the analog test circuit 300 is located is the second surface of the substrate (sub), and the analog test circuit 300 is partially scattered on the probe card 10. Therefore, the mounting space of the probe card 10 can be utilized with high density, the mounting efficiency of the probe card can be improved, and the signal lines are prevented from crowding into a small area, which helps simplify the substrate.

[0051] The operation of the test circuit 100 of this embodiment will be described below with reference to Figures 1 to 4. Referring to Figures 1 to 4, the automatic test equipment (ATE) identifies the DUT and sends a test command (CMD) to the control unit 500. As described above, the test command (CMD) is a signal according to the protocol of the automatic test equipment (ATE).

[0052] The control unit 500 identifies the DUT to be tested by decoding the test command (CMD) formed according to the protocol of the automatic test equipment (ATE). The control unit 500 identifies the channel connected to the identified DUT and provides a digital control command (COM_D) to the digital control circuit 200 so that the corresponding channel is activated. The digital control circuit 200 receives the digital control command (COM_D) and provides a test circuit control command (COM_A) to control the analog test circuit 300 so that the channel corresponding to the control command (COM_D) is activated. When the channel between the analog test circuit 300 and the DUT is activated, the analog circuit unit of the automatic test equipment (ATE) provides an analog signal including a test vector to the DUT, and the automatic test equipment (ATE) evaluates the operation of the DUT from the analog signal.

[0053] The automatic test equipment (ATE) is electrically connected to the DUT through the analog test circuit 300 included in the probe card 10. The automatic test equipment (ATE) and the DUT are thus connected to be able to transmit and receive analog signals to and from each other, and such connection allows the ATE to evaluate analog characteristics such as performance evaluation and leakage current measurement.

[0054] According to the conventional technology, digital circuits and analog circuits are integrated and digital commands must be provided for each integrated circuit unit, and a large area is required to form the circuit unit to process the digital commands, resulting in a large loss in terms of area. However, as in the present embodiment, the circuit for processing digital commands and the circuit for processing analog signals are separated, and the area for processing digital commands is formed as a separate circuit, thereby reducing area waste and overhead.

[0055] In addition, in the conventional technology, when manufacturing the probe card 10, all analog and digital signals must be designed up to the position of the test circuit connected to the DUT, which increases the area and the difficulty of the design.

[0056] However, according to the present embodiment, it is sufficient that a plurality of digital signal lines for digital command transfer are connected to the digital control circuit 200, and the analog test circuit 300 mainly inputs and outputs only analog signals, which provides the advantage that the length of CMD-related signals is significantly reduced, thereby reducing the complexity of the probe card and lines.

[0057] In the prior art, in order to control a plurality of channels connected to a plurality of DUTs, signal lines are required as many as the number of channels. However, in the present embodiment, since the digital control circuit 200 controls the analog test circuit 300 by command, it is possible to individually control a plurality of channels connected to the analog test circuit 300. Furthermore, there is an advantage in that the number of control signals per channel can be reduced, making the design easier.

[0058] The terms used in this specification are used to describe specific embodiments and are not intended to limit the present invention. As used in this specification, the singular form includes the plural form unless the context clearly indicates otherwise. [Explanation of symbols]

[0059] 10 Probe Card 100 Test Circuit 200 Digital control circuit 210 (Command) Decoder 220 (Inspection circuit) Selector 230 Control command (COM_A) encoder 300 Analog Test Circuit 310 Control Command (CMD) Decoder 320 Channel Control Unit (Ch. Controller) 500 Control section

Claims

1. A test circuit formed in a probe card that receives a test command from an automatic test equipment (ATE) and tests a device under test (DUT), The test circuit includes: a plurality of analog test circuits electrically coupled to the DUT for testing its operation; a digital control circuit for controlling the operation of the analog test circuit; The digital control circuit and the analog test circuit are located apart from each other, the analog test circuit is located in an analog signal processing area; the digital control circuit is located in a digital signal processing area that is distinct from the analog signal processing area; The analog test circuit and the digital control circuit belong to a probe card formed on a substrate; the analog signal processing region is formed on a first surface of the substrate; The test circuit is characterized in that the digital signal processing area is formed on a second surface of the substrate, the second surface being different from the first surface.

2. The digital control circuit includes: a decoder for decoding a digital command provided by the control unit; a test circuit selector for selecting the analog test circuit for performing a test according to the decoded digital command; 2. The test circuit of claim 1, further comprising: an instruction encoder for encoding a test circuit control instruction for controlling the analog test circuit to perform the test.

3. The analog test circuit includes: a plurality of channels, each coupled to the DUT; a control command decoder for decoding the encoded test circuit control command; 2. The test circuit according to claim 1, further comprising: a channel control unit that controls the channel according to the decoded control command.

4. 2. The test circuit of claim 1, wherein the digital control circuit controls at least a portion of the plurality of analog test circuits.

5. 2. The test circuit of claim 1, wherein any one or more of the analog inspection circuits includes any one or more of an LDO (Low Dropout) regulator, a DC-DC converter, a power switch, an analog signal switch, or an analog-to-digital converter.

6. 2. The test circuit according to claim 1, wherein the board is a multi-layer board or a multi-wire board.

7. 2. The test circuit according to claim 1, wherein the analog signal processing regions are located in a distributed manner within the probe card.

8. The analog signal processing area and the digital signal processing area include:

2. The test circuit of claim 1, wherein the probe cards are located in different regions of a substrate on which the probe cards are formed.

9. 2. The test circuit of claim 1, wherein the digital control circuit is capable of individually controlling a plurality of channels connected to the analog test circuit.

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