Semiconductor light emitter and light output device

Abstract

To provide a semiconductor light emitting device capable of adjusting the temperature of a substrate mounted with a semiconductor stacked structure, even if the light is emitted at an angle to the substrate, and an optical output device capable of emitting position indication light to indicate the irradiation position of light emitted from the semiconductor stacked structure, and can suppress decrease in a position display function when the semiconductor stacked structure is mounted even if the semiconductor stacked structure emits light at an angle to the substrate.SOLUTION: A semiconductor light emitting device has a substrate, a semiconductor stacked structure with a light-emitting portion that emits light in an oblique direction with respect to the substrate, a base on which the substrate is placed, a holding member that holds the substrate at a preset angle to the base, a temperature control unit that is placed parallel to the substrate and adjusts the substrate temperature, and a shaping optical system that is held to the substrate and shapes light flux emitted from the semiconductor stacked structure.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor light emitter and a light output device. [Background technology]

[0002] Patent Document 1 discloses a semiconductor laminated structure using a distributed Bragg reflector waveguide, the semiconductor laminated structure having a light source unit that emits laser light, and an optical amplification unit that is formed on a substrate and has an active region that extends from the light source unit in a predetermined direction along the substrate surface of the substrate, amplifies the propagating light that propagates in a predetermined direction from the light source unit, and emits the amplified propagating light as output light in a direction oblique to the substrate surface. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2020-136655 A Summary of the Invention [Problem to be solved by the invention]

[0004] In a substrate on which the above-mentioned semiconductor laminate structure is mounted, light is emitted in an oblique direction relative to the substrate. Therefore, when this substrate is attached to a base of a product housing, the light is emitted in an oblique direction relative to the base, which causes a problem in that it is difficult to design the semiconductor laminate structure when it is mounted on a product.

[0005] Furthermore, if temperature unevenness occurs in the substrate on which the semiconductor laminated structure is mounted, the frequency and emission angle of the light emitted from the semiconductor laminated structure will change, so it is desirable to adjust the temperature of the substrate so that it is uniform.

[0006] An object of the present invention is to provide a semiconductor light emitter capable of adjusting the temperature of a substrate on which a semiconductor laminate structure is mounted, even in the case of a semiconductor laminate structure in which light is emitted obliquely with respect to the substrate.

[0007] Another object of the present invention is to provide an optical output device capable of emitting position indication light for indicating the irradiation position of light emitted from a semiconductor laminate structure, which can suppress deterioration of the position indication function when mounted, even in a semiconductor laminate structure in which light is emitted at an angle to a substrate. [Means for solving the problem]

[0008] The semiconductor light emitter of the first aspect of the present invention is a semiconductor light emitter comprising: a substrate; a semiconductor laminate structure having a light emitting portion that emits light in an oblique direction relative to the substrate; a base on which the substrate is placed; a holding member that holds the substrate at a preset angle relative to the base; a temperature control portion arranged parallel to the substrate and that adjusts the temperature of the substrate; and a shaping optical system that is held relative to the substrate and that shapes the light beam emitted from the semiconductor laminate structure.

[0009] A semiconductor light emitter of a second aspect of the present invention is a semiconductor light emitter comprising: a substrate; a semiconductor laminate structure having a light emitting portion that emits light in an oblique direction relative to the substrate; a base on which the substrate is placed; a holding member that holds the substrate at a preset angle relative to the base; and a temperature adjustment portion that is arranged parallel to the substrate between the holding member and the substrate or on the substrate side of the holding member and that adjusts the temperature of the substrate.

[0010] A semiconductor light emitter of a third aspect of the present invention is a semiconductor light emitter of the first or second aspect, wherein the semiconductor laminate structure includes an optical amplifier section that amplifies light propagating in the extending direction.

[0011] A semiconductor light emitter of a fourth aspect of the present invention is a semiconductor light emitter of any one of the first to third aspects, in which, when the light emission angle with respect to the substrate in the semiconductor laminate structure is θ1 and the angle between the holding surface of the substrate in the holding member and the mounting surface with respect to the base is θ2, θ1+θ2 is 0°, 90°, or 180°.

[0012] A semiconductor light emitter of a fifth aspect of the present invention is a semiconductor light emitter of any one of the first to fourth aspects, in which the semiconductor laminate structure and the substrate are electrically connected via an electrode pad formed on the substrate.

[0013] A sixth aspect of the semiconductor light emitter of the present invention is a semiconductor light emitter according to any one of the first to fifth aspects, wherein the temperature adjustment unit is disposed between the semiconductor laminate structure and the substrate.

[0014] A semiconductor light emitter of a seventh aspect of the present invention is a semiconductor light emitter of any one of the first to fifth aspects, wherein the temperature adjustment part is arranged on the surface of the substrate opposite to the holding surface of the semiconductor laminate structure.

[0015] A semiconductor light emitter of an eighth aspect of the present invention is a semiconductor light emitter of the seventh aspect, wherein the substrate has a thermal via portion in an arrangement area of ​​the semiconductor laminate structure, the thermal via portion has a plurality of thermal via groups each consisting of a plurality of thermal vias, and the plurality of thermal vias in each thermal via group are connected by solid wiring.

[0016] A semiconductor light emitter of a ninth aspect of the present invention is the semiconductor light emitter of the eighth aspect, wherein the interval between adjacent thermal via groups is wider than the interval between adjacent thermal vias within the thermal via group.

[0017] A semiconductor light emitter according to a tenth aspect of the present invention is the semiconductor light emitter according to the ninth aspect, wherein the intervals between adjacent thermal vias in the longitudinal direction within the thermal via group are uniform.

[0018] A semiconductor light emitter of an eleventh aspect of the present invention is a semiconductor light emitter of any one of the seventh to tenth aspects, wherein the substrate comprises a driver circuit for controlling the semiconductor laminate structure and a temperature measurement unit for measuring the temperature of the substrate, and the temperature measurement unit is disposed on the substrate between the driver circuit and the semiconductor laminate structure.

[0019] A light output device of a twelfth aspect of the present invention comprises a substrate, a semiconductor laminate structure having a light emitting portion that emits light in an oblique direction relative to the substrate, a base on which the substrate is placed, a holding member that holds the substrate at a preset angle relative to the base, and a position indication light emitting portion held on the base and emitting position indication light to indicate the irradiation position of the light emitted from the semiconductor laminate structure, wherein when the emission angle of the light from the semiconductor laminate structure to the substrate is θ1 and the angle between the holding surface of the holding member for the substrate and the mounting surface of the holding member to the base is θ2, θ1+θ2 is 0° with respect to the light emitted from the position indication light emitting portion. Effect of the Invention

[0020] According to the semiconductor light emitter of the first aspect of the present invention, even in the case of a semiconductor laminated structure in which light is emitted obliquely with respect to the substrate, it is possible to adjust the temperature of the substrate on which the semiconductor laminated structure is mounted.

[0021] According to the semiconductor light emitter of the second aspect of the present invention, even in the case of a semiconductor laminated structure in which light is emitted obliquely with respect to the substrate, it is possible to adjust the temperature of the substrate on which the semiconductor laminated structure is mounted.

[0022] According to the semiconductor light emitter of the third aspect of the present invention, it is possible to amplify and emit light generated in the light emitting portion.

[0023] According to the semiconductor light emitter of the fourth aspect of the present invention, it is possible to emit light vertically or horizontally with respect to the ground surface of the base, which makes it easy to mount the semiconductor light emitter on an apparatus.

[0024] According to the semiconductor light emitter of the fifth aspect of the present invention, by providing a holding member, even a semiconductor laminate structure that emits light at an angle to the substrate can be mounted horizontally on the substrate, making it possible to easily mount the semiconductor laminate structure on the substrate by, for example, die bonding or wire bonding.

[0025] According to the semiconductor light emitter of the sixth aspect of the present invention, the temperature of the semiconductor laminated structure can be adjusted by the temperature adjustment section without using a substrate, making it easier to adjust the temperature of the semiconductor laminated structure compared to adjusting the temperature via a substrate.

[0026] According to the seventh aspect of the semiconductor light emitter of the present invention, the temperature adjustment unit is arranged on the side of the substrate opposite the holding surface of the semiconductor laminate structure, so that the semiconductor laminate structure can be directly mounted on the substrate, making it easier to mount the semiconductor laminate structure compared to mounting the semiconductor laminate structure on the substrate via the temperature adjustment unit.

[0027] According to the semiconductor light emitter of the eighth aspect of the present invention, by connecting solid wiring to the thermal vias to increase the contact area with the temperature adjustment section, it is possible to provide high heat dissipation properties, and by connecting solid wiring to each thermal via group and not providing solid wiring between the thermal via groups, it is possible to suppress the parasitic capacitance in the substrate and maintain high frequency characteristics.

[0028] According to the semiconductor light emitter of the ninth aspect of the present invention, the spacing between adjacent thermal via groups is made wider than the spacing between adjacent thermal vias within a thermal via group, thereby ensuring a wide return path for current, thereby making it possible to reduce electromagnetic noise.

[0029] According to the semiconductor light emitter of the tenth aspect of the present invention, by making the intervals between adjacent thermal vias in the longitudinal direction within the thermal via group equal, it is possible to suppress temperature unevenness within the thermal via group.

[0030] According to the semiconductor light emitter of the eleventh aspect of the present invention, a temperature measurement unit is disposed between the driver circuit, which is the main heat source on the substrate, and the semiconductor laminate structure, so that the temperature of the substrate can be measured more accurately compared to the case where a temperature measurement unit is disposed at the edge of the substrate.

[0031] According to the light output device of the twelfth aspect of the present invention, in a light output device capable of emitting position indication light for indicating the irradiation position of light emitted from a semiconductor laminate structure, it is possible to suppress deterioration of the position indication function when mounted, even in a semiconductor laminate structure in which light is emitted obliquely with respect to a substrate. [Brief description of the drawings]

[0032] [Figure 1] 1 is a schematic configuration diagram of a semiconductor light emitter according to a first embodiment. [Diagram 2] 1 is a plan view of a semiconductor laminated structure according to a first embodiment. [Diagram 3] 3 is a cross-sectional view taken along line AA' shown in FIG. 2. [Figure 4] FIG. 2 is a plan view of a printed circuit board according to the first embodiment. [Diagram 5] 2 is an equivalent circuit diagram of a driver circuit of the semiconductor stacked structure according to the first embodiment. FIG. [Figure 6] These are diagrams showing the state of the current flowing in the return path of the driver circuit, where FIG. 6(a) shows a state in which one large thermal via group is formed, and FIG. 6(b) shows a state in which multiple thermal via groups are formed. [Figure 7] 7A and 7B are diagrams showing the heat distribution characteristics of a thermal via group, where FIG. 7(a) is a diagram showing a state in which multiple thermal vias are arranged in a matrix within the thermal via group, and FIG. 7(b) is a diagram showing a state in which multiple thermal vias are arranged in a staggered pattern within the thermal via group. [Figure 8] 10 is a schematic configuration diagram showing a modified example of the semiconductor light emitter in the first embodiment, in which the shape of the holding member is changed. FIG. [Figure 9]9 is a schematic configuration diagram showing a modification of the semiconductor light emitter in the first embodiment, in which the shape of the holding member is changed to a shape different from that in FIG. 8. [Figure 10] 10 is a schematic configuration diagram showing a modified example of the semiconductor light emitter in the first embodiment, in which the arrangement position of a temperature adjustment unit is changed. FIG. [Figure 11] FIG. 4 is a plan view of another type of semiconductor laminated structure according to the first embodiment. [Figure 12] 12 is a cross-sectional view taken along the line AA' shown in FIG. [Figure 13] FIG. 11 is a plan view of a semiconductor laminated structure according to still another embodiment of the first embodiment. [Figure 14] 14 is a cross-sectional view taken along line AA' shown in FIG. 13. [Figure 15] FIG. 11 is a plan view of a semiconductor laminated structure according to still another embodiment of the first embodiment. [Figure 16] 16 is a cross-sectional view taken along the line AA' shown in FIG. 15. [Figure 17] FIG. 13 is a schematic diagram of a light output device according to a second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0033] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

[0034] [First embodiment] A semiconductor light emitter 10 according to the present embodiment will be described with reference to Fig. 1. Fig. 1 is a schematic configuration diagram of semiconductor light emitter 10.

[0035] As shown in FIG. 1, the semiconductor light emitter 10 includes a printed circuit board 11, a semiconductor laminate structure 20 having a light emitting portion that emits light in a direction oblique to the printed circuit board 11, a base 12 on which the printed circuit board 11 is placed, a holding member 13 that holds the printed circuit board 11 at a preset angle relative to the base 12, a temperature control portion 14 that is arranged parallel to the printed circuit board 11 and adjusts the temperature of the printed circuit board 11, and a shaping optical system 15 that is held relative to the printed circuit board 11 and shapes the light beam emitted from the semiconductor laminate structure 20.

[0036] The semiconductor laminated structure 20 may be any element as long as it is a semiconductor laminated structure having a light emitting portion that emits light in an oblique direction with respect to the printed circuit board 11. In the present embodiment, the semiconductor laminated structure 20 is, as an example, a surface emission type semiconductor laminated structure using a DBR (Distributed Bragg Reflector) waveguide.

[0037] Fig. 2 is a plan view of the semiconductor laminated structure 20, and Fig. 3 is a cross-sectional view taken along line A-A' shown in Fig. 2. As shown in Fig. 2 and Fig. 3, the semiconductor laminated structure 20 includes a light emitting section 50 and an optical amplifier 52 that extends from the light emitting section 50 and amplifies light propagating in the extending direction.

[0038] The light emitting unit 50 is a part that generates the seed light Ls, and is configured as a VCSEL (Vertical Cavity Surface Emitting Laser) in this embodiment. As shown in FIG. 3, the seed light Ls generated from the light emitting unit 50 propagates toward the optical amplifying unit 52.

[0039] The optical amplifier 52 has a function of amplifying and emitting seed light Ls, which is light generated in the light emitter 50. The optical amplifier 52 according to the present embodiment is a surface emission type optical amplifier that uses a GaAs-based distributed Bragg reflector waveguide (hereinafter, "DBR waveguide"), as an example.

[0040] The semiconductor laminated structure 20 is composed of a lower DBR 32, an active region 34, a non-conductive region 60, an upper DBR 36, an insulating portion 54, a first P electrode 41, and a second P electrode 42 formed on the base layer 30, as well as an N electrode 40 formed on the back surface of the base layer 30.

[0041] In this embodiment, base layer 30 is an n-type GaAs substrate, and N-electrode 40 is provided on the back surface of base layer 30. Meanwhile, lower DBR 32 in this embodiment is n-type, and upper DBR 36 as a whole is p-type.

[0042] The lower DBR 32 is paired with an upper DBR 36 described below to form a light source that generates light in the light emitting section 50, and a resonator that amplifies and emits the light in the optical amplification section 52.

[0043] The lower DBR 32 is a multilayer reflector configured by alternately stacking two semiconductor layers having different refractive indices and a thickness of 0.25λ / n, where λ is the oscillation wavelength of the semiconductor laminated structure 20 and n is the refractive index of the medium (semiconductor layer). As a specific example, the lower DBR 32 is configured by alternately stacking an n-type low refractive index layer made of Al0.90Ga0.1As and an n-type high refractive index layer made of Al0.2Ga0.8As.

[0044] The active region 34 according to this embodiment may include, for example, a lower spacer layer, a quantum well active region, and an upper spacer layer (not shown). The quantum well active region according to this embodiment may include, for example, four barrier layers made of Al0.3Ga0.7As and three quantum well layers made of GaAs provided therebetween. The lower spacer layer and the upper spacer layer are disposed between the quantum well active region and the lower DBR 32 and between the quantum well active region and the upper DBR 36, respectively, to adjust the length of the resonator and also to function as a cladding layer for confining carriers.

[0045] The non-conductive region 60 and the conductive region 58 provided on the active region 34 are p-type oxide confinement layers, i.e., current confinement layers. That is, the non-conductive region 60 corresponds to an oxidized region, and the conductive region 58 corresponds to a non-oxidized region. The interface between the conductive region 58 and the non-conductive region 60 forms an oxidation front 56.

[0046] In this embodiment, one layer of the multilayer film constituting the lower DBR 32 is oxidized to form a non-conductive region 60 (oxidized region), and the region other than this one non-conductive region 60 serves as an unoxidized conductive region 58 (non-oxidized region). The current flowing from the first P electrode 41 and the second P electrode 42 to the N electrode 40 is restricted by the conductive region 58.

[0047] In this embodiment, an example is given of a form in which the non-conductive region 60 (oxidized region) is formed in one layer of the lower DBR 32, but the present invention is not limited to this and may be formed in multiple layers of the lower DBR 32, or may be formed in the upper DBR 36.

[0048] The upper DBR 36 includes a p-DBR 66, a phase control layer 64, and an i-DBR 68. The p-DBR 66 is p-type, while the i-DBR 68 does not contain impurities. The phase control layer 64 is formed between the p-DBR 66 and the i-DBR 68, and is a layer that adjusts the relationship between the wavelength of the seed light Ls and the vertical resonance wavelength in the optical amplification section 52. In this embodiment, the phase control layer 64 is formed using, for example, a silicon oxide film (SiO2), a silicon nitride film (SiON), or GaAs.

[0049] The insulating section 54 is a layer that electrically insulates the light emitting section 50 from the optical amplifying section 52, and in this embodiment, is formed by ion implantation, for example.

[0050] The first P electrode 41 is a P electrode of the light emitting section 50 , and the second P electrode 42 is a P electrode of the optical amplifying section 52 .

[0051] When driving the semiconductor laminated structure 20, the positive polarity of the driving power supply is applied to the first P electrode 41 and the second P electrode 42, the negative polarity is applied to the N electrode 40, and a driving current is passed from the first P electrode 41 and the second P electrode 42 to the N electrode 40. However, the polarities of the base layer 30, the lower DBR 32, and the upper DBR 36 are not limited to this, and these polarities may be reversed, that is, the base layer 30 may be a p-type GaAs substrate, the lower DBR 32 may be p-type, and the upper DBR 36 may be n-type.

[0052] Here, the semiconductor laminated structure 20 according to this embodiment will be described in more detail. As shown in Fig. 3, when a current is injected into the active region 34 by the first P electrode 41 and the N electrode 40 provided on both sides of the DBR in the light emitting section 50, seed light Ls is generated, and the seed light Ls generated in the light emitting section 50 propagates in a propagation direction from the left side to the right side of the page. At this time, the propagating light propagates mainly through the lower DBR 32, the active region 34, the conductive region 58, and the upper DBR 36 with a predetermined distribution. Therefore, the "DBR waveguide" is configured to include these parts.

[0053] The semiconductor laminated structure 20 using the DBR waveguide is composed of a pair of DBRs provided on a base layer 30, which is a semiconductor substrate, and an active region and a resonator spacer layer between the pair of DBRs. The region sandwiched between the DBRs functions as an optical waveguide, and light input into this DBR waveguide propagates slowly while being multiple-reflected in oblique directions.

[0054] At this time, when a current is injected into the active region 34 by the second P electrode 42 and the N electrode 40 provided on both sides of the DBR in the optical amplifier 52, light with a wavelength shorter than the vertical resonance wavelength is amplified, and an amplified beam is output in a direction intersecting the plane of the base layer 30 and tilted forward in the propagation direction of the DBR waveguide of the propagating light (diagonal forward direction). In FIG. 3, this output light is shown as "output light Lf". In other words, the region of the optical amplifier 52 where the second P electrode 42 and the N electrode 40 are provided functions as both an optical waveguide and an optical amplifier. In addition, the light emission region on the surface of the optical amplifier 52 functions as the light emission section 52a in this embodiment.

[0055] 4 is a plan view of the printed circuit board 11 on which the semiconductor laminated structure 20 and the like are mounted. For convenience, the surface of the printed circuit board 11 on which the semiconductor laminated structure 20 is mounted is referred to as the front surface, and the surface behind the front surface is referred to as the back surface.

[0056] The printed circuit board 11 has a multi-layer structure consisting of a surface layer, an intermediate layer, and a back layer. The intermediate layer is a solid ground layer to reduce noise in the driver circuit. This intermediate layer (solid ground layer) serves as a return path for the current flowing to the semiconductor laminated structure 20 mounted on the surface.

[0057] 4, a semiconductor laminated structure 20, a driver IC (Integrated Circuit) 70 that controls the semiconductor laminated structure 20, a thermistor 71 that measures the temperature of the printed circuit board 11, a capacitor 72 that constitutes a part of the driver circuit of the semiconductor laminated structure 20, etc. are mounted on the surface of the printed circuit board 11. In this embodiment, as an example, it is assumed that a current I flows in the driver circuit from the right side to the left side in FIG.

[0058] The semiconductor laminated structure 20 and the printed circuit board 11 are electrically connected by die bonding via electrode pads 11a formed on the printed circuit board 11. Note that the connection between the semiconductor laminated structure 20 and the printed circuit board 11 is not limited to die bonding, and any connection mode such as wire bonding may be used.

[0059] The thermistor 71 is disposed on the printed circuit board 11 between the driver IC 70 and the semiconductor laminated structure 20. The thermistor 71 is used for temperature control in the temperature adjustment unit 14, which will be described later.

[0060] The printed circuit board 11 also includes a thermal via portion 73 in the arrangement region of the semiconductor laminated structure 20. The thermal via portion 73 includes a plurality of thermal via groups 74 each including a plurality of thermal vias 75, and the plurality of thermal vias 75 in each thermal via group 74 are connected by a solid wiring 76.

[0061] The thermal via 75 is a heat dissipation hole that penetrates the printed circuit board 11 and is intended to conduct heat generated in the semiconductor laminate structure 20 mounted on the front surface of the printed circuit board 11 to the back surface side of the printed circuit board 11.

[0062] The solid wiring 76 is a metal layer for dissipating heat conducted from the thermal vias 75 on the rear surface of the printed circuit board 11 .

[0063] Fig. 5 is an equivalent circuit diagram of a driver circuit of the semiconductor stacked structure 20. As shown in Fig. 5, in the driver circuit, the semiconductor stacked structure 20 and a driver IC 70 are connected in series to a power supply 80, and a capacitor 72 is connected in parallel to the semiconductor stacked structure 20 and the driver IC 70.

[0064] To dissipate heat from the semiconductor laminated structure 20, it is preferable to provide a large number of thermal vias 75 penetrating the printed circuit board 11. However, if too many thermal vias 75 are provided, the return path in the intermediate layer (solid ground layer) is blocked, generating electromagnetic noise.

[0065] In addition, since the thermal via 75 acts as a stub, an inductance component (hereinafter referred to as an L component) is generated in the driver circuit. In addition, since the solid wiring 76 functions as a capacitor by being laminated with the intermediate layer (solid ground layer), a capacitance component (hereinafter referred to as a C component) is generated in the driver circuit.

[0066] 5, these L and C components become a parasitic circuit in the driver circuit and cause the current flowing through the semiconductor stacked structure 20 to oscillate. The oscillation of the current flowing through the semiconductor stacked structure 20 increases as the L and C components increase. When the current flowing through the semiconductor stacked structure 20 oscillates, the driving characteristics of the semiconductor stacked structure 20 deteriorate.

[0067] In order to solve such a problem, in this embodiment, the thermal via portion 73 is formed in the arrangement region of the semiconductor laminated structure 20 so as to be divided into a plurality of thermal via groups 74 .

[0068] Here, the characteristics of the return path of the driver circuit will be described. Figure 6 shows the state of the current flowing in the return path of the driver circuit, where Figure 6(a) shows the state where one large thermal via group 174 is formed, and Figure 6(b) shows the state where multiple thermal via groups 74 are formed.

[0069] 6(a), when one large thermal via group 174 is formed in the arrangement region of the semiconductor laminated structure 20, the current I must largely detour around the thermal via group 174 in the return path in the intermediate layer (solid ground layer), which impedes the flow of the current I and generates electromagnetic noise. In addition, the area of ​​the solid wiring 176 for heat dissipation connected to the multiple thermal vias 175 in the thermal via group 174 also becomes large, which increases the C component in the parasitic circuit and deteriorates the driving characteristics of the semiconductor laminated structure 20.

[0070] 6(b), by forming a plurality of thermal via groups 74 in the arrangement region of the semiconductor laminated structure 20, the current I can pass between the plurality of thermal via groups 74, so that a good return path can be secured and the generation of electromagnetic noise can be suppressed. In addition, the area of ​​the heat dissipation solid wiring 76 connected to the plurality of thermal vias 75 in the thermal via group 74 can be made smaller by forming a plurality of thermal via groups 74 compared to the case of forming one large thermal via group 174, so that the C component in the parasitic circuit is smaller and the deterioration of the driving characteristics of the semiconductor laminated structure 20 can be suppressed.

[0071] In addition, the wider the interval between the thermal via groups 74, the easier it is to ensure a return path, but in exchange, the number of thermal vias 75 formed in the arrangement region of the semiconductor laminated structure 20 decreases, deteriorating the heat dissipation characteristics. Therefore, the interval between the thermal via groups 74 may be appropriately designed in consideration of the characteristics of the return path and the heat dissipation characteristics.

[0072] Next, the heat distribution characteristics of the thermal via group will be described. Fig. 7 shows the heat distribution characteristics of the thermal via group, where Fig. 7(a) shows a state in which a plurality of thermal vias 275 are arranged in a matrix at equal intervals in both the vertical and horizontal directions in the figure in the thermal via group 274, and Fig. 7(b) shows a state in which a plurality of thermal vias 75 are arranged in a staggered manner in the thermal via group 74.

[0073] 7(a), when a plurality of thermal vias 275 are arranged in a matrix at equal intervals in both the vertical and horizontal directions in the thermal via group 274, the temperature of the portion in the thermal via group 274 where the thermal vias 275 are formed becomes lower, and the temperature of the portion in which the thermal vias 275 are not formed becomes higher. This results in temperature unevenness in the thermal via group 274.

[0074] 7(b), by arranging a plurality of thermal vias 75 in a staggered manner in the thermal via group 74, the arrangement of the thermal vias 75 is dispersed, thereby making it possible to suppress temperature unevenness in the thermal via group 74. Also, the arrangement density of the thermal vias 75 in the thermal via group 74 can be increased by arranging the thermal vias 75 in a staggered manner compared to arranging the thermal vias 75 in a matrix, which is advantageous in suppressing temperature unevenness in the thermal via group 74.

[0075] The temperature adjustment unit 14 is configured by a temperature adjustment element such as a Peltier element, for example. The temperature adjustment unit 14 is controlled by a control unit (not shown) based on the temperature of the printed circuit board 11 measured by the thermistor 71 so that the temperature of the printed circuit board 11 becomes a preset temperature.

[0076] The temperature adjustment unit 14 is preferably disposed between the holding member 13 and the printed circuit board 11, or on the printed circuit board 11 side of the holding member 13. In the present embodiment, as an example, the temperature adjustment unit 14 is disposed between the holding member 13 and the printed circuit board 11 on the surface of the printed circuit board 11 opposite to the surface that holds the semiconductor laminate structure 20.

[0077] The shaping optical system 15 is, for example, a cylindrical lens having a positive power in a short direction perpendicular to the longitudinal direction when the extension direction of the optical amplifier 52 of the semiconductor laminated structure 20 is taken as the longitudinal direction. The shaping optical system 15 is supported on the printed circuit board 11 via supports 16.

[0078] As shown in Figure 1, the semiconductor light emitter 10 of this embodiment is configured so that θ1 + θ2 is 90° when the light emission angle of the semiconductor laminate structure 20 relative to the printed circuit board 11 and the angle between the holding surface of the holding member 13 for the printed circuit board 11 and the mounting surface for the base 12 is θ1 and θ2, respectively.

[0079] In this embodiment, the base 12 and the holding member 13 are configured as separate bodies. In this way, even if θ1 changes, by changing θ2 accordingly, it is possible to easily set the desired angle of θ1+θ2, that is, 90° in this embodiment. However, the base 12 and the holding member 13 may be configured as one body.

[0080] In this embodiment, as an example, the light emission angle θ1 of the semiconductor laminated structure 20 relative to the printed circuit board 11 is 45°, and the angle θ2 between the holding surface of the holding member 13 for the printed circuit board 11 and the mounting surface for the base 12 is also 45°.

[0081] With this configuration, even if the semiconductor laminate structure 20 emits light at an angle to the printed circuit board 11, the light is emitted perpendicular to the base 12, making it easier to design when mounting the semiconductor light emitter 10 on a product.

[0082] Furthermore, since the temperature control unit 14 is arranged parallel to the printed circuit board 11, it is possible to perform uniform temperature control over the entire printed circuit board 11, compared to a case in which the temperature control unit 14 is arranged at an angle to the printed circuit board 11.

[0083] As a modified example of semiconductor light emitter 10 according to the present embodiment, it may be configured so that θ1+θ2 is 0°, as in semiconductor light emitter 10A shown in Fig. 8. In this case, as one example, the light emission angle θ1 of semiconductor laminated structure 20 with respect to printed circuit board 11 is 45°, and the angle θ2 between the holding surface of holding member 13A for printed circuit board 11 and the mounting surface for base 12 is -45°.

[0084] 9, the semiconductor light emitter 10B may be configured so that θ1+θ2 is 180°. In this case, as an example, the light emission angle θ1 of the semiconductor laminated structure 20 with respect to the printed circuit board 11 is 45°, and the angle θ2 between the holding surface of the holding member 13B for the printed circuit board 11 and the mounting surface for the base 12 is 135°.

[0085] Moreover, as in a semiconductor light emitter 10C shown in FIG. 10, it may be disposed between a semiconductor laminated structure 20 and a printed circuit board 11.

[0086] In addition, in this embodiment, the semiconductor laminate structure 20 emits light that has been propagated longitudinally and amplified in the optical amplification section 52 from the light emitting section 52a, but the light emitted from the light emitting section 52a does not have to be amplified light.

[0087] In addition, in this embodiment, an example has been shown in which the semiconductor laminate structure 20 amplifies the seed light Ls generated from the light emitting section 50 by the optical amplification section 52, but it is also possible to amplify the light emitted by the semiconductor layer of the optical amplification section itself by applying a current directly to the optical amplification section without the seed light Ls.

[0088] In addition, in this embodiment, the semiconductor stacked structure 20 does not have to have the seed light generating unit integrated on the same chip as in Figure 3, but may be configured to introduce seed light from the outside, as in the semiconductor stacked structure 120 shown in Figures 11 and 12.

[0089] Fig. 11 is a plan view of the semiconductor laminated structure 120, and Fig. 12 is a cross-sectional view taken along the line A-A' shown in Fig. 11. The semiconductor laminated structure 120 includes an optical coupling section 150 and an optical amplifying section 152 that extends from the optical coupling section 150 and amplifies light propagating in the extending direction.

[0090] The optical coupling unit 150 propagates input light from an external light source (not shown) through the optical fiber 170, and couples an output end of the optical fiber 170 to the optical coupling unit 150 functioning as a light source unit of the semiconductor optical amplifier 120 to introduce the input light to the optical amplification unit 52. As the external light source, for example, a vertical cavity surface emitting laser (VCSEL) is used. From the viewpoint of light coupling efficiency, the optical fiber 170 may be a lensed fiber.

[0091] The optical amplifier 152 has a function of amplifying and emitting the seed light Ls introduced in the optical coupling unit 150. A light emitting region on the surface of the optical amplifier 152 functions as a light emitting unit 152a.

[0092] The semiconductor laminated structure 120 includes a lower DBR 132, an active region 134, a non-conductive region 160, an upper DBR 136, and a P-electrode 141 formed on a base layer 130, and an N-electrode 140 formed on the back surface of the base layer 130. Unlike the semiconductor laminated structure 20 shown in FIG. 3, the upper DBR 136 does not include a phase control layer or an i-DBR.

[0093] The non-conductive region 160 and the conductive region 158 provided on the active region 134 are p-type oxide confinement layers, i.e., current confinement layers. That is, the non-conductive region 160 corresponds to an oxidized region, and the conductive region 158 corresponds to a non-oxidized region. The interface between the conductive region 158 and the non-conductive region 160 forms an oxidation front 156.

[0094] Like the semiconductor laminated structure 20, the semiconductor laminated structure 120 amplifies light having a wavelength shorter than the vertical resonance wavelength. The wavelength and optical output of the seed light are variable, which is advantageous for searching for an optimal amplifier structure, seed light conditions, etc. Furthermore, the semiconductor laminated structure 120 has a simpler structure than the semiconductor laminated structure 20, and therefore can be fabricated by the same process as a general VCSEL process.

[0095] In addition, in this embodiment, the semiconductor stack 20 may be applied to a configuration that utilizes a diffraction grating, such as the semiconductor stack 220 shown in Figures 13 and 14, or the semiconductor stack 320 shown in Figures 15 and 16.

[0096] Fig. 13 is a plan view of the semiconductor laminated structure 220, and Fig. 14 is a cross-sectional view taken along line A-A' shown in Fig. 13. The semiconductor laminated structure 220 includes an optical amplifier 252 that amplifies light propagating in the elongated direction.

[0097] The optical amplifier 252 has a function of amplifying and emitting seed light Ls generated therein, similar to a typical VCSEL. A light emission region on the surface of the optical amplifier 252 functions as a light emission portion 252a.

[0098] The semiconductor laminated structure 220 is composed of a lower DBR 232, an active region 234, a non-conductive region 260, an upper DBR 236, a P electrode 241, and a diffraction grating 270 formed on a base layer 230, and an N electrode 240 formed on the back surface of the base layer 230.

[0099] The non-conductive region 260 and the conductive region 258 provided on the active region 234 are p-type oxide confinement layers, i.e., current confinement layers. That is, the non-conductive region 260 corresponds to the oxidized region, and the conductive region 258 corresponds to the non-oxidized region. The interface between the conductive region 258 and the non-conductive region 260 forms an oxidation front 256.

[0100] The semiconductor stacked structure 220 amplifies light having a wavelength shorter than the vertical resonance wavelength, similarly to the semiconductor stacked structure 20. Furthermore, the semiconductor stacked structure 220 outputs light in a slow light mode determined by the configuration of the diffraction grating 270 formed in the light emitting portion 252a. The semiconductor stacked structure 220 does not require a seed light, and emits light in the same manner as a general VCSEL, and the wavelength to be amplified is determined by the configuration of the diffraction grating 270.

[0101] Fig. 15 is a plan view of the semiconductor laminated structure 320, and Fig. 16 is a cross-sectional view taken along line A-A' shown in Fig. 15. The semiconductor laminated structure 320 includes a light emitting section 350 and an optical amplifier 352 extending from the light emitting section 350 and amplifying light propagating in the extending direction.

[0102] The light emitting section 350 is a section that generates the seed light Ls, and is configured as a VCSEL equipped with a diffraction grating 370. The seed light Ls generated from the light emitting section 350 propagates toward the optical amplifier section 352, as shown in FIG.

[0103] The optical amplifier 252 has a function of amplifying and emitting seed light Ls, which is light generated in the light emitter 350. A light emission region on the surface of the optical amplifier 352 functions as a light emission section 352a.

[0104] The semiconductor laminated structure 320 includes a lower DBR 332, an active region 334, a non-conductive region 360, an upper DBR 336, a first P electrode 341, a second P electrode 342, an ion implantation portion 354, and a diffraction grating 370 formed on a base layer 330, and an N electrode 340 formed on the back surface of the base layer 330.

[0105] The non-conductive region 360 and the conductive region 358 provided on the active region 334 are p-type oxide confinement layers, i.e., current confinement layers. That is, the non-conductive region 360 corresponds to an oxidized region, and the conductive region 358 corresponds to a non-oxidized region. The interface between the conductive region 358 and the non-conductive region 360 forms an oxidation front 356.

[0106] The semiconductor laminated structure 320 amplifies light having a wavelength shorter than the vertical resonance wavelength, similarly to the semiconductor laminated structure 20. Moreover, in the semiconductor laminated structure 320, light having a wavelength determined by the configuration of the diffraction grating 370 formed in the light emitting section 350 is output.

[0107] [Second embodiment] Next, a light output device according to this embodiment will be described with reference to Fig. 11. Fig. 11 is a schematic diagram of an optical processing device 100 as an example of an optical output device. The optical processing device 100 is a device that irradiates processing light onto a workpiece 110 and performs processing on the workpiece 110. Note that the same components as those in the semiconductor light emitter 10 of the first embodiment are given the same reference numbers, and descriptions of the same components will be omitted.

[0108] As shown in FIG. 11, the optical processing apparatus 100 includes a printed circuit board 11, a semiconductor laminate structure 20 that emits light at an oblique angle toward the printed circuit board 11 when attached to the printed circuit board 11, a base 12 on which the printed circuit board 11 is placed, a holding member 13 that holds the printed circuit board 11 at a preset angle relative to the base 12, a temperature control unit 14 that is arranged parallel to the printed circuit board 11 and adjusts the temperature of the printed circuit board 11, a shaping optical system that is held relative to the printed circuit board 11 and shapes the light beam emitted from the semiconductor laminate structure 20, and a position indication light emitting unit 90 that is held on the base 12 and emits position indication light to indicate the irradiation position of the light emitted from the semiconductor laminate structure 20.

[0109] As an example, the shaping optical system includes a cylindrical lens 15a having a positive power in a short direction perpendicular to the longitudinal direction when the extension direction of the optical amplifier 52 of the semiconductor laminated structure 20 is taken as the longitudinal direction, and a focusing lens 15b that focuses the light emitted from the cylindrical lens 15a. The cylindrical lens 15a is held on the printed circuit board 11 via a support 16a, and the focusing lens 15b is held on the printed circuit board 11 via a support 16b.

[0110] The position indication light emitting section 90 is for indicating the irradiation position of the processing light (light emitted from the semiconductor laminated structure 20) on the processing object 110, and is constituted by, for example, a laser light source.

[0111] The optical processing apparatus 100 of this embodiment is configured so that, when the emission angle of light from the semiconductor laminate structure 20 to the printed circuit board 11 is θ1 and the angle between the holding surface of the holding member 13 of the printed circuit board 11 and the mounting surface to the base 12 is θ2, θ1+θ2 is 0° with respect to the emission light AL from the position indication light emission section 90.

[0112] In this embodiment, as an example, the emission angle θ1 of light from the semiconductor laminate structure 20 to the printed circuit board 11 is 45°, and the angle θ2 between the holding surface of the holding member 13 for the printed circuit board 11 and the mounting surface for the base 12 is also 45°. Moreover, from the position indication light emitting portion 90, the emitted light AL is emitted in a direction perpendicular to the holding surface of the base 12.

[0113] With this configuration, even in the case of a semiconductor laminate structure 20 in which light is emitted at an angle to the printed circuit board 11, it is possible to emit processing light parallel to the emitted light AL from the position indication light emitting portion 90, thereby improving the display accuracy of the irradiation position of the processing light compared to when the emitted light AL and the processing light are not parallel.

[0114] Furthermore, compared to when the emitted light AL and the processing light are not parallel, it is easier to focus the processing light to the processing position indicated by the emitted light AL on the workpiece 110, so the processing area can be made smaller and the processing accuracy can be improved.

[0115] In this embodiment, the base 12 is formed of one member, and the position indication light emitting unit 90 and the holding member 13 are attached to the same surface of the base 12. By adopting such an embodiment, the optical axes of the light emitted from the light emitting unit of the board and the light emitted from the position indication light emitting unit 90 are set to be more parallel. However, the base 12 may be formed of multiple members. In that case, although objects of different shapes may be combined, it is preferable to form the base from multiple flat plates. When the base is formed from multiple flat plates, for example, two flat plates may be stacked, and the position indication light emitting unit and the holding member may be attached to separate flat plates.

[0116] Various typical embodiments of the present invention have been described above, but the present invention is not limited to these embodiments and can be modified as appropriate without departing from the spirit of the present invention. [Explanation of symbols]

[0117] 10, 10A, 10B, 10C Semiconductor light emitter 11 Printed circuit board 11a Electrode pad 12 Foundation 13, 13A, 13B Retaining member 14 Temperature control section 15 Shaping optical system 15a Cylindrical lens 15b Condenser lens 16,16a,16b Post 20 Semiconductor laminated structure 71 Thermistor 72 Capacitor 73 Thermal via section 74 Thermal Via Group 75 Thermal via 76 Solid wiring 80 power supply 90 Position display light emitting part 100 Optical processing equipment 110 Processing Objects

Claims

1. A substrate; a semiconductor laminated structure mounted on the substrate, further comprising an optical amplifier for amplifying light propagating in the extending direction and a light emitting section for emitting light in an oblique direction with respect to the substrate; A base on which the substrate is placed; a holding member that holds the substrate at a preset angle with respect to the base; a temperature adjusting unit that is disposed between the holding member and the substrate or on the substrate side of the holding member, and that adjusts a temperature of the substrate; a shaping optical system that is held relative to the substrate and that shapes a light beam emitted from the semiconductor laminated structure; A semiconductor light emitter comprising:

2. The emission angle of light from the semiconductor laminated structure to the substrate is θ1, When the angle between the holding surface of the holding member and the mounting surface of the base is θ2, θ1+θ2 is 0° or 180° 2. The semiconductor light emitter of claim 1.

3. The semiconductor laminated structure and the substrate are electrically connected via electrode pads formed on the substrate.

3. A semiconductor light emitter according to claim 1 or 2.

4. The temperature control unit is disposed between the semiconductor laminated structure and the substrate.

4. A semiconductor light emitter according to claim 1.

5. The temperature control unit is disposed on a surface of the substrate opposite to a surface on which the semiconductor laminated structure is supported.

4. A semiconductor light emitter according to claim 1.

6. the substrate includes a thermal via portion in an area where the semiconductor laminated structure is disposed, The thermal via section includes a plurality of thermal via groups each including a plurality of thermal vias, and the plurality of thermal vias in each of the thermal via groups are connected by solid wiring.

6. The semiconductor light emitter of claim 5.

7. The spacing between adjacent thermal via groups is wider than the spacing between adjacent thermal vias within the thermal via group.

7. The semiconductor light emitter of claim 6.

8. In the thermal via group, adjacent thermal vias are spaced equally apart in the longitudinal direction of the semiconductor laminated structure.

8. The semiconductor light emitter of claim 7.

9. the substrate includes a driver circuit for controlling the semiconductor laminated structure and a temperature measuring unit for measuring a temperature of the substrate; The temperature measuring unit is disposed on the substrate between the driver circuit and the semiconductor laminated structure.

9. A semiconductor light emitter according to claim 5.

10. A substrate; a semiconductor laminated structure including a light emitting portion mounted on the substrate and emitting light in an oblique direction with respect to the substrate; A base on which the substrate is placed; a holding member that holds the substrate at a preset angle with respect to the base; a position indication light emitting portion held by the base and configured to emit position indication light for indicating an irradiation position of light emitted from the semiconductor laminated structure; a shaping optical system that is held relative to the substrate and shapes a light beam emitted from the semiconductor laminated structure, The emission angle of light from the semiconductor laminated structure to the substrate is θ1, When the angle between the holding surface of the holding member and the mounting surface of the base is θ2, θ1+θ2 is 0° with respect to the light emitted from the position indication light emitting portion. Optical output device.

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