Inter prediction in geometric partitioning with an adaptive number of regions.
By geometrically dividing video blocks into adaptive regions and determining motion vectors for each region, the decoder circuit enhances video compression efficiency and quality, addressing the limitations of existing technologies.
Patent Information
- Application Number
- JP2021543478
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2019-01-28
- Filing Date
- 2020-01-28
- Publication Date
- 2025-05-16
- Estimated Expiration
- 2040-01-28
AI Technical Summary
Existing video compression technologies face challenges in efficiently encoding and decoding video frames, particularly in accurately reconstructing original video quality due to insufficient information during compression.
The implementation of a decoder circuit that geometrically divides a current block into adaptive regions, determining motion vectors for each region by constructing candidate lists, and decoding the block using these vectors.
This approach reduces encoding complexity and improves compression efficiency by allowing for more precise motion compensation and better adherence to object boundaries, leading to improved video quality and reduced processing complexity.
Smart Images

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Abstract
Description
[Technical field]
[0001] This application claims the benefit of priority to U.S. Provisional Patent Application No. 62 / 797,820, filed January 28, 2019, and entitled "INTER PREDICTION IN GEOMETRIC PARTITIONING WITH AN ADAPTIVE NUMBER OF REGIONS," which is incorporated herein by reference in its entirety.
[0002] The present invention relates generally to the field of video compression. In particular, the present invention is directed to inter prediction in geometric partitioning with an adaptive number of regions. [Background technology]
[0003] A video codec may include electronic circuitry or software that compresses or decompresses digital video. It can convert uncompressed video to a compressed format, or vice versa. In the context of video compression, a device that compresses video (and / or performs some of the functions thereof) may typically be called an encoder, and a device that decompresses video (and / or performs some of the functions thereof) may be called a decoder.
[0004] The format of the compressed data can conform to standard video compression specifications. The compression can be lossy, in that the compressed video lacks certain information present in the original video. Consequences of this can include that the decompressed video may have lower quality than the original uncompressed video, since insufficient information exists to exactly reconstruct the original video.
[0005] There can be a complex relationship between video quality, the amount of data used to represent the video (e.g., determined by bit rate), the complexity of the encoding and decoding algorithms, sensitivity to data loss and errors, ease of editing, random access, end-to-end delay (e.g., latency), and the like. Summary of the Invention [Means for solving the problem]
[0006] In one aspect, a decoder includes circuitry configured to receive a bitstream, divide a current block into a first region, a second region, and a third region via a geometric partitioning mode, determine a motion vector associated with a region among the first region, the second region, and the third region, where determining further includes building a candidate list, and decode the current block using the determined motion vector.
[0007] In another aspect, a method includes a decoder receiving a bitstream. The method includes the decoder partitioning a current block into a first region, a second region, and a third region via a geometric partition mode. The method includes the decoder determining a motion vector associated with a region among the first region, the second region, and the third region, where determining includes building a candidate list. The method includes the decoder decoding the current block using the determined motion vector.
[0008] The details of one or more variations of the subject matter described herein are set forth in the accompanying drawings and the description below. Other features and advantages of the subject matter described herein will be apparent from the description and drawings, and from the claims. The present invention provides, for example, the following: (Item 1) 10. A decoder, the decoder comprising a circuit, the circuit comprising: receiving a bitstream; Dividing a current block into a first region, a second region, and a third region via a geometric division mode; determining a motion vector associated with a region among the first region, the second region, and the third region, the determining further comprising building a candidate list; decoding the current block using the determined motion vector; A decoder configured to: (Item 2) 2. The decoder of claim 1, wherein constructing the candidate list includes evaluating a bottom-left candidate, a left candidate, a top-left candidate, a top candidate, and a top-right candidate. (Item 3) the determined motion vector relates to the first region; the geometric division mode includes a line segment between a first luma location and a second luma location; the bottom-left candidate is located in a third luma location immediately to the left and below the second luma location; the left candidate is located in a fourth luma location immediately to the left of the second luma location; the top-left candidate is located at a fifth luma location immediately above and to the left of the top-left most luma location of the first region; the top candidate is located in a sixth luma location directly above the first luma location; 3. The decoder of claim 2, wherein the top right candidate is located at a seventh luma location directly above and to the right of the first luma location. (Item 4) the determined motion vector relates to the second region; the geometric division mode includes a line segment between a first luma location and a second luma location; the bottom-left candidate is located in a third luma location immediately to the left of and directly below the bottom-left most luma location of the third region; the left candidate is located in a fourth luma location immediately to the left of the bottom-left most luma location of the third region; the top-left candidate is located at a fifth luma location directly above the first location; the top candidate is located in a sixth luma location immediately above the top right most luma location of the second region; 3. The decoder of claim 2, wherein the top-right candidate is located at a seventh luma location immediately above and to the right of the top-right most luma location of the second region. (Item 5) the determined motion vector relates to the third region; the geometric division mode includes a line segment between a first luma location and a second luma location; the bottom-left candidate is located in a third luma location immediately to the left of and directly below the bottom-left most luma location of the third region; the left candidate is located in a fourth luma location immediately to the left of the bottom-left most luma location of the third region; the top-left candidate is located in a fifth luma location that is co-located with the first region; said top candidate is located in a sixth luma location immediately to the left of said second location; 3. The decoder of claim 2, wherein the top right candidate is located at a seventh luma location juxtaposed with the second region. (Item 6) 3. The decoder of claim 2, wherein the determined motion vector relates to the second region, and the decoder is further configured to mark the candidate as unavailable in response to determining that the candidate is co-located with the third region. (Item 7) the determined motion vector relates to the second region; 3. The decoder of claim 2, wherein the decoder is further configured to automatically mark the top-left candidate as unavailable in response to determining that the geometric partitioning mode is enabled. (Item 8) the determined motion vector relates to the third region; 3. The decoder of claim 2, wherein the decoder is further configured to automatically mark the top-right candidate as unavailable in response to determining that the geometric partitioning mode is enabled. (Item 9) the determined motion vector relates to the third region; 3. The decoder of claim 2, wherein the decoder is further configured to automatically mark the top-left candidate as unavailable in response to determining that the geometric partitioning mode is enabled. (Item 10) 2. The decoder of claim 1, further configured to determine that a merge mode is enabled for the first region. (Item 11) 2. The decoder of claim 1, further configured to determine that an advanced motion vector prediction mode is enabled for the first region. (Item 12) 2. The decoder of claim 1, further configured to reconstruct pixel data of the current block. (Item 13) Item 13. The decoder of item 12, wherein the first region and the second region are non-rectangular. (Item 14) 2. The decoder of claim 1, wherein the geometric partitioning mode is signaled within the bitstream. (Item 15) 2. The decoder of claim 1, wherein dividing the current block into the first region, the second region, and the third region via the geometric division mode includes dividing the current block using line segments characterized by a first luma location and a second luma location. (Item 16) determining whether the geometric partitioning mode is enabled; and determining a first line segment for the current block; determining a second line segment for the current block;
[0023] 20. The method according to claim 1, further comprising: decoding the current block includes reconstructing pixel data using the first line segment and the second line segment; 2. The decoder of claim 1, wherein the first line segment and the second line segment divide the current block into the first region, the second region, and the third region. (Item 17) 2. The decoder of claim 1, wherein the geometric partitioning modes are available for block sizes of 64x64 luma samples or more, or 128x128 luma samples or more. (Item 18) an entropy decoder processor configured to receive the bitstream and decode the bitstream into quantized coefficients; an inverse quantization and inverse transform processor configured to process the quantized coefficients, including performing an inverse discrete cosine transform; A deblocking filter; A frame buffer; Intra prediction processor Item 1. The decoder of item 1, further comprising: (Item 19) 2. The decoder of claim 1, wherein the bitstream includes a parameter indicating whether the geometric partitioning mode is enabled for the current block. (Item 20) 2. The decoder of claim 1, wherein the current block forms part of a quad tree plus a binary decision tree. (Item 21) 21. The decoder of claim 20, wherein the current block is a non-leaf node of the quad tree plus binary decision tree. (Item 22) 2. The decoder of claim 1, wherein the current block is a coding tree unit or a coding unit. (Item 23) 2. The decoder of claim 1, wherein the first region is a coding unit or a prediction unit. (Item 24) 1. A method, comprising: A decoder receives a bitstream; The decoder divides a current block into a first region, a second region, and a third region via a geometric division mode; the decoder determining a motion vector associated with a region among the first region, the second region, and the third region, the determining including building a candidate list; the decoder decodes the current block using the determined motion vector; A method comprising: (Item 25) 25. The method of claim 24, wherein constructing the candidate list includes evaluating a bottom left candidate, a left candidate, a top left candidate, a top candidate, and a top right candidate. (Item 26) the determined motion vector relates to the first region; the geometric division mode includes a line segment between a first luma location and a second luma location; the bottom-left candidate is located in a third luma location immediately to the left and below the second luma location; the left candidate is located in a fourth luma location immediately to the left of the second luma location; the top-left candidate is located at a fifth luma location immediately above and to the left of the top-left most luma location of the first region; the top candidate is located in a sixth luma location directly above the first luma location; 26. The method of claim 25, wherein the top right candidate is located at a seventh luma location immediately above and to the right of the first luma location. (Item 27) the determined motion vector relates to the second region; the geometric division mode includes a line segment between a first luma location and a second luma location; the bottom-left candidate is located in a third luma location immediately to the left of and directly below the bottom-left most luma location of the third region; the left candidate is located in a fourth luma location immediately to the left of the bottom-left most luma location of the third region; the top-left candidate is located at a fifth luma location directly above the first location; the top candidate is located in a sixth luma location immediately above the top right most luma location of the second region; 26. The method of claim 25, wherein the top right candidate is located at a seventh luma location immediately above and to the right of the top right most luma location of the second region. (Item 28) the determined motion vector relates to the third region; the geometric division mode includes a line segment between a first luma location and a second luma location; the bottom-left candidate is located in a third luma location immediately to the left of and directly below the bottom-left most luma location of the third region; the left candidate is located in a fourth luma location immediately to the left of the bottom-left most luma location of the third region; the top-left candidate is located in a fifth luma location that is co-located with the first region; said top candidate is located in a sixth luma location immediately to the left of said second location; 26. The method of claim 25, wherein the top right candidate is located in a seventh luma location that is co-located with the second region. (Item 29) 26. The method of claim 25, further comprising marking the candidate as unavailable in response to determining that the determined motion vector is relative to the second region and that the candidate is co-located with the third region. (Item 30) 26. The method of claim 25, further comprising automatically marking the top-left candidate as unavailable in response to determining that the determined motion vector relates to the second region and that the geometric partitioning mode is enabled. (Item 31) 26. The method of claim 25, further comprising automatically marking the top-right candidate as unavailable in response to determining that the determined motion vector relates to the third region and that the geometric partitioning mode is enabled. (Item 32) 26. The method of claim 25, further comprising automatically marking the top-left candidate as unavailable in response to determining that the determined motion vector relates to the third region and that the geometric partitioning mode is enabled. (Item 33) 25. The method of claim 24, further comprising determining that a merge mode is enabled for the first region. (Item 34) 25. The method of claim 24, further comprising determining that an advanced motion vector prediction mode is enabled for the first region. (Item 35) 25. The method of claim 24, further comprising reconstructing pixel data of the current block. (Item 36) 25. The method of claim 24, wherein each of the first region and the second region is non-rectangular. (Item 37) 25. The method of claim 24, wherein the geometric partitioning mode is signaled within the bitstream. (Item 38) 25. The method of claim 24, wherein dividing the current block into the first region, the second region, and the third region via the geometric division mode includes dividing the current block using line segments characterized by a first luma location and a second luma location. (Item 39) determining whether the geometric partitioning mode is enabled; and determining a first line segment for the current block; determining a second line segment for the current block; Further comprising: decoding the current block includes reconstructing pixel data using the first line segment and the second line segment; 25. The method of claim 24, wherein the first line segment and the second line segment divide the current block into the first region, the second region, and the third region. (Item 40) 25. The method of claim 24, wherein the geometric partitioning mode is available for block sizes of 64x64 luma samples or more, or 128x128 luma samples or more. (Item 41) The decoder further comprises: an entropy decoder processor configured to receive the bitstream and decode the bitstream into quantized coefficients; an inverse quantization and inverse transform processor configured to process the quantized coefficients, including performing an inverse discrete cosine transform; A deblocking filter; A frame buffer; Intra prediction processor 25. The method of claim 24, comprising: (Item 42) 25. The method of claim 24, wherein the bitstream includes a parameter indicating whether the geometric partition mode is enabled for the current block. (Item 43) 25. The method of claim 24, wherein the current block forms part of a quad tree plus a binary decision tree. (Item 44) Item 44. The method of item 43, wherein the current block is a non-leaf node of the quad tree plus binary decision tree. (Item 45) 25. The method according to claim 24, wherein the current block is a coding tree unit or a coding unit. (Item 46) 25. The method of claim 24, wherein the first region is a coding unit or a prediction unit. [Brief description of the drawings]
[0009] For the purpose of illustrating the invention, the drawings show aspects of one or more embodiments of the invention, it being understood, however, that the invention is not limited to the precise arrangements and instrumentalities shown in the drawings.
[0010] [Figure 1] FIG. 1 is an illustration showing an example of a residual block (eg, a current block) with a geometric partitioning in which there are three regions.
[0011] [Diagram 2] FIG. 2 is a diagram illustrating example locations of potential spatial motion vector candidates for a first region (region S0) of an example current block divided according to a geometric division.
[0012] [Diagram 3] FIG. 3 illustrates FIG. 2 with annotations indicating luma locations including the top-left most luma location of the first region S0.
[0013] [Figure 4] FIG. 4 is a diagram illustrating example locations of potential motion vector candidates for a second region S1 of an example current block divided according to a geometric division.
[0014] [Diagram 5] FIG. 5 illustrates FIG. 4 with annotations showing luma locations including the bottom-left most luma location of the third region S2 and the top-right most luma location of the second region S1.
[0015] [Figure 6]FIG. 6 is a diagram illustrating example locations of potential spatial motion vector candidates for a third region (region S2) of an example current block divided according to a geometric division.
[0016] [Figure 7] FIG. 7 illustrates FIG. 6 with annotations showing luma locations including the bottom-left most luma location of the third region S2 and the top-right most luma location of the second region S1.
[0017] [Figure 8] FIG. 8 is a system block diagram illustrating an example video encoder capable of encoding video using inter prediction with geometric partitioning with an adaptive number of regions.
[0018] [Figure 9] FIG. 9 is a process flow diagram illustrating an example process for encoding video using geometric partitioning and inter prediction with an adaptive number of regions in accordance with some aspects of the present subject matter, which can reduce encoding complexity while increasing compression efficiency.
[0019] [Figure 10] FIG. 10 is a system block diagram illustrating an example decoder capable of decoding a bitstream using inter prediction and geometric partitioning with an adaptive number of regions, which can improve complexity and processing performance for video encoding and decoding.
[0020] [Figure 11] FIG. 11 is a process flow diagram illustrating an example process for decoding a bitstream using inter prediction on a geometric partition with an adaptive number of regions, which can improve complexity and processing performance for video encoding and decoding.
[0021] [Figure 12]FIG. 12 is a block diagram of a computing system that can be used to implement any one or more of the methods and any one or more portions thereof disclosed herein.
[0022] The drawings are not necessarily to scale and may be illustrated by phantom lines, schematic representations, and partial views. In some instances, details that are not necessary for an understanding of the embodiments or that make other details difficult to perceive may be omitted. Like reference symbols in the various drawings indicate like elements. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0023] Some implementations of the present subject matter include performing inter prediction using regions partitioned using a geometric partitioning mode with an adaptive number of regions, where a rectangular block may be divided into three or more non-rectangular regions. Performing inter prediction using a non-rectangular block partitioned using a geometric partitioning with an adaptive number of regions may allow the partitioning to follow object boundaries closer, resulting in lower motion compensation prediction error, smaller residuals, and therefore improved compression efficiency. During inter prediction, motion compensation may be performed using motion vectors predicted for blocks (e.g., coding units, prediction units, etc.) determined according to the geometric partitioning mode. Motion vectors may be predicted using advanced motion vector prediction (AMVP) and / or via merge mode, where a motion vector is selected from a list of motion vector candidates without encoding a motion vector difference.
[0024] The present subject matter may be applied to relatively large blocks, such as blocks having sizes of, for example, 128 x 128 or 64 x 64. In some implementations, the geometric partitioning may involve partitioning the current block into an adaptive number of regions, such as three or more regions for a given current block, and motion information may be determined for each region.
[0025] Motion compensation may include an approach for predicting a video frame or a portion thereof given previous and / or future frames by considering the motion of the camera and / or objects in the video. It may be employed in encoding and decoding video data for video compression, for example, in encoding and decoding using the Moving Picture Experts Group (MPEG)-2 (also referred to as Advanced Video Coding (AVC)) standard. Motion compensation may describe a picture in terms of the transformation of a reference picture into the current picture. The reference picture may be from an earlier or future time compared to the current picture. Compression efficiency may be improved if an image can be accurately synthesized from previously transmitted and / or stored images.
[0026] Block partitioning may refer to a method in video coding to find areas of similar motion. Some forms of block partitioning may be found in video codec standards including MPEG-2, H.264 (also referred to as AVC or MPEG-4 Part 10), and H.265 (also referred to as High Efficiency Video Coding (HEVC)). In an exemplary block partitioning approach, non-overlapping blocks of a video frame may be divided into rectangular sub-blocks to find block partitions containing pixels with similar motion. This approach may work well when all pixels of a block partition have similar motion. The motion of pixels within a block may be determined with respect to a previously coded frame.
[0027] Motion vector prediction may be effectively implemented in a geometric partition with an adaptive number of regions. More specifically, a geometric partition with an adaptive number of regions may include a technique for video encoding and decoding in which a rectangular block is further divided into two or more regions that may be non-rectangular. For example, FIG. 1 is an illustration showing an example of a residual block (e.g., a current block) 100 using a geometric partition in which there are three segments S0, S1, and S2. The current block 100 may have a width of M pixels and a height of N pixels, represented as M×N pixels, such as 64×64 or 128×128. The current block may be geometrically partitioned according to two line segments (P1P2 and P3P4), which may divide the current block into three regions S0, S1, and S2. When pixels in S0 have similar motion, a motion vector may describe the motion of all pixels in that region. As described more fully below, the respective motion vectors may be determined according to an AMVP mode or a merge mode. The motion vectors may be used to compress region S0. Similarly, when pixels in region S1 have similar motion, an associated motion vector may describe the motion of pixels in region S1. Similarly, when pixels in region S2 have similar motion, an associated motion vector may describe the motion of pixels in region S2. Such a geometric partitioning may be signaled to a receiver (e.g., a decoder) by encoding positions P1, P2, P3, P4 (or a representation of these positions using polar coordinates, an index into a predefined template, or other characterization of the partitioning, etc.) in the video bitstream.
[0028] Continuing with reference to FIG. 1, when encoding video data utilizing geometric partitioning at the pixel level, a line segment P1P2 (or more specifically, points P1 and P2) may be determined. To determine the line segment P1P2 (or more specifically, points P1 and P2) that best divides a block when utilizing geometric partitioning at the pixel level, the possible combinations of points P1 and P2 depend on M and N, which are the block width and height. For a block of size M×N, there are (M−1)×(N−1)×3 possible partitions. Identifying the correct partition may thus be a computationally expensive task of evaluating motion estimates for all possible partitions, which may increase the amount of time and / or processing power required to encode the video compared to encoding using rectangular partitions (e.g., without geometric partitioning at the pixel level). What constitutes the best or correct partition may be determined according to a metric and may vary from implementation to implementation.
[0029] In some implementations, with continued reference to FIG. 1, the partitioning is performed iteratively in that a first partition that forms two regions may be determined (e.g., determining a line P1P2 and an associated region), and then one of the regions may be further partitioned. For example, the partitioning described with reference to FIG. 1 may be performed to partition a block into two regions. One of the regions may be further partitioned (e.g., to form new regions S1 and S2). The process may continue to perform block-level geometric partitioning until a stopping criterion is reached.
[0030] Continuing with reference to FIG. 1, inter prediction may be performed using geometrically partitioned regions. Motion vectors for motion compensation may be derived using AMVP or merge mode. In AMVP, motion vector prediction is performed by signaling an index into a motion vector candidate list, and the motion vector difference (e.g., residual) is encoded and included in the bitstream. In merge mode, a motion vector is selected from a list of motion vector candidates without encoding the motion vector difference, thereby allowing the current block to adopt the motion information of another previously decoded block. In both AMVP and merge mode, a candidate list may be constructed by both the encoder and the decoder, and an index into the candidate list is signaled in the bitstream.
[0031] FIG. 2 is a diagram illustrating a non-limiting example of the locations of potential spatial motion vector candidates for a first region (region S0) of an exemplary current block 200 divided according to a geometric division. The potential spatial motion vector candidates may be considered to build a motion vector candidate list during AMVP mode or merge mode. The current block 200 may be divided into three regions S0, S1, and S2 by straight lines between points P0 and P1, and between points P2 and P3, respectively. Each of the regions S0, S1, and S2 may be predicted unidirectionally or bidirectionally. For example, the spatial candidates for the first region (region S0) as illustrated in FIG. 2 may include a bottom-left candidate A0, a left candidate A1, a top-left candidate B2, a top candidate B1, and a top-right candidate B0.
[0032] Continuing to refer to FIG. 2, as illustrated, in some implementations, each location (A0, A1, B2, B1, and B0) may represent a block at the respective location. For example, the top-left candidate B2 may be a block that exists at a location immediately to the left and directly above the region S0, e.g., if the luma location of the top-left corner of S0 is (0,0), the top-left candidate B2 may exist at a location (-1,-1). The bottom-left candidate A0 may be located immediately to the left and below P1, e.g., if the luma location of P1 is (P1x, P1y), the bottom-left candidate A0 may exist at a location (P1x-1, P1y+1). The left candidate A1 may be located immediately to the left of P1, e.g., the left candidate A1 may exist at a location (P1x-1, P1y). The top candidate B1 may be located directly above P0, e.g., if the luma location of P0 is (P0x, P0y), then the top candidate B1 may be located at (P0x, P0y-1). The top right candidate B0 may be located directly above and to the right of P0, e.g., the top right candidate B0 may be at location (P0x+1, P0y-1). Other locations are possible, as would be apparent to one of ordinary skill in the art upon review of this disclosure in its entirety. Figure 3 illustrates Figure 2 with annotations indicating luma locations including the top left most luma location of the first region S0.
[0033] In some implementations, still referring to FIG. 3, when constructing a candidate list for region S0, if a geometric division exists, some potential candidates may be automatically marked as unavailable and removed from the candidate list because such division may be performed to divide regions (or objects) in a frame with different motion information. Thus, it may be inferred that blocks associated with those candidates are likely to represent different objects with different motion, and therefore these candidates may be automatically marked as unavailable (e.g., not considered further, removed from the candidate list, etc.). In the example illustrated above with reference to FIG. 2, for region S0, bottom-left candidate A0 may be automatically marked as unavailable because region S0 may be likely to not share motion information with blocks located at bottom-left candidate A0. Similarly, for region S0, top-right candidate B0 may be automatically marked as unavailable because region S0 may be likely to not share motion information with blocks located at top-right candidate B0. In some implementations, by assessing the line segment P0P1 (or points P0, P1), for example by determining the slope of the line segment P0P1, extending the line segment into the bottom-left candidate A0 block and / or the top-right candidate B0 block, and determining whether the bottom-left candidate A0 and / or the top-right candidate B0 are on the same side of the extended line segment as the first region S0, it may be determined whether the bottom-left candidate A0 and / or the top-right candidate B0 are likely to share motion information.
[0034] FIG. 4 is a diagram illustrating non-limiting example positions of potential spatial motion vector candidates for a second region (region S1) of an exemplary current block 400 divided according to a geometric division. The potential spatial motion vector candidates may be considered to build a motion vector candidate list during AMVP mode or merge mode. The current block 400 may be divided into three regions S0, S1, and S2 by straight lines between points P0 and P1 and between points P2 and P3, respectively. Each of the regions S0, S1, and S2 may be predicted unidirectionally or bidirectionally. Non-limiting examples of spatial candidates for the second region (region S1) are illustrated in FIG. 4 and include a bottom-left candidate A0, a left candidate A1, a top-left candidate B2, a top candidate B1, and a top-right candidate B0.
[0035] As illustrated, with continued reference to FIG. 4, each location (A0, A1, B2, B1, and B0) may represent a block at the respective location. For example, the top-left candidate B2 may be a block that exists at a luma location immediately to the left and above the top-left most location of region S1, e.g., if the top-left corner luma location of S1 is adjacent to P0 with luma location coordinates (P0x+1, P0y), the top-left candidate B2 may exist at location (P0x, P0y-1). The bottom-left candidate A0 may be located immediately below the bottom-left most location of the third region (region S2), e.g., if the bottom-left most location of the third region (region S2) is located at (0, N-1), the bottom-left candidate A0 may exist at location (0, N). The left candidate A1 may be located immediately to the left of the bottom-left most location of the third region (region S2), e.g., the left candidate A1 may exist at location (0, N-1). The top candidate B1 may be located directly above the top right most location of region S1, e.g., if the top right most location of region S1 is located at (M-1,0), then B1 may be at location (M-1,-1). The top right candidate B0 may be located directly above and to the right of the top right most location of region S1, e.g., the top right candidate B0 may be at location (M,-1). Figure 5 illustrates Figure 4 with annotations showing luma locations including the bottom left most luma location of the third region S2 and the top right most luma location of the second region S1.
[0036] In some implementations, still referring to FIG. 5, when constructing a candidate list for region S1, if a geometric division exists, some potential candidates may be automatically marked as unavailable and removed from the candidate list because such division may be performed to divide regions (or objects) in the frame with different motion information. Thus, it may be inferred that blocks associated with those candidates are likely to represent another object with different motion, and therefore these candidates may be automatically marked as unavailable (e.g., not considered further, removed from the candidate list, etc.). In the non-limiting example illustrated above with reference to FIG. 4, for region S1, top-left candidate B2 may be automatically marked as unavailable because region S1 may likely not share motion information with blocks located in top-left candidate B2. Similarly, in some implementations, for region S1, left candidate A1 may be automatically marked as unavailable because region S1 may likely not share motion information with blocks located in left candidate A1, which may be a third region S2. Similarly, in some implementations, with respect to region S1, the bottom-left candidate A0 may be automatically marked as unavailable because region S1 is likely to not share motion information with a block located in the bottom-left candidate A0, which may be below a third region S2.
[0037] FIG. 6 is a diagram illustrating exemplary locations of potential spatial motion vector candidates for a third region (region S2) of an exemplary current block 600 divided according to a geometric division. The potential spatial motion vector candidates may be considered to build a motion vector candidate list during AMVP mode or merge mode. The current block 600 may be divided into three regions S0, S1, and S2 by straight lines between points P0 and P1, and between points P2 and P3, respectively. Each of the regions S0, S1, and S2 may be predicted unidirectionally or bidirectionally. Non-limiting examples of spatial candidates for the third region (region S2) are illustrated in FIG. 6 and may include a bottom-left candidate A0, a left candidate A1, a top-left candidate B2, a top candidate B1, and a top-right candidate B0.
[0038] As illustrated, with continued reference to FIG. 6, each location (A0, A1, B2, B1, and B0) may represent a block at the respective location. For example, the top-left candidate may be a block that resides in a luma location above and to the left of region S2, e.g., top-left candidate B2 may be the first region S0. If S0 is located at (0,0), then top-left candidate B2 may be located at (0,0). Bottom-left candidate A0 may be located immediately to the left and directly below the bottom-left most location of region S2, e.g., if the bottom-left most location of region S2 is located at (0,N-1), then bottom-left candidate A0 may reside at (-1,N). Left candidate A1 may be located immediately to the left of the bottom-left most location of region S2, e.g., left candidate A1 may reside at (-1,N-1). The top candidate B1 may be located above and to the left of region S2 and may be adjacent to point P1, for example, if P1 is located at (P1x, P1y), the top candidate B1 may be located at (P1x-1, P1y). The top right candidate B0 may be a block residing in a luma location that is above and to the right of region S2, for example, the top right candidate B0 may be the second region S1. For example, the top right candidate may be located at the top right most location of S1, which may be at (M-1,0). Figure 7 illustrates Figure 6 with annotations showing luma locations including the bottom left most luma location of the third region S2 and the top right most luma location of the second region S1.
[0039] In some implementations, still referring to FIG. 7, when constructing a candidate list for region S2, if a geometric division exists, some potential candidates may be automatically marked as unavailable and removed from the candidate list because such division may be performed to divide regions (or objects) in the frame with different motion information. Thus, it may be inferred that blocks associated with those candidates are likely to represent another object with different motion, and thus, these candidates may be automatically marked as unavailable (e.g., not considered further, removed from the candidate list, etc.). In the non-limiting example provided above in FIG. 6, for region S2, the top-left candidate B2 may be automatically marked as unavailable because region S2 is likely to not share motion information with blocks located in the top-left candidate B2 (e.g., S0). Similarly, in some implementations, for region S2, the top-right candidate A0 may be automatically marked as unavailable because region S2 is likely to not share motion information with blocks located in the left candidate B0, which may be the second region S1. Similarly, in some implementations, with respect to region S2, the top candidate B1 may be automatically marked as unavailable because region S2 is likely to not share motion information with the block located in the top candidate B1 to the left of the first region S0.
[0040] FIG. 8 is a system block diagram illustrating an example video encoder 800 capable of encoding video using inter prediction with geometric partitioning with an adaptive number of regions. The example video encoder 800 receives an input video 805, which may first be segmented or divided according to a processing scheme such as a tree-structured macroblock partitioning scheme (e.g., a quad tree plus a binary tree). An example of a tree-structured macroblock partitioning scheme may include dividing a picture frame into large block elements called coding tree units (CTUs). In some implementations, each CTU may be further divided one or more times into several sub-blocks called coding units (CUs). The end result of this division may include a group of sub-blocks that may be called prediction units (PUs). Transform units (TUs) may also be utilized. Such a partitioning scheme may include implementing a geometric partitioning with an adaptive number of regions in accordance with some aspects of the present subject matter.
[0041] Continuing to refer to FIG. 8, the exemplary video encoder 800 may include an intra-prediction processor 815, a motion estimation / compensation processor 820 (also referred to as an inter-prediction processor) capable of supporting geometric partitioning with an adaptive number of regions, including AMVP and merge modes, a transform / quantization processor 825, an inverse quantization / inverse transform processor 830, an in-loop filter 835, a decoded picture buffer 840, and an entropy coding processor 845. In some implementations, the motion estimation / compensation processor 820 may perform geometric partitioning with an adaptive number of regions, including the use of AMVP and merge modes. Bitstream parameters signaling the geometric partitioning mode, AMVP mode, and merge mode may be input to the entropy coding processor 845 for inclusion in the output bitstream 850.
[0042] In operation, and continuing to refer to Figure 8, for each block of a frame of the input video 805, it may be determined whether the block should be processed via intra-picture prediction or using motion estimation / compensation. The block may be provided to an intra-prediction processor 810 or a motion estimation / compensation processor 820. If the block is to be processed via intra-prediction, the intra-prediction processor 810 may perform processing and output a predictor. If the block is to be processed via motion estimation / compensation, the motion estimation / compensation processor 820 may perform processing including the use of geometric partitioning with AMVP mode and merge mode and output a predictor.
[0043] Continuing with reference to Figure 8, a residual may be formed by subtracting a predictor from the input video. The residual may be received by a transform / quantization processor 825, which may perform a transform process (e.g., a discrete cosine transform (DCT)) to generate coefficients, which may be quantized. The quantized coefficients and any associated signaling information may be provided to an entropy coding processor 845 for entropy encoding and inclusion in the output bitstream 850. The entropy encoding processor 845 may support encoding of signaling information related to geometric partitioning mode, AMVP mode, and merge mode. In addition, the quantized coefficients may be provided to the inverse quantization / inverse transform processor 830, which may reconstruct the pixels, which may be combined with a predictor and processed by an in-loop filter 835, the output of which may be stored in the decoded picture buffer 840 for use by the motion estimation / compensation processor 820, which is capable of supporting geometric partitioning, AMVP, and merge modes.
[0044] 9 is a process flow diagram illustrating an example process 300 for encoding video using geometric partitioning inter prediction according to some aspects of the present subject matter, which may reduce encoding complexity while increasing compression efficiency. At step 910, a video frame may undergo initial block segmentation using, for example, a tree-structured macroblock partitioning scheme, which may include partitioning a picture frame into CTUs and CUs. At step 920, a block may be selected for geometric partitioning with an adaptive number of regions. The selection may include identifying, according to a metric rule, that the block should be processed according to a geometric partitioning mode.
[0045] At step 930, with continued reference to Figure 9, a geometric division involving three or more regions may be determined. At least two line segments may be determined that separate the pixels contained within the block into three or more regions (e.g., Region 0, Region 1, and Region 2) according to their inter-frame motion such that the pixels (e.g., luma samples) within each of the respective regions have similar motion and may differ from the motion of pixels in other regions (e.g., Region 1).
[0046] Continuing with reference to FIG. 9, at step 940, the motion information of each region may be determined and processed using AMVP mode or merge mode. When processing a region using AMVP mode, a candidate list may be constructed by considering both spatial and temporal candidates, which may include spatial candidates as described above, which may include marking some candidates as unavailable. A motion vector may be selected from the list of motion vector candidates as a motion vector prediction, and a motion vector difference (e.g., residual) may be calculated. An index into the candidate list may be determined. In merge mode, a candidate list may be constructed by considering both spatial and temporal candidates, which may include spatial candidates as described above, which may include marking some candidates as unavailable. A motion vector may be selected from the list of motion vector candidates for a region to adopt the motion information of another block. An index into the candidate list may be determined.
[0047] At step 950, with continued reference to FIG. 9, the determined geometric partition and motion information may be signaled in the bitstream. Signaling the geometric partition in the bitstream may include, for example, including the locations of P0, P1, P2, P3, indices to one or more predefined templates, and the like. Signaling the motion information when processing a region using AMVP may include including motion vector differences (e.g., residuals) and indices to motion vector candidates in the bitstream. Signaling the motion information when processing a region using merge mode may include including indices to motion vector candidates in the bitstream.
[0048] FIG. 10 is a system block diagram illustrating an example decoder 1000 capable of decoding a bitstream 1070 using inter prediction and geometric partitioning with an adaptive number of regions, which may improve complexity and processing performance for video encoding and decoding. The decoder 1000 may include an entropy decoder processor 1010, an inverse quantization and inverse transform processor 1020, a deblocking filter 1030, a frame buffer 1040, a motion compensation processor 1050, and an intra prediction processor 1060. In some implementations, the bitstream 1070 may include parameters signaling a geometric partitioning mode, an AMVP mode, and / or a merge mode. The motion compensation processor 1050 may reconstruct pixel information using the geometric partitioning as described herein.
[0049] In operation, with continued reference to FIG. 10, a bitstream 1070 may be received by the decoder 1000 and input to the entropy decoder processor 1010, which may entropy decode the bitstream into quantized coefficients. The quantized coefficients may be provided to the inverse quantization and inverse transform processor 1020, which may perform inverse quantization and inverse transform to create a residual signal. The residual signal may be added to the output of the motion compensation processor 1050 or the intra prediction processor 1060, depending on the processing mode. The output of the motion compensation processor 1050 and the intra prediction processor 1060 may include block predictions based on previously decoded blocks. The sum of the predictions and residuals may be processed by the deblocking filter 1030 and stored in the frame buffer 1040. For a given block (e.g., a CU or PU), when the bitstream 1070 signals that the partitioning mode is geometric partitioning, the motion compensation processor 1050 may construct a prediction based on the geometric partitioning approach described herein.
[0050] FIG. 11 is a process flow diagram illustrating an example process 1100 for decoding a bitstream using inter prediction in a geometric partition with an adaptive number of regions, which may improve complexity and processing performance for video encoding and decoding. At step 1110, a bitstream that may include a current block (e.g., CTU, CU, PU) is received. The receiving may include extracting and / or parsing the current block and associated signaling information from the bitstream. The decoder may extract or determine one or more parameters that characterize the geometric partition. These parameters may include, for example, indices of start and end points of line segments (e.g., P0, P1, P2, P3). The extracting or determining may include identifying and retrieving the parameters from the bitstream (e.g., parsing the bitstream).
[0051] At step 1120, with continued reference to FIG. 11, a first region, a second region, and a third region of the current block may be determined according to a geometric partition mode. The determining may include determining whether the geometric partition mode is enabled (e.g., true) for the current block. If the geometric partition mode is not enabled (e.g., false), the decoder may process the block using an alternate partition mode. If the geometric partition mode is enabled (e.g., true), more than two regions may be determined and / or processed.
[0052] At step 1130, with continued reference to FIG. 11, a motion vector associated with a region among the first region, the second region, and the third region may be determined. Determining the motion vector may include determining whether the motion information of the region should be determined using the AMVP mode or the merge mode. When processing the region using the AMVP mode, a candidate list may be constructed by considering both spatial and temporal candidates, which may include the spatial candidates described above, which may include marking some candidates as unavailable. A motion vector may be selected from the list of motion vector candidates as a motion vector prediction, and a motion vector difference (e.g., residual) may be calculated. In the merge mode, determining may include constructing a candidate list of spatial and temporal candidates for each region. Constructing the candidate list may include automatically marking the candidates as unavailable and removing the unavailable candidates from the candidate list. An index into the constructed candidate list may be parsed from the bitstream and used to select a final candidate from the candidate list. The motion information for the current region may be determined to be identical to the motion information of the final candidate (eg, the motion vector for the region may be taken from the final candidate).
[0053] Continuing to refer to FIG. 11, in step 1140, the current block may be decoded using the determined motion vector.
[0054] Although some variations have been described in detail above, other modifications or additions are possible. For example, the geometric partitioning may be signaled in the bitstream based on a rate-distortion decision at the encoder. The coding may be based on a combination of regular predefined partitioning (e.g., templates), temporal and spatial prediction of the partitioning, and / or additive offsets. Each geometrically partitioned region may utilize motion-compensated prediction or intra-prediction. The boundaries of the predicted regions may be smoothed before the residual is added.
[0055] In some implementations, a quad-tree plus binary decision tree (QTBT) may be implemented, where at the coding tree unit level, the splitting parameters of the QTBT may be dynamically derived to adapt to local characteristics without transmitting any overhead. Subsequently, at the coding unit level, a joint classifier decision tree structure may eliminate unnecessary iterations and control the risk of erroneous prediction. In some implementations, a geometric split with an adaptive number of regions may be available as an additional splitting option available at all leaf nodes of the QTBT.
[0056] In some implementations, the decoder includes a partitioning processor, which may generate a geometric partitioning for the current block and provide all partition-related information for the subordinate processes. The partitioning processor may directly affect motion compensation, since motion compensation may be performed on a segment-by-segment basis when the block is geometrically partitioned. Additionally, the partitioning processor may provide shape information to the intra-prediction processor and the transform coding processor.
[0057] In some implementations, additional syntax elements may be signaled at different hierarchical levels of the bitstream. An enable flag may be coded in a sequence parameter set (SPS) to enable geometric partitioning with an adaptive number of regions for the entire sequence. In addition, a CTU flag may be coded at a coding tree unit (CTU) level to indicate whether any coding unit (CU) uses geometric partitioning with an adaptive number of regions. A CU flag may be coded to indicate whether the current coding unit utilizes geometric partitioning with an adaptive number of regions. Parameters defining line segments on a block may be coded. For each region, a flag may be decoded that may specify whether the current region is inter-predicted or intra-predicted.
[0058] In some implementations, a minimum region size can be defined.
[0059] The subject matter described herein provides many technical advantages. For example, some implementations of the present subject matter can provide block partitioning that reduces complexity while increasing compression efficiency. In some implementations, blocking artifacts at object boundaries can be reduced.
[0060] It should be noted that any one or more of the aspects and embodiments described herein may be conveniently implemented using digital electronic circuitry, integrated circuits, specially designed application specific integrated circuits (ASICs), field programmable gate array (FPGA) computer hardware, firmware, software, and / or combinations thereof, realized and / or implemented in one or more machines programmed according to the teachings herein (e.g., one or more computing devices utilized as user computing devices for electronic documents, one or more server devices such as document servers, etc.), as would be apparent to one skilled in the computer arts. These various aspects or features may include implementation in one or more computer programs and / or software executable and / or readable on a programmable system including at least one programmable processor, which may be dedicated or general purpose, coupled to receive data and instructions from and transmit data and instructions to a storage system, at least one input device, and at least one output device. Appropriate software coding may be readily prepared by skilled programmers based on the teachings of the present disclosure, as would be apparent to one skilled in the software arts. The aspects and implementations discussed above that employ software and / or software modules may also include suitable hardware to assist in implementing the machine-executable instructions of the software and / or software modules.
[0061] Such software may be a computer program product employing a machine-readable storage medium. A machine-readable storage medium may be any medium capable of storing and / or encoding a sequence of instructions for execution by a machine (e.g., a computing device) and causing the machine to perform any one of the methods and / or embodiments described herein. Examples of machine-readable storage media include, but are not limited to, magnetic disks, optical disks (e.g., CDs, CD-Rs, DVDs, DVD-Rs, etc.), magneto-optical disks, read-only memory "ROM" devices, random access memory "RAM" devices, magnetic cards, optical cards, solid-state memory devices, EPROMs, EEPROMs, programmable logic devices (PLDs), and / or any combination thereof. Machine-readable media, as used herein, is intended to include a single medium as well as a collection of physically separate media, such as, for example, a collection of compact discs or one or more hard disk drives in combination with a computer memory. As used herein, machine-readable storage media does not include a transitory form of signal transmission.
[0062] Such software may also include information (e.g., data) carried as a data signal on a data carrier, such as a carrier wave. For example, machine-executable information may be included as a data carrying signal embodied in a data carrier, which signal encodes a sequence of instructions, or a portion thereof, for execution by a machine (e.g., a computing device), as well as any associated information (e.g., data structures and data) that causes the machine to perform any one of the methods and / or embodiments described herein.
[0063] Examples of computing devices include, but are not limited to, e-book reading devices, computer workstations, terminal computers, server computers, handheld devices (e.g., tablet computers, smart phones, etc.), web appliances, network routers, network switches, network bridges, any machine capable of executing a sequence of instructions that define actions to be taken by the machine, and any combination thereof. In one example, a computing device may include and / or be included within a kiosk.
[0064] 12 shows a diagrammatic representation of one embodiment of a computing device as an exemplary form of a computer system 1200 on which a set of instructions for causing a control system to perform any one or more of the aspects and / or methods of the present disclosure may be executed. It is also contemplated that multiple computing devices may be utilized to implement a set of instructions specifically configured to cause one or more of the devices to perform any one or more of the aspects and / or methods of the present disclosure. The computer system 1200 includes a processor 1204 and a memory 1208, which communicate with each other and with other components via a bus 1212. The bus 1212 may include any of several types of bus structures, including, but not limited to, a memory bus, a memory controller, a peripheral bus, a local bus, and any combination thereof using any of a variety of bus architectures.
[0065] Memory 1208 may include a variety of components (e.g., machine-readable media), including, but not limited to, random access memory components, read-only components, and any combination thereof. In one example, a basic input / output system 1216 (BIOS), containing the basic routines that help to transfer information between elements within computer system 1200, such as during start-up, may be stored in memory 1208. Memory 1208 may also include (e.g., stored on one or more machine-readable media) instructions (e.g., software) 1220 that embody any one or more of the aspects and / or methods of the present disclosure. In another example, memory 1208 may further include any number of program modules, including, but not limited to, an operating system, one or more application programs, other program modules, program data, and any combination thereof.
[0066] Computer system 1200 may also include a storage device(s) 1224. Examples of storage devices (e.g., storage device(s) 1224) include, but are not limited to, hard disk drives, magnetic disk drives, optical disk drives combined with optical media, solid-state memory devices, and any combination thereof. Storage device(s) 1224 may be connected to bus 1212 by an appropriate interface (not shown). Exemplary interfaces include, but are not limited to, SCSI, Advanced Technology Attachment (ATA), Serial ATA, Universal Serial Bus (USB), IEEE 1394 (FIREWIRE®), and any combination thereof. In one example, storage device 1224 (or one or more components thereof) may be removably interfaced with computer system 1200 (e.g., via an external port connector (not shown)). In particular, storage device 1224 and associated machine-readable media 1228 may provide non-volatile and / or volatile storage of machine-readable instructions, data structures, program modules, and / or other data for computer system 1200. In one example, the software 1220 may reside, completely or partially, within the machine-readable medium 1228. In another example, the software 1220 may reside, completely or partially, within the processor 1204.
[0067] Computer system 1200 may also include input devices 1232. In one example, a user of computer system 1200 may type commands and / or other information into computer system 1200 via input devices 1232. Examples of input devices 1232 include, but are not limited to, alphanumeric input devices (e.g., keyboards), pointing devices, joysticks, gamepads, audio input devices (e.g., microphones, voice response systems, etc.), cursor control devices (e.g., mice), touchpads, optical scanners, video capture devices (e.g., still cameras, video cameras), touch screens, and any combination thereof. Input devices 1232 may be interfaced to bus 1212 via any of a variety of interfaces (not shown), including, but not limited to, a serial interface, a parallel interface, a game port, a USB interface, a FIREWIRE® interface, an interface directly to bus 1212, and any combination thereof. Input devices 1232 may include a touchscreen interface, which may be part of or separate from display 1236, discussed further below. The input device 1232 may be utilized as a user selection device for selecting one or more graphical representations in a graphical interface as described above.
[0068] A user may also input commands and / or other information to computer system 1200 via storage device 1224 (e.g., removable disk drive, flash drive, etc.) and / or network interface device 1240. A network interface device, such as network interface device 1240, may be utilized to connect computer system 1200 to one or more of a variety of networks, such as network 1244, and one or more remote devices 1248 connected thereto. Examples of network interface devices include, but are not limited to, a network interface card (e.g., a mobile network interface card, a LAN card), a modem, and any combination thereof. Examples of networks include, but are not limited to, a wide area network (e.g., the Internet, a corporate network), a local area network (e.g., a network associated with an office, building, campus, or other relatively small geographic space), a telephone network, a data network associated with a telephone / voice provider (e.g., a data and / or voice network of a mobile communications provider), a direct connection between two computing devices, and any combination thereof. A network, such as network 1244, may employ wired and / or wireless modes of communication. In general, any network topology may be used. Information (eg, data, software 1220 , etc.) may be communicated to and / or from computer system 1200 via network interface device(s) 1240 .
[0069] The computer system 1200 may further include a video display adapter 1252 for communicating images displayable on a display device, such as the display device 1236. Examples of display devices include, but are not limited to, a liquid crystal display (LCD), a cathode ray tube (CRT), a plasma display, a light emitting diode (LED) display, and any combination thereof. The display adapter 1252 and the display device 1236 may be utilized in combination with the processor 1204 to provide graphical representations of aspects of the disclosure. In addition to a display device, the computer system 1200 may include one or more other peripheral output devices, including, but not limited to, audio speakers, a printer, and any combination thereof. Such peripheral output devices may be connected to the bus 1212 via a peripheral interface 1256. Examples of peripheral interfaces include, but are not limited to, a serial port, a USB connection, a FIREWIRE® connection, a parallel connection, and any combination thereof.
[0070] The foregoing is a detailed description of exemplary embodiments of the present invention. Various modifications and additions may be made without departing from the spirit and scope of the present invention. The features of each of the various embodiments described above may be combined with features of other described embodiments as appropriate to provide a combination of features in a related new embodiment. Furthermore, while the foregoing describes several separate embodiments, what is described herein is merely illustrative of the application of the principles of the present invention. In addition, although certain methods herein may be illustrated and / or described as being performed in a specific order, the order may be varied considerably within ordinary skill in order to achieve the embodiments as disclosed herein. Thus, this description is intended to be taken only as an example, and is not intended to otherwise limit the scope of the present invention.
[0071] In the above description and in the claims, phrases such as "at least one of" or "one or more of" may occur followed by a conjunctive enumeration of elements or features. The term "and / or" may also occur within a list of two or more elements or features. Unless otherwise implied or explicitly contradicted by the context in which such a phrase is used, this is intended to mean any of the elements or features listed individually or in combination with any of the other listed elements or features. For example, the phrases "at least one of A and B," "one or more of A and B," and "A and / or B" are each intended to mean "A only, B only, or both A and B." A similar interpretation is intended with respect to lists containing more than two items. For example, the phrases "at least one of A, B, and C," "one or more of A, B, and C," and "A, B, and / or C" are each intended to mean "A only, B only, C only, both A and B, both A and C, both B and C, or both A, B and C." Additionally, use of the term "based on" above and in the claims is intended to mean "based at least on," such that unrecited features or elements are also allowed.
[0072] The subject matter described herein may be embodied as a system, an apparatus, a method, and / or an article, depending on the desired configuration. The implementations described in the foregoing description do not represent all implementations consistent with the subject matter described herein. Instead, they are merely some examples consistent with aspects related to the subject matter described. Although some variations have been described in detail above, other modifications or additions are possible. In particular, further features and / or variations may be provided in addition to those described herein. For example, the implementations described above may be directed to various combinations and subcombinations of the disclosed features and / or combinations and subcombinations of some further features disclosed above. In addition, the logic flow depicted in the accompanying figures and / or described herein does not necessarily require the particular order or sequential order shown to achieve the desired results. Other implementations may be within the scope of the following claims.
Claims
1. 10. A decoder, the decoder comprising a circuit, the circuit comprising: receiving a bitstream, the bitstream including a current picture, the current picture including a current block of pixels with a plurality of partition boundaries, the plurality of partition boundaries being at least a first partition boundary dividing the current block into first and second non-rectangular regions, and a second partition boundary non-parallel to and intersecting the first partition boundary and dividing the second non-rectangular region of the current block, dividing the current block into three non-rectangular regions; determining a first predictor for use on a first side of the first partitioning boundary using a first motion vector selected from a first list of motion vector candidates; determining a second predictor for use on a second side of the first partitioning boundary using a second motion vector selected from a second list of motion vector candidates; determining a third predictor for use on one side of the second partition boundary using a third motion vector selected from a third list of candidate motion vectors; decoding the current block using the first predictor, the second predictor, and the third predictor, the decoding comprising: smoothing the first predictor and the second predictor across the first split boundary; adding residual pixel values to the first predictor, the second predictor, and the third predictor; and A decoder configured to:
2. The decoder of claim 1 , wherein the current block is a coding tree unit.
3. an entropy decoder processor configured to receive the bitstream and decode the bitstream into quantized coefficients; an inverse quantization and inverse transform processor configured to process the quantized coefficients, including performing an inverse discrete cosine transform; A deblocking filter; A frame buffer; Intra prediction processor The decoder of claim 1 further comprising:
4. 1. A method, comprising: a decoder receiving a bitstream, the bitstream including a current picture, the current picture including a current block of pixels with a plurality of partition boundaries, the plurality of partition boundaries including at least a first partition boundary dividing the current block into first and second non-rectangular regions, and a second partition boundary non-parallel to and intersecting the first partition boundary and dividing the second non-rectangular region of the current block, dividing the current block into three non-rectangular regions; the decoder determining a first predictor for use on a first side of the first partitioning boundary using a first motion vector selected from a first list of motion vector candidates; the decoder determining a second predictor for use on a second side of the first partitioning boundary using a second motion vector selected from a second list of motion vector candidates; the decoder determining a third predictor for use on one side of the second partition boundary using a third motion vector selected from a third list of candidate motion vectors; the decoder decoding the current block using the first predictor, the second predictor, and the third predictor, the decoding comprising: smoothing the first predictor and the second predictor across the first split boundary; adding residual pixel values to the first predictor, the second predictor, and the third predictor; and A method comprising:
5. The method of claim 4 , wherein the current block is a coding tree unit.
6. The decoder comprises: an entropy decoder processor configured to receive the bitstream and decode the bitstream into quantized coefficients; an inverse quantization and inverse transform processor configured to process the quantized coefficients, including performing an inverse discrete cosine transform; A deblocking filter; A frame buffer; Intra prediction processor The method of claim 4 further comprising:
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