Quantum couplers make it easy to suppress the ZZ interaction between qubits

Abstract

A device and / or computer-implemented method for facilitating ZZ-abortion between qubits is provided. According to one embodiment, the device can include a coupler device operating in a first vibrational mode and a second vibrational mode. The device can further include a first superconducting qubit coupled to the coupler device based on a first vibrational mode structure corresponding to the first vibrational mode and a second vibrational mode structure corresponding to the second vibrational mode. The device can further include a second superconducting qubit coupled to the coupler device based on the first vibrational mode structure and the second vibrational mode structure.

Description

Technical Field

[0001] The present disclosure relates to quantum couplers, and more particularly to quantum couplers that facilitate suppression of ZZ interactions between qubits (qubits).

Background Art

[0002] Qubits coupled via a bus have residual interactions with each other even in the absence of an external drive (e.g., an external microwave pulse, a magnetic field, etc.). These residual interactions, known as ZZ interactions, can cause the frequency of a qubit to depend on the state of its neighboring qubit, and can potentially inhibit the fidelity of quantum operations.

[0003] In some prior arts, two-junction qubits are used to enable tunable coupling to a readout resonator and as a way to encode multiple qubits within a single circuit. A problem associated with such prior arts is that such prior arts do not use two-junction qubits as fixed-frequency couplers between two transmon qubits. Other prior arts have demonstrated flux-tunable couplers, but a problem with such prior arts is that such prior arts utilize only flux-tunable transmon qubits.

Summary of the Invention

[0004] To provide a basic understanding of one or more embodiments of the present invention, a summary is presented below. This summary is not intended to identify key or essential elements nor to delineate any scope of particular embodiments or any scope of the claims. Its sole purpose is to present concepts in a simplified form as a prelude to the more detailed description that follows. In one or more embodiments described herein, a system, device, computer-implemented method, or computer program product, or a combination thereof, that facilitates ZZ cancellation between qubits is described.

[0005] According to one embodiment, the device can include a coupler device that operates in a first vibration mode and a second vibration mode. The device can further include a first superconducting qubit coupled to the coupler device based on a first vibration mode structure corresponding to the first vibration mode and a second vibration mode structure corresponding to the second vibration mode. The device can further include a second superconducting qubit coupled to the coupler device based on the first vibration mode structure and the second vibration mode structure. The advantages of such a device are that such a device can suppress the ZZ interaction between the first superconducting qubit and the second superconducting qubit, or can improve the speed of a quantum gate (e.g., an entangled quantum gate) including such qubits, or both.

[0006] In some embodiments, the first superconducting qubit and the second superconducting qubit have an equal exchange coupling with the first vibration mode structure and the second vibration mode structure based on the critical current of the coupler device, and the equal exchange coupling suppresses the ZZ interaction between the first superconducting qubit and the second superconducting qubit over a defined range of qubit frequencies, thereby facilitating at least one of a reduction in quantum gate errors associated with at least one of the first superconducting qubit or the second superconducting qubit, an increase in the speed of a quantum gate including the first superconducting qubit and the second superconducting qubit, or an improvement in the fidelity, accuracy, or performance of a quantum processor including the device. The advantages of such a device are that such a device can enable the development of logical qubits or scalable quantum computers or both.

[0007] According to another embodiment, a computer-implemented method can include generating an exchange coupling between a first superconducting qubit and a second superconducting qubit and a first vibrational mode structure and a second vibrational mode structure of a coupler device by a system operably coupled to a processor. The computer-implemented method can further include creating an entangled quantum gate between the first superconducting qubit and the second superconducting qubit by the system. Advantages of such a computer-implemented method are that implementing such a computer-implemented method can suppress the ZZ interaction between the first superconducting qubit and the second superconducting qubit, or can improve the speed of a quantum gate (e.g., an entangled quantum gate) including such qubits, or both.

[0008] In some embodiments, the above computer-implemented method can further include generating an equivalent exchange coupling between the first superconducting qubit and the second superconducting qubit and the first vibrational mode structure and the second vibrational mode structure by the system to suppress the ZZ interaction between the first superconducting qubit and the second superconducting qubit over a defined range of qubit frequencies, thereby facilitating at least one of a reduction in quantum gate error associated with at least one of the first superconducting qubit or the second superconducting qubit, an increase in speed of a quantum gate including the first superconducting qubit and the second superconducting qubit, or an improvement in fidelity, accuracy, or performance of a quantum processor including the coupler device, the first superconducting qubit, and the second superconducting qubit. Advantages of such a computer-implemented method are that implementing such a computer-implemented method can enable the development of logical qubits or scalable quantum computers or both.

[0009] According to another embodiment, the device can comprise a coupler device that operates in a first oscillation mode and a second oscillation mode that exhibit symmetric and antisymmetric combinations of excitations associated with the Josephson junctions of the coupler device and the flux controlled qubit device. The device can further comprise a first superconducting qubit coupled to the coupler device based on a first oscillation mode structure corresponding to the first oscillation mode and a second oscillation mode structure corresponding to the second oscillation mode. The device can further comprise a second superconducting qubit coupled to the coupler device based on the first oscillation mode structure and the second oscillation mode structure. The advantages of such a device are that such a device can suppress the ZZ interaction between the first superconducting qubit and the second superconducting qubit, or can improve the speed of a quantum gate (e.g., an entangled quantum gate) including such qubits, or both.

[0010] In some embodiments, the first superconducting qubit and the second superconducting qubit have an equivalent exchange coupling with the first oscillation mode structure and the second oscillation mode structure based on the critical current of the coupler device, and the equivalent exchange coupling suppresses the ZZ interaction between the first superconducting qubit and the second superconducting qubit over a defined range of qubit frequencies, thereby facilitating at least one of a reduction in quantum gate error associated with at least one of the first superconducting qubit or the second superconducting qubit, an increase in the speed of a quantum gate including the first superconducting qubit and the second superconducting qubit, or an improvement in the fidelity, accuracy, or performance of a quantum processor comprising the device. The advantages of such a device are that such a device can enable the development of logical qubits or scalable quantum computers or both.

[0011] According to another embodiment, the device can comprise a first superconducting qubit. The device can further comprise a second superconducting qubit. The device operates in a first oscillation mode and a second oscillation mode, and can further comprise a coupler device comprising a first superconducting pad coupled to the first superconducting qubit, a second superconducting pad coupled to the second superconducting qubit, and a third superconducting pad coupled to the first superconducting qubit. The advantages of such a device are that such a device can suppress the ZZ interaction between the first superconducting qubit and the second superconducting qubit, or can improve the speed of a quantum gate (e.g., a entangled quantum gate) including such qubits, or both.

[0012] In some embodiments, the first superconducting pad and the third superconducting pad are coupled to the first superconducting qubit based on a first oscillation mode structure corresponding to the first oscillation mode, and the second superconducting pad is coupled to the second superconducting qubit based on a second oscillation mode structure corresponding to the second oscillation mode, thereby reducing the direct exchange coupling between the first superconducting qubit and the second superconducting qubit and suppressing the ZZ interaction between the first superconducting qubit and the second superconducting qubit, thereby facilitating at least one of a reduction in quantum gate error associated with at least one of the first superconducting qubit or the second superconducting qubit, an increase in the speed of a quantum gate including the first superconducting qubit and the second superconducting qubit, or an improvement in the fidelity, accuracy, or performance of a quantum processor comprising the device. The advantages of such a device are that such a device can enable the development of logical qubits or scalable quantum computers or both.

[0013] According to another embodiment, a computer-implemented method can include coupling a first superconducting qubit to a first vibrational mode structure corresponding to a first vibrational mode of a coupler device by a system operatively coupled to a processor. The computer-implemented method can further include coupling a second superconducting qubit to a second vibrational mode structure corresponding to a second vibrational mode of the coupler device by the system. The computer-implemented method can further include detuning the coupler device from the first vibrational mode or the second vibrational mode by the system. The advantages of such a computer-implemented method are that implementing such a computer-implemented method can suppress the ZZ interaction between the first superconducting qubit and the second superconducting qubit, or can improve the speed of a quantum gate (e.g., an entangled quantum gate) including such qubits, or both.

[0014] In some embodiments, the above computer-implemented method can further include coupling the first superconducting qubit to the first vibrational mode structure and coupling the second superconducting qubit to the second vibrational mode structure by the system to reduce the direct exchange coupling between the first superconducting qubit and the second superconducting qubit, suppress the ZZ interaction between the first superconducting qubit and the second superconducting qubit, thereby facilitating at least one of reducing quantum gate errors associated with at least one of the first superconducting qubit or the second superconducting qubit, accelerating the quantum gate including the first superconducting qubit and the second superconducting qubit, or improving at least one of the fidelity, accuracy, or performance of a quantum processor including the coupler device, the first superconducting qubit, and the second superconducting qubit. The advantages of such a computer-implemented method are that implementing such a computer-implemented method can enable the development of logical qubits or scalable quantum computers or both. BRIEF DESCRIPTION OF THE DRAWINGS

[0015]

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Best Mode for Carrying Out the Invention

[0016] The following detailed description is merely exemplary and is not intended to limit embodiments, or the application or uses of embodiments, or both. Further, there is no intention to be bound by the explicit or implicit information presented in the foregoing background or summary of the invention sections or the best mode for carrying out the invention section.

[0017] Next, one or more embodiments will be described with reference to the drawings, and throughout, like reference numerals are used to refer to like elements. In the following description, numerous specific details are set forth for purposes of explanation to provide a more thorough understanding of one or more embodiments. However, it is apparent that in various instances, one or more embodiments may be practiced without these specific details.

[0018] Quantum computing generally involves using quantum mechanical phenomena for the purpose of performing computing and information processing functions. Quantum computing can generally be seen as contrasting with classical computing, which generally performs operations on binary values using transistors. That is, a classical computer can perform operations on bit values that are either 0 or 1, while a quantum computer performs operations on qubits (quantum bits) that include superpositions of both 0 and 1, can entangle multiple qubits, and uses interference.

[0019] Considering the above problems related to the prior art, an embodiment of the present disclosure provides a device or a computer-implemented method or both, which can create a solution to the above problems by using a device comprising a coupler device operating in a first oscillation mode and a second oscillation mode, a first superconducting qubit coupled to the coupler device based on a first oscillation mode structure corresponding to the first oscillation mode, and a second superconducting qubit coupled to the coupler device based on a second oscillation mode structure corresponding to the second oscillation mode, to facilitate ZZ quenching between qubits. The advantages of such a device or a computer-implemented method or both are that implementing them can suppress the ZZ interaction between the first superconducting qubit and the second superconducting qubit, or improve the speed of a quantum gate (e.g., an entangled quantum gate) including such qubits, or both.

[0020] In some embodiments, the present disclosure is implemented such that a first superconducting qubit and a second superconducting qubit have equivalent exchange coupling with a first vibrational mode structure and a second vibrational mode structure based on the critical current of a coupler device, and the equivalent exchange coupling suppresses the ZZ interaction between the first superconducting qubit and the second superconducting qubit over a defined range of qubit frequencies, thereby reducing quantum gate errors associated with at least one of the first superconducting qubit or the second superconducting qubit, accelerating quantum gates including the first superconducting qubit and the second superconducting qubit, or improving the fidelity, accuracy, or performance of a quantum processor comprising the above device, and a device or computer-implemented method or both forms thereof that can produce a solution to the above problems can be obtained. The advantages of such a device or computer-implemented method or both are that they can enable the development of logical qubits or scalable quantum computers or both.

[0021] When an element is referred to as being "coupled" to another element, it will be understood that it can represent one or more various types of couplings including, but not limited to, chemical bonds, communication bonds, electrical bonds, electromagnetic bonds, operational bonds, optical bonds, physical bonds, thermal bonds, or other types of bonds or combinations thereof. It will also be understood that the following terms referred to herein are defined as follows.

[0022] FIG. 1A shows a top view of an exemplary and non-limiting device 100a that can facilitate ZZ cancellation between qubits according to one or more embodiments described herein. FIG. 1B shows an exemplary and non-limiting circuit diagram 100b of device 100a.

[0023] Device 100a can include a semiconductor device, a superconducting device, or both, which can be implemented within a quantum device. For example, device 100a can include an integrated semiconductor circuit or an integrated superconducting circuit (e.g., a quantum circuit) that can be implemented within a quantum device such as, for example, quantum hardware, a quantum processor, a quantum computer, or another quantum device or combination thereof. Device 100a can include a semiconductor device, a superconducting device, or both, such as a quantum coupler device that can be implemented within a quantum device as defined above.

[0024] As illustrated by the exemplary embodiments shown in FIGS. 1A and 1B, device 100a can include a coupler device 102 (shown as a two-junction coupler in FIGS. 1A and 1B) that can couple to a first superconducting qubit 104a (shown as transmon 1 in FIGS. 1A and 1B) and a second superconducting qubit 104b (shown as transmon 2 in FIGS. 1A and 1B). The coupler device 102 illustrated in the exemplary embodiments shown in FIGS. 1A and 1B can include at least one of a two-junction qubit, a fixed-frequency coupler, a multi-mode two-junction coupler, a flux-tunable coupler, a tunable coupler qubit, a flux-tunable coupler qubit, a tunable qubit, a tunable bus, or a flux-tunable qubit bus.

[0025] The coupler device 102 illustrated in the exemplary embodiments shown in FIGS. 1A and 1B can include the first superconducting pad 106a, the second superconducting pad 106b, or the third superconducting pad 106c, or a combination thereof, and each of such superconducting pads can include a superconducting film (e.g., a superconducting metal film) formed on a substrate (e.g., a silicon (Si) substrate, etc.). The coupler device 102 illustrated in the exemplary embodiments shown in FIGS. 1A and 1B is coupled to the first superconducting pad 106a and the second superconducting pad 106b (E in FIG. 1B) J1the first Josephson junction 114a, or the second superconducting pad 106b and the third superconducting pad 106c coupled thereto (designated as E in FIG. 1B) J2 the second Josephson junction 114b, or both of them. In this exemplary embodiment, the first Josephson junction 114a or the second Josephson junction 114b or both of them can further include one or more superconducting films (e.g., superconducting metal films) or one or more non-superconducting films (e.g., normal metal films) or both of them formed on a substrate (e.g., a silicon (Si) substrate, etc.).

[0026] As illustrated in the exemplary embodiment shown in FIG. 1B, the first superconducting pad 106a and the second superconducting pad 106b of the coupler device 102 can be capacitively coupled to each other, and such capacitive coupling is represented by the first capacitor 122a (designated as C in FIG. 1B) in FIG. 1B. 1 As illustrated in the exemplary embodiment shown in FIG. 1B, the second superconducting pad 106b and the third superconducting pad 106c of the coupler device 102 can be capacitively coupled to each other, and such capacitive coupling is represented by the second capacitor 122b (designated as C in FIG. 1B) in FIG. 1B. 2 In the exemplary embodiment shown in FIG. 1B, the first capacitor 122a and the second capacitor 122b respectively represent DC capacitive shunts across the first Josephson junction 114a and the second Josephson junction 114b. In this exemplary embodiment, as illustrated in FIGS. 1A and 1B, the coupler device 102 can include two capacitively shunted Josephson junctions connected in series, namely the first Josephson junction 114a and the second Josephson junction 114b.

[0027] In the exemplary embodiment illustrated in FIGS. 1A and 1B, the coupler device 102 can operate in a first vibration mode and a second vibration mode (not shown). In one or more embodiments of the present disclosure described herein, the first vibration mode and the second vibration mode can correspond to different (e.g., distinct) frequencies or different (e.g., distinct) spatial symmetries or both. In these one or more embodiments, the first vibration mode and the second vibration mode can exhibit symmetric and antisymmetric combinations of excitations associated with the first Josephson junction 114a and the second Josephson junction 114b of the coupler device 102. In these one or more embodiments, such symmetric and antisymmetric combinations of excitations associated with the first Josephson junction 114a and the second Josephson junction 114b of the coupler device 102 can result from capacitive coupling between the first superconducting pad 106a and the third superconducting pad 106c, such capacitive coupling being represented as the third capacitor 122c in FIG. 1B (where it is labeled C S as shown in FIG. 1B).

[0028] In the exemplary embodiments shown in FIGS. 1A and 1B, the third capacitor 122c represents a capacitive coupling between the first superconducting pad 106a and the third superconducting pad 106c of the coupler device 102, and such capacitive coupling can, as described above, enable the creation of a first oscillation mode and a second oscillation mode having different frequencies and different spatial symmetries relative to each other. In this exemplary embodiment, such capacitive coupling, represented as the third capacitor 122c in FIG. 1B, can enable the first oscillation mode and the second oscillation mode to interact with each other, and otherwise such modes would be separated between the first Josephson junction 114a and the second Josephson junction 114b of the coupler device 102. In this exemplary embodiment, such interaction between the first oscillation mode and the second oscillation mode can enable the creation of an extended state (e.g., a hybridized quantum state, a hybridized oscillation mode, etc.) of the coupler device 102 (e.g., a hybridized quantum state or a hybridized oscillation mode or both corresponding to different frequencies and different spatial symmetries). In this exemplary embodiment, such capacitive coupling, represented as the third capacitor 122c in FIG. 1B, enables the fundamental mode of the coupler device 102 to extend symmetrically or antisymmetrically across the first Josephson junction 114a and the second Josephson junction 114b.

[0029] The first vibration mode and the second vibration mode can respectively correspond to a first vibration mode structure 116a (displayed as mode A in FIG. 1A) and a second vibration mode structure 116b (displayed as mode B in FIG. 1A). The first vibration mode structure 116a and the second vibration mode structure 116b can each define a specific coupling technique (e.g., coupling method, coupling configuration, coupling pattern, etc.) for coupling the first superconducting qubit 104a or the second superconducting qubit 104b or both to the first vibration mode or the second vibration mode or both of the coupler device 102 so that the first superconducting qubit 104a or the second superconducting qubit 104b or both can operate according to the first vibration mode or the second vibration mode or both of the coupler device 102.

[0030] In the exemplary embodiments illustrated in FIGS. 1A and 1B, the first superconducting qubit 104a or the second superconducting qubit 104b or both can include at least one of a transmon qubit, a fixed-frequency qubit, or a fixed-frequency transmon qubit. The first superconducting qubit 104a illustrated in the exemplary embodiments shown in FIGS. 1A and 1B can include the first superconducting pad 108a or the second superconducting pad 110a or both, and each of such superconducting pads can include a superconducting film (e.g., a superconducting metal film) formed on a substrate (e.g., a silicon (Si) substrate, etc.). The first superconducting qubit 104a illustrated in the exemplary embodiments shown in FIGS. 1A and 1B, the superconducting pads in FIGS. 1A and 1B are coupled to the first superconducting pad 108a and the second superconducting pad 110a (E in FIG. 1B) Jt1It can further include a Josephson junction 112a (displayed as). The second superconducting qubit 104b illustrated in the exemplary embodiments shown in FIGS. 1A and 1B can include the first superconducting pad 108b or the second superconducting pad 110b or both, and each of such superconducting pads can include a superconducting film (e.g., a superconducting metal film) formed on a substrate (e.g., a silicon (Si) substrate, etc.). The second superconducting qubit 104b illustrated in the exemplary embodiments shown in FIGS. 1A and 1B is coupled to the first superconducting pad 108b and the second superconducting pad 110b (in FIG. 1B, E Jt2 It can further include a Josephson junction 112b (displayed as). In this exemplary embodiment, the Josephson junction 112a of the first superconducting qubit 104a or the Josephson junction 112b of the second superconducting qubit 104b or both can each include one or more superconducting films (e.g., superconducting metal films) or one or more non-superconducting films (e.g., normal metal films) or both formed on a substrate (e.g., a silicon (Si) substrate, etc.).

[0031] As illustrated in the exemplary embodiment shown in FIG. 1B, the first superconducting pad 108a and the second superconducting pad 110a of the first superconducting qubit 104a can be capacitively coupled to each other, and such capacitive coupling is indicated by a capacitor 118a (displayed as C in FIG. 1B) in FIG. 1B. As illustrated in the exemplary embodiment shown in FIG. 1B, the first superconducting pad 108b and the second superconducting pad 110b of the second superconducting qubit 104b can be capacitively coupled to each other, and such capacitive coupling is indicated by a capacitor 118b (displayed as C in FIG. 1B) in FIG. 1B. t1 It is indicated by. As illustrated in the exemplary embodiment shown in FIG. 1B, the first superconducting pad 108b and the second superconducting pad 110b of the second superconducting qubit 104b can be capacitively coupled to each other, and such capacitive coupling is indicated by a capacitor 118b (displayed as C in FIG. 1B) in FIG. 1B. t2 It is indicated by the capacitor 118b (displayed as).

[0032] In the exemplary embodiments illustrated in FIGS. 1A and 1B, the first superconducting qubit 104a or the second superconducting qubit 104b or both can capacitively couple to the coupler device 102. For example, in one embodiment, the first superconducting pad 108a of the first superconducting qubit 104a and the first superconducting pad 108b of the second superconducting qubit 104b can each capacitively couple to the first superconducting pad 106a of the coupler device 102. As illustrated in the exemplary embodiment shown in FIG. 1B, the first superconducting pad 108a of the first superconducting qubit 104a and the first superconducting pad 106a of the coupler device 102 can capacitively couple to each other, and such capacitive coupling is represented by a capacitor 120a (labeled C c1 in FIG. 1B). As illustrated in the exemplary embodiment shown in FIG. 1B, the first superconducting pad 108b of the first superconducting qubit 104a and the first superconducting pad 106a of the coupler device 102 can capacitively couple to each other, and such capacitive coupling is represented by a capacitor 120b (labeled C c2 in FIG. 1B).

[0033] In various embodiments, the first superconducting qubit 104a can couple to the coupler device 102 based on (e.g., according to) the first vibration mode structure 116a and the second vibration mode structure 116b shown in FIG. 1A. In these embodiments, the second superconducting qubit 104b can also couple to the coupler device 102 based on (e.g., according to) the first vibration mode structure 116a and the second vibration mode structure 116b shown in FIG. 1A.

[0034] In various embodiments, an entity (e.g., a human, a computing device, a software application, an agent, a machine learning model, an artificial intelligence model, etc.) that manufactures or implements or both the device 100a can select one or more critical currents of the coupler device 102 (e.g., the critical current of the first Josephson junction 114a or the second Josephson junction 114b or both) such that the first superconducting qubit 104a and the second superconducting qubit 104b have an equivalent exchange coupling with the first vibration mode structure 116a and the second vibration mode structure 116b. For example, during the manufacture of the device 100a, such an entity as defined above can select one or more superconducting materials to form a coupler device 102 having a critical current that can enable such an equivalent exchange coupling between the first superconducting qubit 104a and the second superconducting qubit 104b and the first vibration mode structure 116a and the second vibration mode structure 116b. In another example, when implementing the device 100a, such an entity as defined above can adjust the magnetic field, current, potential, or microwave pulse or a combination thereof applied to the device 100a or the coupler device 102 or both (e.g., via one or more external devices or computers 1012 as described later) such that the first superconducting qubit 104a and the second superconducting qubit 104b have an equivalent exchange coupling with the first vibration mode structure 116a and the second vibration mode structure 116b.

[0035] In the above embodiment, the equivalent exchange coupling between the first superconducting qubit 104a and the second superconducting qubit 104b and the first vibration mode structure 116a and the second vibration mode structure 116b can result in a net suppression (e.g., reduction, termination, etc.) of the ZZ interaction (e.g., static ZZ interaction) between the first superconducting qubit 104a and the second superconducting qubit 104b over a defined range of qubit frequencies. For example, such equivalent exchange coupling can result in a net suppression of the ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b over a defined range of frequencies 202a corresponding to the first superconducting qubit 104a and a defined range of frequencies 202b corresponding to the second superconducting qubit 104b, as defined by region 202 and shown and described below with reference to FIG. 2. In various embodiments, such net suppression of the ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b can thereby facilitate at least one of a reduction in quantum gate error associated with the first superconducting qubit 104a and / or the second superconducting qubit 104b, an acceleration of quantum gates (e.g., entangled quantum gates) including the first superconducting qubit 104a and the second superconducting qubit 104b, and / or an improvement in the fidelity, accuracy, and / or performance of a quantum processor comprising device 100a.

[0036] In various embodiments, an entity implementing device 100a (e.g., a human, a computing device, a software application, an agent, a machine learning model, an artificial intelligence model, etc.) can further decohere the coupler device 102 from the first vibrational mode structure 116a or the second vibrational mode structure 116b, and thus from the first vibrational mode or the second vibrational mode, to entangle the first superconducting qubit 104a and the second superconducting qubit 104b (e.g., to create an entangled quantum gate between the first superconducting qubit 104a and the second superconducting qubit 104b). In these embodiments, such entanglement of the first superconducting qubit 104a and the second superconducting qubit 104b enables the execution of a quantum gate operation between the first superconducting qubit 104a and the second superconducting qubit 104b. For example, in these embodiments, based on decohering the coupler device 102 from the first vibrational mode structure 116a or the second vibrational mode structure 116b, and thus from the first vibrational mode or the second vibrational mode, device 100a or the coupler device 102 or both can operate as a resonator-induced phase (RIP) gate, whereby a ZZ interaction between a first qubit (e.g., the first superconducting qubit 104a) and a second qubit (e.g., the second superconducting qubit 104b) that exists when there is a microwave drive (e.g., a microwave signal) on the coupler device 102 (e.g., when there is a microwave signal applied to the coupler device 102) can be generated.

[0037] To facilitate such equivalent exchange coupling between the first superconducting qubit 104a and the second superconducting qubit 104b and the first vibration mode structure 116a and the second vibration mode structure 116b (e.g., to suppress the static ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b), or to facilitate such detuning of the coupler device 102 from the first vibration mode structure 116a and the second vibration mode structure 116b (e.g., to perform a quantum gate operation between the first superconducting qubit 104a and the second superconducting qubit 104b), or for both, in various embodiments, the device 100a, the coupler device 102, the first superconducting qubit 104a, or the second superconducting qubit 104b or a combination thereof can be coupled to an external device (not shown). For example, in these embodiments, the device 100a, the coupler device 102, the first superconducting qubit 104a, or the second superconducting qubit 104b or a combination thereof can be coupled to an external device that can be external to the device 100a, such as, for example, a pulse generator device, a power supply, or a magnetic field generator or a combination thereof.

[0038] In an exemplary embodiment, although not shown in FIGS. 1A or 1B, the device 100a, the coupler device 102, the first superconducting qubit 104a, or the second superconducting qubit 104b or a combination thereof can be external to the device 100a and can transmit or receive or both transmit and receive pulses (e.g., microwave pulses, microwave signals, control signals, etc.) between the device 100a, the coupler device 102, the first superconducting qubit 104a, or the second superconducting qubit 104b or a combination thereof, and can be coupled to a pulse generator device including, but not limited to, an arbitrary waveform generator (AWG), a vector network analyzer (VNA), or another pulse generator device or a combination thereof. In another exemplary embodiment, although not shown in FIGS. 1A or 1B, the device 100a, the coupler device 102, the first superconducting qubit 104a, or the second superconducting qubit 104b or a combination thereof can be external to the device 100a and can be coupled to a power supply or a magnetic field generator or both, which can provide a current, a potential, or a magnetic field or a combination thereof to the device 100a, the coupler device 102, the first superconducting qubit 104a, or the second superconducting qubit 104b or a combination thereof.

[0039] In the above exemplary embodiments, such an external device (e.g., a pulse generator device (e.g., an AWG, VNA, etc.), a power supply, or a magnetic field generator, or a combination thereof) can also be coupled to a computer (e.g., computer 1012 described below with reference to FIG. 10) comprising a memory (e.g., system memory 1016 described below with reference to FIG. 10) capable of storing instructions (e.g., software, routines, processing threads, etc.) and a processor (e.g., processing unit 1014 described below with reference to FIG. 10) capable of executing such instructions stored on the memory. In these exemplary embodiments, such a computer can be employed to operate and / or control such an external device (e.g., a pulse generator device (e.g., an AWG, VNA, etc.), a power supply, or a magnetic field generator, or a combination thereof) (e.g., via processing unit 1014 executing instructions stored in system memory 1016). For example, in these exemplary embodiments, such a computer can be employed to enable an external device (e.g., a pulse generator device (e.g., an AWG, VNA, etc.), a power supply, or a magnetic field generator, or a combination thereof) to a) transmit and / or receive a pulse (e.g., a microwave pulse, a microwave signal, a control signal, etc.) between the device 100a, the coupler device 102, the first superconducting qubit 104a, or the second superconducting qubit 104b or a combination thereof, or b) provide and / or enable a current, a potential, or a magnetic field or a combination thereof to the device 100a, the coupler device 102, the first superconducting qubit 104a, or the second superconducting qubit 104b or a combination thereof.

[0040] In the above-described embodiment, based on applying (e.g., via one or more of an external device or computer 1012 as defined herein, or both) a current, a potential, a microwave pulse (e.g., a microwave signal, a control signal, etc.), or a magnetic field or a combination thereof to the device 100a, the coupler device 102, the first superconducting qubit 104a, or the second superconducting qubit 104b or a combination thereof, the entity implementing the device 100a can thereby a) facilitate an equivalent exchange coupling between the first superconducting qubit 104a and the second superconducting qubit 104b and the first vibrational mode structure 116a and the second vibrational mode structure 116b (e.g., to suppress a static ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b), or b) detune the coupler device 102 from the first vibrational mode structure 116a and the second vibrational mode structure 116b (e.g., to perform a quantum gate operation between the first superconducting qubit 104a and the second superconducting qubit 104b), or both.

[0041] The manufacture of various embodiments of the present disclosure (e.g., devices 100a, 400a, 600a, etc.) described herein, illustrated in the figures, or both, can include multi-step sequences of photolithography processing steps, chemical processing steps, or both, which facilitate the step-by-step creation of electronic-based systems, devices, components, or circuits, or combinations thereof, in semiconductor devices or superconducting devices (e.g., integrated circuits), or both. For example, various embodiments of the present disclosure (e.g., devices 100a, 400a, 600a, etc.) described herein, illustrated in the figures, or both, can be manufactured on a substrate (e.g., a silicon (Si) substrate, etc.) by employing techniques including, but not limited to, photolithography, microlithography, nanolithography, nanoimprint lithography, photomasking techniques, patterning techniques, photoresist techniques (e.g., positive-tone photoresist, negative-tone photoresist, hybrid-tone photoresist, etc.), etching techniques (e.g., reactive ion etching (RIE), dry etching, wet etching, ion beam etching, plasma etching, laser ablation, etc.), deposition techniques, sputtering techniques, plasma ashing techniques, heat treatments (e.g., rapid thermal annealing, furnace annealing, thermal oxidation, etc.), chemical vapor deposition (CVD), atomic layer deposition (ALD), physical vapor deposition (PVD), molecular beam epitaxy (MBE), electrochemical deposition (ECD), chemical-mechanical planarization (CMP), backgrinding techniques, or other techniques for manufacturing integrated circuits, or combinations thereof.

[0042] The various embodiments of the present disclosure (e.g., devices 100a, 400a, 600a, etc.) described in this specification, illustrated in the figures, or both, can be manufactured using various materials. For example, the various embodiments of the present disclosure (e.g., devices 100a, 400a, 600a, etc.) described in this specification, illustrated in the figures, or both, can be made using conductive materials, semiconductor materials, superconducting materials, dielectric materials, polymer materials, organic materials, inorganic materials, non-conductive materials, or one or more other materials used in the above techniques for manufacturing integrated circuits, or a combination thereof, including but not limited to materials from one or more different material classes.

[0043] Figure 2 shows an exemplary and non-limiting graph 200 that can facilitate ZZ quenching between qubits according to one or more embodiments described herein. For the sake of brevity, repeated descriptions of similar elements or processes or both used in each embodiment are omitted.

[0044] Graph 200 can include result data obtained from implementing one or more embodiments of the present disclosure described herein. For example, graph 200 can include result data obtained from implementing device 100a (e.g., simulating, quantizing, etc.) according to one or more embodiments of the present disclosure described herein (e.g., computer-implemented methods 700, 800, or 900 or a combination thereof, described below with reference to FIGS. 7, 8, and 9 respectively).

[0045] Graph 200 can include a numerical simulation of the ZZ interaction (e.g., the static ZZ interaction denoted as EZZ in FIG. 2) between a first superconducting qubit 104a (displayed as transmon 1 in FIG. 2) and a second superconducting qubit 104b (displayed as transmon 2 in FIG. 2) as a function of the frequencies of the first superconducting qubit 104a and the second superconducting qubit 104b. As illustrated in an exemplary embodiment of the graph 200 shown in FIG. 2, the frequency of the first superconducting qubit 104a expressed in gigahertz (GHz) extends along the X-axis of the graph 200 (displayed as transmon 1 fq(GHz) in FIG. 2), the frequency of the second superconducting qubit 104b expressed in GHz extends along the Y-axis of the graph 200 (displayed as transmon 2 fq(GHz) in FIG. 2), and the ZZ interaction frequency, expressed in kilohertz (kHz) and denoted as Log10(ZZ(kHz)) in FIG. 2, is represented by the gray shading variation of the Z-axis of the graph 200 (e.g., the axis of the graph 200 extending in and out of the page) corresponding to the frequencies shown in the ZZ legend illustrated in FIG. 2.

[0046] As described with reference to the exemplary embodiments shown in FIGS. 1A and 1B, the equivalent exchange coupling between the first superconducting qubit 104a and the second superconducting qubit 104b and the first and second vibration mode structures can result in a net suppression (e.g., reduction, termination, etc.) of the ZZ interaction (e.g., static ZZ interaction) between the first superconducting qubit 104a and the second superconducting qubit 104b over a defined range of qubit frequencies. For example, referring to region 202 defined on graph 200 shown in FIG. 2, such equivalent exchange coupling can result in a net suppression of the ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b over a defined range of frequencies 202a (e.g., from about 5.15 GHz to about 5.95 GHz) corresponding to the first superconducting qubit 104a. In this example, referring to region 202 defined on graph 200 shown in FIG. 2, such equivalent exchange coupling can also result in a net suppression of the ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b over a defined range of frequencies 202b (e.g., from about 5.15 GHz to about 5.95 GHz) corresponding to the second superconducting qubit 104b.

[0047] FIG. 3A shows an exemplary and non-limiting graph 300a that can facilitate ZZ termination between qubits, according to one or more embodiments described herein. For the sake of brevity, repeated descriptions of similar elements or processes or both used in each embodiment are omitted.

[0048] Graph 300a can include result data obtained from implementing one or more embodiments of the present disclosure described herein. For example, graph 300a can include result data obtained from implementing device 100a (e.g., simulating, quantizing, etc.) according to one or more embodiments of the present disclosure described herein (e.g., computer-implemented method 700 or 900 or both, described below with reference to FIGS. 7 and 9, respectively).

[0049] Graph 300a can include an exemplary and non-limiting alternative embodiment of graph 200 described above with reference to FIG. 2. Graph 300a includes a numerical simulation of the ZZ interaction (e.g., the static ZZ interaction denoted as EZZ in FIG. 3A) between the first superconducting qubit 104a and the coupler device 102 (denoted as transmon 1 in FIG. 3A) as a function of the frequencies of the first superconducting qubit 104a and the second superconducting qubit 104b (denoted as transmon 2 in FIG. 3A). More specifically, graph 300a can include a numerical simulation of the ZZ interaction between the first superconducting qubit 104a and the coupler device 102, where the coupler device 102 operates in a second oscillation mode and the first superconducting qubit 104a is coupled to the coupler device 102 based on (e.g., according to) a second oscillation mode structure 116b corresponding to the second oscillation mode. As illustrated in the exemplary embodiment of graph 300a shown in FIG. 3A, the frequency of the first superconducting qubit 104a expressed in GHz extends along the X-axis of graph 300a (denoted as transmon 1 fq(GHz) in FIG. 3A), the frequency of the second superconducting qubit 104b expressed in GHz extends along the Y-axis of graph 300a (denoted as transmon 2 fq(GHz) in FIG. 3A), and the ZZ interaction frequency denoted as Log10(ZZ(kHz)) and expressed in kHz in FIG. 3A is represented by the change in the gray shading of the Z-axis of graph 300a (e.g., the axis of graph 300a extending in and out of the page) corresponding to the frequencies shown in the ZZ legend illustrated in FIG. 3A. As illustrated by the region 202 defined on graph 300a shown in FIG. 3A, the ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b is suppressed (e.g., relatively small, negligible, effectively terminated, etc.), while the ZZ interaction between the first superconducting qubit 104a and the coupler device 102 operating in the second oscillation mode is enhanced (e.g., relatively large, increasing, etc.).

[0050] FIG. 3B shows an exemplary and non-limiting graph 300b that can facilitate ZZ quenching between qubits according to one or more embodiments described herein. For the sake of brevity, repeated descriptions of similar elements or processes or both used in each embodiment are omitted.

[0051] Graph 300b can include result data obtained from implementing one or more embodiments of the present disclosure described herein. For example, graph 300b can include result data obtained from implementing device 100a according to one or more embodiments of the present disclosure described herein (e.g., computer-implemented methods 700, 800, or 900 or combinations thereof, described below with reference to FIGS. 7, 8, and 9, respectively) (e.g., simulating, quantizing, etc.).

[0052] Graph 300b can include an exemplary and non-limiting alternative embodiment of graph 300a described above with reference to FIG. 3A. Graph 300b can include a numerical simulation of the ZZ interaction (e.g., the static ZZ interaction denoted as EZZ in FIG. 3B) between the second superconducting qubit 104b (denoted as transmons 2 in FIG. 3A) and the coupler device 102 (denoted as the coupler B mode in FIG. 3B) as a function of the frequencies of the first superconducting qubit 104a and the second superconducting qubit 104b (denoted as transmons 2 in FIG. 3A). More specifically, graph 300b can include a numerical simulation of the ZZ interaction between the second superconducting qubit 104b and the coupler device 102, where the coupler device 102 operates in a second oscillation mode and the second superconducting qubit 104b is coupled to the coupler device 102 based on (e.g., in accordance with) a second oscillation mode structure 116b corresponding to the second oscillation mode. As illustrated in the exemplary embodiment of graph 300b shown in FIG. 3B, the frequency of the first superconducting qubit 104a expressed in GHz extends along the X-axis of graph 300b (denoted as transmons 1 fq(GHz) in FIG. 3B), the frequency of the second superconducting qubit 104b expressed in GHz extends along the Y-axis of graph 300b (denoted as transmons 2 fq(GHz) in FIG. 3B), and the ZZ interaction frequency denoted as Log10(ZZ(kHz)) and expressed in kHz in FIG. 3B is represented by the change in the gray shading of the Z-axis of graph 300b (e.g., the axis of graph 300b extending in and out of the page) corresponding to the frequencies shown in the ZZ legend illustrated in FIG. 3B. As illustrated by the region 202 defined on graph 300b shown in FIG. 3B, the ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b is suppressed (e.g., relatively small, negligible, effectively terminated, etc.), while the ZZ interaction between the second superconducting qubit 104b and the coupler device 102 operating in the second oscillation mode is enhanced (e.g., relatively large, increasing, etc.).

[0053] FIG. 4A shows a top view of an exemplary and non - limiting device 400a that can facilitate ZZ quenching between qubits according to one or more embodiments described herein. FIG. 4B shows an exemplary and non - limiting circuit diagram 400b of device 400a.

[0054] Device 400a can include an exemplary and non - limiting alternative embodiment of device 100a described above with reference to FIGS. 1A and 1B, and device 400a can include a flux - tunable embodiment of device 100a. Device 400a can include an exemplary and non - limiting alternative embodiment of device 100a described above with reference to FIGS. 1A and 1B, and device 400a can comprise a coupler device 402 instead of coupler device 102 (shown as a multi - junction coupler in FIGS. 4A and 4B). Coupler device 402 can include an exemplary and non - limiting alternative embodiment of coupler device 102, and coupler device 402 can comprise a flux - controlled qubit device 404 instead of the second Josephson junction 114b as illustrated in the exemplary embodiment shown in FIGS. 4A and 4B. For example, coupler device 402 can comprise a flux - controlled qubit device 404 coupled to a second superconducting pad 106b and a third superconducting pad 106c as illustrated in the exemplary embodiment shown in FIGS. 4A and 4B.

[0055] The flux - controlled qubit device 404 can comprise a superconducting quantum interference device (SQUID) loop. As illustrated in the exemplary embodiment shown in FIGS. 4A and 4B, the flux - controlled qubit device 404 can comprise the second Josephson junction 414a of the coupler device 402 (shown as E J2 in FIG. 4B). (Referenced above with reference to FIGS. 1A and 1B, shown as E J1The first Josephson junction 114a shown as being displayed represents the first Josephson junction of the coupler device 402). As illustrated in the exemplary embodiments shown in FIGS. 4A and 4B, the flux-controlled qubit device 404 is the (in FIG. 4B, E J3 displayed) third Josephson junction 414b can be provided. In this exemplary embodiment, the second Josephson junction 414a or the third Josephson junction 414b or both can include one or more superconducting films (e.g., superconducting metal films) or one or more non-superconducting films (e.g., normal metal films) or both formed on a substrate (e.g., a silicon (Si) substrate, etc.).

[0056] As illustrated in the exemplary embodiment shown in FIG. 4B, the second superconducting pad 106b and the third superconducting pad 106c of the coupler device 402 can be capacitively coupled to each other, and such capacitive coupling is, in FIG. 4B, the (in FIG. 4B, C 2 displayed) represented by the second capacitor 422b (refer to FIGS. 1A and 1B and described above, in FIG. 4B, C 1 The first capacitor 122a shown as being displayed represents the first capacitor of the coupler device 402). In the exemplary embodiment shown in FIG. 4B, the first capacitor 122a and the second capacitor 422b each represent a DC capacitive shunt across the first Josephson junction 114a and the flux-controlled qubit device 404 (e.g., across the second Josephson junction 414a and the third Josephson junction 414b). In this exemplary embodiment, as illustrated in FIGS. 4A and 4B, the coupler device 102 can include a capacitively shunted first Josephson junction 114a and a capacitively shunted flux-controlled qubit device 404 connected in series.

[0057] In the exemplary embodiment illustrated in FIGS. 4A and 4B, the coupler device 402 can operate in a first vibration mode and a second vibration mode. In one or more embodiments of the present disclosure described herein, the first vibration mode and the second vibration mode can correspond to different (e.g., distinct) frequencies or different (e.g., distinct) spatial symmetries or both. In these one or more embodiments, the first vibration mode and the second vibration mode can exhibit symmetric and antisymmetric combinations of excitations associated with the first Josephson junction 114a (e.g., associated with the second Josephson junction 414a and the third Josephson junction 414b) of the coupler device 402 and the flux-controlled qubit device 404. In these one or more embodiments, such symmetric and antisymmetric combinations of excitations associated with the first Josephson junction 114a (e.g., associated with the second Josephson junction 414a and the third Josephson junction 414b) of the coupler device 402 and the flux-controlled qubit device 404 can result from the capacitive coupling between the first superconducting pad 106a and the third superconducting pad 106c, and such capacitive coupling is represented as the third capacitor 122c in FIG. 4B (where it is labeled as C S in FIG. 4B).

[0058] In the exemplary embodiments shown in FIGS. 4A and 4B, the third capacitor 122c represents a capacitive coupling between the first superconducting pad 106a and the third superconducting pad 106c of the coupler device 402. Such capacitive coupling can, as described above, enable the creation of a first oscillation mode and a second oscillation mode having different frequencies and different spatial symmetries relative to each other. In this exemplary embodiment, such capacitive coupling, represented as the third capacitor 122c in FIG. 4B, can enable the first oscillation mode and the second oscillation mode to interact with each other. Otherwise, such modes would be separated between the first Josephson junction 114a of the coupler device 402 and the flux-controlled qubit device 404 (e.g., separated between the second Josephson junction 414a and the third Josephson junction 414b). In this exemplary embodiment, such interaction between the first oscillation mode and the second oscillation mode can enable the creation of an extended state of the coupler device 402 (e.g., a hybridized quantum state, a hybridized oscillation mode, etc.) (e.g., a hybridized quantum state or a hybridized oscillation mode or both corresponding to different frequencies and different spatial symmetries). In this exemplary embodiment, such capacitive coupling, represented as the third capacitor 122c in FIG. 4B, enables the fundamental mode of the coupler device 402 to extend symmetrically or antisymmetrically across the first Josephson junction 114a and the flux-controlled qubit device 404 (e.g., extend across the second Josephson junction 414a and the third Josephson junction 414b).

[0059] In the exemplary embodiments shown in FIGS. 4A and 4B, the first vibration mode and the second vibration mode can respectively correspond to the first vibration mode structure 116a and the second vibration mode structure 116b described above with reference to FIGS. 1A and 1B. In this exemplary embodiment, the first vibration mode structure 116a and the second vibration mode structure 116b can be used to define specific coupling techniques (e.g., coupling methods, coupling configurations, coupling patterns, etc.) such that the first superconducting qubit 104a or the second superconducting qubit 104b or both can operate according to the first vibration mode or the second vibration mode or both of the coupler device 402, so that the first superconducting qubit 104a or the second superconducting qubit 104b or both are coupled to the coupler device 402. For example, in this exemplary embodiment, the first superconducting qubit 104a or the second superconducting qubit 104b or both can be coupled to the coupler device 402 in the same or substantially similar manner as the first superconducting qubit 104a or the second superconducting qubit 104b or both can be coupled to the coupler device 102 as described above with reference to FIGS. 1A and 1B. For example, the first superconducting qubit 104a or the second superconducting qubit 104b or both can be capacitively coupled to the coupler device 402 according to the first vibration mode structure 116a and the second vibration mode structure 116b, and such capacitive coupling is represented as capacitor 120a and capacitor 120b respectively in the exemplary embodiment shown in FIG. 4B.

[0060] In various embodiments, the critical current of the flux-controlled qubit device 404 may depend on an external magnetic field. Thus, in these embodiments, the entity implementing the device 400a (e.g., a human, a computing device, a software application, an agent, a machine learning model, an artificial intelligence model, etc.) can tune (e.g., adjust) one or more critical currents of the coupler device 402 (e.g., the critical current of the first Josephson junction 114a or the flux-controlled qubit device 404 or both) such that the first superconducting qubit 104a and the second superconducting qubit 104b have equivalent exchange coupling with the first vibrational mode structure 116a and the second vibrational mode structure 116b. For example, in these embodiments, such an entity as defined above can adjust the magnetic field applied to the device 400a, the coupler device 402, the first Josephson junction 114a, or the flux-controlled qubit device 404 or a combination thereof (e.g., via a magnetic field generator or a computer 1012 or both as described above with reference to FIGS. 1A and 1B) such that the first superconducting qubit 104a and the second superconducting qubit 104b have equivalent exchange coupling with the first vibrational mode structure 116a and the second vibrational mode structure 116b. In these embodiments, such an entity as defined above can apply an external magnetic field to the coupler device 402, the first Josephson junction 114a, or the flux-controlled qubit device 404 that will change the critical current of the first Josephson junction 114a or the flux-controlled qubit device 404, thereby tuning (e.g., turning on or off) the ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b by causing an enhancement (e.g., increase) or suppression (e.g., decrease) of the ZZ interaction.

[0061] In the above embodiment, the equivalent exchange coupling between the first superconducting qubit 104a and the second superconducting qubit 104b and the first vibration mode structure 116a and the second vibration mode structure 116b can result in a net suppression (e.g., reduction, termination, etc.) of the ZZ interaction (e.g., static ZZ interaction) between the first superconducting qubit 104a and the second superconducting qubit 104b at a certain critical current of the flux control type qubit device 404, or at approximately that critical current. For example, such equivalent exchange coupling can result in a net suppression of the ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b at a certain critical current of the flux control type qubit device 404, or at approximately that critical current (e.g., at a critical current of about 39 nanoamperes (nA), or at approximately that critical current, as shown in FIG. 5 and described below). In various embodiments, such a net suppression of the ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b can thereby facilitate at least one of a reduction in quantum gate error associated with the first superconducting qubit 104a and / or the second superconducting qubit 104b, an acceleration of a quantum gate (e.g., an entangled quantum gate) including the first superconducting qubit 104a and the second superconducting qubit 104b, and / or an improvement in the fidelity, accuracy, and / or performance of the quantum processor comprising the device 400a.

[0062] In the above embodiments, such an entity implementing device 400a can further adjust an external magnetic field that can be applied to coupler device 402 (e.g., via a magnetic field generator or computer 1012 or both), to detune coupler device 402 from the first vibration mode structure 116a or the second vibration mode structure 116b (e.g., from the first vibration mode or the second vibration mode), thereby enabling entanglement of the first superconducting qubit 104a and the second superconducting qubit 104b. For example, in these embodiments, such an entity as defined above can adjust the external magnetic field that can be applied to coupler device 402 to tune the critical current of the flux-controlled qubit device 404 to a certain critical current of the flux-controlled qubit device 404 displayed at the on position 502 in graph 500, or to approximately such a certain critical current (e.g., at a critical current of about 26.5 nA, or approximately such a critical current, as shown in and described later with reference to FIG. 5).

[0063] In the above embodiments, such entanglement between the first superconducting qubit 104a and the second superconducting qubit 104b enables the execution of a quantum gate operation between the first superconducting qubit 104a and the second superconducting qubit 104b. For example, in these embodiments, based on detuning coupler device 402 from the first vibration mode structure 116a or the second vibration mode structure 116b (e.g., from the first vibration mode or the second vibration mode) (e.g., via a magnetic field generator or computer 1012 or both), device 400a or coupler device 402 or both can operate as a resonator-induced phase (RIP) gate, thereby generating a ZZ interaction between a first qubit (e.g., the first superconducting qubit 104a) and a second qubit (e.g., the second superconducting qubit 104b) that exists when there is a microwave drive (e.g., a microwave signal) applied to coupler device 402 (e.g., when there is a microwave signal applied to coupler device 402).

[0064] FIG. 5 shows an exemplary and non-limiting graph 500 that can facilitate ZZ quenching between qubits according to one or more embodiments described herein. For the sake of brevity, repeated descriptions of similar elements or processes or both used in each embodiment are omitted.

[0065] Graph 500 can include result data obtained from implementing one or more embodiments of the present disclosure described herein. For example, graph 500 can include result data obtained from implementing device 400a (e.g., simulating, quantizing, etc.) according to one or more embodiments of the present disclosure described herein (e.g., computer-implemented methods 700 or 900 or both, described below with reference to FIGS. 7 and 9 respectively).

[0066] Graph 500 can include a simulation of the ZZ interaction (displayed along the Y-axis of graph 500 and expressed in kHz) between the first superconducting qubit 104a and the second superconducting qubit 104b as a function of the critical current of the flux-controlled qubit device 404 (displayed along the X-axis of graph 500 and expressed in units of amperes (A)).

[0067] In the exemplary embodiment shown in FIG. 5, the on-position 502 corresponds to a low value (e.g., about 26.5 nA) critical current of the flux-controlled qubit device 404, and a high value (e.g., greater than about 1 megahertz (MHz)) ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b. In this exemplary embodiment, such a high value (e.g., greater than about 1 megahertz (MHz)) ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b can enable entanglement of the first superconducting qubit 104a and the second superconducting qubit 104b (e.g., to perform a quantum gate operation between the first superconducting qubit 104a and the second superconducting qubit 104b). In this exemplary embodiment, as described above with reference to FIGS. 1A, 1B, 4A, and 4B, the entity implementing the device 400a can adjust an external magnetic field that can be applied to the coupler device 402 (e.g., via a magnetic field generator or computer 1012 or both) to tune the critical current of the flux-controlled qubit device 404 to a certain critical current (e.g., about 26.5 nA) corresponding to the on-position 502 defined by the graph 500 shown in FIG. 5.

[0068] In the exemplary embodiment shown in FIG. 5, the off position 504 corresponds to a high value (e.g., about 39 nA) critical current of the flux-controlled qubit device 404 and a low value (e.g., less than about 1 kHz) ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b. In this exemplary embodiment, such a low value (e.g., less than about 1 kHz) ZZ interaction can enable reduction of quantum gate errors associated with the first superconducting qubit 104a or the second superconducting qubit 104b or both when performing a quantum gate. In this exemplary embodiment, as described above with reference to FIGS. 1A, 1B, 4A, and 4B, the entity implementing the device 400a can adjust an external magnetic field that can be applied to the coupler device 402 (e.g., via a magnetic field generator or computer 1012 or both) to tune the critical current of the flux-controlled qubit device 404 to a certain critical current (e.g., about 39 nA) corresponding to the off position 504 defined by the graph 500 shown in FIG. 5.

[0069] FIG. 6A shows a top view of an exemplary and non-limiting device 600a that can facilitate ZZ quenching between qubits according to one or more embodiments described herein. FIG. 6B shows an exemplary and non-limiting circuit diagram 600b of the device 600a.

[0070] Device 600a can include an exemplary and non-limiting alternative embodiment of device 100a described above with reference to FIGS. 1A and 1B, and device 600a can include a coupler device 402 (shown as a two-junction coupler in FIGS. 6A and 6B) instead of coupler device 102. Coupler device 602 can include an exemplary and non-limiting alternative embodiment of coupler device 102, and the first superconducting pad 106a and the third superconducting pad 106c of coupler device 602 can be coupled to a first superconducting qubit 104a (shown as transmons 1 in FIGS. 6A and 6B), and the second superconducting pad 106b of coupler device 602 can be coupled to a second superconducting qubit 104b (shown as transmons 2 in FIGS. 6A and 6B).

[0071] The coupler device 602 illustrated in the exemplary embodiments shown in FIGS. 6A and 6B can operate in a first oscillation mode 624a and a second oscillation mode 624b (not shown). In one or more embodiments of the present disclosure described herein, the first oscillation mode 624a and the second oscillation mode 624b can correspond to different (e.g., distinct) frequencies or different (e.g., distinct) spatial symmetries or both. In these one or more embodiments, the first oscillation mode 624a and the second oscillation mode 624b can exhibit symmetric and antisymmetric combinations of excitations associated with the first Josephson junction 114a and the second Josephson junction 114b of the coupler device 602. In these one or more embodiments, such symmetric and antisymmetric combinations of excitations associated with the first Josephson junction 114a and the second Josephson junction 114b of the coupler device 602 can result from the capacitive coupling between the first superconducting pad 106a and the third superconducting pad 106c, and such capacitive coupling is represented as the third capacitor 122c (shown as C in FIG. 6B) in FIG. 6B. S as shown.

[0072] In the exemplary embodiment shown in FIGS. 6A and 6B, the third capacitor 122c represents a capacitive coupling between the first superconducting pad 106a and the third superconducting pad 106c of the coupler device 602, and such capacitive coupling can, as described above, enable the creation of a first oscillation mode 624a and a second oscillation mode 624b having different frequencies and different spatial symmetries relative to each other. In this exemplary embodiment, such capacitive coupling, represented as the third capacitor 122c in FIG. 6B, can enable the first oscillation mode 624a and the second oscillation mode 624b to interact with each other, and otherwise, such modes would be separated between the first Josephson junction 114a and the second Josephson junction 114b of the coupler device 602. In this exemplary embodiment, such interaction between the first oscillation mode 624a and the second oscillation mode 624b can enable the creation of an extended state (e.g., a hybridized quantum state, a hybridized oscillation mode, etc.) of the coupler device 602 (e.g., a hybridized quantum state or a hybridized oscillation mode or both corresponding to different frequencies and different spatial symmetries). In this exemplary embodiment, such capacitive coupling, represented as the third capacitor 122c in FIG. 6B, enables the fundamental mode of the coupler device 602 to extend symmetrically or antisymmetrically across the first Josephson junction 114a and the second Josephson junction 114b.

[0073] The first vibration mode 624a and the second vibration mode 624b can respectively correspond to the first vibration mode structure 616a (displayed as the A mode in FIG. 6A) and the second vibration mode structure 616b (displayed as the B mode in FIG. 6A). The first vibration mode structure 616a and the second vibration mode structure 616b can respectively define specific coupling techniques (such as coupling methods, coupling configurations, coupling patterns, etc.) for coupling the first superconducting qubit 104a or the second superconducting qubit 104b or both to the first vibration mode 624a or the second vibration mode 624b or both of the coupler device 602 so that the first superconducting qubit 104a or the second superconducting qubit 104b or both can operate according to the first vibration mode 624a or the second vibration mode 624b or both of the coupler device 602.

[0074] As described above, the first superconducting qubit 104a or the second superconducting qubit 104b or both exemplified in the exemplary embodiments shown in FIGS. 6A and 6B can be coupled to the coupler device 602. For example, as exemplified in the exemplary embodiments shown in FIGS. 6A and 6B, the first superconducting pad 106a of the coupler device 602 can be capacitively coupled to the first superconducting pad 108a of the first superconducting qubit 104a, and such capacitive coupling is represented by the capacitor 620a (displayed as C in FIG. 6B). The third superconducting pad 106c of the coupler device 602 can be capacitively coupled to the second superconducting pad 110a of the first superconducting qubit 104a, and such capacitive coupling is represented by the capacitor 120b (displayed as C in FIG. 6B). The second superconducting pad 106b of the coupler device 602 can be capacitively coupled to the first superconducting pad 108b of the second superconducting qubit 104b, and such capacitive coupling is represented by the capacitor 620c (displayed as C in FIG. 6B). c1 As shown in FIG. 6B, the capacitor 620a represents such a capacitive coupling. The third superconducting pad 106c of the coupler device 602 can be capacitively coupled to the second superconducting pad 110a of the first superconducting qubit 104a, and such capacitive coupling is represented by the capacitor 120b (displayed as C in FIG. 6B). c2 The second superconducting pad 106b of the coupler device 602 can be capacitively coupled to the first superconducting pad 108b of the second superconducting qubit 104b, and such capacitive coupling is represented by the capacitor 620c (displayed as C in FIG. 6B). c3 As shown in FIG. 6B, the capacitor 620c represents such a capacitive coupling.

[0075] In various embodiments, the first superconducting qubit 104a can be coupled to the coupler device 602 based on (e.g., in accordance with) the above-described second vibration mode structure 616b shown in FIG. 6A. In these embodiments, the second superconducting qubit 104b can be coupled to the coupler device 602 based on (e.g., in accordance with) the above-described first vibration mode structure 616a shown in FIG. 6A. In these embodiments, the first superconducting qubit 104a and the second superconducting qubit 104b can be coupled to separate modes of the coupler device 602 as described above (e.g., the first superconducting qubit 104a is capacitively coupled to the second vibration mode structure 616b corresponding to the second vibration mode 624b, and the second superconducting qubit 104b is capacitively coupled to the first vibration mode structure 616a corresponding to the first vibration mode 624a), so there is virtually no direct exchange coupling between the first superconducting qubit 104a and the second superconducting qubit 104b (e.g., there is only a negligible amount of direct exchange coupling). In these embodiments, since there is only a negligible amount of direct exchange coupling between the first superconducting qubit 104a and the second superconducting qubit 104b, the static ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b is suppressed (e.g., crosstalk between the first superconducting qubit 104a and the second superconducting qubit 104b is suppressed). The advantage of these embodiments is that the coupler device 602 can have a relatively high internal quality factor compared to existing coplanar waveguide resonators, and thus there is less energy loss due to the coupler device 602 compared to such existing coplanar waveguide resonators.

[0076] In the above-described embodiments, the first vibration mode structure 616a corresponding to the first vibration mode 624a of the coupler device 602 and the second vibration mode structure 616b corresponding to the second vibration mode 624b have a strong (e.g., relatively strong) longitudinal coupling with each other. Therefore, there may be an effective four-body interaction involving the first superconducting qubit 104a, the second superconducting qubit 104b, the first vibration mode structure 616a corresponding to the first vibration mode 624a, and the second vibration mode structure 616b corresponding to the second vibration mode 624b. In these embodiments, such a four-body interaction, similar to the RIP gate, can enable an entanglement gate between the first superconducting qubit 104a and the second superconducting qubit 104b at a frequency detuned from either the first vibration mode 624a or the second vibration mode 624b (e.g., at 50 MHz or about 50 MHz) by driving the coupler device 602 (e.g., by applying a microwave pulse to the coupler device 602 using a pulse generator device and / or a computer 1012 as described above). In these embodiments, driving the coupler device 602 at a frequency detuned from either the first vibration mode 624a or the second vibration mode 624b generates a ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b, and thus entanglement, but only in the presence of microwave driving, thereby enabling controllable entanglement. In these embodiments, driving the coupler device 602 at a frequency detuned from either the first vibration mode 624a or the second vibration mode 624b can constitute detuning the coupler device 602 from the first vibration mode 624a or the second vibration mode 624b.

[0077] Various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) can be associated with various technologies. For example, various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) can be associated with quantum computing technology, quantum gate technology, quantum coupler technology, quantum hardware technology or software technology or both, quantum circuit technology, superconducting circuit technology, machine learning technology, artificial intelligence technology, cloud computing technology, or other technologies or combinations thereof.

[0078] The various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) can provide technical improvements to systems, devices, components, operation steps, or processing steps related to the various technologies identified above, or combinations thereof. For example, the various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) can generate an exchange coupling between a first superconducting qubit and a second superconducting qubit and a first vibration mode structure and a second vibration mode structure of a coupler device, or create an entangled quantum gate between the first superconducting qubit and the second superconducting qubit, or both. In this example, such an exchange coupling can include an equivalent exchange coupling between a first superconducting qubit 104a and a second superconducting qubit 104b and a first vibration mode structure 116a corresponding to a first vibration mode of the coupler device 102 and a second vibration mode structure 116b corresponding to a second vibration mode. For example, such an equivalent exchange coupling can result in a net suppression of the ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b over a defined range of frequencies 202a corresponding to the first superconducting qubit 104a defined by region 202 and a defined range of frequencies 202b corresponding to the second superconducting qubit 104b, as shown in and described above with respect to FIG. 2. In this example, such a net suppression of the ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b can thereby facilitate at least one of a reduction in quantum gate error associated with the first superconducting qubit 104a and / or the second superconducting qubit 104b, an acceleration of a quantum gate (e.g., an entangled quantum gate) including the first superconducting qubit 104a and the second superconducting qubit 104b, and / or an improvement in the fidelity, accuracy, and / or performance of a quantum processor comprising device 100a.

[0079] Various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) can provide technical improvements to classical computing devices or quantum computing devices (e.g., quantum processors, quantum hardware, superconducting circuits, etc.) or both, which can be associated with one or more of the various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.), or to processing units (e.g., a quantum processor including device 100a, device 400a, or device 600a, processing unit 1014, etc.) associated with both. For example, by generating such an equivalent exchange coupling as described above, various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) can suppress the ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b, thereby reducing quantum gate errors associated with the first superconducting qubit 104a or the second superconducting qubit 104b or both, or facilitating the acceleration of quantum gates (e.g., entangled quantum gates) including the first superconducting qubit 104a and the second superconducting qubit 104b. In this example, such a reduction in quantum gate errors or such an acceleration of quantum gates or both can facilitate an improvement in the fidelity, accuracy, performance, or a combination thereof of a quantum processor (e.g., a quantum processor including device 100a, device 400a, or device 600a and executing quantum gates) including one or more of the various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.).

[0080] Based on such suppression of the ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b as described above, the actual application of various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) is to implement them in quantum devices (e.g., quantum processors, quantum computers, etc.) to provide one or more solutions (e.g., discovery problem-solving methods, etc.) to various problems (e.g., estimation problems, optimization problems, etc.) involved in various fields (e.g., finance, chemistry, medicine), with improved fidelity or accuracy or both, and to calculate more quickly and efficiently. For example, based on such suppression of the ZZ interaction between the first superconducting qubit 104a and the second superconducting qubit 104b as described above, the actual application of one or more of the various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) is, for example, to implement them in a quantum processor (e.g., a quantum processor including device 100a, device 400a, or device 600a) to provide one or more solutions (e.g., discovery problem-solving methods, etc.) to optimization problems in the fields of chemistry, medicine, or finance or combinations thereof, with improved fidelity or accuracy or both, and such solutions can be used, for example, to design new compounds, new drugs, and / or new systems and / or methods for option pricing.

[0081] Various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) are to be understood as providing new approaches enabled by relatively new quantum computing technologies. For example, various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) provide a new approach for suppressing the ZZ interaction between the above-described first superconducting qubit 104a and the second superconducting qubit 104b, which results in quantum gate errors during quantum computing. In this example, such a new approach for suppressing the ZZ interaction can enable faster and more efficient quantum computing with improved fidelity or accuracy or both, using a quantum processor that includes one or more of the various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.).

[0082] Various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) can employ hardware or software to solve problems that are inherently highly technical, not abstract, and cannot be performed as a series of human intellectual acts. In some embodiments, one or more of the processes described herein can be performed by one or more dedicated computers (e.g., dedicated processing units, dedicated classical computers, dedicated quantum computers, etc.) executing defined tasks related to the various technologies identified above. Newly arising problems can be solved by adopting various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) through the adoption of the above-described technological advancements, quantum computing systems, cloud computing systems, computer architectures, or another technology or combination thereof.

[0083] The various operations that can be performed by the various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) are operations that exceed the capabilities of the human mind. Thus, it should be understood that the various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) can utilize various combinations of electrical components, mechanical components, and circuits that cannot be replicated or performed by humans even in the human mind. For example, the amount of data processed over a certain period of time by the various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.), the speed at which such data is processed, or the type of data processed can be greater, faster, or different compared to the amount, speed, or data type that the human mind can process over the same period of time.

[0084] According to some embodiments, the various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) can also operate as a whole for the purpose of performing one or more other functions while also performing the various operations described herein (e.g., being powered on as a whole, being executed as a whole, etc.). It should be understood that performing such multiple operations simultaneously exceeds the capabilities of the human mind. It should also be understood that the various embodiments of the present disclosure described herein (e.g., device 100a, device 400a, device 600a, etc.) can include information that cannot be manually obtained by an entity such as a human user. For example, the type, amount, or kind of information included in device 100a, device 400a, or device 600a or a combination thereof can be more complex than the information manually obtained by a human user.

[0085] FIG. 7 shows a flowchart of an exemplary and non-limiting computer-implemented method 700 that can facilitate ZZ cancellation between qubits according to one or more embodiments described herein. For the sake of brevity, repeated descriptions of similar elements or processes or both used in each embodiment are omitted.

[0086] In 702, computer-implemented method 700 can include generating an exchange coupling (e.g., an equivalent exchange coupling) between a first superconducting qubit (e.g., first superconducting qubit 104a) and a second superconducting qubit (e.g., second superconducting qubit 104b), and a first vibration mode structure (e.g., first vibration mode structure 116a corresponding to a first vibration mode) and a second vibration mode structure (e.g., second vibration mode structure 116b corresponding to a second vibration mode) of a coupler device (e.g., coupler device 102) by a system (e.g., computer 1012, one or more types of external devices defined herein, device 100a, or a system including coupler device 102 or a combination thereof) operably coupled to a processor (e.g., processing unit 1014, etc.). For example, as described above with reference to FIGS. 1A and 1B, first superconducting qubit 104a and second superconducting qubit 104b can each capacitively couple to both first vibration mode structure 116a and second vibration mode structure 116b, such mode structures corresponding respectively to a first vibration mode and a second vibration mode of coupler device 102. In this example, as described above with reference to FIGS. 1A and 1B, such capacitive coupling between first superconducting qubit 104a and second superconducting qubit 104b and first vibration mode structure 116a and second vibration mode structure 116b can generate an equivalent exchange coupling between first superconducting qubit 104a and second superconducting qubit 104b and first vibration mode structure 116a and second vibration mode structure 116b. In this example, as described above with reference to FIGS. 1A and 1B, such equivalent exchange coupling can result in a net suppression (e.g., reduction, cancellation, etc.) of the ZZ interaction (e.g., static ZZ interaction) between first superconducting qubit 104a and second superconducting qubit 104b over a defined range of qubit frequencies (e.g., defined range of frequencies 202a corresponding to first superconducting qubit 104a and defined range of frequencies 202b corresponding to second superconducting qubit 104b defined by region 202 as shown and described above in FIG. 2).

[0087] In 704, the computer-implemented method 700 can include creating an entangled quantum gate between a first superconducting qubit and a second superconducting qubit by a system (e.g., a system including computer 1012, one or more types of external devices as defined herein, device 100a, or coupler device 102 or a combination thereof). For example, as described above with reference to FIGS. 1A and 1B, an entity (e.g., a human, a computing device, a software application, an agent, a machine learning model, an artificial intelligence model, etc.) implementing device 100a can further detune coupler device 102 from the first vibrational mode structure 116a or the second vibrational mode structure 116b, and thus from the first vibrational mode or the second vibrational mode, to entangle the first superconducting qubit 104a and the second superconducting qubit 104b (e.g., to create an entangled quantum gate between the first superconducting qubit 104a and the second superconducting qubit 104b). In these embodiments, such entanglement of the first superconducting qubit 104a and the second superconducting qubit 104b enables performing a quantum gate operation between the first superconducting qubit 104a and the second superconducting qubit 104b. For example, in these embodiments, based on detuning coupler device 102 from the first vibrational mode structure 116a or the second vibrational mode structure 116b, and thus from the first vibrational mode or the second vibrational mode, device 100a or coupler device 102 or both can operate as a resonator-induced phase (RIP) gate, thereby generating a ZZ interaction between a first qubit (e.g., the first superconducting qubit 104a) and a second qubit (e.g., the second superconducting qubit 104b) that exists when there is a microwave drive (e.g., a microwave signal) on the coupler device 102 (e.g., when there is a microwave signal applied to the coupler device 102).

[0088] FIG. 8 shows a flowchart of an exemplary and non-limiting computer-implemented method 800 that can facilitate ZZ quenching between qubits according to one or more embodiments described herein. For the sake of brevity, repeated descriptions of similar elements or processes or both used in each embodiment are omitted.

[0089] At 802, the computer-implemented method 800 can include coupling a first superconducting qubit (e.g., the first superconducting qubit 104a) to a first vibrational mode structure (e.g., the second vibrational mode structure 616b labeled as the B mode in FIG. 6A) corresponding to a first vibrational mode (e.g., the second vibrational mode 624b) of a coupler device (e.g., the coupler device 602) by a system (e.g., the computer 1012, one or more types of external devices defined herein, the device 600a, or a system including the coupler device 602 or a combination thereof) operably coupled to a processor (e.g., the processing unit 1014, etc.).

[0090] At 804, the computer-implemented method 800 can include coupling a second superconducting qubit (e.g., the second superconducting qubit 104b) to a second vibrational mode structure (e.g., the first vibrational mode structure 616a labeled as the A mode in FIG. 6A) corresponding to a second vibrational mode (e.g., the first vibrational mode 624a) of the coupler device by a system (e.g., the computer 1012, one or more types of external devices defined herein, the device 100a, or a system including the coupler device 102 or a combination thereof) operably coupled to a processor (e.g., the processing unit 1014, etc.).

[0091] In 806, the computer-implemented method 800 can include detuning a coupler device from a first vibration mode or a second vibration mode by a system (e.g., computer 1012, one or more types of external devices as defined herein, device 100a, or a coupler device 102 or a combination thereof) operably coupled to a processor (e.g., processing unit 1014, etc.). For example, referring to the above-described exemplary embodiments shown in FIGS. 6A and 6B, the first vibration mode structure 616a corresponding to the first vibration mode 624a of the coupler device 602 and the second vibration mode structure 616b corresponding to the second vibration mode 624b have a strong (e.g., relatively strong) longitudinal coupling with each other, so there may be an effective four-body interaction involving the first superconducting qubit 104a, the second superconducting qubit 104b, the first vibration mode structure 616a corresponding to the first vibration mode 624a, and the second vibration mode structure 616b corresponding to the second vibration mode 624b. In these embodiments, such a four-body interaction, similar to the RIP gate, is at a frequency detuned from either the first vibration mode 624a or the second vibration mode 624b (e.g., at 50 MHz or about 50 MHz), and the coupler device 602 is driven (e.g., by applying a microwave pulse to the coupler device 602 using a pulse generator device or computer 1012 or both as described above), enabling an entangling gate between the first superconducting qubit 104a and the second superconducting qubit 104b. In these embodiments, driving the coupler device 602 at a frequency detuned from either the first vibration mode 624a or the second vibration mode 624b generates a ZZ interaction, and thus entanglement, between the first superconducting qubit 104a and the second superconducting qubit 104b, but only in the presence of microwave driving, thereby enabling controllable entanglement.In these embodiments, driving the coupler device 602 at a frequency detuned from either the first vibration mode 624a or the second vibration mode 624b can constitute detuning the coupler device 602 from the first vibration mode 624a or the second vibration mode 624b.

[0092] FIG. 9 shows a flowchart of an exemplary and non-limiting computer-implemented method 900 that can facilitate ZZ quenching between qubits according to one or more embodiments described herein. For simplicity, repeated descriptions of similar elements or processes or both used in each embodiment are omitted.

[0093] At 902, the computer-implemented method 900 can include generating an equivalent exchange coupling between a first superconducting qubit (e.g., the first superconducting qubit 104a) and a second superconducting qubit (e.g., the second superconducting qubit 104b) and a first vibration mode structure (e.g., the first vibration mode structure 116a corresponding to the first vibration mode) and a second vibration mode structure (e.g., the second vibration mode structure 116b corresponding to the second vibration mode) of a flux tunable coupler device (e.g., the coupler device 402) (e.g., via a system including the computer 1012, one or more types of external devices defined herein, the device 400a, or the coupler device 402 or a combination thereof).

[0094] In 904, computer-implemented method 900 can include tuning the critical current of a flux-controlled qubit device (e.g., flux-controlled qubit device 404 with a SQUID loop) within a flux-tunable coupler device (e.g., via a system including computer 1012, one or more types of external devices defined herein, device 400a, or coupler device 402 or combinations thereof). For example, as described above with reference to FIGS. 4A, 4B, and 5, an entity defined herein can tune (e.g., adjust) the critical current of flux-controlled qubit device 404 within coupler device 402 by applying an external magnetic field to coupler device 402 or flux-controlled qubit device 404 or both using a magnetic field generator.

[0095] In 906, computer-implemented method 900 can include determining whether the ZZ interaction between a first superconducting qubit and a second superconducting qubit is on (e.g., via a system including computer 1012, one or more types of external devices as defined herein, device 100a, or coupler device 102 or a combination thereof). For example, as described above with reference to FIGS. 4A, 4B, and 5, an entity as defined herein can tune (e.g., adjust) the critical current of a flux-controlled qubit device 404 within coupler device 402 by applying an external magnetic field to coupler device 402 or flux-controlled qubit device 404 or both using a magnetic field generator. In this example, such an entity can tune the critical current of flux-controlled qubit device 404 to a current value (e.g., about 26.5 nA) corresponding to an on position 502 defined on graph 500 shown in FIG. 5, where on position 502 corresponds to a relatively high ZZ interaction (e.g., the ZZ interaction is substantially on) between first superconducting qubit 104a and second superconducting qubit 104b. Thus, in this example, graph 500 can be used to perform a determination as to whether the ZZ interaction is on and tune (e.g., adjust) the critical current of flux-controlled qubit device 404 to a current value corresponding to on position 502 defined on graph 500.

[0096] At 906, if it is determined that the ZZ interaction between the first superconducting qubit and the second superconducting qubit is on, then at 908, the computer-implemented method 900 can include performing an entanglement quantum gate between the first superconducting qubit and the second superconducting qubit (e.g., via a system including computer 1012, one or more types of external devices defined herein, device 400a, or coupler device 402 or a combination thereof). For example, by tuning the critical current of the flux-controlled qubit device 404 to a current value corresponding to the on position 502 defined on graph 500 (as described above), the first superconducting qubit 104a can be entangled with the second superconducting qubit 104b, thereby enabling an entanglement quantum gate between the first superconducting qubit 104a and the second superconducting qubit 104b. Such entanglement between the first superconducting qubit 104a and the second superconducting qubit 104b enables a quantum gate operation (e.g., an entanglement quantum gate operation) to be performed between the first superconducting qubit 104a and the second superconducting qubit 104b.

[0097] At 910, the computer-implemented method 900 can include tuning the critical current of the flux-controlled qubit device to turn off the ZZ interaction between the first superconducting qubit and the second superconducting qubit (e.g., via a system including computer 1012, one or more types of external devices defined herein, device 400a, or coupler device 402 or a combination thereof).

[0098] For example, as described above with reference to FIGS. 4A, 4B, and 5, an entity as defined herein can synchronize (e.g., adjust) the critical current of the flux-controlled qubit device 404 in the coupler device 402 by applying an external magnetic field to the coupler device 402 or the flux-controlled qubit device 404 or both using a magnetic field generator. In this example, such an entity can synchronize the critical current of the flux-controlled qubit device 404 to a current value (e.g., about 39 nA) corresponding to the off position 504 defined on the graph 500 shown in FIG. 5, and the off position 504 corresponds to a relatively low ZZ interaction (e.g., the ZZ interaction is substantially off) between the first superconducting qubit 104a and the second superconducting qubit 104b. Thus, in this example, the graph 500 can be used to perform a determination as to whether the ZZ interaction is off and synchronize (e.g., adjust) the critical current of the flux-controlled qubit device 404 to the current value corresponding to the off position 504 defined on the graph 500.

[0099] In 906, if it is determined that the ZZ interaction between the first superconducting qubit and the second superconducting qubit is not on, the computer-implemented method 900 can return to operation 904 and include synchronizing the critical current of the flux-controlled qubit device within the flux-synchronizable coupler device. In various embodiments, operations 904 and 906 of the computer-implemented method 900 can be repeated until the ZZ interaction between the first superconducting qubit and the second superconducting qubit is on. In these embodiments, based on repeating operations 904 and 906 until the ZZ interaction between the first superconducting qubit and the second superconducting qubit is on, the computer-implemented method 900 can proceed to operations 908 and 910.

[0100] To provide context for various aspects of the disclosed subject matter, FIGS. 10 and the following description are intended to provide a general description of a suitable environment in which various aspects of the disclosed subject matter may be implemented. FIG. 10 shows a block diagram of an exemplary and non-limiting operating environment that can facilitate one or more embodiments described herein. For example, as described below, the operating environment 1000 can be used to implement the exemplary and non-limiting multi-step manufacturing sequences described above with reference to FIGS. 1A and 1B to manufacture devices 100a, 400a, or 600a or combinations thereof in accordance with one or more embodiments of the present disclosure described herein. In another example, as described below, the operating environment 1000 can be used to implement one or more of the exemplary and non-limiting computer-implemented methods 700, 800, or 900 or combinations thereof described above with reference to FIGS. 7, 8, and 9. For the sake of brevity, repeated descriptions of similar elements or processes or both used in other embodiments described herein are omitted.

[0101] The exemplary and non-limiting multi-step manufacturing sequence described above with reference to FIGS. 1A and 1B that can be implemented to manufacture device 100a, 400a, or 600a or a combination thereof can be implemented by a computing system (e.g., operating environment 1000 illustrated in FIG. 10 and described below), or a computing device (e.g., computer 1012 illustrated in FIG. 10 and described below), or both. In a non-limiting and exemplary embodiment, such a computing system (e.g., operating environment 1000) or such a computing device (e.g., computer 1012) or both can include one or more processors and one or more memory devices capable of storing executable instructions that, when executed by the one or more processors, can facilitate execution of the exemplary and non-limiting multi-step manufacturing sequence described above with reference to FIGS. 1A and 1B. As a non-limiting example, the one or more processors can direct or control, or both, one or more systems or apparatuses, or both, operable to perform the manufacture of semiconductor devices or superconducting devices or both to facilitate execution of the exemplary and non-limiting multi-step manufacturing sequence described above with reference to FIGS. 1A and 1B.

[0102] In another example, one or more of the exemplary and non-limiting computer-implemented methods 700, 800, or 900 or combinations thereof described above with reference to FIGS. 7, 8, and 9, respectively, can also be implemented (e.g., executed) by an operating environment 1000. By way of non-limiting example, one or more processors of such a computing device (e.g., computer 1012) can direct or control one or more systems or devices or both (e.g., one or more types of external devices as defined herein) operable to execute the operations or routines or both of such a computer-implemented method, or facilitate the execution of one or more of the exemplary and non-limiting computer-implemented methods 700, 800, or 900 or combinations thereof described above with reference to FIGS. 7, 8, and 9, respectively.

[0103] For simplicity of explanation, the computer-implemented methodologies are depicted and described as a series of acts. The inventive subject matter is not limited by the acts or the order of acts illustrated, e.g., the acts can occur in various orders or simultaneously or both, and can occur with other acts not presented or described herein. Further, not all acts illustrated are required to implement the computer-implemented methodologies in accordance with the disclosed subject matter. Further, one of ordinary skill in the art will understand and recognize that, alternatively, the computer-implemented methodologies can be represented as a series of interrelated states via a state diagram or events. Further, it should be further understood that the computer-implemented methodologies disclosed herein and throughout can be stored on a manufacture having computer-readable devices or media to facilitate transfer and conveyance of such computer-implemented methodologies to computers. As used herein, the term manufacture is intended to encompass a computer program accessible from any computer-readable device or storage media.

[0104] Referring to FIG. 10, a suitable operating environment 1000 for implementing various aspects of the present disclosure can also include a computer 1012. The computer 1012 can also include a processing unit 1014, a system memory 1016, and a system bus 1018. The system bus 1018 couples system components, including but not limited to the system memory 1016, to the processing unit 1014. The processing unit 1014 can be any of a variety of available processors. Dual microprocessors and other multiprocessor architectures can also be employed as the processing unit 1014. The system bus 1018 can use any of a variety of available bus architectures, including but not limited to Industry Standard Architecture (ISA), Micro Channel Architecture (MSA), Extended ISA (EISA), Intelligent Drive Electronics (IDE), VESA Local Bus (VLB), Peripheral Component Interconnect (PCI), Card Bus, Universal Serial Bus (USB), Advanced Graphics Port (AGP), FireWire (IEEE1394), and Small Computer System Interface (SCSI), and can be any of several types of bus structures, including a memory bus or memory controller, a peripheral bus or external bus, or a local bus or a combination thereof.

[0105] System memory 1016 can also include volatile memory 1020 and non-volatile memory 1022. A basic input / output system (BIOS) that includes basic routines for transferring information between elements within computer 1012 during startup and the like is stored in non-volatile memory 1022. Computer 1012 can also include removable / non-removable volatile / non-volatile computer storage media. FIG. 10 shows, for example, disk storage 1024. Disk storage 1024 can include devices such as, but not limited to, a magnetic disk drive, a floppy (R) disk drive, a tape drive, a Jaz drive, a Zip drive, an LS-100 drive, a flash memory card, or a memory stick. Disk storage 1024 can include the storage media separately or in combination with other storage media. To facilitate connection of disk storage 1024 to system bus 1018, a removable or non-removable interface such as interface 1026 is typically used. FIG. 10 also shows software that acts as an intermediary between a user and the basic computer resources described in the suitable operating environment 1000. Such software can include, for example, operating system 1028. Operating system 1028, which can be stored in disk storage 1024, acts to control and allocate the resources of computer 1012.

[0106] System application 1030 utilizes the management of resources by operating system 1028 via program modules 1032 and program data 1034 stored either in system memory 1016 or on disk storage 1024, for example. It should be understood that the present disclosure may be implemented using various operating systems or combinations of operating systems. A user inputs commands or information into computer 1012 via input device 1036. Input device 1036 includes, but is not limited to, pointing devices such as a mouse, trackball, stylus, touch pad, keyboard, microphone, joystick, game pad, satellite receiving antenna, scanner, TV tuner card, digital camera, digital video camera, web camera, etc. These and other input devices are connected to processing unit 1014 via system bus 1018 through interface port 1038. Interface port 1038 includes, for example, serial ports, parallel ports, game ports, and universal serial bus (USB). Output device 1040 uses some of the same type of ports as input device 1036. Thus, for example, a USB port can be used to provide input to computer 1012 and output information from computer 1012 to output device 1040. Output adapter 1042 is provided to indicate that among output devices 1040, there are some output devices 1040 such as monitors, speakers, and printers that require special adapters. Output adapter 1042 includes, by way of example and not limitation, video cards and sound cards that provide connection means between output device 1040 and system bus 1018. Note that other devices or systems of devices or both, such as remote computer 1044, provide both input and output functions.

[0107] Computer 1012 can operate in a networked environment using logical connections to one or more remote computers such as remote computer 1044. Remote computer 1044 can be a computer, server, router, network PC, workstation, microprocessor-based device, peer device, or other common network node, and typically can include many or all of the elements described with respect to computer 1012. For simplicity, only memory storage device 1046 is shown with remote computer 1044. Remote computer 1044 is logically connected to computer 1012 via network interface 1048 and physically connected via communication connection 1050. Network interface 1048 includes wired or wireless or both communication networks such as local area network (LAN), wide area network (WAN), cellular network, etc. LAN technologies include fiber distributed data interface (FDDI), copper distributed data interface (CDDI), Ethernet(R), token ring, etc. WAN technologies include circuit-switched networks such as point-to-point links, integrated services digital network (ISDN) and its variants, packet-switched networks, and digital subscriber line (DSL), but are not limited to these. Communication connection 1050 refers to the hardware / software used to connect network interface 1048 to system bus 1018. For clarity of explanation, communication connection 1050 is shown inside computer 1012, but can also be external to computer 1012. The hardware / software for connecting to network interface 1048 can include internal and external technologies such as modems including regular telephone grade modems, cable modems, and DSL modems, ISDN adapters, and Ethernet(R) cards for example purposes only.

[0108] The present invention may be a system, method, apparatus, or computer program product, or a combination thereof, at any possible level of integration of technical details. The computer program product may include a computer-readable storage medium (or media) having computer-readable program instructions for causing a processor to implement aspects of the present invention. The computer-readable storage medium can be a tangible device that can hold and store instructions for use by an instruction execution device. The computer-readable storage medium can be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of the computer-readable storage medium includes the following: a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disc (DVD), a memory stick, a floppy disk, a punch card, or a mechanically encoded device such as a raised structure in a groove in which instructions are recorded, and any suitable combination of the foregoing. As used herein, a computer-readable storage medium should not be construed to be a transitory signal per se, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., an optical pulse through an optical fiber cable), or an electrical signal transmitted through a wire.

[0109] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to respective computing / processing devices, or to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, a wireless network, or a combination thereof. The network can include copper transmission cables, optical transmission fibers, wireless transmission, routers, firewalls, switches, gateway computers, or edge servers, or a combination thereof. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and transfers the computer-readable program instructions for storage in a computer-readable storage medium within each computing / processing device. The computer-readable program instructions for carrying out the operations of the present invention can be source code or object code written in any combination of one or more programming languages, including assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state-setting data, configuration data for integrated circuits, or object-oriented programming languages such as Smalltalk(R), C++, and procedural programming languages such as the "C" programming language or similar programming languages. The computer-readable program instructions can be executed entirely on the user's computer as a stand-alone software package, partly on the user's computer, partly on the user's computer and partly on a remote computer, or entirely on a remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (e.g., via the Internet using an Internet service provider).In some embodiments, to carry out aspects of the present invention, an electronic circuit, including, for example, a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), can execute computer-readable program instructions by personalizing the electronic circuit using the state information of the computer-readable program instructions.

[0110] Aspects of the invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer readable program instructions. These computer readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions / acts specified in one or more blocks of the flowchart and / or block diagram. These computer readable program instructions may also be stored in a computer readable storage medium that can direct a computer, a programmable data processing apparatus, or other devices to function in a particular manner, such that the storage medium containing the instructions comprises an article of manufacture including instructions which implement the function / act specified in one or more blocks of the flowchart and / or block diagram. The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus, or other devices to produce a computer implemented process, such that the instructions which execute on the computer, other programmable apparatus, or other devices implement the functions / acts specified in one or more blocks of the flowchart and / or block diagram.

[0111] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagram can represent a module, segment, or portion of instructions that include one or more executable instructions for implementing the specified logical function. In some alternative implementations, the functions described in the blocks can be performed in an order different from that shown in the figures. For example, two blocks shown in succession can in fact be executed substantially simultaneously, depending on the functions involved, or, in some cases, they can be executed in the reverse order. It should also be noted that each block of the block diagram or flowchart diagram, or both, and combinations of blocks in the block diagram or flowchart diagram, or both, can be implemented by a dedicated hardware-based system that performs the specified function or operation or by a combination of dedicated hardware and computer instructions.

[0112] Although the subject matter has been described above in the general context of computer-executable instructions of a computer program product that runs on one or more computers, those skilled in the art will understand that the present disclosure may also be implemented in combination with other program modules. In general, program modules include routines, programs, components, data structures, etc. that perform specific tasks, implement specific abstract data types, or both. Also, those skilled in the art will understand that the computer-implemented methods of the present invention may be implemented in other computer system configurations including single-processor or multi-processor computer systems, minicomputing devices, mainframe computers, as well as computers, handheld computing devices (e.g., PDAs, phones), microprocessor-based or programmable consumer or industrial electronic devices, etc. The illustrated aspects may be implemented in a distributed computing environment where tasks are performed by remote processing devices linked via a communication network. However, some aspects, if not all aspects of the present disclosure, may be implemented on a stand-alone computer. In a distributed computing environment, program modules may be located in both local and remote memory storage devices. For example, in one or more embodiments, computer-executable components may be executed from a memory that may include or be composed of one or more distributed memory units. The terms "memory" and "memory unit" as used herein are interchangeable. Further, one or more embodiments described herein can execute the code of computer-executable components in a distributed manner, e.g., multiple processors can execute the code from one or more distributed memory units in combination or in cooperation. The term "memory" as used herein can include a single memory or memory unit in one location, or multiple memories or memory units in one or more locations.

[0113] As used in this application, terms such as "component", "system", "platform", "interface", etc. can refer to, include, or both, computer-related entities having one or more specific functionalities, or entities related to computing machines. Entities disclosed herein can be either hardware, a combination of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, or a computer or a combination thereof. As an example, both an application running on a server and the server can be components. One or more components can exist within a process or an execution thread or both, and a component can be located on one computer, distributed between two or more computers, or both. In another example, each component can be executed from various computer-readable media storing various data structures. A component can communicate via local or remote processes or both, according to, for example, signals having one or more data packets (e.g., data from one component that interacts with another component within a local system or a distributed system, or with another system via a network such as the Internet, or both) over a signal. As another example, a component can be a device having a specific functionality provided by an electrical or electronic circuit operated by software or a firmware application executed by a processor, or by a mechanical part operated by such a circuit. In such a case, the processor can be internal or external to the device and can execute at least a portion of the software or firmware application.As yet another example, the component can be a device that provides a particular function via electronic components without mechanical parts, and the electronic components can include a processor or other means that execute software or firmware that at least partially provides the function of the electronic components. In one aspect, the component can emulate the electronic components via, for example, a virtual machine within a cloud computing system.

[0114] Furthermore, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or". That is, unless otherwise specified or clear from the context, "X employs A or B" is intended to mean any of the natural inclusive substitutions. That is, "X employs A or B" is satisfied in any of the following cases: X employs A; X employs B; or X employs both A and B. Further, the articles "a" and "an" as used in this specification and the appended drawings are generally to be construed to mean "one or more" unless otherwise specified or it is clear from the context that the singular form is intended. The terms "example" or "exemplary" or both as used in this specification are utilized as serving as an example, instance, or illustration. To avoid misunderstanding, the subject matter disclosed in this specification is not limited to such examples. Further, any aspect or design described in this specification as "example" or "exemplary" or both should not be construed as necessarily being preferred or advantageous as compared to other aspects or designs, nor does it mean excluding equivalent exemplary structures and techniques known to those skilled in the art.

[0115] As used herein, the term "processor" can refer to substantially any computing processing unit or device, including but not limited to a single-core processor, a single processor with software multithreading execution capabilities, a multi-core processor, a multi-core processor with software multithreading execution capabilities, a multi-core processor with hardware multithreading technology, a parallel platform, and a parallel platform with distributed shared memory. Further, a processor can refer to an integrated circuit, an application specific integrated circuit (ASIC), a digital signal processor (DSP), a field programmable gate array (FPGA), a programmable logic controller (PLC), a complex programmable logic device (CPLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. Also, a processor can utilize nanoscale architectures such as, but not limited to, molecular and quantum dot-based transistors, switches, and gates to optimize the spatial use or enhance the performance of a user device. A processor can also be implemented as a combination of computing processing units. In the present disclosure, the terms "store", "storage", "data store", "data storage", "database", and substantially any other information storage component related to the operation and function of a component are used to refer to an entity embodied in a "memory component", "memory", or a component including a memory. It should be understood that the memory or memory components or both described herein can be either volatile memory or non-volatile memory, or can include both volatile memory and non-volatile memory.By way of example and not limitation, non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), flash memory, or non-volatile random access memory (RAM) (e.g., ferroelectric RAM (FeRAM)). Volatile memory can include, for example, RAM that can act as an external cache memory. By way of example and not limitation, RAM is available in many forms such as synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), extended SDRAM (ESDRAM), synchlink DRAM (SLDRAM), direct rambus RAM (DRRAM), direct rambus dynamic RAM (DRDRAM), and rambus dynamic RAM (RDRAM). Further, the disclosed memory components of the systems or computer-implemented methods of this specification are not limited to including these, but are intended to include these and any other suitable types of memory.

[0116] What has been described above are only examples of systems and computer-implemented methods. Of course, it is impossible to describe all possible combinations of components or computer-implemented methods or both in order to explain the present disclosure, but those skilled in the art can understand that many further combinations and permutations of the present disclosure are possible. Further, as long as terms such as "including", "having", "possessing", etc. are used in the detailed description, claims, accompanying documents and drawings, such terms are intended to be inclusive in the same way as they are construed when the term "comprising" is used as a transitional term in the claims.

[0117] The description of various embodiments has been presented for illustrative purposes, but this description is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terms used herein are chosen to best explain the principles of the embodiments, actual applications, or technical improvements over technologies found in the marketplace, or to enable those skilled in the art to understand the embodiments disclosed herein.

Claims

1. A device, comprising: a coupler device comprising a first Josephson junction and a second Josephson junction connected in series, the coupler device operating in a first vibration mode and a second vibration mode; a first superconducting qubit coupled to the coupler device based on a first vibration mode structure corresponding to the first vibration mode and based on a second vibration mode structure corresponding to the second vibration mode; a second superconducting qubit coupled to the coupler device based on the first vibrational mode structure and the second vibrational mode structure; 16. A device comprising:

2. 2. The device of claim 1 , wherein at least one of the first superconducting qubit or the second superconducting qubit comprises at least one of a transmon qubit, a fixed frequency qubit, or a fixed frequency transmon qubit.

3. 3. The device of claim 1 or 2, wherein the coupler device comprises at least one of a two-junction qubit, a fixed frequency coupler, a multimode two-junction coupler, a flux-tunable coupler, a tunable coupler qubit, a flux-tunable coupler qubit, a tunable qubit, a tunable bus, or a flux-tunable qubit bus.

4. A device comprising: a coupler device operating in a first vibration mode and a second vibration mode; a first superconducting qubit coupled to the coupler device based on a first vibration mode structure corresponding to the first vibration mode and based on a second vibration mode structure corresponding to the second vibration mode; a second superconducting qubit coupled to the coupler device based on the first vibrational mode structure and the second vibrational mode structure; Equipped with the first and second vibration modes exhibit spatially symmetric and anti-spatially symmetric combinations of excitations associated with first and second Josephson junctions of the coupler device.

5. 5. The device of claim 1, wherein the first and second superconducting qubits have equal exchange coupling with the first and second vibrational mode structures based on a critical current of the coupler device, and the equal exchange coupling suppresses ZZ interaction between the first and second superconducting qubits over a defined range of qubit frequencies, thereby facilitating at least one of reduced quantum gate errors associated with at least one of the first or second superconducting qubits, faster quantum gates including the first and second superconducting qubits, or improved fidelity, accuracy, or performance of a quantum processor comprising the device.

6. 1. A computer-implemented method comprising: generating, by a system operatively coupled to a processor, exchange coupling between the first and second superconducting qubits and first and second vibration mode structures of a coupler device comprising first and second Josephson junctions connected in series; creating an entangled quantum gate between the first superconducting qubit and the second superconducting qubit with the system; 4. A computer-implemented method comprising:

7. 7. The computer-implemented method of claim 6, wherein at least one of the first superconducting qubit or the second superconducting qubit comprises at least one of a transmon qubit, a fixed frequency qubit, or a fixed frequency transmon qubit.

8. 8. The computer-implemented method of claim 6 or 7, wherein the coupler device comprises at least one of a two-junction qubit, a fixed frequency coupler, a multimode two-junction coupler, a flux-tunable coupler, a tunable coupler qubit, a flux-tunable coupler qubit, a tunable qubit, a tunable bus, or a flux-tunable qubit bus.

9. A computer-implemented method comprising: generating, by a system operatively coupled to the processor, exchange couplings between the first and second superconducting qubits and the first and second vibrational mode structures of the coupler device; creating an entangled quantum gate between the first superconducting qubit and the second superconducting qubit with the system; Including, the first and second vibration mode structures correspond to first and second vibration modes, respectively, of the coupler device, the first and second vibration modes representing spatially symmetric and anti-spatially symmetric combinations of excitations associated with first and second Josephson junctions of the coupler device.

10. 10. The computer-implemented method of claim 6, further comprising: generating equivalent exchange coupling by the system between the first and second superconducting qubits and the first and second vibrational mode structures to suppress ZZ interaction between the first and second superconducting qubits over a defined range of qubit frequencies, thereby facilitating at least one of: reduced quantum gate errors associated with at least one of the first or second superconducting qubits; faster quantum gates including the first and second superconducting qubits; or improved fidelity, accuracy, or performance of a quantum processor including the coupler device, the first and second superconducting qubits.

11. A device, comprising: a coupler device comprising first and second Josephson junctions connected in series, the coupler device operating in first and second vibration modes exhibiting spatially symmetric and anti-spatially symmetric combinations of excitations associated with the Josephson junctions of the coupler device and the flux-controlled qubit device; a first superconducting qubit coupled to the coupler device based on a first vibration mode structure corresponding to the first vibration mode and based on a second vibration mode structure corresponding to the second vibration mode; a second superconducting qubit coupled to the coupler device based on the first vibrational mode structure and the second vibrational mode structure; 16. A device comprising:

12. 12. The device of claim 11 , wherein at least one of the first superconducting qubit or the second superconducting qubit comprises at least one of a transmon qubit, a fixed frequency qubit, or a fixed frequency transmon qubit.

13. 13. The device of claim 11 or 12, wherein the coupler device comprises at least one of a two-junction qubit, a fixed frequency coupler, a multimode two-junction coupler, a flux-tunable coupler, a tunable coupler qubit, a flux-tunable coupler qubit, a tunable qubit, a tunable bus, or a flux-tunable qubit bus.

14. 14. The device of claim 11, wherein the flux-controlled qubit device comprises a superconducting quantum interference device loop.

15. 15. The device of any one of claims 11 to 14, wherein the first and second superconducting qubits have equal exchange coupling with the first and second vibrational mode structures based on a critical current of the coupler device, and the equal exchange coupling suppresses ZZ interaction between the first and second superconducting qubits over a defined range of qubit frequencies, thereby facilitating at least one of reduced quantum gate errors associated with at least one of the first or second superconducting qubits, faster quantum gates including the first and second superconducting qubits, or improved fidelity, accuracy, or performance of a quantum processor comprising the device.

16. A device, comprising: a first superconducting qubit; a second superconducting qubit; and operating in a first vibration mode and a second vibration mode; a first Josephson junction and a second Josephson junction connected in series; a first superconducting pad coupled to the first superconducting qubit; a second superconducting pad coupled to the second superconducting qubit; and a third superconducting pad coupled to the first superconducting qubit; A coupler device comprising: A device comprising:

17. 17. The device of claim 16, wherein at least one of the first superconducting qubit or the second superconducting qubit comprises at least one of a transmon qubit, a fixed frequency qubit, or a fixed frequency transmon qubit.

18. 18. The device of claim 16 or 17, wherein the coupler device comprises at least one of a two-junction qubit, a fixed frequency coupler, a multimode two-junction coupler, a flux-tunable coupler, a tunable coupler qubit, a flux-tunable coupler qubit, a tunable qubit, a tunable bus, or a flux-tunable qubit bus.

19. A device comprising: a first superconducting qubit; a second superconducting qubit; and operating in a first vibration mode and a second vibration mode; a first superconducting pad coupled to the first superconducting qubit; a second superconducting pad coupled to the second superconducting qubit; and a third superconducting pad coupled to the first superconducting qubit; A coupler device comprising: Equipped with the first and second vibration modes exhibit spatially symmetric and anti-spatially symmetric combinations of excitations associated with first and second Josephson junctions of the coupler device.

20. 20. The device of any one of claims 16-19, wherein the first superconducting pad and the third superconducting pad are coupled to the first superconducting qubit based on a first vibration mode structure corresponding to the first vibration mode, and the second superconducting pad is coupled to the second superconducting qubit based on a second vibration mode structure corresponding to the second vibration mode to reduce direct exchange coupling between the first superconducting qubit and the second superconducting qubit and suppress ZZ interaction between the first superconducting qubit and the second superconducting qubit, thereby facilitating at least one of reduced quantum gate errors associated with at least one of the first superconducting qubit or the second superconducting qubit, faster quantum gates including the first superconducting qubit and the second superconducting qubit, or improved fidelity, accuracy, or performance of a quantum processor comprising the device.

21. 1. A computer-implemented method comprising: coupling, by a system operatively coupled to a processor, a first superconducting qubit to a first vibration mode structure corresponding to a first vibration mode of a coupler device comprising a first Josephson junction and a second Josephson junction connected in series; coupling, by the system, a second superconducting qubit to a second vibrational mode structure corresponding to a second vibrational mode of the coupler device; detuning the coupler device from the first vibration mode or the second vibration mode by the system; 4. A computer-implemented method comprising:

22. 22. The computer-implemented method of claim 21 , wherein at least one of the first superconducting qubit or the second superconducting qubit comprises at least one of a transmon qubit, a fixed frequency qubit, or a fixed frequency transmon qubit.

23. 23. The computer-implemented method of claim 21 or 22, wherein the coupler device comprises at least one of a two-junction qubit, a fixed frequency coupler, a multimode two-junction coupler, a flux-tunable coupler, a tunable coupler qubit, a flux-tunable coupler qubit, a tunable qubit, a tunable bus, or a flux-tunable qubit bus.

24. A computer-implemented method comprising: coupling, by a system operatively coupled to the processor, a first superconducting qubit to a first vibrational mode structure corresponding to a first vibrational mode of the coupler device; coupling, by the system, a second superconducting qubit to a second vibrational mode structure corresponding to a second vibrational mode of the coupler device; detuning the coupler device from the first vibration mode or the second vibration mode by the system; Including, The computer-implemented method, wherein the first vibrational mode and the second vibrational mode represent spatially symmetric and anti-spatially symmetric combinations of excitations associated with first and second Josephson junctions of the coupler device.

25. 25. The computer-implemented method of any one of claims 21 to 24, further comprising: coupling by the system the first superconducting qubit to the first vibrational mode structure and coupling the second superconducting qubit to the second vibrational mode structure to reduce direct exchange coupling between the first superconducting qubit and the second superconducting qubit and to suppress ZZ interaction between the first superconducting qubit and the second superconducting qubit, thereby facilitating at least one of: reduced quantum gate errors associated with at least one of the first superconducting qubit or the second superconducting qubit; faster quantum gates including the first superconducting qubit and the second superconducting qubit; or improved fidelity, accuracy, or performance of a quantum processor including the coupler device, the first superconducting qubit, and the second superconducting qubit.

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