Computational Architecture for Active Noise Reduction Devices
A computational architecture with multiple processors optimizes task matching and reduces power consumption in ANR devices, addressing increased computational demands and costs.
Patent Information
- Application Number
- JP2024124926
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-02-12
- Filing Date
- 2024-07-31
- Publication Date
- 2025-05-20
- Estimated Expiration
- 2041-02-10
AI Technical Summary
Existing ANR devices face increased computational requirements and power consumption due to complex features, leading to higher costs and inefficiencies.
A computational architecture with at least three separate processors, each configured to perform specific functions, optimizing task matching and reducing power consumption by dividing functions among them.
Enhances computational efficiency and reduces power consumption while maintaining advanced features in ANR devices.
Smart Images

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Abstract
Description
[Technical field]
[0001] (Priority Claim) This application claims priority to U.S. Patent Application No. 16 / 788,365, filed February 12, 2020, which is incorporated by reference in its entirety.
[0002] FIELD OF THEINVENTION The present disclosure relates generally to personal active noise reduction (ANR) devices and, more particularly, to a computational architecture for efficiently handling different ANR processing functions. [Background technology]
[0003] Headphones and other physical configurations of personal ANR devices worn around a user's ears to isolate the user's ears from unwanted environmental sounds have become common. ANR headphones combat unwanted environmental noise through active generation of anti-noise signals. These ANR headphones are in contrast to passive noise reduction (PNR) headsets that only physically isolate the user's ears from environmental noise. Of particular interest to users are ANR headphones that incorporate audio listening capabilities, allowing the user to listen to electronically provided audio (e.g., playback of recorded audio or audio received from another device) without the intrusion of unwanted environmental noise.
[0004] As ANR devices become more prevalent, the demand for increased performance and more robust features drives the need for more complex computational requirements. For example, in addition to providing state-of-the-art signal processing, ANR devices are tasked with providing enhanced features, such as multiple I / O ports (e.g., Bluetooth, USB, etc.), high quality telephone service, noise level control management, event processing, user experience command processing, etc. Along with the increased computational requirements, more complex hardware is added to ANR devices, increasing both cost and power consumption. Summary of the Invention [Means for solving the problem]
[0005] All examples and features mentioned below can be combined in any technically possible manner.
[0006] A system and method are disclosed that describes a computational architecture for efficiently handling different ANR processing functions of an ANR device.
[0007] In some implementations, the described computing architecture includes at least three separate processors, each configured to perform a set of computing functions appropriate for the individual processor. In such cases, the architecture allows different types of requested functions to be handled by the processor that matches the requirements of the task (e.g., priority, speed, memory resources). By dividing the functions among different processors, computational efficiencies are gained and power consumption is reduced.
[0008] One aspect provides a personal active noise reduction (ANR) device, the ANR device including a communication interface configured to receive a source audio stream and a control signal, a driver, a microphone system, and an ANR computing architecture.
[0009] In a particular implementation, the ANR computation architecture includes a first DSP processor configured to receive a source audio stream and a signal from a microphone system, the first DSP processor performing ANR on the source audio stream according to a set of operating parameters introduced into the first DSP processor and outputting a processed audio stream to a driver; a second DSP processor generating state data in response to analysis of at least one of the source audio stream, the signal from the microphone system, and the processed audio stream and modifying the set of operating parameters on the first DSP processor; and a general-purpose processor operably coupled to the first DSP processor and the second DSP processor, the general-purpose processor configured to communicate control signals with a communication interface, process the state data from the second DSP processor, and modify the set of operating parameters on the first DSP processor.
[0010] Implementations may include one or any combination of the following features.
[0011] In certain aspects, the operating parameters are selected from the group consisting of filter coefficients, compressor settings, signal mixers, gain conditions, and signal routing options.
[0012] In another aspect, the status data generated by the second DSP processor includes error conditions detected in the processed audio stream.
[0013] In a further aspect, the status data generated by the second DSP processor includes frequency domain overload conditions detected in the processed audio stream.
[0014] In some implementations, the state data generated by the second DSP includes sound pressure level (SPL) information detected from the microphone system and the processed audio stream.
[0015] In a further implementation, the communication interface includes a Bluetooth system.
[0016] In certain cases, the general-purpose processor includes a sleep mode to conserve power, the sleep mode being configured to be initiated by at least one of the first DSP processor, the second DSP processor, and the communications interface.
[0017] In certain aspects, the general purpose processor is further configured to apply machine learning to the state data received from the second DSP processor.
[0018] In certain implementations, the general-purpose processor is further configured to apply machine learning to the time-based signal, in some cases, the time-based signal includes blocks of raw audio data received from a microphone system and / or via a Bluetooth system.
[0019] In another aspect, the operational parameters include filter coefficients, and the general purpose processor is further configured to calculate and install updated filter coefficients in the first DSP processor.
[0020] In some cases, the general-purpose processor is further configured to evaluate the status data to identify an impairment status of the personal ANR.
[0021] Two or more of the features described in this disclosure, including the features described in this Summary section, may be combined to form implementations not specifically described herein.
[0022] The details of one or more implementations are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will become apparent from the description and drawings, and from the claims. [Brief description of the drawings]
[0023] [Figure 1]FIG. 1 is a block diagram of an ANR device having a hierarchical computing architecture according to various implementations. [Diagram 2] 1 shows a detailed diagram of a computing architecture according to various implementations. [Diagram 3] 1 illustrates an exemplary personal ANR wearable according to various implementations.
[0024] It should be noted that the drawings of the various implementations are not necessarily to scale. The drawings are intended to depict only typical aspects of the disclosure and therefore should not be considered as limiting the scope of the implementations. In the drawings, like numbering represents like elements between the drawings. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0025] Various implementations of the present disclosure describe a computational architecture for an active noise reduction (ANR) device that includes at least three separate processors, each configured to perform a set of computational functions suitable for the individual processor. Thus, the architecture allows each required function to be processed by a processor that matches the requirements of the task (e.g., priority, speed, memory resources). By dividing the functions among different processors, computational efficiencies can be gained and power consumption can be reduced.
[0026] This disclosure provides architectures for devices such as headphones that employ ANR, but an exhaustive description of ANR is omitted for brevity. If desired, exemplary ANR systems are described, for example, in U.S. Patent No. 8,280,066, entitled "Binaural Feedforward-based ANR," issued to Joho et al. on October 2, 2012, and U.S. Patent No. 8,184,822, entitled "ANR Signal Processing Topology," issued to Carreras et al. on May 22, 2012, the contents of both of which are incorporated herein by reference.
[0027] The solutions disclosed herein are intended to be applicable to a wide variety of personal ANR devices, i.e., devices that are at least partially worn by a user near at least one of the user's ears and structured to provide ANR functionality for at least one of the ears. It should be noted that various specific implementations of personal ANR devices can include headphones, two-way communication headsets, earphones, earbuds, audio glasses, wireless headsets (also known as "earsets"), and ear protectors, but the presentation of specific implementations is intended to facilitate understanding by use of the examples and should not be construed as limiting the scope of the present disclosure or the scope of the claims.
[0028] Furthermore, the solutions disclosed herein are applicable to personal ANR devices that provide two-way voice communication, one-way voice communication (i.e., an acoustic output of voice electronically provided by another device), or no communication. Furthermore, what is disclosed herein is applicable to personal ANR devices that are wirelessly connected to other devices, connected to other devices via electrically and / or optically conductive cables, or not connected to any other devices. These teachings are applicable to personal ANR devices having a physical structure configured to be worn near either one or both ears of a user, including, but not limited to, headphones with one or two earpieces, over-the-head headphones, behind-the-neck headphones, headsets with a communication microphone (e.g., a boom microphone), wireless headsets (i.e., headsets), audio glasses, a single earphone or a pair of earphones, as well as hats, helmets, clothing, or any physical structure incorporating one or two earpieces to enable voice communication and / or ear protection.
[0029] Beyond personal ANR devices, what is disclosed and claimed herein is meant to be applicable to providing ANR in relatively small spaces where a person can sit or stand, including, but not limited to, telephone booths, automobile cabins, and the like.
[0030] FIG. 1 is a block diagram of a personal ANR device 10, which in one embodiment may be configured to be worn by a user and provide active noise reduction (ANR) near at least one ear of the user. The personal ANR device 10 may have any of several physical configurations, such as configurations incorporating a single earpiece to provide ANR to only one ear of the user, other configurations incorporating a pair of earpieces to provide ANR to both ears of the user, and other configurations incorporating one or more standalone speakers to provide ANR to the user's surrounding environment. However, it should be noted that for ease of explanation, only a single device 10 is shown and described in connection with FIG. 1. As will be described in further detail, the personal ANR device 10 incorporates functionality that may provide either or both of feedback-based ANR and feedforward-based ANR, in addition to being able to further provide passing audio.
[0031] In the exemplary embodiment of FIG. 1, the ANR device 10 includes a wireless communication interface, in this case a Bluetooth system 12, that provides communication with an audio gateway device (or simply gateway device) 30, such as a smart phone, wearable smart device, laptop, tablet, server, etc. The Bluetooth system 12 may be implemented, for example, as a Bluetooth system on a chip (SoC), a Bluetooth low energy (BLE) module, or in any other manner. It should be noted that while the ANR device 10 is shown to provide wireless communication using the Bluetooth system 12, any type of wireless technology (e.g., Wi-Fi Direct, cellular, etc.) could be used instead. Communication with the ANR device 10 may also occur via a first universal serial bus (USB) port 16 that interfaces with the Bluetooth system 12, and / or a second USB port 18 that interfaces with a general purpose (GP) processor 24. The GP processor 24 is one of at least three processors implemented in the ANR device 10; the other processors being a first digital signal processing (DSP) processor 20 and a second DSP processor 22, which together form the DSP system 14.
[0032] In a typical application, a source audio stream 32 is received from the gateway device 30 via the Bluetooth system 12 and sent to the DSP system 14 where the first DSP processor 20 performs ANR and generates a processed audio stream 34, which is then distributed via the acoustic driver 26 (i.e., speaker). The microphone system 28 captures environmental noise sounds provided to the DSP system 14 and provides a reference signal for generating, for example, a noise prevention sound for the ANR. For example, using the captured sounds, a noise prevention signal is calculated and output by the acoustic driver 26 with an amplitude and time shift calculated to acoustically interact with undesirable noise sounds in the surrounding environment. The microphone system 28 may also be used to capture the voice of a user, which may be communicated via an output audio stream 36 to the Bluetooth system 12 and then to the gateway device 30, such as in a telephony application. It will be appreciated that the number and location of individual microphones in the microphone system 28 will depend on the particular requirements of the ANR device 10. Further, as mentioned above, rather than using the Bluetooth system 12 to communicate with the gateway device 30, any type of communication interface may be implemented, such as USB ports 16, 18, or other communication ports and protocols (not shown).
[0033] In addition to the audio stream, control signals 40 may also be communicated between the gateway device 30 and the GP processor 24. The control signals 40 may include, for example, data packets from the gateway device 30 (e.g., to update a controllable noise cancellation (CNC) level), ANR device generated data packets communicated to the gateway device 30 (e.g., to provide coordination between a pair of earbuds), user generated control signals (e.g., to skip to the next song, answer a call, set a CNC level, etc.). Additionally, as described in more detail herein, the GP processor 24 may generate feedback 42 (e.g., product usage characteristics, fault detection, etc.) that may be reported to the gateway device 30 and / or a remote service such as the cloud platform 31. The feedback 42 may be used to enhance the user experience, for example, by providing details about how the ANR device 10 is used, reporting error conditions, etc.
[0034] The ANR device 10 generally includes additional components, which are omitted for simplicity, including, for example, a power source, visual input / output such as a GUI and / or LED indicators, tactile input / output, power and control switches, additional memory, capacitive inputs, sensors, etc.
[0035] As previously mentioned, the computational architecture of the ANR device 10 utilizes at least three separate processors that provide a modular, hierarchical operating platform for implementing the functions associated with the ANR device 10. Using this architecture, the processing power of each processor is matched with a specific task to enhance the efficiency of the system. In general, the first DSP processor 20 provides a set of core ANR algorithms 50 designed to provide active noise reduction to the audio stream 32. The second DSP processor 22 provides a set of signal analysis (SA) algorithms 52 designed to analyze ANR operation, provide status data such as operating characteristics, faults, etc., and automatically adjust parameters in the ANR algorithms 50 in response to any available signals in the ANR device 10, and the GP processor 24 provides a set of high-level functions 54 such as managing user controls, providing I / O processing, and handling events generated by the DSP system 14.
[0036] FIG. 2 illustrates the processor hierarchy and characteristics in more detail. In this exemplary embodiment, both the first DSP processor 20 and the second DSP processor 22 share a common bus 21 to access the GP processor 24, the microphone system 28, the audio stream, etc. As described herein, the first DSP processor 20 includes a set of core ANR algorithms 50 that process the input audio stream 32 (FIG. 1), including, for example, feedback loop processing, compensation processing, feedforward loop processing, and audio equalization. The core ANR algorithms 50 may include operational ANR parameters that dictate, for example, filter coefficients, compressor settings, signal mixers, gain conditions, signal routing options, etc. The core ANR algorithms 50 may generally be characterized as stream processing-oriented, relatively low complexity processes that require high levels of processor performance. In particular, the functions performed by the core ANR algorithms 50 are intended to operate very quickly with a minimal amount of processing options and storage requirements. For these types of stream processing functions, only very low latency is required, for example, on the order of 1-10 microseconds. Furthermore, because the first DSP processor 20 provides the core ANR functionality, the first DSP processor 20 must be continuously powered as long as the ANR device 10 is operational. Therefore, the first DSP processor 20 is tuned to perform the calculations of the ANR algorithm 50 using as little power as possible.
[0037] The second DSP processor 22 does not directly provide ANR processing, but instead includes a set of signal analysis algorithms 52 that analyze signals and generate status data that characterize, for example, signals in the ANR device 10, the ANR processing being performed by the first DSP processor 20. The status data may include, for example, fault information, instability detection, performance characteristics, error conditions, frequency domain overload conditions, sound pressure level (SPL) information, etc. The signal analysis algorithms 52 perform different types of analysis that may use thresholds and rules. For example, if a set of frequency characteristics deviates from an expected range, a fault may be triggered and a corresponding "event" may be output to the GP processor 24, which may then take corrective action.
[0038] Any process adapted to analyze the signal may be deployed in the second DSP processor 22 . Non-limiting exemplary signal analysis algorithms 52 are described, for example, in U.S. Patent No. 10,244,306, issued March 26, 2019, entitled "Real-time detection of feedback instability" (e.g., describing instability detection), U.S. Patent Application Publication No. 2018 / 0286374, entitled "Parallel Compensation in Active Noise Reduction Devices," U.S. Patent Application Publication No. 2018 / 0286373, entitled "Active Noise Reduction Devices," U.S. Patent Application Publication No. 2018 / 0286375, entitled "Automatic Gain Control in Active Noise Reduction (ANR) Signal Flow Path" (e.g., describing overload conditions), and U.S. Patent Application Publication No. 2019 / 0130928, entitled "Compressive Hear-through in Personal Acoustic Devices" (e.g., describing control of ANR to produce maximum sound volume at the ear), each of which is incorporated by reference in its entirety.
[0039] As described herein, the second DSP processor 22 can also directly modify the operating (i.e., ANR) parameters of the first DSP processor 20. For example, in certain cases, a signal analysis algorithm 52 is deployed to automatically adjust the ANR parameters (i.e., within the core ANR algorithm 50) to achieve a desired experience based on internal signals captured from the algorithms 50, 52, from the GP processor 24, from any of the microphones 28, from the input audio stream 32, and / or from the control signal 40. For example, in certain implementations, the ANR parameters are adjusted using external signals monitored by the algorithm 52, such as external sound pressure level (SPL) characteristics received by the microphone(s) 28.
[0040] Because the second DSP processor 22 does not directly implement the core ANR services, it requires a relatively small amount of performance, but provides a relatively large amount of computational complexity. For example, in certain cases, the tasks performed by the second DSP processor 22 may tolerate longer latencies, for example, on the order of 100 microseconds to 10 milliseconds. Like the first DSP processor 20, the second DSP processor is also continuously powered during operation of the device 10. In certain implementations, the second DSP processor 22 is configured to perform both stream and block processing, and includes a moderate amount of data storage and programmability to effectively perform analytical tasks.
[0041] The GP processor 24 includes a set of high level functions 54 that are one level removed from the ANR processing performed by the first DSP processor 20. The particular functions 54 performed by the GP processor 24 may depend on the requirements of the ANR device 10. An exemplary set of functions is shown in FIG. 2. In a particular exemplary implementation, a communication algorithm 56 handles I / O and command processing functions. In some cases, the communication algorithm 56 includes a unified messaging interface for converting different communication protocols (e.g., USB vs. Bluetooth) to a common protocol. The unified messaging interface allows commands to be stored and implemented in a single location (i.e., the GP processor 24) for interpreting the commands, thus allowing all commands to be routed to the GP processor 24 for processing.
[0042] The GP processor 24 is generally tasked with handling the greater number and more complex calculations. In some implementations, the GP processor 24 calculates "one-time" filter coefficients customized for an individual user based on how the product fits on the head. In certain implementations, the user experience algorithms 64 analyze the fit of the user based on, for example, the control signals 40 and the feedback 42, and the communication algorithms 56 notify the user to adjust the fit of the device 10 in response to the fitting algorithms.
[0043] In various implementations, the GP processor 24 further includes an ANR control algorithm 58 that updates operating parameters of the first DSP processor 20 in response to events received from the DSP system 14 or in response to control signals 40 received from the gateway device 30 (FIG. 1). In some cases, the control algorithm 58 implements CNC (controllable noise cancellation) features, etc.
[0044] As previously mentioned, the GP processor 24 may receive an "event" from the second DSP processor 22 indicating instability or some other problem, for example, as detected using techniques described in U.S. Pat. No. 10,244,306 (previously incorporated by reference herein). If an immediate change is required to mitigate the instability based on one or more received events, the second DSP processor 22 is typically responsible for modifying the ANR parameters in the first DSP processor 20. Regardless of whether an immediate change is required, the GP processor 24 may record the event that generated the event in local memory and report the event(s) via the Bluetooth system 12 (FIG. 1).
[0045] After collecting a series of events, the GP processor 24 can utilize one or more of its algorithms to identify and / or address the situation. For example, if multiple instability events are detected, the system health algorithm 62 is deployed to determine whether a more severe problem exists (e.g., malfunction of the ANR device 10). If a malfunction is identified, the system health algorithm 62 is configured to characterize the malfunction, and based on the nature of the malfunction, the system health algorithm 62 directly initiates an ANR parameter change in the DSP processor 20. In other cases, the system health algorithm 62 performs other operations, such as analyzing the event data, reporting the analysis to the gateway device 30, applying machine learning to determine the cause of the malfunction, etc. As described, the damage status of the ANR device 10 is reported to the gateway device 30 to notify the device user (or another user) that the ANR device 10 is malfunctioning.
[0046] By way of example, if an instability event is detected, e.g., using techniques described in U.S. Patent No. 10,244,306 (previously incorporated by reference herein), the GP processor 24 records the event. If the number of detected instability events exceeds a predetermined threshold, the GP processor 24 is configured to provide a notification (e.g., to the device user or another user) that the device 10 is likely malfunctioning. Similarly, if the data measured when calculating filter coefficients customized for an individual user based on how the product fits on the user's head indicates an anomaly (e.g., poor fit characterized by an unexpected difference in feedback vs. feedforward microphone signals), the GP processor 24 provides feedback instructing the user to adjust the device, e.g., for fit.
[0047] In other cases, tuning algorithm 60 is deployed to tune performance between a pair of earphones (e.g., earbuds, over-ear audio devices, etc.). For example, in response to detecting that a first earphone is operating at a low ANR performance level (e.g., due to a detected impairment), tuning algorithm 60 matches the ANR performance level of the first earphone to the second earphone to avoid performance mismatches and ensure a better user experience.
[0048] In various embodiments, user experience algorithms 64 are deployed to provide user controls such as volume, equalization, and to implement different modes of operation such as phone calls, music listening, etc. User experience algorithms 64 may be implemented to analyze sensor data to automatically control ANR device 10 (e.g., provide special settings when aboard an airplane), collect and provide feedback that can be analyzed remotely, etc. In other cases, algorithms 64 respond to status data that ANR device 10 is not a good fit (e.g., does not detect a proper seal with the user's ear canal) and output a warning (e.g., to the device user or another user).
[0049] In additional implementations, GP processor 24 is configured to implement a machine learning model or event classifier. In some embodiments, GP processor 24 is configured to apply machine learning to state data received from second DSP processor 22. In more specific embodiments, GP processor 24 is configured to apply machine learning to state data received from second DSP processor 22 and to a time-based signal, such as a block of raw audio data. In some cases, the time-based signal (which may include raw or unprocessed audio data) is received via microphone system 28 and / or Bluetooth system 12 (e.g., as audio stream 32). Exemplary machine learning techniques involving signal processing are described in U.S. patent application Ser. No. 16 / 425,550, entitled "Automatic Active Noise Reduction (ANR) Control," filed May 29, 2019, and U.S. patent application Ser. No. 16 / 690,675, entitled "Active Transit Vehicle Classification," filed November 21, 2019, both of which are incorporated by reference in their entireties.
[0050] In further implementations, a lightweight operating system (OS) and / or function libraries 66 may be implemented to instantiate the various functions 54 on the GP processor 24, allowing algorithms and routines to be easily accessed, added, and removed, allowing software updates to be performed, providing access to storage, providing for the use of higher level scripting and / or programming languages, and the like.
[0051] Because the GP processor 24 does not perform any time-constrained signal processing services, the GP processor 24 can be implemented with relatively low performance, but requires a relatively large amount of computational complexity to provide extensive functionality. Latency can be relatively high, for example, on the order of 100 milliseconds to 10 seconds, when performing functions. Furthermore, because its functionality is not always needed, the GP processor 24 is configured to be placed into a low power or sleep mode when not needed (e.g., when no event is detected or requires analysis). The sleep mode is configured to be invoked by at least one of the control signals received from the first DSP processor 20, the second DSP processor 22, and / or one of the communication interfaces. In general, the GP processor 24 does not need to handle any stream processing and processes data as blocks using standard memory configurations. Data storage can be implemented, for example, using internal storage and / or a flash drive, as needed.
[0052] FIG. 3 is a schematic diagram of an exemplary wearable audio device 70 including the ANR device 10 of FIG. 1. In this example, the wearable audio device 70 is an audio headset including two earphones (e.g., in-ear headphones also referred to as "earbuds") 72, 74. Although the earphones 72, 74 are shown in a "true" wireless configuration (i.e., no tethering between the earphones 72, 74), in additional implementations, the audio headset 70 includes a tethered wireless configuration (whereby the earphones 72, 74 are connected to a playback device via a telephone line in a wireless connection) or a wired configuration (whereby at least one of the earphones 72, 74 has a wired connection to a playback device). Each illustrated earphone 72, 74 includes a body 76 that may include a casing formed of one or more plastic or composite materials. The body 76 may include a nozzle 78 for insertion into a user's ear canal entrance and a support member 80 for holding the nozzle 78 in a resting position within the user's ear. Each earphone 72, 74 includes an ANR device 10 for performing some or all of the various functions described herein. Other wearable device configurations can be similarly implemented using the analog device 10, such as around-ear headphones, audio glasses, open-ear audio devices, etc.
[0053] It will be understood that one or more of the functions of the ANR device 10 may be implemented as hardware and / or software, and that the various components may include communication paths connecting the components by any conventional means (e.g., wired and / or wireless connections). For example, one or more non-volatile devices (e.g., centralized or distributed devices such as flash memory device(s)) may store and / or execute programs, algorithms, and / or parameters of one or more systems (e.g., Bluetooth system 12, DSP system 14, GP 24, etc.) within the ANR device 10. Also, the functionality or portions thereof, and various modifications thereof (hereinafter "functionality") described herein may be implemented at least in part via a computer program product (e.g., a computer program tangibly embodied in an information carrier, such as one or more non-transitory machine-readable media, for execution by or for controlling the operation of one or more data processing devices (e.g., programmable processors, computers, multiple computers, and / or programmable logic components, etc.).
[0054] The computer program can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program can be deployed to be executed on one computer, or on multiple computers at one site, or distributed across multiple sites and interconnected by a network.
[0055] The actions associated with carrying out all or a portion of the functions may be performed by one or more programmable processors executing one or more computer programs to carry out the functions. All or a portion of the functions may be implemented as special purpose logic circuitry, such as a field programmable gate array (FPGA) and / or an application specific integrated circuit (ASIC). Processors suitable for executing computer programs also include, by way of example, both general and special purpose microprocessors, as well as any one or more processors of any kind of digital computer. In general, a processor may receive instructions and data from a read-only memory, a random access memory, or both. The components of a computer include a processor for executing instructions and one or more memory devices for storing instructions and data.
[0056] Additionally, actions associated with implementing all or a portion of the functionality described herein may be performed by one or more networked computing devices that may be connected via a network, e.g., one or more wired and / or wireless networks, such as a local area network (LAN), a wide area network (WAN), a personal area network (PAN), an Internet-connected device and / or network, and / or cloud-based computing (e.g., cloud-based servers).
[0057] In various implementations, electronic components described as "coupled" may be linked via conventional wired and / or wireless means such that the electronic components can communicate data with one another. Furthermore, subcomponents within a given component may be considered to be linked via conventional paths, although not necessarily illustrated.
[0058] Although multiple implementations have been described, it is understood that additional modifications may be made without departing from the scope of the inventive concepts described herein, and thus, other implementations are within the scope of the following claims. [Explanation of symbols]
[0059] 10 ANR Devices 12 Bluetooth System 14 DSP System 16 USB ports 18 USB ports 20 First DSP Processor 21 Common Bus 22 Second DSP Processor 24 General Purpose (GP) Processors 26 Acoustic Driver 28 Microphone 30 Gateway Devices 31 Cloud Platform 32 Audio Streams 34 Processed Audio Streams 36 Output Audio Streams 40 Control Signal 42 Feedback 50 ANR Algorithm 52 SA Algorithm 54 Features 56 Communication Algorithms 58 ANR Control Algorithm 60 Adjustment Algorithm 62 System Health Algorithm 64 User Experience Algorithms 66 Lightweight OS and libraries 70 Wearable Audio Devices 72 Earphones 74 Earphones 76 Main Body 78 Nozzle 80 Support member
Claims
1. 1. A personal active noise reduction (ANR) device comprising: a communications interface configured to receive a source audio stream and control signals; Driver and A microphone system; 1. An ANR computation architecture, comprising: a first DSP processor configured to receive the source audio stream and a signal from the microphone system, the first DSP processor performing ANR on the source audio stream according to a set of operating parameters installed in the first DSP processor, and outputting a processed audio stream to the driver and a second DSP processor; the second DSP processor configured to generate state data and modify the set of operating parameters on the first DSP processor in response to analysis of the processed audio stream; an ANR computation architecture comprising: a general purpose processor operatively coupled to the first DSP processor and the second DSP processor, the general purpose processor configured to communicate control signals with the communications interface, process status data from the second DSP processor, and modify the set of operating parameters on the first DSP processor; Equipped with the first DSP processor and the second DSP processor share a common bus; the second DSP processor is configured to provide a relatively long latency but a relatively large amount of computational complexity compared to the first DSP processor; Personal ANR device.
2. 2. The personal ANR device of claim 1, wherein the operating parameters are selected from the group consisting of filter coefficients, compressor settings, signal mixers, gain conditions, and signal routing options.
3. 2. The personal ANR device of claim 1, wherein the status data generated by the second DSP processor includes error conditions detected in the processed audio stream.
4. 2. The personal ANR device of claim 1, wherein the status data generated by the second DSP processor includes frequency domain overload conditions detected in the processed audio stream.
5. 2. The personal ANR device of claim 1, wherein the status data generated by the second DSP processor includes sound pressure level (SPL) information detected from the microphone system and processed audio stream.
6. 2. The personal ANR device of claim 1, wherein the general-purpose processor includes a sleep mode for conserving power, the sleep mode being configured to be activated by at least one of the first DSP processor, the second DSP processor, and the communications interface.
7. The personal ANR device of claim 1 , wherein the general purpose processor is further configured to apply machine learning to the state data received from the second DSP processor.
8. The personal ANR device of claim 7 , wherein the general-purpose processor is further configured to apply machine learning to time-based signals.
9. 2. The personal ANR device of claim 1, wherein the operating parameters include filter coefficients, and the general-purpose processor is further configured to calculate and install updated filter coefficients in the first DSP processor.
10. The personal ANR device of claim 1 , wherein the general-purpose processor is further configured to evaluate the condition data to identify a damage condition of the personal ANR.
11. 1. An active noise reduction (ANR) computing architecture, comprising: a first DSP processor configured to receive a source audio stream, perform ANR on said source audio stream according to a set of operating parameters installed in the first DSP processor, and output a processed audio stream to a second DSP processor; the second DSP processor configured to generate state data and modify the set of operating parameters within the first DSP processor in response to analysis of the processed audio stream; a general purpose processor operatively coupled to the first DSP processor and the second DSP processor, the general purpose processor configured to communicate control signals with a communications interface, process status data from the second DSP processor, and modify the set of operating parameters within the first DSP processor; Equipped with the first DSP processor and the second DSP processor share a common bus; the second DSP processor is configured to provide a relatively long latency but a relatively large amount of computational complexity compared to the first DSP processor; ANR Computational Architecture.
12. The ANR computation architecture of claim 11 , wherein the operating parameters are selected from the group consisting of filter coefficients, compressor settings, signal mixers, gain conditions, and signal routing options.
13. 12. The ANR computation architecture of claim 11, wherein the status data generated by the second DSP processor includes error conditions detected in a microphone input and in a processed audio stream.
14. 12. The ANR computation architecture of claim 11, wherein the condition data generated by the second DSP processor includes frequency domain overload conditions detected in the processed audio stream.
15. 12. The ANR computation architecture of claim 11, wherein the state data generated by the second DSP processor includes sound pressure level (SPL) information detected from the processed audio stream.
16. 12. The ANR computing architecture of claim 11, wherein the general-purpose processor includes a sleep mode to conserve power, the sleep mode being configured to be invoked by at least one of the first DSP processor, the second DSP processor, and the communication interface.
17. The ANR computation architecture of claim 11 , wherein the general purpose processor is further configured to apply machine learning to the state data received from the second DSP processor.
18. The ANR computation architecture of claim 17 , wherein the general-purpose processor is further configured to apply machine learning to time-based signals.
19. The ANR computation architecture of claim 11 , wherein the general purpose processor is further configured to compute and install updated filter coefficients in the first DSP processor.
20. The ANR computing architecture of claim 11 , wherein the general purpose processor is further configured to evaluate condition data to identify a damage condition and communicate the damage condition to an external device via the communication interface.
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