Low latency, low power, high linearity Class D modulation loop

Abstract

To provide systems, circuits and methods that address a need in the art for improved performance of audio amplifiers.SOLUTION: A class-D amplifier circuit 200 includes a circuit that includes: a plurality of integrator circuits arranged in series and configured to receive an input signal at a first stage 210A of a plurality of integrators and generate an output signal at a last stage 210C of the plurality of integrators; a filter 214 arranged to receive a feedback signal 216 comprising the output signal and generate a filtered feedback signal, which is applied to the input signal before input to the first stage of the plurality of integrators; and a feedback signal path configured to receive the feedback signal and apply the feedback signal to an input of a second stage of the plurality of integrators. The input signal may include an analog audio signal that is amplified to drive an audio speaker.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] This application claims priority to and the benefit of U.S. Provisional Patent Application No. 62 / 953,823, entitled “LOW LATENCY, LOW POWER, HIGH LINEARITY CLASS-D MODULATION LOOP,” filed December 26, 2019, which is incorporated by reference in its entirety.

[0002] The present disclosure, in accordance with one or more embodiments, relates generally to amplifiers, and, for example, more particularly, to a Class D audio amplifier with improved loop response. [Background technology]

[0003] Many modern devices, such as laptop computers, computer tablets, MP3 players, and smart phones, can be connected to speakers or headphones using internal audio amplifiers. Class D amplifiers are widely used to drive these speakers and headsets. Class D amplifiers have higher efficiency than Class AB amplifiers and can meet the performance criteria for mobile terminals, including the requirements for low power consumption, linearity, and latency. Due to the miniaturization and increasing performance demands of modern devices, there is a continuing need to reduce power consumption, reduce latency, and improve linearity in audio amplifiers. Summary of the Invention

[0004] The present disclosure provides a system and method that addresses the need in the art for improving the performance of audio amplifiers used in modern devices. It is observed that in a class-D amplifier with multiple integrators connected in series, the first integrator may control the noise and distortion in the output signal because it has the highest overall gain of all integrators. Thus, the first integrator is selected to obtain good linearity and low noise, and usually determines the quiescent current of the entire amplifier. The present disclosure contributes to significantly reducing the loop response of the class-D amplifier by selectively pre-filtering the feedback signal in the first integrator (e.g., only in the first integrator). The resulting amplifier does not require a high-power analog operational amplifier and is characterized by low latency and high linearity.

[0005] In various embodiments, a method for operating an audio amplifier includes receiving an audio input signal at an input of an audio amplifier circuit having a plurality of integrators arranged in series, processing the audio input signal through the plurality of integrators arranged in series, generating an audio output signal using a quantizer arranged to receive an output from a final stage of the plurality of integrators, feeding back the audio output signal as a feedback signal applied to an input of each of the plurality of integrators, and filtering the feedback signal applied to an input of a first stage of the plurality of integrators arranged in series. The method may further include providing an output of the final stage of the series integrator to a comparator that generates the audio output signal. The first stage of the plurality of integrators in series may receive the audio input signal and generate a first output that is provided as an input to a second stage of the plurality of integrators in series.

[0006] In some embodiments, the method further comprises filtering the feedback signal applied to an input of a first stage of the plurality of integrators arranged in series, applying the feedback signal to a digital-to-analog converter. In various embodiments, an output of a digital-to-analog converter (e.g., a 1-bit DAC) is subtracted from each input of a second stage of the plurality of integrators in series and a comparator to generate an audio output signal.

[0007] In various embodiments, a circuit includes a plurality of integrators arranged in series, the plurality of integrators configured to receive an input signal at a first stage of the plurality of integrators and generate an integrated signal from a last stage of the plurality of integrators, a quantizer arranged to receive the integrated signal and generate an output signal, a filter arranged to receive a feedback signal including the output signal and generate a filtered feedback signal that is applied to an input of a first stage of the plurality of integrators, and a feedback signal path configured to receive a feedback signal and apply the feedback signal to an input of a second stage of the plurality of integrators. The circuit may include a class D amplifier, a delta-sigma modulator, or a similar arrangement.

[0008] In some embodiments, a quantizer is configured to receive the output generated from the final stage of the plurality of integrators and generate an amplified audio output signal. A first stage of the plurality of integrators arranged in series may be configured to have higher linearity and / or lower noise than other integrators of the plurality of integrators.

[0009] In various embodiments, a system includes an audio amplifier configured to receive an audio input signal and output an amplified audio signal to a loudspeaker, the audio amplifier including a plurality of integrators arranged in series to receive the audio input signal and generate an amplified audio signal, and a feedback signal path configured to filter the amplified output signal prior to input to a first stage of the plurality of integrators to generate a filtered feedback signal that is applied to the audio input signal.

[0010] In some embodiments, the audio amplifier further comprises a quantizer configured to receive an output generated from a final stage of the plurality of integrators and generate the amplified audio signal. A first stage of the plurality of integrators arranged in series is configured to have higher linearity and / or lower noise than other integrators of the plurality of integrators. The feedback path is further configured to apply an unfiltered feedback signal to a second stage of the plurality of integrators in series and / or to an input to one or more subsequent integrators. In one embodiment, an audio amplifier configured to apply an unfiltered feedback signal to a second stage of the plurality of integrators in series and / or to an input to one or more subsequent integrators includes subtracting an unfiltered feedback signal from an output of a previous integrator in series. The system may further comprise a plurality of subtractor components each arranged to receive an output from one of the plurality of integrators and an unfiltered feedback signal. In some embodiments, the system further comprises a digital signal processor configured to generate an audio input signal.

[0011] The scope of the present disclosure is defined by the claims, which are incorporated herein by reference. A more complete understanding of the present disclosure, together with the realization of additional advantages thereof, will be afforded to those skilled in the art upon consideration of the following detailed description of one or more embodiments. Reference is first made to the attached sheets of drawings, which are briefly described below. [Brief description of the drawings]

[0012] Aspects of the disclosure and its advantages can be better understood with reference to the following drawings and the detailed description that follows. It should be understood that like reference numerals are used to identify like elements illustrated in one or more of the drawings, and that the illustrations in the drawings are not for the purpose of limiting the disclosure, but are for the purpose of illustrating embodiments of the disclosure. The components in the drawings are not necessarily to scale, emphasis instead being placed upon clearly illustrating the principles of the disclosure.

[0013] [Figure 1] FIG. 1 illustrates a conventional Class D configuration.

[0014] [Diagram 2] FIG. 2 illustrates an exemplary class D amplifier circuit with filtered feedback in accordance with an embodiment of the present disclosure.

[0015] [Diagram 3] FIG. 3 is a flow chart illustrating a method of operating the class D amplifier circuit with filtered feedback of FIG. 2 according to one embodiment of the disclosure.

[0016] [Figure 4] FIG. 4 illustrates an example delta-sigma modulation circuit with filtered feedback in accordance with an embodiment of the present disclosure.

[0017] [Diagram 5] FIG. 5 illustrates an exemplary class D amplifier circuit with multiple filtered feedback signals in accordance with an embodiment of the present disclosure.

[0018] [Figure 6] FIG. 6 illustrates an exemplary audio output stage using an embodiment of a class D amplifier circuit, according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] The present disclosure provides systems and methods that address the need in the art for improving the performance of audio amplifiers used in modern devices. It is observed that in a class-D amplifier, the selection of the first stage integrator effectively controls the noise and distortion of the amplifier, since the first stage integrator has the highest overall gain among the integrators and usually determines the quiescent current of the entire amplifier. Therefore, selecting a first stage integrator with good linearity and low noise will improve the performance of the amplifier. Some embodiments of the present disclosure greatly reduce this requirement by selectively pre-filtering the feedback signal only in the first stage integrator, contributing to realizing a class-D amplifier with a fast loop response. In the present disclosure, low latency and high linearity are achieved without the need for a high-power analog operational amplifier.

[0020] In one embodiment, an audio amplifier circuit includes two or more stages configured to receive an audio input signal and provide an amplified audio signal to a speaker. The audio amplifier circuit reduces the power consumption of a class D amplifier and reduces delay and distortion of the class D output. The speaker may be implemented in headphones or other types of portable audio devices. It will be appreciated that the circuits and techniques described herein may be applicable to a variety of amplifier implementations where improved performance is desired.

[0021] A conventional class D amplifier architecture is illustrated in FIG. 1. Class D amplifier circuit 100 receives an input audio signal 102, such as an audio signal for output to a speaker. The input audio signal 102 is fed through a number of integrators 110A, 110B, 110C followed by a quantizer 112 to generate an amplified audio output signal 130. The audio output signal is fed back and subtracted from the input to each of the integrators 110A, 110B, 110C by components 120A, 120B, and 120C, respectively. To be able to handle high speed class D signals as inputs, the integrators 110A-C of class D amplifier circuit 100 are designed with high bandwidth, producing a circuit that consumes relatively high power.

[0022] By adding filtering to the feedback path, the bandwidth of the class-D amplifier can be relaxed, reducing the overall power consumption. However, adding a filter changes the transfer function of the amplifier. To make the tuned loop function in a stable manner with as good loop gain as before the filter was added, the overall loop response is slowed down so that the added filter does not negatively affect the loop filter response. Thus, in conventional designs, there is a limit to the amount of filtering that can be added. Furthermore, the overall loop filter response needs to be significantly slower to accommodate the added filter.

[0023] It has been observed that the first integrator (e.g., integrator 110A) of a class D amplifier circuit has the greatest impact on noise and distortion because the first integrator has the highest overall gain of all integrators 110A-C. In accordance with one or more embodiments of the present disclosure, a class D amplifier circuit is implemented in which the first integrator is configured to have high linearity and low noise. After the first integrator is configured to have acceptable performance, issues from the second integrator (e.g., integrator 110B) and third integrator (e.g., integrator 110C) can be corrected. In many embodiments, the selection of the first integrator determines the overall quiescent current.

[0024] Now referring to FIG. 2, an embodiment of a novel class D amplifier architecture with selective output filtering is described. The class D amplifier 200 receives an input audio signal 202, such as an audio signal for output to a speaker. The input audio signal 202 is fed through a number of integrators 210A, 210B, 210C followed by a quantizer 212 to generate an amplified audio output signal 230. To be able to handle high speed class D signals as input, the integrators 210A-C of the class D amplifier circuit 200 are designed to have a high bandwidth, which produces a circuit with a relatively high power consumption. An unfiltered feedback signal 216 is subtracted from the input signals to the integrators 210B and 210C by components 220B and 220C (e.g., adders), respectively, which produces a circuit with a relatively high power consumption. The filter 214 receives a feedback signal 216 and generates a filtered feedback signal that is subtracted from the input audio signal 202 by a component 220A (eg, a summer) for input to the first integrator 210A.

[0025] In the illustrated embodiment, a feedback filter is provided only at the input of the first integrator 210A. The subsequent integrator stages 210B and 210C see the unfiltered class D output as their input. For purposes of illustration, the feedback loop with three integrators has a high frequency output close to zero. Thus, adding some filtering to the illustrated loop does not negatively affect the quality of the output audio signal. The first integrator sees a quieter input due to the filtered feedback and can therefore be designed with more relaxed specifications. Since adding a filter 214 to the input of the first integrator 210A does not significantly affect the main loop, the loop bandwidth and response time can remain as fast as an unfiltered class D amplifier. The class D amplifier 200 of FIG. 2 can be implemented with an additional feedback filter, but with a low loop delay.

[0026] With reference to FIG. 3, an embodiment of a method for low-delay, low-power, high-linearity class-D modulation is described herein. Process 300 begins with receiving an audio input signal at an input to a class-D amplifier circuit comprising a plurality of integrators arranged in series, including a first stage integrator and a plurality of subsequent integrators, in step 310. In step 320, an output signal is generated by a final stage of the subsequent integrators. In step 330, a feedback signal including the output signal is applied to an input of each of the subsequent integrators. In step 340, the feedback signal is applied to a filter to generate a filtered feedback signal. In step 350, the filtered feedback signal is applied to the audio input signal for input to the first stage integrator.

[0027] In various embodiments, the systems, techniques, and methods described herein may be implemented in other circuits, such as, for example, a continuous delta-sigma analog-to-digital converter. An exemplary implementation of a delta-sigma modulator according to the present disclosure is illustrated in FIG. 4. As illustrated, the delta-sigma modulator 400 receives an input signal 402 that is fed to a first stage integrator 410A and then to a second stage integrator 410B. The output of the second stage integrator is input to a comparator 412, which generates an output. The output signal 430 is fed back to the circuit via a 1-bit digital-to-analog converter (DAC) 413. The output of the 1-bit DAC 413 is subtracted from the inputs of the second stage integrator 410B and the comparator 412 via components 420B, 420C (e.g., adders or subtractors), respectively. The output of the 1-bit DAC is also input to a filter 414 configured to generate a filtered feedback signal. The filtered feedback signal is subtracted from the input signal 402 by a component 420A (e.g., an adder or subtractor) before input to the first stage integrator 410A. In other embodiments, a second filter 518 (as shown in FIG. 5) can be added to the feedback path to the input of the second stage integrator. The filter may be a first order filter or may have other filter orders.

[0028] Referring to Figure 6, an audio output stage 600 according to an embodiment of the present disclosure is illustrated. A digital signal processor 610 outputs a stereo audio signal for playback on a pair of loudspeakers 640A and 640B. Each channel of the stereo audio signal is fed to a separate output path including an audio digital to analog converter (620A and 620B), a class D amplifier with filtered feedback (630A and 630B), which may include the class D amplifiers described with reference to Figures 2 and 5, and a loudspeaker (640A and 640B).

[0029] Where applicable, the various embodiments provided by the present disclosure may be implemented using hardware, software, or a combination of hardware and software. Also, where applicable, the various hardware and / or software components presented herein may be combined into composite components comprising software, hardware, and / or both without departing from the scope of the present disclosure. Where applicable, the various hardware and / or software components presented herein may be separated into subcomponents comprising software, hardware, and / or both without departing from the scope of the present disclosure. In addition, where applicable, it is contemplated that software components may be implemented as hardware components and vice versa.

[0030] The foregoing disclosure is not intended to limit the disclosure to the precise form or to the particular field of use disclosed. Thus, various alternative embodiments and / or modifications to the disclosure, whether expressly described or implied herein, are believed to be possible in light of the present disclosure. Having thus described embodiments of the present disclosure, those skilled in the art will recognize that changes in form and detail may be made without departing from the scope of the present disclosure. Thus, the present disclosure is limited only by the scope of the claims.

Claims

1. receiving an audio input signal at an input of an audio amplifier circuit comprising a plurality of integrators arranged in series; processing the audio input signal through the plurality of integrators arranged in series; outputting an audio output signal from a quantizer arranged to receive an output from a final stage of the plurality of integrators; filtering the audio output signal to generate a filtered feedback signal; feeding back the filtered feedback signal to an input of a first stage of the plurality of integrators; feeding back the audio output signal as a feedback signal to an input of a subsequent integrator different from the first stage of the plurality of integrators; Includes method.

2. performing a second filtering on the audio output signal to generate a second filtered feedback signal; feeding back the second filtered feedback signal to an input of a second stage of the plurality of integrators; Further includes The method of claim 1. The first stage of the plurality of integrators receives the audio input signal and generates a first output that is provided as an input to a second stage of the plurality of integrators in series. The method of claim 1.

4. Receiving an audio input signal at an input of a circuit comprising a plurality of integrators arranged in series; processing the audio input signal through the plurality of integrators arranged in series; outputting an audio output signal from a comparator arranged to receive an output from a final stage of the plurality of integrators; applying the audio output signal to a digital to analog converter; filtering an output of the digital-to-analog converter to generate a filtered feedback signal; feeding back the filtered feedback signal to an input of a first stage of the plurality of integrators; and feeding back the output of the digital-to-analog converter as a feedback signal to an input of a subsequent integrator different from the first stage of the plurality of integrators. method.

5. a plurality of integrators arranged in series, the plurality of integrators being configured to receive an input signal at a first stage of the plurality of integrators and generate an integrated signal from a last stage of the plurality of integrators; a quantizer configured to receive the aggregate signal and generate an output signal; a filter configured to receive the output signal, filter the output signal to generate a filtered feedback signal, and feed back the filtered feedback signal to an input of the first stage of the plurality of integrators; a feedback signal path configured to receive the output signal and feed back the output signal as a feedback signal to an input of a second stage of the plurality of integrators; Equipped circuit.

6. The circuit is a class D amplifier.

6. The circuit of claim 5.

7. The input signal is an analog audio signal.

6. The circuit of claim 5.

8. The first stage of the plurality of integrators arranged in series is configured to have higher linearity and / or lower noise than the other integrators of the plurality of integrators.

7. The circuit of claim 6.

9. A plurality of integrators arranged in series, the plurality of integrators being configured to receive an input signal at a first stage of the plurality of integrators and generate an integrated signal from a last stage of the plurality of integrators; a comparator configured to receive the integrated signal and to generate an output signal; a digital-to-analog converter configured to receive the output signal; a filter configured to filter an output of the digital-to-analog converter to generate a filtered feedback signal, and to feed back the filtered feedback signal to an input of the first stage of the plurality of integrators; Equipped with The output of the digital-to-analog converter is fed back as a feedback signal to an input of a subsequent integrator different from the first stage of the plurality of integrators. Delta-sigma modulator.

10. an audio amplifier configured to receive an audio input signal and output an amplified audio signal to a loudspeaker; The audio amplifier, a plurality of integrators arranged in series to receive the audio input signal; a quantizer configured to receive an output from a final stage of the plurality of integrators and to output the amplified audio signal; a feedback signal path configured to filter the amplified audio signal to generate a filtered feedback signal, feed back the filtered feedback signal to a first stage of the plurality of integrators, and feed back the amplified audio signal as a feedback signal to an input of a subsequent integrator different from the first stage of the plurality of integrators; Equipped system.

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