Phase shifter with active signal phase generation

Abstract

An apparatus for phase shifting a signal is disclosed. In an exemplary implementation, the apparatus includes a phase shifter. The phase shifter includes a first port, a second port, a vector modulator coupled to the first port, and a signal phase generator. The signal phase generator includes a plurality of amplifiers coupled between the vector modulator and the second port. The signal phase generator also includes a plurality of capacitors coupling the plurality of amplifiers together to form a loop. Each respective capacitor of the plurality of capacitors is coupled between a respective pair of consecutive amplifiers of the plurality of amplifiers to form the loop.

Description

Technical Field

[0001] Cross - Reference to Related Applications This application claims the benefit of U.S. Utility Application No. 16 / 785,440, filed Feb. 7, 2020, which claims priority to U.S. Provisional Application No. 62 / 945,043, filed Dec. 6, 2019, the entire disclosure of which is hereby incorporated by reference herein.

[0002] The present disclosure generally relates to wireless communication with electronic devices, and more specifically, to implementing a phase shifter with active signal phase generation.

Background Art

[0003] Electronic devices include conventional computing devices such as desktop computers, laptop computers, smartphones, wearable devices such as smartwatches, Internet servers, etc. However, electronic devices also include other types of computing devices such as personal voice assistants, thermostats and other sensors or automated controllers, devices embedded in other machines such as robotics, automotive electronics, refrigerators and industrial tools, Internet of Things (IoT) devices, etc. These various electronic devices provide services related to productivity, communication, social interaction, security, safety, remote management, entertainment, transportation, and information dissemination. Thus, electronic devices play a significant role in many aspects of modern society.

[0004] In today's interconnected world, many of the services provided by electronic devices rely at least in part on electronic communication. Electronic communication includes, for example, wireless or wired signals transmitted via one or more networks such as the Internet, Wi-Fi networks, or cellular networks, and is exchanged between two different electronic devices or among three or more different electronic devices. Thus, electronic communication includes both wireless and wired transmission and reception. To perform such electronic communication, electronic devices use transceivers such as wireless transceivers.

[0005] Accordingly, electronic communication can be achieved by propagating signals between two wireless transceivers in two different electronic devices. For example, using a wireless transmitter, a smartphone can transmit a wireless signal via the air medium to a base station as part of uplink communication to support mobile services. Using a wireless receiver, a smartphone can receive a wireless signal via the air medium from a base station as part of downlink communication to enable mobile services. With a smartphone, mobile services can include phone and video calls, communication on social media, messaging, movie watching, video sharing, performing searches, obtaining map information or navigation instructions, discovering friends, general location-based services, money transfers, obtaining other services such as ridesharing, and the like.

[0006] To provide these and other types of services, an electronic device typically uses a wireless transceiver to communicate wireless signals according to some wireless standard. Examples of wireless standards include the IEEE 802.11b or 802.11g Wi-Fi standards and the fourth generation (4G) cellular standards, both of which are used today by smartphones and other connected devices. However, efforts are underway to enable faster wireless networks through the creation of newer wireless standards. For example, next-generation cellular networks and newer Wi-Fi networks are expected to provide much higher bandwidth, lower latency, and access to additional electromagnetic spectrum. In summary, exciting new wireless services such as autonomous driving, augmented reality (AR) and other mixed reality (MR) imaging, constant 4K video streaming, ubiquitous sensors to keep people safe and use natural resources more efficiently, real-time language translation, etc. can be provided to users.

[0007] To make these newer and faster wireless technologies more widely available, numerous wireless devices other than smartphones are being deployed, which is sometimes referred to as the "Internet of Things" (IoT). With the advent of the IoT, it is expected that tens of billions and eventually trillions of more devices will be connected to the Internet compared to the usage of today's wireless devices. These IoT devices can include small, inexpensive, and low-power devices such as sensors and tracking tags. Additionally, to enable next-generation wireless technologies, fifth-generation (5G) cellular wireless devices and Wi-Fi 6 devices will communicate using signals that utilize a wider frequency range located at higher electromagnetic spectrum frequencies compared to devices operating according to older wireless standards. For example, newer devices are expected to operate at millimeter wave (mmW) frequencies (e.g., frequencies between at least 30 gigahertz and 300 gigahertz (GHz), but also including lower frequencies on the order of 4 - 6 GHz).

Summary of the Invention

Problems to be Solved by the Invention

[0008] To meet these commercial expectations and overcome the associated technical challenges, the physical components enabling wireless communication under these constraints are expected to operate efficiently at mmW frequencies. One component that facilitates electronic communication is a wireless interface device, which can include a wireless transceiver and a radio frequency front end (RFFE). Unfortunately, wireless interface devices designed for electronic devices operating according to today's Wi-Fi and 4G cellular standards will not be suitable for future faster Wi-Fi 6 and 5G-enabled devices, which will face higher frequencies, more stringent latency requirements, and more stringent budget constraints.

[0009] As a result, wireless interface devices having designs capable of handling mmW frequencies will be developed to facilitate the adoption of newer cellular and faster Wi-Fi technologies and the widespread deployment of electronic devices capable of providing new capabilities and services. Thus, electronics engineers and other designers of electronic devices are encouraged to develop new wireless interface devices that will realize what 5G, Wi-Fi 6, and other higher-frequency technologies promise.

Means for Solving the Problems

[0010] The developing wireless standards for cellular 5G networks and Wi-Fi 6 networks are intended to establish broadband capabilities at higher frequencies in the gigahertz (GHz) range, including frequencies with corresponding millimeter wavelengths (e.g., mmW frequencies). To enable wireless communication using mmW frequencies, some electronic devices use signal beamforming. Beamforming involves using an antenna array to direct a signal beam. By directing the signal beam from a transmitting device to a receiving device, the amount of transmit power required to reach the receiving device can be reduced. Further, beamforming enables signals to propagate over longer distances compared to omnidirectional transmission, including those using transmission at mmW frequencies. To generate a signal beam, multiple antenna elements of an antenna array transmit or receive various versions of a wireless signal, such as various delayed versions or phase-shifted versions of the wireless signal. In some architectures, a component chain is associated with each antenna element of the antenna array to generate each wireless signal version. Accordingly, the individual physical components of each component chain are replicated for each antenna element, and a single electronic device can include a large number of antenna elements, such as 4, 12, 16, 18, or more, across multiple antenna arrays. As a result, any negative effects resulting from any particular physical component that is part of a component chain, such as the size occupied by the individual physical components, are amplified by the amount of antenna elements included in the electronic device.

[0011] Examples of individual physical components that can be included in each component chain are phase shifters. A phase shifter can adjust the phase of one version of a wireless signal relative to another version of the wireless signal to enable beamforming for mmW and other frequencies of wireless communication. A phase shifter can be constructed, for example, using a signal phase generator and a vector modulator. In some implementations, the signal phase generator converts a signal having one phase into a split signal having at least two phases for at least two components of the signal. In some scenarios, the two phases of the split signal are 90 degrees apart, such as by having phases of 0 degrees (0°) and 90°. Such a split signal can be referred to as having an in-phase signal component and a quadrature signal component. The vector modulator of the phase shifter adjusts the relative amplitudes of the components of the split signal. After recombining the components of the split signal, the relative amplitude adjustment can substantially change the phase of the signal flowing through a given component chain to support beam steering operations.

[0012] The signal phase generator of the phase shifter can be implemented using active components or passive components. Passive components include capacitors, resistors, and inductors. Inductors occupy a large area of a radio frequency (RF) integrated circuit (IC) (RFIC). Resistors introduce a significant level of loss to the signal propagating through the signal phase generator. Generally, smaller RF ICs can implement less expensive devices, and lower-loss circuits can provide higher signal processing performance. Therefore, performance can be improved by avoiding the use of inductors and resistors.

[0013] More specifically, by reducing the use of inductors and resistors in the signal phase generator, both the area occupied by the phase shifter including the signal phase generator and the amount of loss caused by the phase shifter can be reduced. To do so, the described implementation of the phase shifter utilizes an active signal phase generator. The active signal phase generator may include, for example, transistors and capacitors, at which time at least a portion of the transistors has a direct current (DC) current flowing therethrough. In some implementations, the transistors are deployed as amplifiers in a plurality of columnar circuits aligned with the direction of signal flow, and the capacitors couple the transistors in consecutive columnar circuits together to form a loop orthogonal to the direction of signal flow. During the propagation of at least one alternating current (AC) signal through the amplifier of the columnar circuit, the capacitively coupled loop of capacitors can disperse the phase difference of the AC signal across the plurality of amplifiers of the columnar circuit. For example, if a signal having two phases of 0° and 180° (e.g., one differential signal) is applied to one side of the signal phase generator, the signal phase generator can produce a signal having four relative phases of 0°, 90°, 180°, and 270° (e.g., two differential signals) at the other side of the signal phase generator. Both unidirectional and bidirectional implementations of the active signal phase generator are described herein.

[0014] To produce a phase shifter, an active or passive vector modulator can be implemented using an active signal phase generator. The phase shifter can be configured such that the vector modulator operates either before or after the signal phase generator along the direction of the signal flow. In other words, the vector modulator can adjust the amplitude of at least one of one or more signal components either before or after the signal phase generator generates at least one additional signal phase component. Further, some of the described phase shifters can operate bidirectionally, thereby enabling one phase shifter to be used for both transmission and reception operations. In these ways, a fully or partially active phase shifter can be realized that is smaller than those implemented using inductive-capacitive networks and has less loss than those implemented using resistive-capacitive networks.

[0015] In one exemplary aspect, an apparatus for phase shifting a signal using active signal phase generation is disclosed. The apparatus includes a phase shifter. The phase shifter includes a first port, a second port, a vector modulator coupled to the first port, and a signal phase generator. The signal phase generator includes a plurality of amplifiers coupled between the vector modulator and the second port. The signal phase generator also includes a plurality of capacitors that couple the plurality of amplifiers together to form a loop. Each respective capacitor of the plurality of capacitors is coupled between respective pairs of successive amplifiers of the plurality of amplifiers to form a loop.

[0016] In one exemplary aspect, an apparatus for phase shifting a signal using active signal phase generation is disclosed. The apparatus includes a phase shifter. The phase shifter includes a first port, a second port, a vector modulator coupled to the first port, and a signal phase generator. The signal phase generator includes amplification means for amplifying the signal being phase shifted, the amplification means including a plurality of input terminals and a plurality of output terminals and being coupled between the vector modulator and the second port. The signal phase generator also includes capacitive means for dispersing a plurality of phases of the signal across the plurality of amplification means, the capacitive means coupling the plurality of input terminals to the plurality of output terminals.

[0017] In one exemplary aspect, a method for phase shift using active signal phase generation is disclosed. The method includes coupling a signal having a first amount of phase through a second port. The method also includes amplifying a plurality of components of the signal using a plurality of amplifiers. The method additionally includes dispersing a plurality of phases of a plurality of components of the signal across the plurality of amplifiers using capacitively coupled loops, the plurality of phases having a second amount of phase greater than the first amount. The method also includes adjusting one or more amplitudes of a plurality of components of the signal based on a phase control signal. The method further includes combining the plurality of phases of the plurality of components of the signal to produce a combined signal having the first amount of phase. The method additionally includes coupling the combined signal having the first amount of phase through a first port.

[0018] In one exemplary aspect, an apparatus for phase shifting a signal using active signal phase generation is disclosed. The apparatus includes a phase shifter. The phase shifter includes a first port including two or more nodes, a second port including two or more nodes, and an interface including four or more nodes. The phase shifter also includes a vector modulator coupled between the first port and the interface. The phase shifter further includes a signal phase generator. The signal phase generator includes four or more column circuits coupled between the interface and the second port, each column circuit including a first transistor and a second transistor. The first transistor and the second transistor of each respective column circuit are coupled together in series between a node of the interface and a node of the second port. The signal phase generator also includes a first set of four or more capacitors that couple the four or more column circuits together to form a first loop, each respective capacitor being coupled between respective pairs of first transistors from two consecutive column circuits of the four or more column circuits to form the first loop. The signal phase generator further includes a second set of four or more capacitors that couple the four or more column circuits to form a second loop, each respective capacitor being coupled between respective pairs of second transistors from two consecutive column circuits of the four or more column circuits to form the second loop.

Brief Description of the Drawings

[0019]

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[0020] Compared with 4G cellular networks and existing Wi-Fi networks, next-generation networks such as 5G cellular networks and Wi-Fi 6 networks utilize higher electromagnetic (EM) frequencies. These higher EM frequencies can include millimeter wave (mmW) frequencies that can range from approximately 3 gigahertz (GHz) to 300 GHz of the EM spectrum. Higher frequencies can provide higher bandwidth and less latency, but higher frequencies also pose technical challenges. For example, signals transmitted at higher frequencies are attenuated more quickly by the atmosphere, so the inherent range at a given power level is shorter. To account for the naturally shorter propagation distance, signals can be transmitted in a signal beam that uses more effective power to direct the signal at a particular target, which is called antenna beamforming. Using antenna beamforming, transmission at a given power level can travel farther as a signal beam compared to a signal transmitted omnidirectionally.

[0021] Accordingly, 5G cellular and Wi-Fi 6 (e.g., IEEE 802.11ax) electronic devices can utilize beamforming to direct signals at a receiving device. The wireless interface device of the electronic device is at least partly responsible for generating a signal beam for beamforming. To form a transmitted signal beam, the wireless interface device uses an antenna array to emit multiple versions of the transmitted signal, where the multiple versions of the signal are modified relative to each other such that they reinforce and cancel each other out during signal propagation. The modification of the different signal versions can include being amplified by different amounts or being phase shifted relative to each other (e.g., being delayed relative to each other by different lengths of time). The area of constructive EM synthesis creates a signal beam that can be received at relatively far distances compared to not using antenna beamforming. The reception of a communication signal using beamforming techniques operates in the reverse manner by processing the different versions to reconstruct the received signal beam.

[0022] Generally, each signal version is received by, or accepted from, respective antenna elements of the antenna array. To modify different signal versions corresponding to each one of different antenna elements of the antenna array, a wireless interface device coupled to the antenna array may include respective component chains of a plurality of component chains for each respective antenna element of the plurality of antenna elements. Further, an electronic device may include a plurality of antenna arrays each having a plurality of antenna elements to target signal beams from different sides of the electronic device. In some architectures, there are component chains associated with and coupled to each antenna element of the antenna array. Thus, the individual physical components of each component chain are replicated for each antenna element, which may have an amount of 6, 8, 12, 16, or more in a single electronic device. For example, if an electronic device includes three antenna arrays each having four antenna elements, the electronic device may include a total of twelve antenna elements, and thus twelve corresponding component chains. As a result, the impact attributable to each individual physical component, such as a negative effect caused by any individual physical component of the component chain, is amplified by the amount of antenna elements included in the electronic device. Examples of negative effects include the size occupied by an individual physical component, the power consumption of the component, or a loss of signal strength added to a signal processed by the component.

[0023] Examples of individual physical components that may be included in each component chain are phase shifters. A phase shifter can adjust the phase of one version of a wireless signal relative to another version of the wireless signal to enable beamforming for mmW and other frequencies of wireless communication. A phase shifter can be constructed, for example, using a signal phase generator and a vector modulator. In some implementations, the signal phase generator converts a signal having one phase into a split signal having at least two phases for at least two components of the signal. In some scenarios, the two phases of the split signal are 90 degrees apart, such as by having phases of 0 degrees (0°) and 90°. This type of split signal containing two components with different phases 90 degrees apart can be referred to as having an in-phase signal component and a quadrature signal component. The vector modulator of the phase shifter adjusts the relative amplitudes of the components of the split signal. After recombining the components of the split signal, the relative amplitude adjustment can substantially change the phase of the version of the wireless signal flowing through the corresponding component chain to assist in antenna beamforming to achieve a phase shift.

[0024] The phase shifter can be implemented either fully or partially, passively or actively. A passive phase shifter may be used to achieve a resolution of about 3 bits, and the number of bits of the resolution determines the granularity of the amount of phase shift. The amount of bits in a passive phase shifter is limited by the large size of the passive components (e.g., resistors, capacitors, and / or inductors) and switches that form the passive phase shifter, as well as the significant attenuation caused by them. On the other hand, an active phase shifter can enable a higher bit resolution for a finer granularity of phase shift. Instead of being limited to an increment of 45° phase shift using a 3-bit phase shifter, using 4-bit and 5-bit phase shifters can achieve increments of 22.5° and 11.25° phase shift, respectively. This enables, for example, more precise aiming of the signal beam when using a 5-bit active phase shifter. An active phase shifter typically uses an active vector modulator for amplitude adjustment of the split signal. However, an active phase shifter typically utilizes a passive circuit structure to generate in-phase and quadrature (IQ) signal components that are adjusted by a vector modulator for phase shift. A passive approach to IQ signal generation usually results in a loss of about 3 decibels (dB) or more. Passive IQ signal generation using inductors (L) and capacitors (C) is lossy and can result in a large LC circuit. In contrast, passive IQ signal generation using resistors (R) and capacitors (C) can use a smaller circuit, but this RC circuit approach is even more lossy than the LC circuit approach.

[0025] That is, a phase shifter with higher resolution tends to passively generate IQ signal components while actively performing vector modulation. There are many ways to passively generate IQ signals, but each method usually incurs a loss of about 3 dB or more and uses components that occupy a large part of the area of the RF IC. Techniques for compensating for this loss of signal strength resulting from passively generating IQ signals include auxiliary signal amplification, which involves additional circuitry and further complicates the use of a phased array antenna for beamforming.

[0026] In contrast to phase shifters that use passive IQ signal generators, some of the described implementations are directed to phase shifters that utilize active signal phase generators. An exemplary phase shifter includes an active signal phase generator and a vector modulator that can be either passive or active. Thus, applicable vector modulators can include those formed using resistors and those formed using transistors. Some of the described signal phase generators can be implemented bidirectionally. As a result, some phase shifter implementations can operate bidirectionally, including fully active implementations involving both an active signal phase generator and an active vector modulator. Depending on the implementation of the phase shifter, the order of operation of the vector modulator relative to the order of operation of the active signal phase generator can vary with respect to the direction of signal flow through the phase shifter. For example, the vector modulator can operate on the signal propagating through the phase shifter either before or after the signal phase generator operates on the signal. In other words, the vector modulator can adjust the amplitude of at least one of one or more signal components either before or after the signal phase generator generates at least one additional signal phase component of the signal propagating through the phase shifter.

[0027] In an exemplary implementation, the active signal phase generator of the phase shifter includes a plurality of amplifiers capacitively coupled together such that the capacitive coupling forms at least one loop. The plurality of amplifiers are powered and have a direct current (DC) current flowing through them during operation. At least one capacitor is coupled between successive amplifiers along the loop defined by the capacitive coupling. Each of the amplifiers includes at least one amplification stage. A two-stage amplifier includes, for example, a first amplification stage and a second amplification stage, and each respective stage is coupled together in a respective loop with a respective set of capacitors. The capacitors may be cross-coupled between successive amplification stages, such that one terminal of the capacitor is coupled to the input of a first instance of the amplification stage in the first amplifier, and another terminal of the capacitor is coupled to the output of a second instance of the amplification stage in the second amplifier, which is continuously coupled to the first amplifier by a capacitive loop.

[0028] By capacitively coupling the amplifiers together, the capacitors disperse various phases of the signal around the loop of the capacitors and thus across each amplification stage. In this way, the active signal phase generator can increase the amount of phase of various components of the signal passing through the active signal phase generator. A first amount of phase present on a first side of the signal phase generator is increased relative to a second amount of phase present on a second side of the signal phase generator, and vice versa. For example, if a signal having two phases of 0° and 180° (e.g., a differential I signal) is applied to one side of the signal phase generator, the signal phase generator can cause the signal to have four relative phases of 0°, 90°, 180°, and 270° (e.g., differential I and Q signal components) on the other side of the signal phase generator.

[0029] By reducing the use of inductors and resistors in a signal phase generator, both the area occupied by a phase shifter including the signal phase generator and the amount of loss caused by the phase shifter can be reduced. As described herein, implementations of an active signal phase generator may include transistors and capacitors, where at least a portion of the transistors have direct current (DC) current flowing through them during operation. In some implementations, these transistors are deployed as amplifiers in a plurality of column circuits aligned with the direction of signal flow through the phase shifter, and the capacitors couple the transistors in successive column circuits together to form successive capacitor loops orthogonal to the direction of signal flow. An active or passive vector modulator may be paired with the active signal phase generator to construct a phase shifter. The vector modulator may include a plurality of portions, and each respective portion is coupled to a respective column circuit of the plurality of column circuits to adjust at least one amplitude of each respective component of the signal having a phase that propagates through the phase shifter with respect to a respective amplifier corresponding to that portion.

[0030] A passive vector modulator may be constructed using resistors arranged as respective voltage dividers for respective portions of the vector modulator to adjust the amplitude of each respective phase component of a signal. An active vector modulator may be constructed using a bank of transistors (e.g., a plurality of transistors coupled together in parallel for current steering or a plurality of transistors implementing a variable gain amplifier (VGA)) for each portion of the vector modulator to adjust the amplitude of each respective phase component of a signal. In these ways, a partially or fully active phase shifter can be realized that is smaller than that implemented using an inductor-capacitor network and has less loss than that implemented using a resistor-capacitor network.

[0031] FIG. 1 shows an exemplary environment 100 that includes an electronic device 102 having a wireless interface device 120 with a radio frequency (RF) front end (FE) 128 (RFFE) that includes a phase shifter 130. The phase shifter 130 includes a signal phase generator 132 and a vector modulator 134. In environment 100, an exemplary electronic device 102 communicates with a base station 104 through a wireless link 106. In FIG. 1, the electronic device is shown as a smartphone. However, the electronic device 102 can be implemented as any suitable type of computing device or other electronic device such as a cellular base station, broadband router, access point, cellular phone or mobile phone, gaming device, navigation device, media device, laptop computer, desktop computer, tablet computer, server computer, network attached storage (NAS) device, smart appliance, vehicle-based communication system, Internet of Things (IoT) device, sensor or security device, asset tracker, fitness management device, wearable device such as intelligent glasses or smartwatch, wireless power device (transmitter or receiver), medical device, etc.

[0032] The base station 104 communicates with the electronic device 102 via a wireless link 106 that can be implemented as any suitable type of wireless link that carries communication signals. Although shown as a base station tower of a cellular wireless network, the base station 104 can represent another device such as a satellite, terrestrial broadcast tower, access point, peer-to-peer device, mesh network node, fiber optic line, another electronic device as generally described above, etc., or can be implemented as another device. Thus, the electronic device 102 can communicate with the base station 104 or another device via a wired connection, wireless connection, or a combination thereof.

[0033] Wireless link 106 extends between electronic device 102 and base station 104. Wireless link 106 can include a downlink for data or control information transmitted from base station 104 to electronic device 102 and an uplink for other data or control information transmitted from electronic device 102 to base station 104. Wireless link 106 can be implemented using any suitable communication protocol or standard. Examples of such protocols and standards include 3rd Generation Partnership Project (3GPP (R)) standards such as Long-Term Evolution (LTE), 4th Generation (4G), or 5th Generation (5G) cellular standards, IEEE 802.11 standards such as 802.11g, ac, ax, ad, aj, or ay standards including Wi-Fi 6, IEEE 802.16 standard (e.g., WiMAX (TM)), Bluetooth (TM) standard, and the like. In some implementations, wireless link 106 may provide power wirelessly, and either electronic device 102 or base station 104 may include a power source.

[0034] As shown, electronic device 102 includes at least one application processor 108 and at least one computer-readable storage medium 110 (CRM 110). Application processor 108 can include any type of processor such as a central processing unit (CPU) or a multi-core processor configured to execute processor-executable instructions (e.g., code) stored by CRM 110. CRM 110 can include any suitable type of data storage medium such as volatile memory (e.g., random access memory (RAM)), non-volatile memory (e.g., flash memory), optical media, magnetic media (e.g., disk or tape). In the context of the present disclosure, CRM 110 is implemented to store instructions 112, data 114, and other information of electronic device 102, and thus, CRM 110 does not include a transient propagation signal or carrier wave.

[0035] The electronic device 102 may also include one or more input / output ports 116 (I / O ports 116) or at least one display 118. The I / O ports 116 enable the exchange of data or interaction with other devices, networks, or users. The I / O ports 116 may include serial ports (e.g., Universal Serial Bus (USB) ports), parallel ports, audio ports, infrared (IR) ports, camera or other sensor ports, and the like. The display 118 may be implemented as a display screen or projection that presents one or more graphical images provided by the electronic device 102, such as a user interface associated with an operating system, program, or application. Alternatively or additionally, the display 118 may be implemented as a display port or virtual interface through which the graphical content of the electronic device 102 is communicated or presented.

[0036] The electronic device 102 further includes at least one wireless interface device 120 and at least one antenna array 122. The wireless interface device 120 provides connections to respective networks and peer devices via a wireless link that may be configured the same as or differently from the wireless link 106. Alternatively or in addition, the electronic device 102 may include a wired interface device, such as an Ethernet or fiber optic transceiver, for communicating via a wired local area network (LAN), intranet, or the Internet. The wireless interface device 120 may facilitate communication via any suitable type of wireless network, such as a wireless local area network (WLAN), wireless personal area network (PAN) (WPAN), peer-to-peer (P2P) network, mesh network, cellular network, wireless wide area network (WAN) (WWAN), and / or a navigation network (e.g., the Global Positioning System (GPS) in North America or another satellite positioning system (SPS) or Global Navigation Satellite System (GNSS)). In the context of the exemplary environment 100, the electronic device 102 can communicate various data and control information bidirectionally with the base station 104 via the wireless interface device 120. However, the electronic device 102 may also communicate directly with other peer devices, alternative wireless networks, etc., additionally or alternatively.

[0037] As shown, the wireless interface device 120 includes at least one communication processor 124, at least one transceiver 126, and at least one RF front end 128 (RFFE 128). These components process signals associated with communicating data information, control information, and information for the electronic device 102 via the antenna array 122. The communication processor 124 may be implemented as at least part of a system-on-chip (SoC), a modem-based baseband processor, or a baseband wireless processor (BBP) that enables a digital communication interface for data, voice, messaging, or other uses of the electronic device 102. The communication processor 124 includes a digital signal processor (DSP) or one or more signal processing blocks (not shown) for encoding and modulating data for transmission and for demodulating and decoding received data. In addition, the communication processor 124 can also manage (e.g., control or configure) the aspects or operations of the transceiver 126, the RF front end 128, and other components of the wireless interface device 120 to implement various communication protocols or communication techniques.

[0038] In some cases, application processor 108 and communication processor 124 can be combined into one module or integrated circuit (IC), such as a SoC. Nevertheless, application processor 108 or communication processor 124 can be operably coupled to one or more other components, such as CRM 110 or display 118, to enable control of or other interaction with other components of electronic device 102. Thus, an operable coupling can enable a component to perform functions or operations as described herein. Communication processor 124 can also include a memory (not shown separately), such as CRM 110, to store data and processor-executable instructions (e.g., code). The various components shown in FIG. 1 using separate schematic blocks can be manufactured or packaged in different individual manners. For example, a certain physical module may include components of RF front end 128 and some components of transceiver 126, and another physical module may combine the remaining components of transceiver 126 with communication processor 124. Additionally, at least one antenna array 122 can be packaged together with at least some components of RF front end 128 as an "antenna module". Further, electronic device 102 may include a plurality of such antenna modules, thereby spatially dispersing various physical components of at least one RF front end 128 within the housing of electronic device 102.

[0039] Transceiver 126 may include circuitry and logic for filtering, amplifying, channelizing, and frequency conversion. Frequency conversion may include upconversion or downconversion of frequencies, which is performed in a single conversion operation (e.g., direct conversion architecture) or through multiple conversion operations (e.g., superheterodyne architecture). Transceiver 126 may include filters, switches, amplifiers, mixers, etc. for routing and conditioning signals transmitted or received via antenna array 122. Although not explicitly shown, wireless interface device 120 may also include a digital-to-analog converter (DAC) or an analog-to-digital converter (ADC) for converting between analog and digital signals. The DAC or ADC may be implemented as part of communication processor 124, as part of transceiver 126, or separately from both of them.

[0040] The components or circuitry of transceiver 126 may be implemented in any suitable manner, such as integrated transceiver logic, or separately as respective transmitter and receiver entities. In some cases, transceiver 126 may be implemented using multiple or different sections to perform respective transmit and receive operations (e.g., separate transmit and receive chains). Transceiver 126 may also include logic for performing in-phase / quadrature-phase (I / Q) operations, such as synthesis, phase correction, modulation, demodulation, etc.

[0041] Generally, the RF front end 128 includes one or more filters, switches, or amplifiers for conditioning signals received via the antenna array 122 or signals to be transmitted via the antenna array 122. As shown, the RF front end 128 includes at least one phase shifter 130 (PS130). The RF front end 128 may also include other RF sensors and components such as peak detectors, power meters, gain control blocks, antenna tuning circuits, N - plexers, baluns, etc. Configurable components of the RF front end 128, such as the phase shifter 130, can be controlled by the communication processor 124 to implement communication in various modes using different frequency bands or using antenna beamforming. Although the phase shifter 130 is shown as part of the RF front end 128, the described implementation of the phase shifter 130 can alternatively be utilized in other parts of the wireless interface device 120 (e.g., the transceiver 126) or generally in other parts of the electronic device 102.

[0042] In an exemplary implementation, the phase shifter 130 includes at least one signal phase generator 132 and at least one vector modulator 134. The signal phase generator 132 changes the amount of phase of a signal, such as by generating at least one phase to increase the amount of phase. For example, the signal phase generator 132 can produce I and Q signal components (e.g., with two phases for single - ended signaling) from an I signal component (e.g., with one phase for single - ended signaling). The vector modulator 134 adjusts at least one amplitude of one or more components of the signal - passing circuit of the vector modulator 134. The adjustment can include increasing the signal amplitude (e.g., positive amplification, amplification with a gain greater than 1, or amplification) or decreasing the signal amplitude (e.g., negative amplification, amplification with a gain between 0 and 1, or attenuation). Exemplary implementations of the signal phase generator 132 and the vector modulator 134 are described herein below starting from FIG. 4 - 1 through FIG. 4 - 3.

[0043] In some implementations, the antenna array 122 is implemented as at least one antenna array including a plurality of antenna elements. Thus, as used herein, "antenna" can refer to at least one antenna array or at least one antenna element, depending on the context. To implement beamforming, each phase shifter 130 is coupled to each respective antenna element of the antenna array 122, which is described below with reference to FIGS. 3-1 through 3-3. Additional aspects of the wireless interface device 120 and the antenna array 122 related to antenna beamforming are described next with reference to FIG. 2.

[0044] FIG. 2 generally shows, at 200, an antenna array 122 coupled to an exemplary implementation of a wireless interface device 120 that includes a communication processor 124 and an RF front end 128. An exemplary signal flow direction 202 is shown bidirectionally. Thus, signals can flow in both directions across the wireless interface device 120 to correspond to both transmitted and received signals. As shown, the communication processor 124 is coupled to a transceiver 126, which is coupled to an RF front end 128 that includes at least one phase shifter 130. Although not explicitly shown, the communication processor 124 can be coupled to other components of the electronic device 102 of FIG. 1, such as the application processor 108, the CRM 110, or the display 118.

[0045] In operation, the antenna array 122 transmits or senses the reception of at least one wireless signal 206. Through antenna beamforming, the wireless signal 206 can be transmitted or received via at least one signal beam 212. Thus, using beam steering, the wireless signal 206 can be transmitted or received at at least one angle 204 to provide directivity for wireless communication. To do this, the phase shifter 130 of the RF front end 128 shifts the phase of a version of the signal propagating through the phase shifter 130, and the propagating signal was previously received as the wireless signal 206 or is targeted to be transmitted as the wireless signal 206.

[0046] The amount of phase shift by the phase shifter 130 can be controlled by the communication processor 124 using at least one phase control signal 208. The communication processor 124 can generate the phase control signal 208 in response to beamforming parameters indicating the number of the target angle 204 or the angle of the target phase shift. This control of the phase shift is further described herein below. The communication processor 124 can also generate a compensation value signal 210 and provide the compensation value signal 210 to another component such as the phase shifter 130. The compensation value signal 210 can adjust the processing of the phase-shifted signal to account for non-linearity or to account for different amplitude levels corresponding to different amounts of phase shift. The implementation of the compensation value signal 210 is described herein below. Alternatively, the transceiver 126 can generate or provide the phase control signal 208 or the compensation value signal 210. More generally, a controller (not shown), which is part of at least one of the communication processor 124 or the transceiver 126, can generate or provide the phase control signal 208 or the compensation value signal 210.

[0047] FIG. 3-1 shows an antenna array 122 coupled to an exemplary RF front end 128 including a plurality of component chains 304-1, 304-2, 304-3, ..., 304-n in 300-1, where "n" represents a positive integer (e.g., 2 or more for beamforming). Here, each component chain 304 includes at least one phase shifter 130 (PS130). The antenna array 122 includes a plurality of antenna elements 302-1, 302-2, 302-3, ..., 302-n, where "n" represents a positive integer (e.g., 2 or more for beamforming). Each respective antenna element 302 (AE302) of the plurality of antenna elements 302-1, ... 302-n is coupled to a respective component chain 304 of the plurality of component chains 304-1... 304-n. For example, the first component chain 304-1 is coupled to the first antenna element 302-1, and the second component chain 304-2 is coupled to the second antenna element 302-2.

[0048] In an exemplary implementation, each component chain 304 of the plurality of component chains 304-1... 304-n is coupled to a single coupler 306. The signal coupler 306 can function as a combiner / splitter. For example, the signal coupler 306 can combine a plurality of signal versions received from the plurality of component chains 304-1... 304-n into a combined signal for a receive operation. The signal coupler 306 can also split a signal into a plurality of signal versions and provide those versions to the plurality of component chains 304-1... 304-n for a transmit operation.

[0049] As shown, each respective component chain 304 includes a phase shifter 130 (PS130), an amplifier 310, and at least one other component 308. However, a given component chain 304 may include a greater number, a smaller number, or different components. The direction 202 of signal flow along each component chain 304 can be bidirectional as indicated by the double arrows. As shown, these physical components of each component chain 304 are coupled in series between the signal coupler 306 and the respective antenna element 302 of the antenna array 122. The other component 308 is closest to the signal coupler 306 and the amplifier 310 is closest to the antenna element 302. Thus, the phase shifter 130 is coupled between the other component 308 and the amplifier 310. However, the order of these physical components of a given component chain 304 may be different.

[0050] The amplifier 310 can be implemented in different ways. For example, the amplifier 310 can be implemented as a power amplifier (PA) (PA310-1) in a transmit operation or as a low noise amplifier (LNA) (LNA310-2) in a receive operation. The other component 308 can be realized as a filter, another amplifier, a mixer, etc. Thus, the phase shifter 130 can provide a phase-shifted signal to the PA310-1 for amplification and for transfer to their antenna elements for emission from the respective antenna elements 302. Additionally or alternatively, the phase shifter 130 can receive the amplified signal from the LNA310-2 for phase shifting and then transfer to the other component 308 or, if no other component 308 is present, "directly" to the signal coupler 306.

[0051] In an exemplary operation, each respective component chain 304 adjusts, or conditions, a signal propagating between a signal coupler 306 and a respective antenna element 302. Thus, each respective component chain 304 modifies the signal to produce respective signal versions having different respective phases or amplitudes suitable for providing to, or receiving from, the respective antenna elements 302 to support beam steering operations. The phase shifter 130 performs a phase shift operation based on the phase control signal 208. The phase control signal 208 represents the amount of phase shift (e.g., in angular units) that is targeted to be provided by the phase shifter 130. The difference in the amplification levels occurring in the phase shifter 130 for different amounts of phase shift can be compensated in response to the compensation value signal 210. As shown in FIG. 3-1, the amplifier 310 can perform a compensation operation based on the compensation value signal 210. Alternatively, the vector modulator 134 of the phase shifter 130 (e.g., of FIGS. 1 and 4-1 through 4-3) can perform a compensation operation based on the compensation value signal 210.

[0052] In FIG. 3-1, the signal 334 is shown with respect to the component chain 304-1. The signal 334 can propagate along the component chain 304-1 between the signal coupler 306 and the antenna element 302-1. Other such signals may propagate through other component chains. As indicated by the arrow representing the signal 334 being dashed, since the signal 334 passes through different portions of the component chain 304, the signal 334 can be implemented as a bidirectional signal, a unidirectional signal, or a combination thereof. The bidirectional implementation of the signal 334 across the phase shifter 130 is described with reference to FIG. 3-2, and the unidirectional implementation of the signal 334 across two phase shifters is described with reference to FIG. 3-3.

[0053] FIG. 3-2 generally shows an antenna element 302 coupled to a portion of a component chain 304 (e.g., of FIG. 3-1) that includes a bidirectionally operable phase shifter 130-2 in circuit 300-2. As shown, phase shifter 130-2 includes a plurality of ports, a first port 330-1 and a second port 330-2. Phase shifter 130-2 is coupled to signal coupler 306 via the first port 330-1 and to amplifier 310 via the second port 330-2. However, the orientation of phase shifter 130-2 can be reversed such that the first port 330-1 is positioned closer to antenna element 302 and the second port 330-2 couples phase shifter 130-2 to signal coupler 306. Switch 332 switchably couples phase shifter 130-2 to amplifier 310. Switch 332 includes a pole coupled to the second port 330-2 and two throws, an upper throw and a lower throw. Switch 332 can selectively connect the second port 330-2 of phase shifter 130-2 to the input of PA310-1 via the upper throw or to the output of LNA310-2 via the lower throw.

[0054] The output of PA310-1 is coupled to antenna element 302. The input of LNA310-2 is coupled to antenna element 302 via switch 336. Switch 338 can couple the input of LNA310-2 to ground. As shown in FIG. 3-2, switches 336 and 338 are in an open state and a closed state, respectively, to enable a transmit operation. To enable a receive operation, switch 336 can be closed and switch 338 can be opened. However, different amounts or arrangements of switches can be implemented to couple the various physical components of the component chain to each other or to antenna element 302.

[0055] In FIGS. 3-2 and 3-3, the lines connecting different physical components can represent the amount of wire or other conductors. Thus, a double line can represent two wires, and a single line can represent one wire. In some cases, differential signals are propagated via the double line, and single-ended signals are propagated via the single line. As shown in FIGS. 3-2 and 3-3, the differential signal can be propagated to the left of the amplifier 310, or its processor side. The single-ended signal can be propagated to the right of the amplifier 310, or its antenna side. However, single-ended signaling and differential signaling can be implemented differently. In the exemplary operation of the phase shifters in FIGS. 3-2 and 3-3, to support beam steering using the antenna array 122 (e.g., of FIG. 3-1), a signal 334 having an input phase enters one port of the phase shifter 130 and exits from another port of the phase shifter 130 with a phase that is delayed relative to the input phase.

[0056] In some implementations, the bidirectional signal 334-2 passes through the phase shifter 130-2. An example of this approach is shown in FIG. 3-2. The bidirectional signal 334-2 propagates between the signal coupler 306 and the switch 332 and through the phase shifter 130-2. Thus, the phase shifter 130-2 can be used for both the transmission operation and the reception operation. An exemplary implementation of the bidirectional phase shifter is described below in this specification. FIG. 3-2 also shows at least one unidirectional signal 334-1 that propagates between the switch 332 and the antenna element 302. Specifically, the unidirectional transmission signal 334-11 propagates between the switch 332 and the antenna element 302 and through the PA 310-1. The unidirectional reception signal 334-12 propagates between the antenna element 302 and the switch 332 and through the LNA 310-2.

[0057] FIG. 3-3 generally shows an antenna element 302 coupled to a portion of a component chain 304 (e.g., of FIG. 3-1) that includes two phase shifters 130-11 and 130-12 that can each operate in one direction, in circuit 300-3. Circuit 300-3 is similar to circuit 300-2, except that two one-way phase shifters are utilized in circuit 300-3 instead of one bidirectional phase shifter as in circuit 300-2. In operation, a first phase control signal 208-1 establishes a first phase shift setting for one of the one-way phase shifters 130-11 that is part of the transmit path. A second phase control signal 208-2 establishes a second phase shift setting for another one-way phase shifter 130-12 that is part of the receive path. Exemplary implementations of the one-way phase shifters are described hereinbelow.

[0058] As shown at the component chain level, each of the two phase shifters 130-11 and 130-12 includes a plurality of ports, a first port 330-1 and a second port 330-2. Phase shifter 130-11 is coupled to signal coupler 306 via its first port 330-1 and to amplifier 310 via its second port 330-2. Phase shifter 130-12 is coupled to signal coupler 306 via its first port 330-1 and to amplifier 310 via its second port 330-2. However, the orientation of either or both of phase shifters 130-11 or 130-12 can be reversed such that the first port 330-1 is placed closer to the antenna element 302 and the second port 330-2 couples each phase shifter to the signal coupler 306. Thus, in some implementations, the one-way phase shifter receives a signal via the first port 330-1 and provides a phase-shifted signal via the second port 330-2. In other implementations, the one-way phase shifter receives a signal via the second port 330-2 and provides a phase-shifted signal via the first port 330-1.

[0059] Switch 332 switchably couples two phase shifters 130-11 and 130-12 to signal coupler 306. Switch 332 includes a pole coupled to signal coupler 306 and two throws, an upper throw and a lower throw. Switch 332 can selectively connect signal coupler 306 to the first port 330-1 of phase shifter 130-11 via the upper throw, or connect signal coupler 306 to the first port 330-1 of phase shifter 130-12 via the lower throw. The second port 330-2 of phase shifter 130-11 is coupled to the input of PA310-1. The output of PA310-1 is coupled to antenna element 302. Antenna element 302 is coupled to the input of LNA310-2 via switch 336. The output of LNA310-2 is coupled to the second port 330-2 of phase shifter 130-12. Switches 332, 336, and 338 can operate with respect to the transmit and receive operations as described above with reference to FIG. 3-2. However, different amounts or arrangements of switches can be implemented to couple the various physical components of the shown component chain to each other or to antenna element 302.

[0060] In some implementations, at least one unidirectional signal 334-1 propagates through the components. As shown, two unidirectional signals 334-11 and 334-12 pass through two phase shifters 130-11 and 130-12, respectively. Unidirectional transmit signal 334-11 propagates through phase shifter 130-11 between switch 332 and PA310-1. Thus, phase shifter 130-11 can be used for transmit operations. Unidirectional transmit signal 334-11 also propagates through PA310-1 between phase shifter 130-11 and antenna element 302. Unidirectional receive signal 334-12 propagates through LNA310-2 between antenna element 302 and phase shifter 130-12. Unidirectional transmit signal 334-12 also propagates through phase shifter 130-12 between LNA310-2 and switch 332. Thus, phase shifter 130-12 can be used for receive operations.

[0061] FIG. 4-1 shows an exemplary phase shifter 130 that includes a signal phase generator 132, a vector modulator 134, an interface 402, and a plurality of ports 330-1 and 330-2. As described above with reference to FIGS. 3-1 through 3-3, the phase shifter 130 includes a first port 330-1 (P1) and a second port 330-2 (P2) that enable the phase shifter 130 to couple to other components of the component chain 304. As shown, the first port 330-1 is coupled to the vector modulator 134, and the second port 330-2 is coupled to the signal phase generator 132. The signal phase generator 132 is coupled to the vector modulator 134. In some implementations, the signal phase generator 132 is coupled to the vector modulator 134 via the interface 402. Thus, the interface 402 is electrically disposed between the signal phase generator 132 and the vector modulator 134. The phase shifter 130 includes a plurality of nodes 404-1, 404-2, ..., 404-7, 404-8. Eight nodes 404-1 through 404-8 are clearly shown in FIG. 4-1 and are described herein, but the phase shifter 130 may include more or fewer such nodes.

[0062] In an exemplary implementation, the first port 330-1 includes one or more nodes, the second port 330-2 includes one or more nodes, and the interface 402 includes two or more nodes. In a single-ended signaling environment, the first port 330-1 and the second port 330-2 may each include one node, and the interface 402 may include two nodes. In a differential signaling environment, the first port 330-1 and the second port 330-2 may each include two nodes, and the interface 402 may include four nodes. By way of example, the phase shifter 130 of FIG. 4-1 can shift the phase of a differential signal propagating between the first port 330-1 and the second port 330-2.

[0063] Thus, the first port 330-1 includes two nodes N1 and N2, namely, the first node 404-1 and the second node 404-2 respectively. The second port 330-2 also includes two nodes N1 and N2, namely, the third node 404-3 and the fourth node 404-4 respectively. The interface 402 includes four nodes N1, N2, N3, and N4, namely, the fifth node 404-5, the seventh node 404-7, the sixth node 404-6, and the eighth node 404-8 respectively. As shown in various figures (e.g., FIGS. 4-1 and 6 to 8), the interface 402 may include a plurality of connections shown as lines such as communication lines. The lines may be realized using wires, traces, metal wiring paths, or other conductors. Thus, each respective node of the four nodes N1, N2, N3, and N4 of the interface 402 (e.g., the fifth node 404-5, the seventh node 404-7, the sixth node 404-6, and the eighth node 404-8 respectively) may be realized as a point along a corresponding conductor extending between at least the signal phase generator 132 and the vector modulator 134, or as its length. As will be described below with reference to FIGS. 5-1 and 5-2, the two nodes N1 and N2 of the first port 330-1 and the second port 330-2 may correspond to differential signals having phases of 0 degrees and 180 degrees. The four nodes N1, N2, N3, and N4 of the interface 402 may correspond to two differential signals having phases of 0 degrees, 180 degrees, 90 degrees, and 270 degrees.

[0064] The phase shifter 130 of FIG. 4-1 is described using the unidirectional signal 334-1. Here, the phase shifter 130 receives the unidirectional signal 334-1 at the first port 330-1 and provides a phase-shifted version of the unidirectional signal 334-1 at the second port 330-2. However, the described principle is also applicable to the phase shifter 130 implemented bidirectionally and to the phase shifter 130 that processes the unidirectional signal 334-1 propagating from the second port 330-2 to the first port 330-1. Further, in FIG. 4-1, two and four components 406 of the unidirectional signal 334-1 are shown at two ports and one interface, respectively, but different amounts of signal components 406 can be implemented as an alternative. In an implementation form of differential signaling, each node 404 can include a plus node or a minus node. For example, the first node 404-1 and the third node 404-3 may each include a plus node, and the second node 404-2 and the fourth node 404-4 may each include a minus node.

[0065] In the exemplary scenario of FIG. 4-1, the vector modulator 134 operates on the unidirectional signal 334-1 in front of the signal phase generator 132 along the direction 202 of the signal flow from the first port 330-1 to the second port 330-2. First, the phase shifter 130 receives the unidirectional signal 334-1 at the first port 330-1. The unidirectional signal 334-1 includes two components, namely the first component 406-1 and the second component 406-2. Accordingly, the first component 406-1 of the unidirectional signal 334-1 propagates through the first node 404-1 (node "N1"), and the second component 406-2 propagates through the second node 404-2 (node "N2"). At the first node 404-1 and the second node 404-2, the first component 406-1 and the second component 406-2 of the unidirectional signal 334-1 have different phases, such as 0° and 180°.

[0066] The vector modulator 134 adjusts the amplitude of at least one of the first component 406-1 and the second component 406-2 of the unidirectional signal 334-1 in response to the phase control signal 208. The vector modulator 134 outputs four components of the unidirectional signal 334-1, namely the fifth component 406-5, the sixth component 406-6, the seventh component 406-7, and the eighth component 406-8. The amplitudes of these four components are adjusted based on the operation of the vector modulator 134. However, additional phases have not yet been generated. Therefore, the fifth component 406-5 to the eighth component 406-8 may correspond to two phases at the output of the vector modulator 134. For example, the fifth component 406-5 and the sixth component 406-6 may correspond to a first phase such as 0°, and the seventh component 406-7 and the eighth component 406-8 may correspond to a second phase such as 180°.

[0067] The fifth component 406-5 propagates from the vector modulator 134 to the signal phase generator 132 through the fifth node 404-5 (node "N1"). The seventh component 406-7 propagates from the vector modulator 134 to the signal phase generator 132 through the seventh node 404-7 (node "N2"). The sixth component 406-6 propagates from the vector modulator 134 to the signal phase generator 132 through the sixth node 404-6 (node "N3"). The eighth component 406-8 propagates from the vector modulator 134 to the signal phase generator 132 through the eighth node 404-8 (node "N4"). Therefore, the signal phase generator 132 receives the fifth component 406-5 to the eighth component 406-8 from the vector modulator 134 via the nodes N1, N2, N3, and N4 of the interface 402.

[0068] The signal phase generator 132 generates at least one additional phase for at least one component 406 of the unidirectional signal 334-1. For example, the signal phase generator 132 can generate phases of 90° and 270° from phases of 0° and 180°. Since at least some of the plurality of components 406-5 to 406-8 already have amplitudes adjusted by the vector modulator 134 at the interface 402, the signal phase generator 132 produces different phases with different relative amplitudes. Thus, it is possible to "recombine" at least four phases that are at least present inside the signal phase generator 132 to produce two phases while realizing a phase shift for the unidirectional signal 334-1. Compared to such components at the interface 402, a fifth component 406-5 and a sixth component 406-6 having at least one different phase inside the signal phase generator 132 are combined at the third node 404-3 (node "N1") to produce a third component 406-3 with a single phase. Compared to such components at the interface 402, a seventh component 406-7 and an eighth component 406-8 having at least one different phase inside the signal phase generator 132 are combined at the fourth node 404-4 (node "N2") to produce a fourth component 406-4 with a single phase. The third component 406-3 and the fourth component 406-4 can have phases 180° apart, such as 0° and 180°.

[0069] The phases of 0° and 180° of the first component 406-1 and the second component 406-2 at the first port 330-1 may be different from the phases of 0° and 180° of the phases of the third component 406-3 and the fourth component 406-4 at the second port 330-2. However, the unidirectional signal 334-1 may remain as the differential signal at the second port 330-2 with a phase shifted with respect to the differential signal at the first port 330-1 in order to support the beamforming operation. Different phases in the phase shifter 130, and in particular, within the signal phase generator 132 of the phase shifter 130, will be further described below with reference to FIGS. 4-2, 5-1, and 5-2. These phases are shown graphically using exemplary phasors in FIG. 4-2 and in words using exemplary numbers in FIGS. 5-1 and 5-2.

[0070] FIG. 4-2 shows an exemplary phase shifter 130 including a signal phase generator 132 and a vector modulator 134. FIG. 4-2 shows the phases of multiple components of a signal via multiple phasors 452-1... 452-12. Although the multiple components 406-1... 406-8 of the signal 334 are clearly shown in FIG. 4-1, these components are omitted from FIG. 4-2 for clarity. The phase shifter 130 of FIG. 4-2 is described using the unidirectional signal 334-1. Here, the phase shifter 130 receives the unidirectional signal 334-1 at the second port 330-2 and provides a phase-shifted version of the unidirectional signal 334-1 at the first port 330-1. However, the described principle is also applicable to the phase shifter 130 implemented bidirectionally and to the phase shifter 130 that processes the unidirectional signal 334-1 propagating from the first port 330-1 to the second port 330-2.

[0071] In the exemplary scenario of FIG. 4-2, the signal phase generator 132 operates on the unidirectional signal 334-1 in front of the vector modulator 134 along the direction 202 of the signal flow from the second port 330-2 to the first port 330-1. To visually represent the relative phases and amplitudes of the different signal components at the various nodes, each phase of the signal components is shown using a phasor diagram 452. First, the phase shifter 130 receives the unidirectional signal 334-1 at the second port 330-2. At the third node 404-3, the corresponding signal component of the unidirectional signal 334-1 has a phase of 45°, represented by the phasor 452-1. In this example, a 45° phase is used so that the phase angle is not obscured by the axes of the phasor diagram. By differential signaling, the corresponding signal component at the fourth node 404-4 has a phase of 225°, as represented by the phasor 452-2.

[0072] The signal phase generator 132 receives two signal components with phases of 45° and 225°. The signal phase generator 132 generates two additional phases and spreads the four phases into four signal components. This dispersion of phases will be further described below with reference to FIGS. 5-1 and 5-2. The signal components with the four phases are separated by 90° increments and are output by the signal phase generator 132 at the interface 402. As shown, the signal component at the fifth node 404-5 has a phase of 45° as represented by the phasor 452-3, and the signal component at the sixth node 404-6 has a phase of 135° as represented by the phasor 452-4. Thus, the phase difference between the signal components at the fifth node 404-5 and the sixth node 404-6 is 90°. The signal component at the seventh node 404-7 has a phase of 225° as represented by the phasor 452-5, and the signal component at the eighth node 404-8 has a phase of 315° as represented by the phasor 452-6. As shown by the four phasors 452-3 through 452-6, the amplitudes of the signal components of the unidirectional signal 334-1 propagating through the interface 402 have substantially equal magnitudes before the vector modulator 134 operates on the unidirectional signal 334-1.

[0073] The vector modulator 134 adjusts the amplitude of at least one component of the unidirectional signal 334-1 in response to the phase control signal 208. In this example, the vector modulator 134 reduces the amplitudes of the two signal components propagating through the fifth node 404-5 and the seventh node 404-7. This is graphically represented using the relatively short phasor arrows at the phasors 452-7 and 452-9, respectively. In contrast, the vector modulator 134 increases the amplitudes of the two signal components propagating through the sixth node 404-6 and the eighth node 404-8. This is graphically represented using the relatively long phasor arrows at the phasors 452-8 and 452-10, respectively.

[0074] The vector modulator 134 outputs four components of the unidirectional signal 334-1, with four components having the amplitudes and phase angles shown at the four phasers 452-7 to 452-10. The signal components are "recombined" for output at the first port 330-1 as a differential signal. At the first node 404-1, after amplitude adjustment by the vector modulator 134, the signal components from the fifth node 404-5 and the sixth node 404-6 are combined to produce a signal component having a phase of 110° as represented by the phaser 452-11. At the second node 404-2, after amplitude adjustment by the vector modulator 134, the signal components from the seventh node 404-7 and the eighth node 404-8 are combined to produce a signal component having a phase of 290° as represented by the phaser 452-12. In this way, the phase shifter 130 can shift the phase of the unidirectional signal 334-1 by 65° (e.g., from 45° to 110°, and from 225° to 290°). Therefore, the phase of the version of the wireless signal that will be transmitted or received via the antenna element can be shifted to support the beamforming operation.

[0075] Figure 4-3 generally shows an exemplary phase shifter 130 including the signal phase generator 132 and the vector modulator 134 at 400-3. As shown in the upper portion of Figure 4-3, the phase shifter 130 includes a plurality of ports such as a first port 330-1 (P1) and a second port 330-2 (P2). As shown, the first port 330-1 is coupled to the vector modulator 134 and the second port 330-2 is coupled to the signal phase generator 132. However, these couplings to the ports can be interchanged. The interface 402 between the signal phase generator 132 and the vector modulator 134 shown in Figures 4-1 and 4-2 is omitted in Figure 4-3.

[0076] In an exemplary operation, the signal phase generator 132 converts a first amount of phase (e.g., one or two) of a signal to a second amount of phase (e.g., two or four respectively) of the signal. In particular, the signal phase generator 132, in particular the vector modulator 134, or the phase shifter 130 can generally convert to “return” from the second amount of phase to the first amount of phase before recombining signal components and transferring the phase-shifted signal along the component chain to another physical component. Thus, the signal phase generator 132 generates one or more phases for the signal. The vector modulator 134 adjusts the amplitude of at least one phase of the signal based on the phase control signal 208. For example, by using the vector modulator 134 to increase or decrease the amplitude of at least one of the in-phase signal (I-signal component) or the quadrature-phase signal (Q-signal component), the phase shifter 130 can shift the phase of the signal propagating through the phase shifter between the first port 330-1 and the second port 330-2.

[0077] As shown in the lower part of FIG. 4-3, the signal can flow in different directions across the phase shifter 130 in different implementation forms. The directions 202 of the flow of these signals are indicated by the dashed arrows. As shown in the phase shifter 130-2, the flow of the signal across the phase shifter may be bidirectional between the first port 330-1 and the second port 330-2, which is indicated by the bidirectional arrow of the signal flow direction 202. As shown in the phase shifter 130-13, the flow of the signal across the phase shifter may be unidirectional from the first port 330-1 to the second port 330-2, which is indicated by the arrow pointing to the right in the unidirectional signal flow direction 202. As a result, in the shown architecture, the vector modulator 134 can operate on the signal propagated by it before the signal phase generator 132 operates on the signal, as represented by the signal flow direction 202 of the phase shifter 130-13. As shown in the phase shifter 130-14, the flow of the signal across the phase shifter may be unidirectional from the second port 330-2 to the first port 330-1, which is indicated by the arrow pointing to the left in the unidirectional signal flow direction 202. As a result, the vector modulator 134 can operate on the signal propagated by it after the signal phase generator 132 operates on the signal, as represented by the signal flow direction 202 of the phase shifter 130-14. Regarding the bidirectional signal flow direction 202 of the phase shifter 130-2, the temporal order of signal processing between the signal phase generator 132 and the vector modulator 134 depends on whether the transmission operation is being performed or the reception operation is being performed, and which port 330 is coupled closer to the antenna element.

[0078] Although not shown as such, the signal phase generator 132 can be implemented as two “separate” one - direction signal phase generators. With respect to the RF front - end 128 (e.g., of FIG. 3 - 1), the first port 330 - 1 can be coupled to other components 308 and thus may be closer to the signal coupler 306 and the transceiver 126 (e.g., of FIG. 2), and the second port 330 - 2 can be coupled to the amplifier 310 and thus may be closer to the antenna array 122. Alternatively, the second port 330 - 2 can be coupled to other components 308 and thus may be closer to the signal coupler 306 and the transceiver 126, and the first port 330 - 1 can be coupled to the amplifier 310 and thus may be closer to the antenna array 122. Various arrangements and architectures of the signal phase generator 132 and the vector modulator 134 are described below with reference to FIGS. 6 through 13 - 2. However, an exemplary implementation of the signal phase generator 132 is described next with reference to FIGS. 5 - 1 and 5 - 2.

[0079] FIG. 5-1 shows a schematic diagram of an exemplary signal phase generator 132 that includes a plurality of capacitors and a plurality of amplifiers, each amplifier having at least one amplification stage. Thus, signal phase generator 132 includes a plurality of amplifiers 502-1, 502-2, 502-3, ..., 502-n, where "n" represents an integer greater than 1. Each amplifier 502 includes at least one amplification stage 504 (Amp Stage 504). Signal phase generator 132 also includes a plurality of capacitors 506-1, 506-2, 506-3, ..., 506-n, where "n" represents an integer greater than 1. As shown, (e.g., in the example where n = 4) the first capacitor 506-1 is also denoted as "C1", the second capacitor 506-2 is also denoted as "C2", the third capacitor 506-3 is also denoted as "C3", and the fourth capacitor 506-n is also denoted as "C4". The "n" of the amplifiers and the "n" of the capacitors can correspond to the same or different integers. Thus, while four amplifiers and four capacitors are clearly shown, alternatively, a greater or lesser number of either or both such components can be included in a given signal phase generator 132.

[0080] In some implementations, each node 404 corresponds to a different phase of signal 334 propagating through signal phase generator 132. Thus, the amount of nodes on one side of signal phase generator 132 can be different from the amount of nodes on the other side of signal phase generator 132 in order to enable generation of at least one phase for propagating signal 334. For example, a first amount of nodes on one side of signal phase generator 132 can be 1, while a second amount on the other side can be 2 or 3. In the example shown in FIG. 5-1, since propagating signal 334 passes through two nodes 404-3 and 404-4, it can have up to two different phases, represented by "P2+" and "P2-", respectively, at second port 330-2 (P2). Since propagating signal 334 passes through four nodes 404-5, 404-6, 404-7, and 404-8, it can have up to four different phases, represented by "I1", "I3", "I2", and "I4", respectively, at interface 402.

[0081] In some embodiments, signal 334 comprises a differential signal. In such cases, the two phases at two nodes 404-3 to 404-4 may correspond to 0° and 180° with respect to a differential in-phase signal component (differential in-phase (I) signal component). Since signal 334 propagates from the second port 330-2 to interface 402 through a plurality of amplifiers 502-1 to 502-n, two additional phases are generated. The four phases at the four nodes 404-5, 404-6, 404-7, and 404-8 may correspond to 0°, 90°, 180°, and 270° with respect to the differential I signal component and a differential quadrature phase signal component (differential quadrature phase (Q) signal component), respectively. In some contexts, a 0° phase signal is referred to as an "I+" signal, a 90° phase signal is referred to as a "Q+" signal, a 180° phase signal is referred to as an "I-" signal, and a 270° phase signal is referred to as a "Q-" signal. These phases are shown relative to each other on one side of the plurality of amplifiers 502-1 to 502-n. Thus, the phases at the third node 404-3 and the fourth node 404-4 are 180° apart from each other. Similarly, the phases at the fifth node 404-5 to the eighth node 404-8 are 90° apart from each other. However, the "0° phase" at the third node 404-3 may be different from the "0° phase" at the fifth node 404-5. At a given amplification stage 504, the four signal components of signal 334 that are distributed across the plurality of amplifiers 502-1 to 502-4 have relative phases of 0 degrees, 90 degrees, 180 degrees, and 270 degrees.

[0082] In an exemplary implementation, a plurality of amplifiers 502-1 through 502-n are coupled to a column circuit in a parallel arrangement between a second port 330-2 and an interface 402. A plurality of capacitors 506-1 through 506-n couple the plurality of amplifiers 502-1 through 502-n together to form a loop 512. Each respective capacitor 506 of the plurality of capacitors 506-1 through 506-n is coupled between each pair of successive amplifiers to form the loop 512. For example, a first capacitor 506-1 is coupled between a first amplifier 502-1 and a second amplifier 502-2, which comprise each pair of successive amplifiers with respect to the loop 512. A second capacitor 506-2 is coupled between the second amplifier 502-2 and a third amplifier 502-3, which comprise another respective pair of successive amplifiers. A third capacitor 506-3 is coupled between the third amplifier 502-3 and a fourth amplifier 502-4, where “n” is equal to 4. Also, a fourth capacitor 506-4 is coupled between the fourth amplifier 502-4 and the first amplifier 502-1, which comprise yet another pair of successive amplifiers with respect to the loop 512. Starting with a given amplifier (e.g., the first amplifier 502-1) and returning to the given amplifier, the capacitor coupling forms a loop 512 through the plurality of amplifiers 502-1 through 502-n.

[0083] In an exemplary operation, from the second port 330-2 to the interface 402, a signal 334 propagates through a signal phase generator 132 to generate at least one additional phase for the signal 334. By a plurality of capacitors 506-1 to 506-n forming a loop 512, the phase of the propagating signal 334 is distributed across a plurality of amplifiers 502-1 to 502-n. More specifically, the relative phases of the signal phase components can be distributed or interpolated across the plurality of amplifiers 502-1 to 502-n. As shown in parentheses, four phases (e.g., 0°, 90°, 180°, and 270°) for both the in-phase and quadrature differential signal components are generated at the interface 402 from two phases (e.g., 0° and 180°) of the in-phase differential signal component at the second port 330-2. Thus, four signal components are created from two signal components. As will be described below, each capacitor 506 can be coupled between respective amplification stages 504 of two consecutive amplifiers (e.g., the second amplifier 502-2 and the third amplifier 502-3). The capacitor 506 can be coupled, for example, between an input terminal of one amplification stage 504 and an output terminal of another amplification stage 504 of two consecutive amplifiers. An exemplary implementation of the amplification stage 504 will be described below with reference to FIG. 6 and later figures.

[0084] In a further exemplary operation, in the "opposite" direction from the interface 402 to the second port 330-2, an inverse phase generation operation is performed. Thus, in this opposite direction, two differential signals of the same phase may be received as input signals at the interface 402 and amplified by a plurality of amplifiers 502-1 to 502-n in such a way that the phase of one of the input signals is shifted by 90 degrees and the combined differential signal at the second port 330-2 is produced. This inverse operation can be utilized, for example, for implementations that allow for bidirectional signal flow as indicated by double arrows for the direction 202 of the signal flow. As will be shown below, some of the described implementations of the signal phase generator 132 are bidirectional and some are unidirectional.

[0085] During operation, the power distribution network 508 (PDN 508) provides a direct current (DC) current 510 (DC current 510) flowing through each amplifier 502 to implement the active signal phase generator 132. The power distribution network 508 may include at least a first power distribution node and a second power distribution node. More specifically, to provide the DC current 510, each amplifier 502 may be coupled between a power supply voltage node 508-1 and a ground node 508-2. Based on the amplification provided by the plurality of powered amplifiers 502-1 to 502-n, specifically by the signal phase generator 132, or generally by the phase shifter 130 (e.g., in FIGS. 2 and 4-1 to 4-3), a certain gain can be implemented, or an increase in signal strength can be achieved, between the second port 330-2 and the interface 402 to prevent, or at least reduce, the attenuation caused.

[0086] The implementation clearly shown in FIG. 5-1 includes one amplification stage 504 in each of the four shown amplifiers 502-1 to 502-n. However, alternative approaches may be implemented. For example, different amounts of amplifiers may be utilized. For example, if eight amplifiers are utilized, the phase of the signal 334 is distributed across the eight amplifiers, and as a result, each successive phase is separated by 45 degrees instead of 90 degrees. Additionally or alternatively, multiple stages may be utilized. Generally, a single amplification stage can provide signal phase generation at some given bandwidth. To increase the available bandwidth, one or more amplification stages may be added to the single amplification stage in each amplifier. More than two amplification stages may be used, but for clarity, an exemplary two-amplification-stage implementation is described with reference to FIG. 5-2.

[0087] FIG. 5-2 shows a schematic diagram of another exemplary signal phase generator 132 that utilizes at least two amplification stages per amplifier 502 and includes a plurality of capacitors and a plurality of amplifiers. The amount of amplifiers and capacitors may be more than or less than 4, but in many of the examples described herein, for simplicity of explanation, both amounts are 4. In the example shown, each amplifier 502 includes two or more amplification stages. Generally, as the amount of amplification stages increases, the available signaling bandwidth increases for the signal phase generator 132. As shown, each amplifier 502 includes two stages, a first amplification stage 504-1 (1st Amp Stage 504-1) and a second amplification stage 504-2 (2nd Amp Stage 504-2). In some aspects, the first amplification stage 504-1 may be implemented as a main amplification stage, and the second amplification stage 504-2 is implemented as a cascode amplification stage or a cascade amplification stage.

[0088] In an exemplary implementation, a loop 512 is created with a plurality of capacitors for each amplification stage 504. Thus, in FIG. 5-2, the signal phase generator 132 includes a first loop 512-1 and a second loop 512-2. The first amplification stage 504-1 corresponds to the first loop 512-1 and a first set 516-1 of capacitors. The first set 516-1 of capacitors includes a plurality of capacitors 506-11, 506-12, 506-13, and 506-14. As shown for the first set 516-1 of capacitors of the first amplification stage 504-1, the first capacitor 506-11 is also denoted as "C11", the second capacitor 506-12 is also denoted as "C12", the third capacitor 506-13 is also denoted as "C13", and the fourth capacitor 506-14 is also denoted as "C14". The second set 516-2 of capacitors includes a plurality of capacitors 506-21, 506-22, 506-23, and 506-24. As shown for the second set 516-2 of capacitors of the second amplification stage 504-2, the first capacitor 506-21 is also denoted as "C21", the second capacitor 506-22 is also denoted as "C22", the third capacitor 506-23 is also denoted as "C23", and the fourth capacitor 506-24 is also denoted as "C24".

[0089] With multiple amplification stages, the plurality of amplifiers 502-1 to 502-4 are coupled to a parallel column circuit between the second port 330-2 and the interface 402. An exemplary implementation of a column circuit for realizing an amplifier will be described below with reference to FIG. 6. The first amplification stage 504-1 is coupled to the second port 330-2, and the second amplification stage 504-2 is coupled to the interface 402. A plurality of capacitors 506-11 to 506-14 of the first set 516-1 of capacitors couple the plurality of amplifiers 502-1 to 502-4 together in the first amplification stage 504-1 to form a first loop 512-1. Each respective capacitor 506 of the plurality of capacitors 506-11 to 506-14 is coupled between each pair of consecutive amplifiers in the first amplification stage 504-1 to form the first loop 512-1. For example, the first capacitor 506-11 is coupled between the first amplification stage 504-1 of the first amplifier 502-1 and the first amplification stage 504-1 of the second amplifier 502-2, and these amplifiers comprise each pair of consecutive amplifiers with respect to the first loop 512-1. The second capacitor 506-12 is coupled between the first amplification stage 504-1 of the second amplifier 502-2 and the first amplification stage 504-1 of the third amplifier 502-3. The third capacitor 506-13 is coupled between the first amplification stage 504-1 of the third amplifier 502-3 and the first amplification stage 504-1 of the fourth amplifier 502-4. Also, the fourth capacitor 506-14 is coupled between the first amplification stage 504-1 of the fourth amplifier 502-4 and the first amplification stage 504-1 of the first amplifier 502-1, and these amplifiers comprise another pair of consecutive amplifiers with respect to the first loop 512-1.

[0090] Starting at the first amplification stage 504-1 of a given amplifier (e.g., the first amplifier 502-1) and returning to the first amplification stage 504-1 of the given amplifier, capacitive coupling forms a first loop 512-1 through the first amplification stages 504-1 of the plurality of amplifiers 502-1 to 502-4. Similarly, the plurality of capacitors 506-21 to 506-24 of the second set 516-2 of capacitors couple the plurality of amplifiers 502-1 to 502-4 together at the second amplification stage 504-2 to form a second loop 512-2. Each respective capacitor 506 of the plurality of capacitors 506-21 to 506-24 is coupled between respective pairs of consecutive amplifiers at the second amplification stage 504-2 to form the second loop 512-2.

[0091] By adding more amplification stages 504 for each amplifier 502, the response of the signal phase generator 132 can be further broadened or flattened across the target frequency bandwidth. As shown in FIG. 5-1, the phases are shown relative to each other on a given side of the plurality of amplifiers 502-1 to 502-4 or at a given stage of amplification. Thus, the phases along a given amplification stage 504 are 90° apart from each other as shown. However, the “0° phase” at the first amplification stage 504-1 may be different from the “0° phase” at the second amplification stage 504-2. Exemplary circuit components that may be used to implement the first amplification stage 504-1 and the second amplification stage 504-2 of the plurality of amplifiers 502-1 to 502-4 are next described with reference to FIG. 6.

[0092] FIG. 6 shows a schematic diagram of an exemplary phase shifter 130-60 including a signal phase generator 132 with a plurality of amplifiers each implemented using at least one transistor and having at least two amplification stages. The phase shifter 130-60 includes a vector modulator 134 as well as the signal phase generator 132. The phase shifter 130-60 includes a first port 330-1, a second port 330-2, and an interface 402. As shown, the first port 330-1 includes two nodes, a first node 404-1 and a second node 404-2. The interface 402 includes four nodes, a fifth node 404-5, a sixth node 404-6, a seventh node 404-7, and an eighth node 404-8. The second port 330-2 includes two nodes, a third node 404-3 and a fourth node 404-4.

[0093] In an exemplary implementation, the plurality of amplifiers 502-1 through 502-4 of the signal phase generator 132 are implemented as a plurality of column circuits 602-1 through 602-4 extending between the second port 330-2 and the interface 402, and each column circuit 602 includes one or more transistors. The four column circuits 602-1, 602-2, 602-3, and 602-4 are coupled in a parallel arrangement between the second port 330-2 and the interface 402. Specifically, the first column circuit 602-1 including the first amplifier 502-1 is coupled between the third node 404-3 of the second port 330-2 and the fifth node 404-5 of the interface 402. The second column circuit 602-2 including the second amplifier 502-2 is coupled between the third node 404-3 and the sixth node 404-6. Also, the third column circuit 602-3 including the third amplifier 502-3 is coupled between the fourth node 404-4 and the seventh node 404-7. Further, the fourth column circuit 602-4 including the fourth amplifier 502-4 is coupled between the fourth node 404-4 and the eighth node 404-8.

[0094] Each amplification stage 504 of each amplifier 502 can be implemented using at least one transistor (referred to as "T##"). As shown, the first amplification stages 504-1 of the first amplifier 502-1, the second amplifier 502-2, the third amplifier 502-3, and the fourth amplifier 502-4 are implemented using transistors T11, T12, T13, and T14, respectively, within each of the respective column circuits 602-1, 602-2, 602-3, and 602-4. Thus, to form the first loop 512-1, capacitor C11 is coupled between transistors T11 and T12, capacitor C12 is coupled between transistors T12 and T13, capacitor C13 is coupled between transistors T13 and T14, and capacitor C14 is coupled between transistors T14 and T11.

[0095] The second amplification stages 504-2 of the first amplifier 502-1, the second amplifier 502-2, the third amplifier 502-3, and the fourth amplifier 502-4 are implemented using transistors T21, T22, T23, and T24, respectively, within each of the respective column circuits 602-1, 602-2, 602-3, and 602-4. Thus, to form the second loop 512-2, capacitor C21 is coupled between transistors T21 and T22, capacitor C22 is coupled between transistors T22 and T23, capacitor C23 is coupled between transistors T23 and T24, and capacitor C24 is coupled between transistors T24 and T21. In the first amplification stage 504-1 or the second amplification stage 504-2, each capacitor may be coupled between the input terminal of one transistor and the output terminal of another transistor, where the other transistor is a consecutive transistor of a pair of transistors along the respective first loop 512-1 or second loop 512-2.

[0096] The power distribution network 508, the power supply voltage node 508-1, and the ground node 508-2 are shown twice in FIG. 6 using arrows of DC current 510 pointing in opposite directions. In some implementations, the power distribution node to which the column circuit 602 is coupled is selectively switched to enable a bi-directional signal flow across the transistors of the signal phase generator 132. Each transistor (T##) is shown in FIG. 6 as a metal-oxide semiconductor (MOS) field-effect transistor (FET) (MOSFET). However, each amplification stage 504 may be implemented with another type of transistor, such as a junction FET (JFET), a bipolar junction transistor (BJT), etc. Exemplary terminal connections for the MOSFET, exemplary transistor polarity types, and exemplary amplifier configurations are described with reference to FIGS. 7 and 8.

[0097] In an exemplary implementation, the value of one or more circuit elements may be selected based on the target frequency (e.g., center frequency or frequency range) of operation of the phase shifter 130. At least one transistor (T##) is associated with a transconductance (Gm) value representing the transconductance of the transistor. At least one capacitor (C##) is associated with a capacitance value representing the capacitance of the capacitor. In some cases, at least one of the transconductance (Gm) value of the transistor or the capacitance value of the capacitor is based on the target frequency of operation of the phase shifter. For example, the product of the transconductance (Gm) value and the capacitance value may be proportional to the target frequency of operation of the phase shifter. As described with reference to FIGS. 7 and 8, the signal amplification of the signal phase generator 132 may be achieved by inputting one or more signal phase components of the signal 334-2 or 334-1 to the plurality of transistors T11 to T14 or T21 to T24 via their gate terminals or channel terminals.

[0098] FIG. 7 shows a circuit diagram of a phase shifter 130-70 including an exemplary signal phase generator 132 that includes a plurality of capacitors and a plurality of amplifiers, each having two common gate (CG) amplifier stages per amplifier. Thus, each transistor of each amplifier stage is configured as a common gate amplifier. Each capacitor is coupled between an input terminal of one transistor and an output terminal of another transistor, and that other transistor is a successive transistor along the first loop 512-1 or the second loop 512-2. Each FET has a plurality of terminals including a gate terminal and at least one channel terminal. For example, each FET may include two channel terminals, a source terminal and a drain terminal. Thus, a circuit element may be coupled to a given FET via at least one terminal of a plurality of terminal types, each terminal type being selected from a group including a gate terminal, a source terminal, or a drain terminal.

[0099] In an exemplary implementation, transistors T11, T12, T13, and T14 are coupled together in parallel “arrangement” between a second port 330-2 and an interface 402 as a first amplifier stage. Transistors T21, T22, T23, and T24 are coupled together in parallel “arrangement” between a second port 330-2 and an interface 402 as a second amplifier stage. Transistors T11 and T21, transistors T12 and T22, transistors T13 and T23, and transistors T14 and T24 are coupled together into four respective column circuits (e.g., the four column circuits 602-1 to 602-4 of FIG. 6) aligned in parallel between two power distribution nodes (not shown in FIG. 7). A bias voltage “Vb” can be used to bias each transistor via the gate terminal of each transistor. The bias voltage Vb can bias the transistor into an analog range that allows amplification of a signal propagating through the channel of the transistor. Each gate terminal may also be AC coupled to ground using a capacitor (not shown). The circuits described herein utilize n-channel FETs as an example, but p-channel FETs may be used as an alternative.

[0100] In the phase shifter 130-70, the transistors in both amplification stages are configured as common gate (CG) amplifiers. Therefore, the input and output terminals of the transistors correspond to their channel terminals, such as source and drain terminals. Each capacitor is coupled between pairs of consecutive transistors via the input terminal of one transistor and the output terminal of the other transistor in the pair of consecutive transistors. From left to right in FIG. 7, each capacitor in both amplification stages is coupled from the left input terminal to the right output terminal. For example, for a signal propagating from the interface 402 to the second port 330-2, the capacitor C11 is coupled between the input terminal of the transistor T11 and the output terminal of the transistor T12. In this example, the input terminal of the transistor T11 corresponds to its source terminal, and the output terminal of the transistor T12 corresponds to its drain terminal. Due to the bidirectional nature of the CG plus CG implementation form, the terminals of the transistor can function as input terminals for the bidirectional signal 334-2 in at least one operating mode and as output terminals for the bidirectional signal 334-2 in another operating mode. Here, the operating modes can include a receiving operating mode and a transmitting operating mode.

[0101] Accordingly, capacitor C11 is coupled between the source terminal of transistor T11 and the drain terminal of transistor T12. Capacitor C12 is coupled between the source terminal of transistor T12 and the drain terminal of transistor T13. Capacitor C13 is coupled between the source terminal of transistor T13 and the drain terminal of transistor T14. Further, capacitor C14 is coupled between the source terminal of transistor T14 and the drain terminal of transistor T11 to form a first loop 512-1. Similarly, capacitor C21 is coupled between the source terminal of transistor T21 and the drain terminal of transistor T22. Capacitor C22 is coupled between the source terminal of transistor T22 and the drain terminal of transistor T23. Also, capacitor C23 is coupled between the source terminal of transistor T23 and the drain terminal of transistor T24. Further, capacitor C24 is coupled between the source terminal of transistor T24 and the drain terminal of transistor T21 to form a second loop 512-2.

[0102] As shown in FIG. 7, by using a CG plus CG configuration for two amplification stages, a bi-directional signal flow is enabled for at least the signal phase generator 132 portion of the phase shifter 130-7, as represented by the double arrows for the bi-directional signal 334-2. As described above, the connection to at least the power supply voltage node 508-1 or the ground node 508-2 on both sides of the transistor column can be controllably switched to selectively enable a bi-directional signal flow. In an exemplary operation, the signal 334-2 can flow from the interface 402 to the second port 330-2. For example, at least one phase of the signal 334-2 can propagate from the fifth node 404-5 to the source terminal of the transistor T11, through its channel, and to its drain terminal. During this propagation, based on the capacitive coupling of the four capacitors C11, C12, C13, and C14, the phase of the signal 334-2 is distributed across the four transistors T11, T12, T13, and T14. From the drain terminal of the transistor T11, at least one phase of the signal 334-2 continues to propagate to the source terminal of the transistor T21, through its channel, and to its drain terminal. During this propagation, based on the capacitive coupling of the four capacitors C21, C22, C23, and C24, the phase of the signal 334-2 is distributed across the four transistors T21, T22, T23, and T24. At least one phase of the signal 334-2 at the drain terminal of the transistor T21 is combined with another phase of the signal 334-2 from the drain terminal of the transistor T22 at the third node 404-3 for transfer from the second port 330-2.

[0103] FIG. 8 shows a circuit diagram of a phase shifter 130-80 including an exemplary signal phase generator 132 that includes a plurality of capacitors and a plurality of amplifiers, each having a common source (CS) amplification stage and a common gate (CG) amplification stage. The signal phase generator 132 of the phase shifter 130-80 is similar to the signal phase generator 132 of the phase shifter 130-70 in FIG. 7. However, the transistors T11, T12, T13, and T14 of the first amplification stage are configured as the common source (CS) amplifiers in FIG. 8. Therefore, for each of these transistors configured with CS, the input terminal corresponds to the gate terminal of the transistor, and the output terminal corresponds to the drain terminal of the transistor. As shown, the source terminals of each transistor of the first amplification stage are coupled to the ground node 508-2.

[0104] Similar to the signal phase generator 132 of FIG. 7, each capacitor is coupled between the input terminal of one transistor and the output terminal of another transistor, and the other transistor is a successive transistor along the first loop 512-1 or the second loop 512-2. However, the direction of capacitive coupling is different for transistors T11 to T14 configured in CS compared to transistors T21 to T24 configured in CG. For example, from left to right between the first amplifier column circuit and the second amplifier column circuit, capacitor C21 is coupled from the input terminal (e.g., source terminal) of transistor T21 to the output terminal (e.g., drain terminal) of transistor T22. In contrast, further from left to right between the first amplifier column circuit and the second amplifier column circuit, capacitor C12 is coupled from the output terminal (e.g., drain terminal) of transistor T11 to the input terminal (e.g., gate terminal) of transistor T12. Therefore, in order to consider the effect of the common source (CS) amplifier configuration, the direction of capacitive coupling is "reversed" for transistors T11 to T14 compared to the direction of capacitive coupling for transistors T21 to T24. In a common source amplifier, the transistor inverts the sign or polarity of the propagating signal by 180 degrees, which is equivalent to a negative mutual conductance (Gm) for each transistor. To cancel this negative mutual conductance (Gm), the direction of capacitive coupling in the first loop 512-1 is also inverted accordingly.

[0105] Due to the reversed direction of capacitive coupling, capacitors C11 to C14 are coupled as follows to form the first loop 512-1. Capacitor C12 is coupled between the drain terminal of transistor T11 and the gate terminal of transistor T12. Capacitor C13 is coupled between the drain terminal of transistor T12 and the gate terminal of transistor T13. Capacitor C14 is coupled between the drain terminal of transistor T13 and the gate terminal of transistor T14. Further, capacitor C11 is coupled between the drain terminal of transistor T14 and the gate terminal of transistor T11 to form the first loop 512-1.

[0106] When using a CS plus CG configuration for two amplification stages, a unidirectional signal flow occurs for at least the signal phase generator 132 portion of the phase shifter 130 - 80, as represented by the single arrow for the unidirectional signal 334 - 1. In an exemplary operation, the signal 334 - 1 can flow from the interface 402 to the second port 330 - 2. For example, at least one phase of the signal 334 - 1 can propagate from the fifth node 404 - 5 to the gate terminal of the transistor T11, cross its channel, and then propagate to its drain terminal. During this signal flow, based on the capacitive coupling of the four capacitors C11, C12, C13, and C14, the phase of the signal 334 - 1 is dispersed across the four transistors T11, T12, T13, and T14, thereby generating at least one additional phase for the signal 334 - 1. From the drain terminal of the transistor T11, at least one phase of the signal 334 - 1 continues to propagate to the source terminal of the transistor T21, through its channel, and to its drain terminal. During this propagation, based on the capacitive coupling of the four capacitors C21, C22, C23, and C24, the phase of the signal 334 - 1 is dispersed across the four transistors T21, T22, T23, and T24. At least one phase of the signal 334 - 1 at the drain terminal of the transistor T21 is combined with another phase of the signal 334 - 1 from the drain terminal of the transistor T22 at the third node 404 - 3 for transfer from the second port 330 - 2.

[0107] Two exemplary implementations of the signal phase generator 132 portion of the phase shifter 130 were described above with reference to FIGS. 7 and 8. Different exemplary implementations of the vector modulator 134, and the associated relationships with the signal phase generator 132 for implementing the phase shifter 130, are described with reference to FIGS. 9 through 13 - 2.

[0108] FIG. 9 shows an exemplary phase shifter 130-90 that includes a signal phase generator 132 and a passive vector modulator 134 implemented using a resistor (R). Phase shifter 130-90 is equivalent to phase shifter 130-70 (of FIG. 7) because both utilize a CG-CG configuration for the two amplifier stages of each amplifier branch. However, an exemplary implementation of vector modulator 134 that includes a plurality of voltage dividers is shown in FIG. 9.

[0109] Generally, phase shifter 130-90 receives power by being coupled between power node 508-1 and ground node 508-2 via switch 904. The second port 330-2 is switchably coupled to power node 508-1 or ground node 508-2 via at least one inductor 902-1 and switch 904-1. An interface 402 is coupled between signal phase generator 132 and one side of vector modulator 134. The other side of vector modulator 134 is coupled to the first port 330-1. The first port 330-1 is switchably coupled to ground node 508-2 or power node 508-1 via at least one inductor 902-2 and switch 904-2. During operation for one signaling direction, a DC current 510 can flow "downstream" from power node 508-1 through switch 904-1, through phase shifter 130-90, through switch 904-2, to ground 508-2. During operation for the opposite signaling direction for the bi-directional function, DC current 510 can flow "upstream" from inductor 902-2 to inductor 902-1 by changing the locations of the two switches 904-1 and 904-2. In the example of FIG. 9, DC current 510 flows through the amplifier branches of both signal phase generator 132 and vector modulator 134 of phase shifter 130-90.

[0110] In an exemplary implementation, the vector modulator 134 is coupled to the signal phase generator 132 at the interface 402 via the fifth node 404-5 to the eighth node 404-8. The vector modulator 134 includes a plurality of portions respectively corresponding to a plurality of amplifier column circuits of the signal phase generator 132. The vector modulator 134 includes a plurality of voltage dividers formed from resistors R, and each resistor R can be implemented as an adjustable resistor of a plurality of adjustable resistors. Each respective portion of the vector modulator 134 includes a respective voltage divider. Each voltage divider includes a pair of adjustable resistors of a plurality of adjustable resistors. As shown, there are four voltage dividers, one for each amplifier branch of the signal phase generator 132. Each voltage divider can adjust the amplitude of the signal component of the signal 334-2 propagating through the respective voltage divider, and thus the respective phase of the signal 334-2. For example, the voltage divider 906 includes two resistors, resistor R1 and resistor R2. Resistor R1 is coupled between the first node 404-1 of the first port 330-1 and the fifth node 404-5 of the interface 402. Resistor R2 is coupled between the fifth node 404-5 and the ground node 508-2.

[0111] Accordingly, in operation, the vector modulator 134 divides at least one voltage to adjust the amplitude of the signal component of signal 334-2 and thus at least one phase of signal 334-2. The voltage divider 906 can attenuate the amplitude of the component of the signal flowing between the first node 404-1 and the fifth node 404-5. The level of attenuation is adjustable by using an adjustable resistor. As shown, each resistor R comprises an adjustable resistor having a resistance value that can be adjusted based on a phase control signal 208 (e.g., of FIGS. 2, 3-1 to 3-3, and 4-1 to 4-3). Each adjustable resistor R can be implemented using one or more transistors, one or more "static" resistive elements, at least one switch, combinations thereof, etc. For example, each individual one of a plurality of transistors or resistive elements can be coupled with a respective switch that can connect or disconnect each respective transistor or resistive element. The plurality of transistors or resistive elements can be coupled together in parallel with respect to each other such that different resistance values can be established for each adjustable resistor R by opening or closing the respective switches that are coupled in series with each individual transistor or resistive element. Alternatively, a plurality of transistors or resistive elements can be coupled together in series with respect to each other, each of them also being individually coupled in parallel with a switch to connect or disconnect individual components to establish the resistance value of the adjustable resistor R. However, the adjustable resistor can be constructed using other techniques.

[0112] The vector modulator 134 also includes two resistors R3 that can be switchably coupled from a port node of one polarity to a voltage divider of another polarity. For example, the left resistor R3 is coupled in series with a switch 908 between a first node 404-1 and a seventh node 404-7. Thus, the resistor R3 can couple a first node 404-1 having one polarity (e.g., the positive portion or the negative portion) of the differential signal to a seventh node 404-7 corresponding to a second node 404-2 having the other polarity (e.g., the negative portion or the positive portion, respectively). These two resistors R3 can be connected to or disconnected from the circuit using each one of two switches 908. When the two resistors R3 are connected, a 180-degree detour path is created that enables the vector modulator 134 to shift the phase shift range from 0 to 90 degrees to 90 to 180 degrees. Generally, an adjustable resistor (e.g., resistor R1) of an adjustable pair of resistors (e.g., resistors R1 and R2) can be coupled between a first positive node (e.g., the first node 404-1) and a second positive node (e.g., the fifth node 404-5) of the phase shifter 130. Further, at least one adjustable resistor (e.g., resistor R3) of the plurality of adjustable resistors can be coupled between a first positive node (e.g., the first node 404-1) and a negative node (e.g., the seventh node 404-7) of the phase shifter 130.

[0113] As represented by the double arrows for the bidirectional signal 334-2, both the signal phase generator 132 and the vector modulator 134 of the phase shifter 130-90 are bidirectional. Thus, the phase shifter 130-90 can operate bidirectionally, such as in the exemplary component chain of FIG. 3-2. However, the DC current 510 flows through the resistor R of the vector modulator 134 and the transistors of the signal phase generator 132. As a result, the resistor R of the vector modulator 134 affects the mutual conductance (Gm) value of the transistors, resulting in some non-linearity. In contrast, with the common source (CS) amplifier configuration, the DC current 510 flowing through the vector modulator 134 shown in FIG. 10 is not the same as the DC current flowing through the signal phase generator 132.

[0114] FIG. 10 shows another exemplary phase shifter 130-100 that includes a signal phase generator 132 implemented using resistors and a passive vector modulator 134. The phase shifter 130-100 is equivalent to the phase shifter 130-80 (of FIG. 8) because both of them utilize a CS-CG configuration for the two amplification stages of each amplifier branch or column circuit 602. The phase shifter 130-100 is also similar to the phase shifter 130-90 (of FIG. 9) because the vector modulator 134 is implemented using a plurality of voltage dividers. However, due to the CS amplifier configuration of transistors T11 to T14, the flow of the DC current 510 in the phase shifter 130-100 is different from the flow of the DC current in the phase shifter 130-90.

[0115] Due to the CS amplifier configuration of transistors T11 to T14, DC current 510 flows from power supply node 508-1, through transistors T21 to T24, through transistors T11 to T14, and then to ground node 508-2. As a result, DC current 510 does not flow through resistor R of vector modulator 134. This achieves more stable or predictable performance over process-voltage-temperature (PVT) variations and provides an opportunity for gain improvement. However, since the signal is passed from the gate terminal to the channels of transistors T11 to T14, this architecture results in a unidirectional signal flow across signal phase generator 132 and thus across phase shifter 130 as shown in FIG. 3-3, which is represented by the single arrow of unidirectional signal 334-1. Thus, in this case, vector modulator 134 operates on propagation signal 334-1 before signal phase generator 132 operates on propagation signal 334-1.

[0116] FIG. 11 shows an exemplary phase shifter 130-110 that includes signal phase generator 132 and active vector modulator 134 implemented using a bank of transistors. Phase shifter 130-110 is equivalent to phase shifter 130-70 (of FIG. 7) because both of them utilize a CG-CG configuration for two amplification stages of each amplifier branch or column circuit 602. However, an exemplary implementation of vector modulator 134 that includes multiple transistors is shown in FIG. 11.

[0117] In an exemplary implementation, the plurality of transistors are organized into a plurality of banks 1102-1, 1102-2, 1102-3, and 1102-4 of transistors. Each respective bank 1102 of transistors corresponds to each respective part of the plurality of parts of the vector modulator 134. Thus, each respective bank 1102 of transistors is coupled between each amplifier of the plurality of amplifiers of the signal phase generator 132 and at least one node of the first port 330-1 of the phase shifter 130-110 via the interface 402. Each bank 1102 of transistors includes a plurality of transistors coupled in parallel with respect to each other between each transistor of the plurality of transistors T11 to T14 and the node of the first port 330-1. For example, the plurality of transistors of the first bank 1102-1 of transistors are coupled together in parallel via their channel terminals between the fifth node 404-5 of the interface 402 and the ground node 508-2. The second bank 1102-2 of transistors is coupled via its channel terminal between the sixth node 404-6 and the ground node 508-2. Further, the third bank 1102-3 of transistors is coupled between the seventh node 404-7 and the ground node 508-2, and the fourth bank 1102-4 of transistors is coupled between the eighth node 404-8 and the ground node 508-2. The gate terminals of the transistors of the first bank 1102-1 of transistors and the second bank 1102-2 of transistors are coupled to the first node 404-1 of the first port 330-1. The gate terminals of the transistors of the third bank 1102-3 of transistors and the fourth bank 1102-4 of transistors are coupled to the second node 404-2 of the first port 330-1. In FIG. 11, by way of example, the first node 404-1 and the second node 404-2 of the first port 330-1 can be coupled directly, such as via one or more capacitors, to another physical component, etc.

[0118] In an exemplary operation, at least one component of the unidirectional signal 334-1 that may have a first phase is applied to the gate terminals of a plurality of transistors in both the first bank 1102-1 and the second bank 1102-2 of the transistors. At least one other component of the signal 334-1 that may have a second phase is applied to the gate terminals of a plurality of transistors in both the third bank 1102-3 and the fourth bank 1102-4 of the transistors. Each bank 1102 of the transistors conducts current to adjust the amplitude of each component of the signal 334-1 propagating through the vector modulator 134 via the respective corresponding bank 1102 of the transistors. The amount of transistors in a given bank 1102 of the transistors can be turned on or off in response to a phase control signal 208 (e.g., from FIGS. 2, 3-1 to 3-3, and 4-1 to 4-3) to adjust the amount of current flowing through the given bank 1102 of the transistors. Thus, in operation, the vector modulator 134 conducts current to adjust the amplitude of the signal components of the signal 334-1 and, thus, at least one phase of the signal 334-1. Although not shown in FIG. 11, a path with a switchable connection between one polarity and the other polarity of the differential signal may be included as part of the vector modulator 134 (in a manner similar to the resistor R3 and the switch 908 of FIGS. 9 and 10) to achieve a phase shift greater than 90 degrees. Also, in this case, the vector modulator 134 operates on the propagation signal 334-1 before the signal phase generator 132 operates on the propagation signal 334-1.

[0119] The resolution of the phase shift, or the granularity of the phase shift increment, depends in part on the amount of transistors in each bank 1102 of the transistors. The resolution of the phase shift may also depend at least in part on the size of one or more of the transistors in each bank 1102 of the transistors. For example, the resolution may be improved by including transistors of different sizes. The different sizes may be determined using any of a plurality of techniques, such as binary weighting or thermometer coding. Thus, the sizes of the transistors within a given bank 1102 of transistors may vary relative to each other. To shift the phase of the signal propagating through the phase shifter 130-110, each portion of the vector modulator 134 or the bank 1102 of transistors can be separately controlled in response to the phase control signal 208 to separately adjust the amplitude of each corresponding signal component propagating through each respective bank 1102 of transistors. Alternatively, the banks of transistors can be controlled in pairs. In these ways, the amount or size of the transistors turned on or off by the phase control signal 208 in one bank 1102 of transistors can be at least partially independent of the amount or size of the transistors turned on or off by the phase control signal 208 in different banks of transistors.

[0120] FIG. 12 shows another exemplary phase shifter 130-120 that includes a signal phase generator 132 and an active vector modulator 134 implemented using a bank of transistors. Phase shifter 130-120 is equivalent to phase shifter 130-80 (of FIG. 8) because both utilize a CS-CG configuration for two amplification stages of each amplifier branch or column circuit 602. Phase shifter 130-120 is also similar to phase shifter 130-110 (of FIG. 11) because vector modulator 134 is implemented using multiple transistors. However, in addition to the CS amplifier configuration for the first amplification stage, the order of operation of phase shifter 130-120 is different compared to the order of operation of phase shifter 130-110. More specifically, in this case, signal phase generator 132 operates on propagation signal 334-1 before vector modulator 134 operates on propagation signal 334-1.

[0121] In an exemplary implementation, a unidirectional signal 334-1 may be provided to signal phase generator 132 via a second port 330-2. Here, a third node 404-3 of the second port 330-2 is coupled to input terminals of transistors T11 and T12, which input terminals comprise gate terminals for this CS amplifier configuration. A fourth node 404-4 of the second port 330-2 is coupled to input terminals of transistors T13 and T14, which input terminals comprise gate terminals for this CS amplifier configuration. Nodes 404-5 through 404-8 of interface 402 couple signal phase generator 132 to vector modulator 134.

[0122] The multiple transistors of the vector modulator 134 are organized into multiple banks 1202-1, 1202-2, 1202-3, and 1202-4 of transistors. Each respective bank 1202 of transistors is coupled between respective amplifiers of the multiple amplifiers of the signal phase generator 132 via a respective node of the interface 402 and at least one node of the first port 330-1. Each bank 1202 of transistors includes a plurality of transistors coupled in parallel with respect to each other between a respective transistor of the plurality of transistors T21 to T24 and a node of the first port 330-1. For example, the multiple transistors of the first bank 1202-1 of transistors are coupled together in parallel between the fifth node 404-5 and the first node 404-1 via their channel terminals. The first node 404-1 and the second node 404-2 are coupled to the power supply node 508-1 via at least one inductor 902-1. Accordingly, the propagation signal 334 can be electromagnetically coupled to another physical component via another inductor (not shown) inductively coupled to the inductor 902-1 (e.g., as a transformer).

[0123] In an exemplary operation, the signal phase generator 132 generates at least one additional phase for the signal component of the unidirectional signal 334-1 propagating through the interface 402 as compared to the signal component propagating through the second port 330-2. From the interface 402, each component of the signal 334-1, including at least one phase, is provided to the source terminals of a plurality of transistors in the first bank 1202-1, the second bank 1202-2, the third bank 1202-3, and the fourth bank 1202-4 of transistors. Each bank 1202 of transistors conducts current to adjust the amplitude of each component of the signal 334-1 propagating across the vector modulator 134 through the corresponding respective bank 1202 of transistors. The amount of transistors in a given bank 1202 of transistors can be turned on or off in response to a phase control signal 208 (e.g., of FIGS. 2, 3-1 through 3-3, and 4-1 through 4-3) to adjust the amount of current flowing through the given bank 1202 of transistors. In this way, the vector modulator 134 uses the induction of current to adjust the amplitude of the components of the signal 334-1. After the resynthesis of the components by the first node 404-1 and the second node 404-2 at the first port 330-1, the phase of the unidirectional signal 334-1 is shifted as described above with reference to FIGS. 4-1 and 4-2 to support antenna beamforming.

[0124] The resolution of the phase shift, or the granularity of the phase shift increment, depends in part on the amount of transistors in each bank 1202 of the transistors. The resolution of the phase shift may also depend at least in part on the size of one or more of the transistors in each bank 1202 of the transistors. For example, the resolution may be improved by including transistors of different sizes. The different sizes may be determined using any of a plurality of techniques, such as binary weighting or thermometer coding. Thus, the sizes of the transistors within a given bank 1202 of transistors may vary relative to each other. To shift the phase of the signal propagating through the phase shifter 130-120, each portion of the vector modulator 134 or the bank 1202 of transistors can be separately controlled in response to the phase control signal 208 to separately adjust the amplitude of each corresponding signal component propagating through each respective bank 1202 of transistors. Alternatively, the banks of transistors can be controlled in pairs. In these ways, the amount or size of the transistors turned on or off by the phase control signal 208 in one bank 1202 of transistors can be at least partially independent of the amount or size of the transistors turned on or off by the phase control signal 208 in different banks of transistors.

[0125] FIG. 13-1 shows an exemplary phase shifter 130-130 that includes a signal phase generator 132 and an active vector modulator 134 implemented using a bank of transistors configured as a plurality of variable gain amplifiers (VGAs). Phase shifter 130-130 is equivalent to phase shifter 130-70 (of FIG. 7) in that both utilize a CG-CG configuration for two amplification stages of each amplifier branch or column circuit 602. However, an exemplary implementation of vector modulator 134 that includes a plurality of transistors within each VGA is shown in FIG. 13-1. These plurality of transistors of each VGA of vector modulator 134 are omitted from FIG. 13-1 but are clearly shown in FIG. 13-2. As further described with reference to FIG. 13-2, phase shifter 130-130 can operate bidirectionally using active signal phase generator 132 and active vector modulator 134 as indicated by bidirectional signal 334-2.

[0126] In an exemplary implementation, the plurality of transistors of vector modulator 134 are organized into a plurality of variable gain amplifiers 1302-1, 1302-2, 1302-3, and 1302-4. Each variable gain amplifier (VGA) can be implemented as a bidirectional VGA. Each respective variable gain amplifier 1302 (VGA1302) is coupled between respective amplifiers of signal phase generator 132 via interface 402 and first port 330-1. Phase shifter 130-130 is coupled between at least one amplifier 310 and another component 308 (other components of FIG. 3, or signal coupler 306 as shown at the top of FIG. 13-1). Amplifier 310 may include LNA310-2 or PA310-1 of the component chain (as shown at the bottom of FIG. 13-1), which is coupled to the antenna element as shown in FIGS. 3-1 and 3-2. As shown for VGA1302-1 and 1302-3, each VGA1302 can be coupled between three nodes: node 1350, node 1352, and node 1354.

[0127] Using VGA1302-1, node 1350 is coupled to the fifth node 404-5 of interface 402. Node 1352 is coupled to LNA310-2 via the first node 404-1 of the first port 330-1, and node 1354 is coupled to PA310-1 via another first node 404-1 of the first port 330-1. VGA1302-2 is similarly coupled to PA310-1 and LNA310-2, but instead is coupled to the sixth node 404-6 of interface 402. However, the two VGAs 1302-3 and 1302-4 are coupled differently. Using VGA1302-3, node 1350 is coupled to the seventh node 404-7 of interface 402. Node 1352 is coupled to LNA310-2 via the second node 404-2 of the first port 330-1, and node 1354 is coupled to PA310-1 via another second node 404-2 of the first port 330-1. VGA1302-4 is similarly coupled to PA310-1 and LNA310-2, but instead is coupled to the eighth node 404-8 of interface 402. In operation, vector modulator 134 applies a variable gain to adjust the amplitude of the signal components of signal 334-2 and, thus, at least one phase of signal 334-2. An exemplary implementation of VGA1302 is described below with reference to FIG. 13-2.

[0128] FIG. 13-2 shows an exemplary bidirectional VGA 1302 that can be used in the active vector modulator 134 of FIG. 13-1. Nodes 1350, 1352, and 1354 shown in FIG. 13-2 correspond to those shown in FIG. 13-1. The VGA 1302 of FIG. 13-2 can be coupled via at least one inductor or transformer to the remainder of the phase shifters 130-130 of FIG. 13-1 or to another component along the component chain. Alternatively or in addition, the transistors of the VGA 1302 can be implemented using a p-type MOS (PMOS) configuration. In the configuration shown, the three branch circuits 1304-1, 1304-2, and 1304-3 each include three sets of transistors 1308-1, 1308-2, and 1308-3, three switches 1310-1, 1310-2, and 1310-3, three inductors 1318-1, 1318-2, and 1318-3, and three capacitors 1320-1, 1320-2, and 1320-3. The first branch circuit 1304-1, the second branch circuit 1304-2, and the third branch circuit 1304-3 are coupled between a common node 1306 and one of each of the nodes 1350, 1352, and 1354.

[0129] Switches 1310-1 through 1310-3 each include a pole and two throws. The three poles are each coupled to inductors 1318-1 through 1318-3, and each of the two throws is coupled to power supply voltage node 508-1 or ground node 508-2, respectively. Switches 1310-1 through 1310-3 are each configured to selectively connect the corresponding respective sets 1308-1 through 1308-3 of transistors to power supply voltage node 508-1 or ground node 508-2. As shown, since the individual switches 1310-1 through 1310-3 are not coupled in series between two of ports 1350, 1352, or 1354, switches 1310-1 through 1310-3 are not in the signal propagation path for receive operation via low noise amplifier 310-2 (of FIGS. 3-1 and 3-2) or transmit operation via power amplifier 310-1. In this way, in this exemplary VGA 1302, losses associated with switches disposed in the propagation path can be avoided.

[0130] Inductors 1318-1 to 1318-3 are each coupled between respective poles of switches 1310-1 to 1310-3 and sets of transistors 1308-1 to 1308-3. Inductors 1318-1 to 1318-3 are configured to resonate at a desired frequency to provide a bandpass response. Specifically, inductors 1318-1 to 1318-3 are configured to pass higher frequencies and attenuate lower frequencies by the output of VGA 1302. When the corresponding sets of transistors 1308-1 to 1308-3 operate as a set of transistors that induce the current of VGA 1302 for the vector modulator 134 (e.g., of FIG. 13-1), each inductor 1318-1 to 1318-3 also operates as a dummy load. Capacitors 1320-1 to 1320-3 are coupled between respective poles of switches 1310-1 to 1310-3 and ground node 508-2. In this way, capacitors 1320-1 to 1320-3 comprise bypass capacitors that cause high-frequency signals to "see" a low impedance at switches 1310-1 to 1310-3. In some implementations, capacitors 1320-1 to 1320-3 may be omitted.

[0131] Each of the transistor sets 1308-1 through 1308-3 includes respective gate terminals 1326-1, 1326-2, and 1326-3, respective channel terminals 1328-1, 1328-2, and 1328-3, and respective other channel terminals 1330-1, 1330-2, and 1330-3. Additionally, each of the transistor sets 1308-1 through 1308-3 includes at least one common gate amplifier 1332. If one or more of the transistor sets 1308-1 through 1308-3 includes multiple common gate amplifiers 1332, the multiple common gate amplifiers 1332 are connected together in parallel. Generally, since the common gate amplifier 1332 is symmetric, a DC current can flow from the channel terminal 1328 to the other channel terminal 1330 or from the other channel terminal 1330 to the channel terminal 1328 based on a bias voltage provided through the switch 1310. This enables the overall direction operation of the bidirectional VGA 1302.

[0132] The gate terminals 1326-1 to 1326-3 are coupled to a voltage generator (not shown), which may be implemented within the wireless interface device 120 and may generate individual gate voltages. If the sets of transistors 1308-1 to 1308-3 each include a plurality of transistors, each of the gate terminals 1326-1 to 1326-3 may comprise a plurality of gate terminals coupled to individual transistors within the sets of transistors 1308-1 to 1308-3. In this way, the voltage generator can generate different gate voltages such that different amounts of transistors within the sets of transistors 1308-1 to 1308-3 operate in an active state (e.g., operate in either the saturation region or the linear region) or operate in an inactive state (e.g., operate in the cutoff region). In the active state, current flows through the transistor. In the inactive state, current does not substantially flow through the transistor. Based on the gate voltage, the transistors within the sets of transistors 1308-1 to 1308-3 can operate as amplifiers or switches. The gate voltage may be associated with an analog or digital signal generated by the voltage generator. Generally, the voltage generator generates a set of gate voltages for each of the three branch circuits 1304-1 to 1304-3 depending on whether a transmit operation or a receive operation is being performed. Depending on the type of operation, each set of transistors 1308-1 to 1308-3 can function as an input transistor, an output transistor, or a transistor that conducts current. In the active configuration, the gate voltage is a bias voltage that causes the transistor to operate as an amplifier. In the passive configuration, the gate voltage is a ground voltage, a power supply voltage, or a combination thereof that causes the transistor to operate as a switch.

[0133] Each of the channel terminals 1328-1 through 1328-3 and 1330-1 through 1330-3 is connected to the terminals of transistors within sets 1308-1 through 1308-3 of transistors having the same dopant type. Switches 1310-1 through 1310-3 provide a bias voltage at channel terminals 1330-1 through 1330-3, and this bias voltage causes channel terminals 1330-1 through 1330-3 to become source or drain terminals. For example, if the transistors are n-channel MOSFETs and switches 1310-1 through 1310-3 connect channel terminals 1330-1 through 1330-3 to ground node 508-2, then channel terminals 1330-1 through 1330-3 become source terminals and channel terminals 1328-1 through 1328-3 become drain terminals. Alternatively, if switches 1310-1 through 1310-3 connect channel terminals 1330-1 through 1330-3 to power supply voltage node 508-1, then channel terminals 1330-1 through 1330-3 become drain terminals and channel terminals 1328-1 through 1328-3 become source terminals.

[0134] FIG. 14 is a flow diagram illustrating an exemplary process 1400 for phase shift using active signal phase generation. Process 1400 is described in terms of a set of blocks 1402-1412 that specify operations that may be performed. However, the operations are not necessarily limited to the order shown in FIG. 14 or described herein, because the operations may be performed in alternative orders or may be performed completely or partially in parallel. Also, more, fewer, and / or different operations may be performed to execute process 1400 or an alternative process. The operations represented by the blocks shown in process 1400 may be performed by transceiver 126 or RF front end 128, or portions thereof, in conjunction with communication processor 124 (e.g., of FIGS. 1 and 2). More specifically, the operations of process 1400 may be performed by phase shifter 130.

[0135] In block 1402, a signal with a first amount of phase is coupled via a second port. For example, phase shifter 130 can couple signal 334 having a first amount of phase via second port 330-2. In some cases, signal 334 can have two phases such as 0 degrees and 180 degrees (0° and 180°).

[0136] In block 1404, multiple components of a signal are amplified using multiple amplifiers. For example, phase shifter 130 can amplify multiple components (e.g., two or more signal components from components 406-1 to 406-8) of signal 334 using multiple amplifiers 502-1...502-n. Each amplifier 502 may include at least one amplification stage 504, and each of them may operate using at least one transistor.

[0137] In block 1406, multiple phases of multiple components of a signal are distributed across multiple amplifiers using capacitively coupled loops, and the multiple phases have a second amount of phase greater than the first amount. For example, phase shifter 130 can distribute multiple phases of multiple components of signal 334 across multiple amplifiers 502-1...502-n using capacitively coupled loop 512, and the multiple phases have a second amount of phase greater than the first amount. This phase distribution can be performed by signal phase generator 132. Capacitively coupled loop 512 can include multiple capacitors 506-1...506-n that are respectively coupled between adjacent pairs of amplifiers such as second amplifier 502-2 and third amplifier 502-3. Here, if the first amount is 2, the second amount can be 4.

[0138] In block 1408, one or more amplitudes of a plurality of components of a signal are adjusted based on a phase control signal. For example, phase shifter 130 can adjust one or more amplitudes of a plurality of components of signal 334 based on phase control signal 208. To do so, active or passive vector modulator 134 can amplify a plurality of signal components (e.g., first component 406-1 and second component 406-2 or fifth component 406-5 through eighth component 406-8) before or after the amount of the signal components is changed by signal phase generator 132 along the direction 202 of the flow of a given signal.

[0139] In block 1410, a plurality of phases of a plurality of components of a signal are combined to produce a combined signal having a first amount of phase. For example, phase shifter 130 can combine a plurality of phases of a plurality of components of signal 334 to produce a combined signal having a first amount of phase. To do so, pairs of in-phase and quadrature-phase of the signal components can be sent to at least one node such as a current addition node.

[0140] In block 1412, a combined signal having a first amount of phase is coupled via a first port. For example, phase shifter 130 can couple a combined signal having a first amount of phase via first port 330-1. Thus, phase shifter 130 can provide a phase-shifted signal to another component along component chain 304.

[0141] The terms "first", "second", "third", and other indicators related to numbers are used herein to identify or distinguish similar or like items in a given context, such as a particular implementation, a given circuit, a single drawing, or a claim. Thus, a first item in one context may be different from a first item in another context. For example, an item identified as a "first amplifier" in one context may be identified as a "second amplifier" in another context. Similarly, a "first port" in one implementation may be identified as a "second port" in another implementation, or a "first signal component" having a given relative phase at a given location of a phase shifter may be identified as a "third signal component" having a given relative phase at another location of the phase shifter. Further, amplifiers identified by numbers may be arranged differently from amplifiers identified by other numbers in various contexts (e.g., they may be coupled together in a different order).

[0142] Some aspects are described below.

[0143] Aspect 1: An apparatus for a phase shift signal, the apparatus comprising a phase shifter, the phase shifter comprising a first port, a second port, a vector modulator coupled to the first port, and a signal phase generator, the signal phase generator comprising a plurality of amplifiers coupled between the vector modulator and the second port, and a plurality of capacitors coupling the plurality of amplifiers together to form a loop, each respective capacitor of the plurality of capacitors being coupled between respective pairs of successive amplifiers of the plurality of amplifiers to form the loop, the apparatus.

[0144] Aspect 2: The apparatus of Aspect 1, wherein the phase shifter is configured to pass a direct current (DC) current through the plurality of amplifiers of the signal phase generator during a phase shift operation.

[0145] Aspect 3: further comprising a first power distribution node and a second power distribution node, a signal phase generator coupled between the first power distribution node and the second power distribution node, The signal phase generator is configured to flow a direct current (DC) current through a plurality of amplifiers between the first power distribution node and the second power distribution node. The device of Aspect 1 or 2.

[0146] Aspect 4: The device of Aspect 3, wherein the signal phase generator is coupled to the first power distribution node via an inductor.

[0147] Aspect 5: The first port comprises one or more nodes, The second port comprises another one or more nodes, The signal phase generator is coupled to the vector modulator via an interface comprising two or more nodes. The device of any preceding aspect.

[0148] Aspect 6: One or more nodes of the first port correspond to a first quantity, The other one or more nodes of the second port correspond to the first quantity, Two or more nodes of the interface correspond to a second quantity, The device of Aspect 5, wherein the first quantity is less than the second quantity.

[0149] Aspect 7: Each of the two or more nodes of the interface comprises at least a point of each of the two or more conductors extending between the signal phase generator and the vector modulator, The first quantity comprises 2, The device of Aspect 6, wherein the second quantity comprises 4.

[0150] Aspect 8: The device of Aspect 6, wherein the signal phase generator is configured to increase the amount of phase associated with the signal propagating between the second port and the interface.

[0151] Aspect 9: An apparatus according to any preceding aspect, wherein each capacitor of a plurality of capacitors is coupled via a different terminal type between respective pairs of successive amplifiers of the plurality of amplifiers and between respective pairs of successive amplifiers of each pair of successive amplifiers.

[0152] Aspect 10: The apparatus of aspect 9, wherein each terminal type of the terminal types is selected from the group comprising a gate terminal, a source terminal, or a drain terminal of a transistor.

[0153] Aspect 11: An amplifier of the plurality of amplifiers comprises a transistor, the transistor is associated with a mutual conductance (Gm) value representing the mutual conductance of the transistor, a capacitor of the plurality of capacitors is associated with a capacitance value representing the capacitance of the capacitor, An apparatus according to any preceding aspect, wherein at least one of the mutual conductance (Gm) value or the capacitance value is based on a target frequency of operation of the phase shifter.

[0154] Aspect 12: The apparatus of aspect 11, wherein the product of the mutual conductance (Gm) value and the capacitance value is proportional to the target frequency of operation of the phase shifter.

[0155] Aspect 13: Each pair of successive amplifiers of the plurality of amplifiers comprises a first amplifier having an input terminal, and a second amplifier having an output terminal, An apparatus according to any preceding aspect, wherein the plurality of capacitors comprises a first capacitor coupled between the input terminal of the first amplifier and the output terminal of the second amplifier.

[0156] Aspect 14: The input terminal corresponds to a node configured to receive a propagation signal from a component for at least one operating mode of the phase shifter, An apparatus according to aspect 13, wherein the output terminal corresponds to another node configured to provide a propagation signal to another component for at least one operating mode of the phase shifter.

[0157] Aspect 15: A first amplifier includes a first transistor, and an input terminal of the first amplifier includes a source terminal of the first transistor. An apparatus according to aspect 13, wherein a second amplifier includes a second transistor, and an output terminal of the second amplifier includes a drain terminal of the second transistor.

[0158] Aspect 16: A first amplifier includes a first transistor, and an input terminal of the first amplifier includes a drain terminal of the first transistor. An apparatus according to aspect 13, wherein a second amplifier includes a second transistor, and an output terminal of the second amplifier includes a source terminal of the second transistor.

[0159] Aspect 17: A first amplifier includes a first transistor, and an input terminal of the first amplifier includes a gate terminal of the first transistor. An apparatus according to aspect 13, wherein a second amplifier includes a second transistor, and an output terminal of the second amplifier includes a drain terminal of the second transistor.

[0160] Aspect 18: An apparatus according to any preceding aspect, wherein a plurality of amplifiers includes four amplifiers. An apparatus according to any preceding aspect, wherein a plurality of capacitors includes four capacitors.

[0161] Aspect 19: Four amplifiers are corresponding to at least one of a differential in-phase (I) signal component and a differential quadrature-phase (Q) signal component, or an apparatus according to aspect 18, corresponding to at least one of four signal components having relative phases of 0 degrees, 90 degrees, 180 degrees, and 270 degrees.

[0162] Aspect 20: The loop includes a first loop and a second loop. each amplifier of a plurality of amplifiers, a first amplification stage, and a second amplification stage coupled to the first amplification stage, a plurality of capacitors, a first set of capacitors that couple together the first amplification stages of the plurality of amplifiers to form a first loop, and a second set of capacitors that couple together the second amplification stages of the plurality of amplifiers to form a second loop, in an apparatus of any preceding aspect.

[0163] Aspect 21: For each amplifier of a plurality of amplifiers, the first amplification stage is configured as a common-gate amplifier, and the second amplification stage is configured as a common-gate amplifier, in the apparatus of Aspect 20.

[0164] Aspect 22: For each amplifier of a plurality of amplifiers, the first amplification stage is configured as a common-source amplifier, and the second amplification stage is configured as a common-gate amplifier, in the apparatus of Aspect 20.

[0165] Aspect 23: The vector modulator is configured to adjust the amplitude of at least one component of a signal propagating through the vector modulator, in an apparatus of any preceding aspect.

[0166] Aspect 24: For at least one operating mode of a phase shifter, the vector modulator is configured to receive, via a first port, a signal propagating along the direction of signal flow, the vector modulator is configured to provide a signal propagating along the direction of signal flow to a signal phase generator, the signal phase generator is configured to receive a signal propagating along the direction of signal flow from the vector modulator, and the signal phase generator is configured to provide, via a second port, a signal propagating along the direction of signal flow, in an apparatus of any preceding aspect.

[0167] Aspect 25: For at least one operating mode of the phase shifter, the signal phase generator is configured to receive, via a second port, a signal propagating along the direction of the signal flow, the signal phase generator is configured to provide a signal propagating along the direction of the signal flow to a vector modulator, the vector modulator is configured to receive a signal propagating along the direction of the signal flow from the signal phase generator, the vector modulator is configured to provide, via a first port, a signal propagating along the direction of the signal flow, a device according to any one of Aspects 1 to 23.

[0168] Aspect 26: The vector modulator comprises a plurality of adjustable resistors having a plurality of pairs of adjustable resistors, each respective pair of adjustable resistors being configured as a respective voltage divider and coupled to a respective amplifier of a plurality of amplifiers, a device according to any preceding aspect.

[0169] Aspect 27: an adjustable resistor of a pair of adjustable resistors among the plurality of pairs of adjustable resistors is coupled between a first positive node and a second positive node of the phase shifter, at least one adjustable resistor of the plurality of adjustable resistors is coupled between a first positive node and a negative node of the phase shifter, a device according to Aspect 26.

[0170] Aspect 28: Each adjustable resistor of at least a portion of the plurality of adjustable resistors comprises at least one resistive element, or comprises at least one transistor, a device according to Aspect 26.

[0171] Aspect 29: The vector modulator An apparatus according to any preceding aspect, comprising a plurality of transistors each having a plurality of banks of transistors, each bank of transistors being coupled between a respective amplifier of a plurality of amplifiers of a signal phase generator and a first port.

[0172] Aspect 30: Each bank of transistors of the plurality of banks of transistors comprises a plurality of transistors coupled together in parallel between a respective amplifier of the plurality of amplifiers and the first port, The apparatus of aspect 29, wherein each bank of transistors of the plurality of banks of transistors is configured to conduct a current to adjust one or more amplitudes of at least one component of a signal propagating through a vector modulator.

[0173] Aspect 31: Each bank of transistors of the plurality of banks of transistors comprises a first branch circuit comprising a first plurality of transistors, a second branch circuit comprising a second plurality of transistors, and a third branch circuit comprising a third plurality of transistors, the third branch circuit being coupled to the first and second branch circuits at respective common nodes, The apparatus of aspect 29, wherein the first branch circuit of each bank of transistors is coupled to a respective amplifier of the plurality of amplifiers.

[0174] Aspect 32: The second branch circuit of each bank of transistors is coupled between a respective common node and a low noise amplifier, The apparatus of aspect 31, wherein the third branch circuit of each bank of transistors is coupled between a respective common node and a power amplifier.

[0175] Aspect 33: The first branch circuit of each bank of the transistors is coupled between each common node and the first switch of each bank of the transistors, and the first switch is switchably coupled to the power supply voltage node or the ground node. An apparatus according to aspect 31, wherein the second branch circuit of each bank of the transistors is coupled between each common node and the second switch of each bank of the transistors, and the second switch is switchably coupled to the power supply voltage node or the ground node.

[0176] Aspect 34: An apparatus according to aspect 31, wherein each bank of the transistors of the plurality of banks of transistors comprises a respective bidirectional variable gain amplifier of the plurality of bidirectional variable gain amplifiers.

[0177] Aspect 35: An apparatus according to any preceding aspect, wherein the signal phase generator comprises a plurality of column circuits extending between the second port and the vector modulator, and each column circuit of the plurality of column circuits comprises a respective amplifier of the plurality of amplifiers.

[0178] Aspect 36: The vector modulator comprises a plurality of parts, and each part of the plurality of parts is coupled to a respective column circuit of the plurality of column circuits of the signal phase generator. An apparatus according to aspect 35, wherein each part of the plurality of parts of the vector modulator is configured to adjust the amplitude of each component of the signal propagating through the phase shifter for a respective amplifier corresponding thereto.

[0179] Aspect 37: An antenna array comprising a plurality of antenna elements, wherein at least one antenna element of the plurality of antenna elements is coupled to a phase shifter. A wireless interface device coupled to an antenna array, the wireless interface device comprising a phase shifter and configured to direct a wireless signal communicated via the antenna array using the phase shifter, the apparatus of any preceding aspect further comprising a wireless interface device.

[0180] Aspect 38: A display screen, and A processor operably coupled to at least a portion of the display screen and the wireless interface device, the processor configured to present one or more graphical images on the display screen based on a wireless signal communicated by the wireless interface device using a phase shifter, the apparatus of aspect 37.

[0181] Aspect 39: An apparatus for a phase shift signal, the apparatus comprising A phase shifter, the phase shifter comprising A first port, and A second port, and A vector modulator coupled to the first port, and A signal phase generator, the signal phase generator comprising Amplifying means for amplifying a phase-shifted signal, the amplifying means comprising a plurality of input terminals and a plurality of output terminals and coupled between the vector modulator and the second port, the amplifying means, and Capacitive means for dispersing a plurality of phases of a signal across the amplifying means, the capacitive means coupling a plurality of input terminals to a plurality of output terminals, the capacitive means, the apparatus.

[0182] Aspect 40: The amplifying means comprises a plurality of amplification stages, At least one amplification stage of the plurality of amplification stages comprising means for inputting a signal to a plurality of transistors via channel terminals of the plurality of transistors, the channel terminals of the plurality of transistors comprising a plurality of input terminals, the apparatus of aspect 39.

[0183] Aspect 41: The amplifying means includes a plurality of amplification stages, and at least one amplification stage of the plurality of amplification stages includes means for inputting a signal to a plurality of transistors via the gate terminals of the plurality of transistors, and the gate terminals of the plurality of transistors include a plurality of input terminals, the apparatus of Aspect 39.

[0184] Aspect 42: An apparatus according to any one of Aspects 39 to 41, wherein the vector modulator is configured to adjust at least one amplitude of one or more components of a signal.

[0185] Aspect 43: An apparatus according to Aspect 42, wherein the vector modulator includes passive means for adjusting at least one amplitude of one or more components of a signal.

[0186] Aspect 44: An apparatus according to Aspect 42, wherein the vector modulator includes active means for adjusting at least one amplitude of one or more components of a signal.

[0187] Aspect 45: An apparatus according to Aspect 44, wherein the active means for adjusting at least one amplitude includes at least one plurality of transistors coupled together in parallel between a first port and a signal phase generator.

[0188] Aspect 46: An apparatus according to Aspect 44, wherein the active means for adjusting at least one amplitude includes a plurality of variable gain amplifiers (VGAs) coupled between a first port and a signal phase generator.

[0189] Aspect 47: further comprising control means for providing a phase control signal, and the vector modulator is configured to adjust at least one amplitude of one or more components of a signal in response to the phase control signal, an apparatus according to any one of Aspects 42 to 46.

[0190] Aspect 48: A method for phase shift using active signal phase generation, Coupling a signal having a first amount of phase via a second port; Amplifying a plurality of components of the signal using a plurality of amplifiers; Dispersing a plurality of phases of a plurality of components of the signal across a plurality of amplifiers using capacitively coupled loops, wherein the plurality of phases have a second amount of phase greater than the first amount; Adjusting one or more amplitudes of a plurality of components of the signal based on a phase control signal; Combining a plurality of phases of a plurality of components of the signal to produce a combined signal having a first amount of phase; Coupling the combined signal having a first amount of phase via a first port, a method comprising.

[0191] Aspect 49: The method of aspect 48, wherein the phase control signal represents a phase shift amount for a phase shifter having a first port and a second port.

[0192] Aspect 50: Generating a signal phase component of a signal for a phase shifter, comprising: Amplifying a plurality of components of the signal, and Dispersing a plurality of phases of a plurality of components of the signal across a plurality of amplifiers using capacitively coupled loops A step comprising; Vector modulating a signal phase component of a signal for a phase shifter, the step further comprising adjusting one or more amplitudes of a plurality of components of the signal, the method of aspect 49.

[0193] Aspect 51: The capacitively coupled loop comprises a first capacitively coupled loop and a second capacitively coupled loop, The amplifying step comprises amplifying a plurality of components of the signal using a first amplification stage and a second amplification stage of a plurality of amplifiers, The dispersing step is Using a first capacitively coupled loop to spread the plurality of phases of the plurality of components of the signal across a first amplification stage of a plurality of amplifiers; A method according to any one of aspects 48 to 50, comprising using a second capacitively coupled loop to spread the plurality of phases of the plurality of components of the signal across a second amplification stage of a plurality of amplifiers.

[0194] Aspect 52: Each amplifier of the plurality of amplifiers comprises a respective one of the plurality of transistors, A method according to any one of aspects 48 to 51, wherein the step of amplifying comprises inputting the plurality of components of the signal to a plurality of source terminals of the plurality of transistors.

[0195] Aspect 53: Each amplifier of the plurality of amplifiers comprises a respective one of the plurality of transistors, A method according to any one of aspects 48 to 51, wherein the step of amplifying comprises inputting the plurality of components of the signal to a plurality of gate terminals of the plurality of transistors.

[0196] Aspect 54: The step of spreading the plurality of phases of the plurality of components of the signal is performed by a signal phase generator coupled between a second port and a vector modulator, The step of adjusting one or more amplitudes of the plurality of components of the signal is performed by the vector modulator, the vector modulator being coupled between the signal phase generator and a first port, A method according to any one of aspects 48 to 53, wherein the step of adjusting one or more amplitudes of the plurality of components of the signal is performed before the step of spreading the plurality of phases of the plurality of components of the signal.

[0197] Aspect 55: The step of adjusting comprises Dividing at least one voltage for each component of the plurality of components of the signal to adjust one or more amplitudes based on a phase control signal, For adjusting one or more amplitudes based on a phase control signal, conducting a current for each component of a plurality of components of a signal, or A method according to any one of aspects 48 to 54, comprising at least one of applying a variable gain to amplify each component of a plurality of components of a signal for adjusting one or more amplitudes based on a phase control signal.

[0198] Aspect 56: At least one of amplifying at least one of a signal or a synthesized signal with low noise, or A method according to any one of aspects 48 to 55, further comprising at least one of amplifying at least one of a signal or a synthesized signal with power.

[0199] Aspect 57: The step of coupling via a second port comprises receiving a signal with an input phase for a beam steering operation, The step of coupling via a first port comprises providing a synthesized signal with a phase delayed with respect to the input phase for a beam steering operation, the method of aspect 56.

[0200] Aspect 58: The step of coupling via a first port comprises receiving a synthesized signal with an input phase for a beam steering operation, The step of coupling via a second port comprises providing a signal with a phase delayed with respect to the input phase for a beam steering operation, the method of aspect 56.

[0201] Aspect 59: An apparatus for a phase shift signal, the apparatus comprising A phase shifter, the phase shifter comprising A first port comprising two or more nodes, A second port comprising two or more nodes, An interface comprising four or more nodes, A vector modulator coupled between the first port and the interface, and a signal phase generator, wherein the signal phase generator is four or more column circuits coupled between the interface and the second port, each column circuit comprising a first transistor and a second transistor, and the first transistors and the second transistors of each respective column circuit being connected in series together between the nodes of the interface and the nodes of the second port, four or more column circuits; A first set of four or more capacitors that couple the four or more column circuits together to form a first loop, each respective capacitor being coupled between each pair of first transistors from two consecutive column circuits of the four or more column circuits to form the first loop, a first set of four or more capacitors; A second set of four or more capacitors that couple the four or more column circuits together to form a second loop, each respective capacitor being coupled between each pair of second transistors from two consecutive column circuits of the four or more column circuits to form the second loop, the apparatus comprising a second set of four or more capacitors.

[0202] Aspect 60: The vector modulator comprises four or more parts, each part being coupled between a certain node among two or more nodes of the first port and each node of four or more nodes of the interface, the apparatus of aspect 59.

[0203] Aspect 61: The apparatus of aspect 60, wherein each part of the four or more parts of the vector modulator is configured to adjust the respective amplitude of each component of four or more components of a signal propagating through a phase shifter.

[0204] Aspect 62: The phase shifter is configured to propagate a signal through the first port using two phases, The phase shifter is configured to propagate a signal through the first transistor and the second transistor using four phases. The apparatus of aspect 61, wherein the phase shifter is configured to propagate a signal through the second port using two phases.

[0205] Unless the context dictates otherwise, the use of the word "or" in this specification may be considered to be the inclusive "or" or a term that permits the inclusion or application of one or more of the items joined by the word "or" (e.g., the phrase "A or B" may be interpreted as permitting only "A", only "B", or both "A" and "B"). Further, the items shown in the accompanying drawings and the terms described in this specification may refer to one or more items or terms, and thus, references to the single or plural forms of items and terms in this specification may be made interchangeably. Finally, although the subject matter has been described above in language specific to structural features or methodological acts, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above, including the fact that the subject matter defined in the appended claims is not necessarily limited to the mechanisms in which the features are arranged or the order in which the acts are performed. Instead, the scope of the invention is given by the claims as set forth below.

Claims

1. An apparatus for a phase shift signal, wherein the apparatus comprises a phase shifter, an antenna array comprising a plurality of antenna elements, wherein at least one of the plurality of antenna elements is coupled to the phase shifter, and wherein the phase shifter comprises a first port, a second port, a vector modulator coupled to the first port, and a signal phase generator wherein the signal phase generator comprises a plurality of amplifiers coupled between the vector modulator and the second port, a plurality of capacitors coupling the plurality of amplifiers together to form a loop, wherein each respective capacitor of the plurality of capacitors is coupled between respective pairs of successive ones of the plurality of amplifiers to form the loop, and wherein the antenna array is configured to transmit or receive at least one wireless signal, the phase shifter is configured to shift the phase of a version of a signal propagating through the phase shifter using a propagation signal previously received as the wireless signal or targeted to be transmitted as the wireless signal.

2. the phase shifter is configured to pass a direct current (DC) current through the plurality of amplifiers of the signal phase generator during a phase shift operation, or the vector modulator is configured to adjust the amplitude of at least one component of a signal propagating through the vector modulator, or for at least one operating mode of the phase shifter, the vector modulator is configured to receive a signal propagating along the direction of signal flow via the first port, the vector modulator is configured to provide the signal propagating along the direction of signal flow to the signal phase generator, the signal phase generator is configured to receive the signal propagating along the direction of signal flow from the vector modulator, the signal phase generator is configured to provide the signal propagating along the direction of signal flow via the second port, or for at least one operating mode of the phase shifter, the signal phase generator is configured to receive a signal propagating along the direction of signal flow via the second port, The signal phase generator is configured to provide the signal propagating along the direction of the signal flow to the vector modulator, The vector modulator is configured to receive the signal propagating along the direction of the signal flow from the signal phase generator, The apparatus according to claim 1, wherein the vector modulator is configured to provide the signal propagating along the direction of the signal flow via the first port.

3. A first power distribution node, And a second power distribution node Further comprising, The signal phase generator is coupled between the first power distribution node and the second power distribution node, The apparatus according to claim 1, wherein the signal phase generator is configured to pass a direct current (DC) current to the plurality of amplifiers between the first power distribution node and the second power distribution node.

4. The apparatus according to claim 3, wherein the signal phase generator is switchably coupled to the first power distribution node or the second power distribution node via an inductor.

5. The first port comprises one or more nodes, The second port comprises another one or more nodes, The signal phase generator is coupled to the vector modulator via an interface comprising two or more nodes, The one or more nodes of the first port correspond to a first quantity, The another one or more nodes of the second port correspond to the first quantity, The two or more nodes of the interface correspond to a second quantity, The apparatus according to claim 1, wherein the first quantity is less than the second quantity.

6. Each of the two or more nodes of the interface is realized as a point within each of two or more conductors extending between the signal phase generator and the vector modulator, The first quantity comprises 2, The second quantity comprises 4, or The apparatus according to claim 5, wherein the signal phase generator is configured to increase the amount of phase associated with the signal propagating between the second port and the interface.

7. Each of the plurality of capacitors is coupled between respective pairs of successive amplifiers of the plurality of amplifiers via different terminal types between each respective pair of successive amplifiers of the plurality of amplifiers, The apparatus according to claim 1, wherein each terminal type of the terminal types is selected from a group comprising a gate terminal, a source terminal, or a drain terminal of a transistor.

8. An amplifier among the plurality of amplifiers includes a transistor, the transistor is associated with a mutual conductance (Gm) value representing the mutual conductance of the transistor, a capacitor among the plurality of capacitors is associated with a capacitance value representing the capacitance of the capacitor, at least one of the mutual conductance (Gm) value or the capacitance value is based on a target frequency of operation of the phase shifter, The apparatus according to claim 1, wherein the product of the mutual conductance (Gm) value and the capacitance value is proportional to the target frequency of operation of the phase shifter.

9. Each respective pair of consecutive amplifiers of the plurality of amplifiers, a first amplifier having an input terminal, a second amplifier having an output terminal and The apparatus according to claim 1, wherein the plurality of capacitors includes a first capacitor coupled between the input terminal of the first amplifier and the output terminal of the second amplifier.

10. The input terminal corresponds to a node configured to receive a propagation signal from a component for at least one operating mode of the phase shifter, the output terminal corresponds to another node configured to provide the propagation signal to another component for the at least one operating mode of the phase shifter, or the first amplifier includes a first transistor, and the input terminal of the first amplifier includes the source terminal of the first transistor, the second amplifier includes a second transistor, and the output terminal of the second amplifier includes the drain terminal of the second transistor, or the first amplifier includes a first transistor, and the input terminal of the first amplifier includes the drain terminal of the first transistor, the second amplifier includes a second transistor, and the output terminal of the second amplifier includes the source terminal of the second transistor, or the first amplifier includes a first transistor, and the input terminal of the first amplifier includes the gate terminal of the first transistor, The apparatus according to claim 9, wherein the second amplifier includes a second transistor, and the output terminal of the second amplifier includes the drain terminal of the second transistor.

11. The plurality of amplifiers includes four amplifiers, The plurality of capacitors includes four capacitors, The four amplifiers are a differential in-phase (I) signal component and a differential quadrature-phase (Q) signal component, or four signal components having relative phases of 0 degrees, 90 degrees, 180 degrees, and 270 degrees The apparatus according to claim 1, corresponding to at least one of them.

12. The loop includes a first loop and a second loop, Each amplifier of the plurality of amplifiers includes a first amplification stage, and a second amplification stage coupled to the first amplification stage and includes The plurality of capacitors includes a first set of capacitors that couple the first amplification stages of the plurality of amplifiers together to form the first loop, and a second set of capacitors that couple the second amplification stages of the plurality of amplifiers together to form the second loop The apparatus according to claim 1.

13. For each amplifier of the plurality of amplifiers, the first amplification stage is configured as a common-gate amplifier, the second amplification stage is configured as a common-gate amplifier, or the first amplification stage is configured as a common-source amplifier, the second amplification stage is configured as a common-gate amplifier, The apparatus according to claim 12.

14. A wireless interface device coupled to the antenna array, the wireless interface device including the phase shifter and configured to direct a wireless signal communicated via the antenna array using the phase shifter. The apparatus according to claim 1, further comprising.

15. A method for phase shift using active signal phase generation, comprising: receiving a signal that is a wireless signal; coupling a signal having a first amount of phase via a second port; amplifying a plurality of components of the signal using a plurality of amplifiers; dispersing a plurality of phases of the plurality of components of the signal across the plurality of amplifiers using a capacitively coupled loop, the plurality of phases having a second amount of phase greater than the first amount of phase. adjusting one or more amplitudes of the plurality of components of the signal based on the phase control signal; combining the plurality of phases of the plurality of components of the signal to produce a combined signal having the first amount of phase; coupling the combined signal having the first amount of phase via a first port; A method comprising:

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