Phase Shifting Device, Planar Antenna Device, and Method of Manufacturing Phase Shifting Device

Abstract

In order to switch the transmission direction of radio waves at high speed while securing sufficient bandwidth, this planar antenna device comprises: a matrix circuit including transistor pairs; a first signal line formed on the upper surface of a second substrate and receiving a signal to be transmitted; a phase shift element configured by a plurality of phase shift wires; a second signal line disposed below a slot and electromagnetically coupled to a patch antenna via the slot; and a switch group configured by a first switching element having a first end of a channel connected to one end of any of the plurality of phase shift wires and having a control electrode connected to a first thin film transistor, and a second switching element having a first end of a channel connected to the other end of any of the plurality of phase shift wires and having a control electrode connected to a second thin film transistor.

Description

Technical Field

[0001] The present disclosure relates to a phase shifter device or the like mounted on a planar antenna device.

Background Art

[0002] For mobile communications after the fifth-generation mobile communication (5G), the development of planar antennas corresponding to radio waves in the high-frequency band has been carried out. In a general planar antenna, a digital integrated circuit for phase shift is mounted on a patch antenna on a printed circuit board to form an antenna. As the frequency band of the radio wave to be transmitted and received becomes higher, the corresponding digital integrated circuit becomes more expensive. A general planar antenna becomes very expensive when applied to mobile communications after 5G because it includes dozens to thousands of digital integrated circuits.

[0003] Patent Document 1 discloses a planar phased array antenna. The phased array antenna of Patent Document 1 includes a patch antenna array, a phase shifter, an air dielectric network, and a bias network. The phase shifter included in the phased array antenna of Patent Document 1 is mounted in a spiral shape. The phase shifter included in the phased array antenna of Patent Document 1 is electronically controllable.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] The phased array antenna of Patent Document 1 can be manufactured using the manufacturing process of a liquid crystal display. By using the phased array antenna of Patent Document 1, a planar antenna applicable to mobile communication after 5G can be manufactured at low cost. In the phased array antenna of Patent Document 1, a phase shift is realized by using the change in the dielectric constant of the liquid crystal. In the phased array antenna of Patent Document 1, due to the operating speed of the liquid crystal, it takes time to switch the beam direction. Therefore, it is difficult to directly apply the phased array antenna of Patent Document 1 to mobile communication after 5G that requires high-speed switching. Further, the phased array antenna of Patent Document 1 has a smaller gain compared to a general planar antenna. Therefore, it is difficult for the phased array antenna of Patent Document 1 to secure a sufficient bandwidth.

[0006] An object of the present disclosure is to provide a planar antenna device or the like that can quickly switch the phase of a signal to be transmitted while securing a sufficient bandwidth.

Means for Solving the Problems

[0007] The planar antenna device according to one aspect of the present disclosure includes a first substrate having a patch antenna disposed on the upper surface and a ground layer having a slot formed in the lower region of the patch antenna disposed on the lower surface, a dielectric layer disposed such that the upper surface is in contact with the ground layer disposed on the lower surface of the first substrate, and a second substrate disposed in contact with the lower surface of the dielectric layer. The second substrate includes a matrix circuit including a transistor pair composed of a first thin film transistor and a second thin film transistor, a first signal line formed on the upper surface of the second substrate and to which a signal to be transmitted is input, a phase shift element formed on the upper surface of the second substrate and composed of a plurality of phase shift wirings, a second signal line formed on the upper surface of the second substrate, disposed below the slot, and electromagnetically coupled to the patch antenna via the slot, a first switching element having a first end of a channel connected to one end of any of the plurality of phase shift wirings and a control electrode connected to the first thin film transistor, and a second switching element having a first end of a channel connected to the other end of any of the plurality of phase shift wirings and a control electrode connected to the second thin film transistor.

[0008] A phase shifter according to an aspect of the present disclosure includes a matrix circuit including a transistor pair composed of a first thin film transistor and a second thin film transistor, a phase shifting element composed of a plurality of phase shift wirings, a first switching element having a first end of a channel connected to one end of any of the plurality of phase shift wirings and a control electrode connected to the first thin film transistor, and a second switching element having a first end of a channel connected to the other end of any of the plurality of phase shift wirings and a control electrode connected to the second thin film transistor, and a switch group composed of the second switching element.

[0009] In a method for manufacturing a phase shifter according to an aspect of the present disclosure, a matrix circuit including a transistor pair composed of a first thin film transistor and a second thin film transistor is formed using a manufacturing process technology of a thin film transistor. , M A phase shifting element composed of a plurality of phase shift wirings is formed above the matrix circuit. Using the manufacturing process technology of micro-LED displays, A first switching element having a first end of a channel connected to one end of any of the plurality of phase shift wirings and a control electrode connected to the first thin film transistor, and a second switching element having a first end of a channel connected to the other end of any of the plurality of phase shift wirings and a control electrode connected to the second thin film transistor, and a switch group composed of the second switching element are formed.

Advantages of the Invention

[0010] According to the present disclosure, it is possible to provide a planar antenna device or the like that can quickly switch the phase of a signal to be transmitted while ensuring a sufficient bandwidth.

Brief Description of the Drawings

[0011]

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[0012] Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. However, although the embodiments described below have technically preferable limitations for carrying out the present invention, they do not limit the scope of the invention below. In all the drawings used in the following description of the embodiments, the same reference numerals are given to the same parts unless otherwise specified. Also, in the following embodiments, repeated descriptions of similar configurations / operations may be omitted.

[0013] (First Embodiment) First, a planar antenna device according to the first embodiment will be described with reference to the drawings. The planar antenna device of this embodiment includes a phase shifter formed using the manufacturing process technology of a micro LED (Light-Emitting Diode) display. Further, the planar antenna device of this embodiment includes a switching element formed using the manufacturing process technology of a thin-film transistor (TFT: Thin-Film-Transistor). That is, the planar antenna device of this embodiment is manufactured by combining the manufacturing process technology of a micro LED display (also called micro LED process technology) and the manufacturing process technology of a thin-film transistor (also called TFT process technology).

[0014] In the following, an example of transmitting a radio wave to be transmitted from a planar antenna device will be described. The planar antenna device can also be applied to receiving a radio wave to be received from the outside. In the following, a description of a transmission device for causing the planar antenna device to transmit a radio wave and a reception device for receiving the radio wave received by the planar antenna device will be omitted. For example, the planar antenna device of the present embodiment is configured to be compatible with radio waves in a high-frequency band used in mobile communications after the fifth-generation mobile communication (5G).

[0015] (Configuration) FIG. 1 is a conceptual diagram showing an example of the appearance of a planar antenna device 10 according to the present embodiment. The planar antenna device 10 includes a first substrate 111, a second substrate 112, and a dielectric layer 113. The planar antenna device 10 has a structure in which the first substrate 111, the second substrate 112, and the dielectric layer 113 are laminated. The first substrate 111 may be integrated with the dielectric layer 113. In that case, the material of the dielectric layer 113 may be applied to the material of the first substrate 111.

[0016] The first substrate 111 includes a transmission surface of the radio wave to be transmitted. A patch antenna array 11 is disposed on the first surface (transmission surface) of the first substrate 111. The patch antenna array 11 is composed of a plurality of patch antennas 110. A ground layer (described later) is formed on the second surface of the first substrate 111 that faces the first surface. For example, the material of the first substrate 111 is silicon or glass. The first substrate 111 may be made of a material other than silicon or glass as long as it can transmit the radio wave to be transmitted.

[0017] The second substrate 112 corresponds to the backplane of the liquid crystal display. A matrix circuit is formed on the upper surface of the second substrate 112. The matrix circuit has a structure in which a plurality of thin film transistors (TFTs) are arranged in a two-dimensional array. The TFTs included in the matrix circuit are formed using TFT process technology. Also, a signal layer is formed above the matrix circuit. The signal layer is formed with phase shift wirings that constitute phase shift elements, a switch group including a plurality of switching elements, signal lines that connect the phase shift wirings and the switch group, and the like. The switching elements are formed using micro-LED process technology. For example, the material of the second substrate 112 is silicon or glass. The second substrate 112 may be made of a material other than silicon or glass as long as it can transmit the radio wave to be transmitted.

[0018] The dielectric layer 113 is sandwiched between the first substrate 111 and the second substrate 112. The dielectric layer 113 is composed of a dielectric material having a specific dielectric constant. The dielectric constant of the dielectric layer 113 is selected according to the radio wave to be transmitted. The dielectric layer 113 may be integrated with the first substrate 111.

[0019] By sandwiching the dielectric layer 113 between the mutually facing first substrate 111 and the second substrate 112, an antenna including the function of a phase shifter is formed. A single antenna (also referred to as an antenna unit) is configured for each patch antenna 110. The function of the phase shifter is manifested for each antenna unit. That is, a phase shift element is configured for each antenna unit.

[0020] FIG. 2 is a block diagram showing an example of the configuration of the planar antenna device 10. The planar antenna device 10 includes a patch antenna array 11, a matrix circuit 12, a switch group 13, a phase shifter 15, a drive circuit 17, a control circuit 18, and a signal source 19. The matrix circuit 12, the switch group 13, and the phase shifter 15 constitute a phase shift device 150.

[0021] The patch antenna array 11 includes a plurality of patch antennas 110. The plurality of patch antennas 110 are arranged in a two-dimensional array. In the example of FIG. 2, the plurality of patch antennas 110 are arranged along the X direction and the Y direction. The plurality of patch antennas 110 are phased arrayed.

[0022] The patch antenna 110 is a plate-shaped radiation element. In the example of FIG. 1, the patch antenna 110 is square. The shape of the patch antenna 110 is not limited to square, and may be circular or other shapes. The patch antenna 110 is fed by an electromagnetic coupling feeding method. An opening (also called a slot) opens in the ground layer below the patch antenna 110. The patch antenna 110 is electromagnetically coupled to a signal line (microstrip line) formed on the upper surface side of the second substrate 112 through the slot of the ground layer. By electromagnetically coupling the patch antenna 110 and the microstrip line through the slot, the patch antenna 110 is excited. The open end of the microstrip line is opened at a position about 1 / 4 wavelength away from the wavelength of the radio wave to be transmitted from directly below the slot, and the impedance can be matched by adjusting the dimensions of the slot. For example, the shape of the slot is rectangular. For example, the shape of the slot may be a shape other than rectangular, such as a dogbone type. Note that the patch antenna 110 and the microstrip line may be electromagnetically coupled by proximity coupling feeding without passing through the slot.

[0023] The patch antenna 110 is an open resonator having a structure equivalent to a microstrip line with both ends open. The patch antenna 110 resonates at a frequency where the length matches an integer multiple of 1 / 2 wavelength. The size of the patch antenna 110 is set according to the wavelength of the radio wave to be transmitted. Since the patch antenna 110 is an open resonator that resonates at the resonance frequency, the Q value decreases due to radio wave radiation. In order to avoid the decrease in the Q value due to radio wave radiation and operate the patch antenna 110 as a resonator, it is preferable that the dielectric constant of the material of the dielectric layer 113 is high. When the material of the dielectric layer 113 has a high dielectric constant, the thickness of the dielectric layer 113 and the width of the patch antenna 110 are set to be sufficiently small with respect to the wavelength of the radio wave to be transmitted. For example, when the material of the dielectric layer 113 has a low dielectric constant, a microstrip antenna can be configured by increasing the thickness of the dielectric layer 113 and the width of the patch antenna 110 with respect to the wavelength of the radio wave to be transmitted to increase the radiation amount.

[0024] The matrix circuit 12 has a configuration in which a plurality of thin film transistors (TFTs) are arranged in a two-dimensional array. The matrix circuit 12 is formed on the upper surface of the second substrate 112 using TFT process technology. A shield layer (described later) is formed above the matrix circuit 12. Each of the plurality of TFTs is associated with one of the plurality of patch antennas 110 that make up the patch antenna array 11. For example, the TFT is composed of a semiconductor layer such as amorphous silicon or polysilicon.

[0025] The switch group 13 includes a plurality of switching elements. The plurality of switching elements are formed above the region where the matrix circuit 12 is formed using micro LED process technology (device transfer technology). The plurality of switching elements are connected to signal lines and phase shift lines included in a signal layer formed above a shield layer (described later). One of the plurality of TFTs is connected to each of the plurality of switching elements. A plurality of phase shift lines constituting a phase shift element for each antenna unit are arranged between the TFTs associated with the patch antenna 110.

[0026] For example, the switching element is realized by a field effect transistor (FET). When the switching element is realized by an FET, a TFT is connected to the gate electrode (also called the control electrode) of the FET. For example, the switching element may be realized by a PIN (Positive Intrinsic semiconductor Negative) diode. For example, the switching element is composed of a semiconductor material such as Si (silicon), GaAs (gallium arsenide), or GaN (gallium nitride).

[0027] The phase shifter 15 includes phase shift elements formed for each antenna unit. The phase shift elements for each antenna unit include a plurality of phase shift wirings. The plurality of phase shift wirings are arranged in parallel. The ends of the plurality of phase shift wirings are connected to any one of the switches included in the switch group 13. By switching the connection state of the plurality of phase shift wirings, the phase shift conditions of the phase shift elements for each antenna unit are set. At both ends of each phase shift wiring, any one of the switches constituting the switch group 13 is connected. By turning ON / OFF the switches connected to both ends of each phase shift wiring, at least one of the plurality of phase shift wirings is selected.

[0028] The drive circuit 17 drives a plurality of TFTs constituting the matrix circuit 12 according to the control of the control circuit 18. The drive circuit 17 individually drives a plurality of TFTs arranged in a two-dimensional array.

[0029] FIG. 3 is a conceptual diagram showing an example of the drive circuit 17 formed on the second substrate 112. In FIG. 3, the position of the patch antenna arranged on the first substrate 111 facing the second substrate 112 is indicated by a broken line. The drive circuit 17 includes a first drive circuit 171 for specifying an address in the X direction and a second drive circuit 172 for specifying an address in the Y direction. By driving the first drive circuit 171 and the second drive circuit 172, an address associated with any one of the patch antennas 110 can be specified.

[0030] The control circuit 18 performs control to drive the drive circuit 17 in response to a control signal from the outside. The control circuit 18 drives the drive circuit 17 in an active matrix drive method. Also, the control circuit 18 outputs the control signal from the outside to the signal source 19. For example, the control circuit 18 is realized by a microcomputer (also called a microcontroller) or a microcontroller. For example, the control circuit 18 has a CPU (Central Processing Unit), a RAM (Random Access Memory), a ROM (Read Only Memory), a flash memory, etc. The control circuit 18 executes control and processing according to a program stored in advance. The control circuit 18 executes control and processing according to a program according to a preset schedule, timing, a control instruction from the outside, etc.

[0031] The signal source 19 is connected to a plurality of switching elements constituting the switch group 13. Also, the signal source 19 is connected to the control circuit 18. The signal source 19 acquires a control signal from the control circuit 18. The signal source 19 controls the on / off of a plurality of switching elements constituting the switch group 13 according to the control signal. The signal source 19 may be configured to directly receive a control signal from the outside without passing through the control circuit 18.

[0032] FIG. 4 is a conceptual diagram for explaining the antenna unit 100 constituting the patch antenna array 11. FIG. 4 is a cross-sectional view of a part of the planar antenna device 10 cut along the A-A cut line of FIG. 1. FIG. 4 shows an example in which the switch is realized by an FET.

[0033] On the second substrate 112, a plurality of TFTs (TFT1, TFT2) are formed for each antenna unit 100. The TFT1 and TFT2 that constitute the same antenna unit 100 form a pair (also called a transistor pair). The TFT1 and TFT2 that constitute the matrix circuit 12 are formed on the upper surface of the second substrate 112 using a liquid crystal display manufacturing process. TFT1 is also called the first thin film transistor. TFT2 is also called the second thin film transistor. For example, the upper part of the matrix circuit 12 is covered with an insulating layer. A gap may be formed above the matrix circuit 12.

[0034] Above the second substrate 112, a shield layer SHL is formed. The shield layer SHL is formed to prevent electromagnetic coupling above and below the shield layer. For example, the shield layer SHL is composed of a conductor. The potential of the shield layer SHL is basically the ground potential. Therefore, a capacitance corresponding to the dielectric constant of the dielectric layer 113 is formed between the shield layer SHL and the phase shift wiring PSW.

[0035] Above the shield layer SHL, a signal layer is formed. The signal layer includes a signal line SGL1, a phase shift wiring PSW, and a signal line SGL2. A signal from the signal source 19 is input to the signal line SGL1 (also called the first signal line). When the connected switching element (FET1 / FET2) is in the on state, the signal input to the signal line SGL1 propagates to the phase shift wiring PSW and the signal line SGL2 (also called the second signal line).

[0036] Through holes for connecting TFT1 and FET1 and through holes for connecting TFT2 and FET2 are opened in the shield layer SHL. The through holes (via holes) are formed below FET1 and FET2. TFT1 and FET1 are electrically connected by a via V1. TFT2 and FET2 are electrically connected by a via V2.

[0037] Of the two through-holes formed in the shield layer SHL, a FET1 (also called the first switching element) is formed above the left through-hole. Of the two through-holes formed in the shield layer SHL, a FET2 (also called the second switching element) is formed above the right through-hole. The FET1 and FET2 that make up the switch group 13 are formed using the device transfer technology of the micro-LED process technology. For example, above the signal line SGL1, signal line SGL2, phase shift wiring PSW, via V1, and via V2, the FET1 and FET2 are transferred using the device transfer technology.

[0038] TFT1 is connected to the gate electrode of FET1 through the through-hole (left side) formed in the shield layer SHL. TFT2 is connected to the gate electrode of FET2 through the through-hole (right side) formed in the shield layer SHL.

[0039] At both ends of the channel of FET1, a first end (right side in FIG. 4) and a second end (left side in FIG. 4) corresponding to the source or drain are formed. The first end (right side) of the channel of FET1 is connected to the first end (left side) of the phase shift wiring PSW included in the phase shifter 15. The second end (left side) of the channel of FET1 is connected to one end of the signal line SGL1. The other end of the signal line SGL1 is connected to the signal source 19.

[0040] At both ends of the channel of FET2, a first end (left side in FIG. 4) and a second end (right side in FIG. 4) corresponding to the source or drain are formed. The first end (left side) of the channel of FET2 is connected to the second end (right side) of the phase shift wiring PSW included in the phase shifter 15. The second end (right side) of the channel of FET2 is connected to one end of the signal line SGL2. The other end of the signal line SGL2 extends beyond the lower region of the patch antenna 110. The signal line SGL2 functions as a microstrip line.

[0041] Above the signal layer including the switch group 13, a dielectric layer 113 is disposed. Above the dielectric layer 113, a first substrate 111 is disposed. On the upper surface of the first substrate 111, a patch antenna 110 is disposed. In the example of FIG. 4, the patch antenna 110 is disposed on the right side of the upper surface of the first substrate 111. On the lower surface of the first substrate 111, a ground layer GL is formed. In the ground layer GL corresponding to the lower side of the patch antenna 110, a slot SL is formed. The patch antenna 110 and the signal line SGL2 (microstrip line) are electromagnetically coupled via the slot SL.

[0042] The signal that reaches the phase shifter wiring PSW through the signal line SGL1 is phase-shifted by a phase shift amount corresponding to the line length of the phase shifter wiring PSW and the dielectric constant of the dielectric layer 113. The signal phase-shifted by the phase shifter wiring PSW is transmitted as an electromagnetic wave in the wavelength band to be transmitted by electromagnetic induction between the signal line SGL2 and the patch antenna 210.

[0043] The radio wave received by the patch antenna 110 is received according to the capacitance based on the dielectric constant of the dielectric layer 113 between the patch antenna 110 and the signal line SGL2. The received radio wave is phase-shifted by the phase shifter wiring PSW. The phase-shifted signal is received by a receiving circuit (not shown) through the signal line SGL1. The information included in the signal received by the receiving circuit is decoded by a decoder (not shown). Also, the radio wave transmitted from the patch antenna 110 is based on the signal output from a transmitting circuit (not shown). The signal output from the transmitting circuit reaches the phase shifter wiring PSW through the signal line SGL1. The signal that reaches the phase shifter wiring PSW is phase-shifted by the phase shifter wiring PSW and transmitted from the patch antenna 110 according to the capacitance based on the dielectric constant of the dielectric layer 113 between the patch antenna 110 and the signal line SGL2. The information included in the signal is not particularly limited.

[0044] 〔Phase Shifting Element〕 Next, the phase shifting element that constitutes the phase shifter 15 included in the planar antenna device 10 will be described with reference to the drawings. In the following, several examples of the phase shifting element for each antenna unit 100 will be described.

[0045] <Example 1> FIG. 5 is a conceptual diagram for explaining a first example (phase shifter 151) of a phase shifter included in the planar antenna device 10. FIG. 5 is a view of the range including the phase shifter 151 as seen from an upper viewing position. The dielectric constant of the dielectric layer 113 included in the planar antenna device 10 is constant. The phase shifter 151 of the first example can set the phase shift amount by selecting any one of phase shift wirings PSW having different phase shift amounts.

[0046] The phase shifter 151 of the first example includes a plurality of phase shift wirings (PSW11, PSW12, PSW13) having different line lengths. The phase shift wiring PSW11 has a longer line length than the phase shift wiring PSW12. The phase shift wiring PSW13 has a longer line length than the phase shift wiring PSW11. The lengths of the phase shift wiring PSW11, the phase shift wiring PSW12, and the phase shift wiring PSW13 are set according to the wavelength of the radio wave to be transmitted.

[0047] The first end (left side) of the phase shift wiring PSW11 is connected to the upper FET1 included in the switch group 131-1. The first end (left side) of the phase shift wiring PSW12 is connected to the middle FET1 included in the switch group 131-1. The first end (left side) of the phase shift wiring PSW13 is connected to the lower FET1 included in the switch group 131-1. The FET1 included in the switch group 131-1 is connected to one end (right side) of the signal line SGL1. The second end (right side) of the phase shift wiring PSW11 is connected to the upper FET2 included in the switch group 131-2. The second end (right side) of the phase shift wiring PSW12 is connected to the middle FET2 included in the switch group 131-2. The second end (right side) of the phase shift wiring PSW13 is connected to the lower FET2 included in the switch group 131-2. The FET2 included in the switch group 131-2 is connected to one end (left side) of the signal line SGL2. The other end (right side) of the signal line SGL2 extends beyond the lower side of the slot SL opened in association with the patch antenna 110.

[0048] The phase shift amount of the phase shift wiring PSW connected to the FET1 and FET2 set to the on state in accordance with the control signal from the signal source 19 is set as the phase shift amount of the phase shift element 151. The signal that has reached the signal line SGL2 below the slot SL via the phase shift wiring PSW connected to the on-state FET1 and FET2 is transmitted as radio waves due to the inductive resonance between the patch antenna 110 and the signal line SGL2. In the case of the structure of FIG. 5, since there is no delay in the response in the dielectric layer 113, the phase can be switched at high speed. Also, in the case of the structure of FIG. 5, by selecting the phase shift wiring PSW according to the situation, the phase shift amount of the phase shift element 151 can be set to an appropriate value.

[0049] <Second Example> FIG. 6 is a conceptual diagram for explaining a second example (phase shift element 152) of the phase shift element included in the planar antenna device 10. FIG. 6 is a view of the range including the phase shift element 152 as seen from an upper viewing position. In the second example of the phase shift element 152, a conductor for electromagnetic interference countermeasure is interposed between adjacent phase shift wirings PSW. The conductor for electromagnetic interference countermeasure is arranged in parallel with the straight line connecting the signal line SGL1 and the signal line SGL2. The conductor for electromagnetic interference countermeasure can also be applied to the phase shift element described later.

[0050] The second example of the phase shift element 152 includes a plurality of phase shift wirings (PSW21, PSW22, PSW23) having different line lengths. The phase shift wiring PSW21 has a longer line length than the phase shift wiring PSW22. The phase shift wiring PSW23 has a longer line length than the phase shift wiring PSW21. The lengths of the phase shift wiring PSW21, the phase shift wiring PSW22, and the phase shift wiring PSW23 are set in accordance with the wavelength of the radio wave to be transmitted.

[0051] The first end (left side) of the phase-shifting wiring PSW21 is connected to the upper FET1 included in the switch group 132-1. The first end (left side) of the phase-shifting wiring PSW22 is connected to the middle FET1 included in the switch group 132-1. The first end (left side) of the phase-shifting wiring PSW23 is connected to the lower FET1 included in the switch group 132-1. The FET1 included in the switch group 132-1 is connected to one end (right side) of the signal line SGL1. The second end (right side) of each of the phase-shifting wiring PSW21, the phase-shifting wiring PSW22, and the phase-shifting wiring PSW23 is connected to any FET2 included in the switch group 132-2. The FET2 included in the switch group 132-2 is connected to one end (left side) of the signal line SGL2. The other end (right side) of the signal line SGL2 extends beyond the lower part of the slot SL opened in association with the patch antenna 110.

[0052] The conductor CD1 is arranged along the longitudinal direction of the phase-shifting wiring PSW21. The conductor CD2 is arranged between the phase-shifting wiring PSW21 and the phase-shifting wiring PSW22 along the longitudinal direction of the phase-shifting wiring PSW21 and the longitudinal direction of the phase-shifting wiring PSW22. The conductor CD2 prevents electromagnetic interference between the phase-shifting wiring PSW21 and the phase-shifting wiring PSW22. The conductor CD3 is arranged between the phase-shifting wiring PSW22 and the phase-shifting wiring PSW23 along the longitudinal direction of the phase-shifting wiring PSW22 and the longitudinal direction of the phase-shifting wiring PSW23. The conductor CD3 prevents electromagnetic interference between the phase-shifting wiring PSW22 and the phase-shifting wiring PSW23. The conductor CD4 is arranged along the longitudinal direction of the phase-shifting wiring PSW23. If it is possible to prevent electromagnetic interference between the plurality of phase-shifting wirings PSW, the conductor CD1 and the conductor CD4 can be omitted.

[0053] The phase shift amount of the phase-shifting wiring PSW connected to the ON-state FET1 and FET2 according to the control signal from the signal source 19 is set as the phase shift amount of the phase-shifting element 151. The signal that reaches the signal line SGL2 below the slot SL through the phase-shifting wiring PSW connected to the ON-state FET1 and FET2 is transmitted as radio waves by the inductive resonance between the patch antenna 110 and the signal line SGL2.

[0054] In the case of the configuration of the first example (Fig. 5), in order to prevent electromagnetic interference between a plurality of phase-shifting wirings PSW, a certain interval is provided between adjacent phase-shifting wirings PSW. Therefore, in the case of the configuration of the first example (Fig. 5), there are restrictions on miniaturization in order to prevent electromagnetic interference. In the case of the configuration of the second example (Fig. 6), by interposing a conductor CD for interference countermeasures between adjacent phase-shifting wirings PSW, the interval between adjacent phase-shifting wirings PSW can be reduced. Therefore, the phase-shifting element 152 of the second example (Fig. 6) can be miniaturized in the vertical direction on the plane of Fig. 6 compared with the phase-shifting element 151 of the first example (Fig. 5).

[0055] <Third Example> FIG. 7 is a conceptual diagram for explaining a third example (phase-shifting element 153) of the phase-shifting element included in the planar antenna device 10. FIG. 7 is a view of the range including the phase-shifting element 153 as seen from an upper viewing position. The phase-shifting element 153 is a 4-bit phase-shifting element in which four phase-shifting elements 153-1 to 4 are connected in series. The phase-shifting element 153 of the third example can set the phase shift amount by selecting a combination of a plurality of phase-shifting wirings PSW having different phase shift amounts.

[0056] The phase-shifting element 153 of the third example includes four phase-shifting elements 153-1 to 4. The four phase-shifting elements 153-1 to 4 are connected in series.

[0057] The phase-shifting element 153-1 includes a phase-shifting wiring PSW31 and a phase-shifting wiring PSW32. The phase-shifting wiring PSW31 is U-shaped and has a longer line length than the linear phase-shifting wiring PSW32. For example, the phase shift amount of the phase-shifting element 153-1 is set to 22.5 degrees.

[0058] The first end (left side) of the phase shift wiring PSW31 is connected to the upper FET1 included in the switch group 133-1 connected to the phase shift element 153-1. The first end (left side) of the phase shift wiring PSW32 is connected to the lower FET1 included in the switch group 133-1 connected to the phase shift element 153-1. The FET1 included in the switch group 133-1 connected to the phase shift element 153-1 is connected to one end (right side) of the signal line SGL1. The second end (right side) of the phase shift wiring PSW31 is connected to the upper FET2 included in the switch group 133-2 connected to the phase shift element 153-1. The second end (right side) of the phase shift wiring PSW32 is connected to the lower FET2 included in the switch group 133-2 connected to the phase shift element 153-1. The FET2 included in the switch group 133-2 connected to the phase shift element 153-1 is connected to the FET1 included in the switch group 133-1 connected to the phase shift element 153-2.

[0059] The phase shift element 153-2 includes the phase shift wiring PSW33 and the phase shift wiring PSW34. The phase shift wiring PSW33 is U-shaped and has a longer line length than the straight phase shift wiring PSW34. The phase shift wiring PSW33 of the phase shift element 153-2 has a longer line length than the phase shift wiring PSW31 of the phase shift element 153-1. The line length of the phase shift wiring PSW34 of the phase shift element 153-2 is the same as the line length of the phase shift wiring PSW32 of the phase shift element 153-1. For example, the phase shift amount of the phase shift element 153-2 is set to 45 degrees.

[0060] The first end (left side) of the phase-shifting wiring PSW33 is connected to the upper FET1 included in the switch group 133-1 connected to the phase-shifting element 153-2. The first end (left side) of the phase-shifting wiring PSW34 is connected to the lower FET1 included in the switch group 133-1 connected to the phase-shifting element 153-2. The FET1 included in the switch group 133-1 connected to the phase-shifting element 153-2 is connected to the FET2 included in the switch group 133-2 connected to the phase-shifting element 153-1. The second end (right side) of the phase-shifting wiring PSW33 is connected to the upper FET2 included in the switch group 133-2 connected to the phase-shifting element 153-2. The second end (right side) of the phase-shifting wiring PSW34 is connected to the lower FET2 included in the switch group 133-2 connected to the phase-shifting element 153-2. The FET2 included in the switch group 133-2 connected to the phase-shifting element 153-2 is connected to the FET1 included in the switch group 133-1 connected to the phase-shifting element 153-3.

[0061] The phase-shifting element 153-3 includes the phase-shifting wiring PSW35 and the phase-shifting wiring PSW36. The phase-shifting wiring PSW35 is U-shaped and has a longer line length than the linear phase-shifting wiring PSW36. The phase-shifting wiring PSW35 of the phase-shifting element 153-3 has a longer line length than the phase-shifting wiring PSW33 of the phase-shifting element 153-2. The line length of the phase-shifting wiring PSW36 of the phase-shifting element 153-3 is the same as the line length of the phase-shifting wiring PSW34 of the phase-shifting element 153-2. For example, the phase shift amount of the phase-shifting element 153-3 is set to 90 degrees.

[0062] The first end (left side) of the phase-shifting wiring PSW35 is connected to the upper FET1 included in the switch group 133-1 connected to the phase-shifting element 153-3. The first end (left side) of the phase-shifting wiring PSW36 is connected to the lower FET1 included in the switch group 133-1 connected to the phase-shifting element 153-3. The FET1 included in the switch group 133-1 connected to the phase-shifting element 153-3 is connected to the FET2 included in the switch group 133-2 connected to the phase-shifting element 153-2. The second end (right side) of the phase-shifting wiring PSW35 is connected to the upper FET2 included in the switch group 133-2 connected to the phase-shifting element 153-3. The second end (right side) of the phase-shifting wiring PSW36 is connected to the lower FET2 included in the switch group 133-2 connected to the phase-shifting element 153-3. The FET2 included in the switch group 133-2 connected to the phase-shifting element 153-3 is connected to the FET1 included in the switch group 133-1 connected to the phase-shifting element 153-4.

[0063] The phase-shifting element 153-4 includes the phase-shifting wiring PSW37 and the phase-shifting wiring PSW38. The phase-shifting wiring PSW37 is U-shaped and has a longer line length than the linear phase-shifting wiring PSW38. The phase-shifting wiring PSW37 of the phase-shifting element 153-4 has a longer line length than the phase-shifting wiring PSW35 of the phase-shifting element 153-3. The line length of the phase-shifting wiring PSW38 of the phase-shifting element 153-4 is the same as the line length of the phase-shifting wiring PSW36 of the phase-shifting element 153-3. For example, the phase-shift amount of the phase-shifting element 153-4 is set to 180 degrees.

[0064] The first end (left side) of the phase shift wiring PSW37 is connected to the upper FET1 included in the switch group 133-1 connected to the phase shift element 153-4. The first end (left side) of the phase shift wiring PSW38 is connected to the lower FET1 included in the switch group 133-1 connected to the phase shift element 153-4. The FET1 included in the switch group 133-1 connected to the phase shift element 153-4 is connected to the FET2 included in the switch group 133-2 connected to the phase shift element 153-3. The second end (right side) of the phase shift wiring PSW37 is connected to the upper FET2 included in the switch group 133-2 connected to the phase shift element 153-4. The second end (right side) of the phase shift wiring PSW38 is connected to the lower FET2 included in the switch group 133-2 connected to the phase shift element 153-4. The FET2 included in the switch group 133-2 connected to the phase shift element 153-4 is connected to the FET1 included in the switch group 133-1 connected to the phase shift element 153-4. The FET2 included in the switch group 131-2 connected to the phase shift element 153-4 is connected to one end (left side) of the signal line SGL2. The other end (right side) of the signal line SGL2 extends beyond the lower part of the slot SL opened in association with the patch antenna 110.

[0065] That is, in the order of the phase shift wiring PSW31, the phase shift wiring PSW33, the phase shift wiring PSW35, and the phase shift wiring PSW37, the line length becomes longer. Also, the line lengths of the phase shift wiring PSW32, the phase shift wiring PSW34, the phase shift wiring PSW36, and the phase shift wiring PSW38 are the same. The lengths of the phase shift wirings PSW31 to 38 are set according to the wavelength of the radio wave to be transmitted.

[0066] The phase shift amount of the phase shift wiring PSW connected to FET1 and FET2 set to the on state in response to the control signal from the signal source 19 is set as the phase shift amount for each of the phase shift elements 153-1 to 4. The total value of the phase shift amounts for each of the phase shift elements 153-1 to 4 corresponds to the overall phase shift amount of the phase shift element 153. The signal that reaches the signal line SGL2 below the slot SL via the phase shift wiring PSW connected to the on-state FET1 and FET2 is transmitted as radio waves due to the inductive resonance between the patch antenna 110 and the signal line SGL2. In the case of the structure of FIG. 7, since there is no delay in the response in the dielectric layer 113, the phase can be switched at high speed. Also, in the case of the structure of FIG. 7, by selecting the phase shift wiring PSW according to the situation, the phase shift amount of the phase shift element 153 can be set to an appropriate value.

[0067] <Fourth Example> FIG. 8 is a conceptual diagram for explaining a fourth example (phase shift element 154) of the phase shift element included in the planar antenna device 10. FIG. 8 is a view of the range including the phase shift element 154 seen from the upper viewing position. The phase shift element 154 includes four phase shift elements 154-1 to 4. The phase shift element 154 is a 4-bit phase shift element in which the four phase shift elements 154-1 to 4 are connected in series. The phase shift element 154 of the fourth example can set the phase shift amount by selecting a combination of a plurality of phase shift wirings PSW having different phase shift amounts. The phase shift element 154 of the fourth example has a configuration in which the arrangement of the phase shift wiring PSW included in the phase shift element 153 of the third example is changed.

[0068] The phase shift element 154-1 includes a phase shift wiring PSW41 and a phase shift wiring PSW42. The phase shift wiring PSW41 is U-shaped and has a longer line length than the linear phase shift wiring PSW42. For example, the phase shift amount of the phase shift element 154-1 is set to 22.5 degrees.

[0069] The first end (left side) of the phase-shifting wiring PSW41 is connected to the upper FET1 included in the switch group 134-1 connected to the phase-shifting element 154-1. The first end (left side) of the phase-shifting wiring PSW42 is connected to the lower FET1 included in the switch group 134-1 connected to the phase-shifting element 154-1. The FET1 included in the switch group 134-1 connected to the phase-shifting element 154-1 is connected to one end (right side) of the signal line SGL1. The second end (right side) of the phase-shifting wiring PSW41 is connected to the upper FET2 included in the switch group 134-2 connected to the phase-shifting element 154-1. The second end (right side) of the phase-shifting wiring PSW42 is connected to the lower FET2 included in the switch group 134-2 connected to the phase-shifting element 154-1. The FET2 included in the switch group 134-2 connected to the phase-shifting element 154-1 is connected to the FET1 included in the switch group 134-1 connected to the phase-shifting element 154-2.

[0070] The phase-shifting element 154-2 includes the phase-shifting wiring PSW43 and the phase-shifting wiring PSW44. The phase-shifting wiring PSW43 is U-shaped and has a longer line length than the linear phase-shifting wiring PSW44. The phase-shifting wiring PSW43 of the phase-shifting element 154-2 has a longer line length than the phase-shifting wiring PSW41 of the phase-shifting element 154-1. The line length of the phase-shifting wiring PSW44 of the phase-shifting element 154-2 is the same as the line length of the phase-shifting wiring PSW42 of the phase-shifting element 154-1. For example, the phase shift amount of the phase-shifting element 154-2 is set to 45 degrees.

[0071] The first end (left side) of the phase-shifting wiring PSW43 is connected to the lower FET1 included in the switch group 134-1 connected to the phase-shifting element 154-2. The first end (left side) of the phase-shifting wiring PSW44 is connected to the upper FET1 included in the switch group 134-1 connected to the phase-shifting element 154-2. The FET1 included in the switch group 134-1 connected to the phase-shifting element 154-2 is connected to the FET2 included in the switch group 134-2 connected to the phase-shifting element 154-1. The second end (right side) of the phase-shifting wiring PSW43 is connected to the lower FET2 included in the switch group 134-2 connected to the phase-shifting element 154-2. The second end (right side) of the phase-shifting wiring PSW44 is connected to the upper FET2 included in the switch group 134-2 connected to the phase-shifting element 154-2. The FET2 included in the switch group 134-2 connected to the phase-shifting element 154-2 is connected to the FET1 included in the switch group 134-1 connected to the phase-shifting element 154-3.

[0072] The phase-shifting element 154-3 includes the phase-shifting wiring PSW45 and the phase-shifting wiring PSW46. The phase-shifting wiring PSW45 is U-shaped and has a longer line length than the linear phase-shifting wiring PSW46. The phase-shifting wiring PSW45 of the phase-shifting element 154-3 has a longer line length than the phase-shifting wiring PSW43 of the phase-shifting element 154-2. The line length of the phase-shifting wiring PSW46 of the phase-shifting element 154-3 is the same as the line length of the phase-shifting wiring PSW44 of the phase-shifting element 154-2. For example, the phase shift amount of the phase-shifting element 154-3 is set to 90 degrees.

[0073] The first end (left side) of the phase-shifting wiring PSW45 is connected to the upper FET1 included in the switch group 134-1 connected to the phase-shifting element 154-3. The first end (left side) of the phase-shifting wiring PSW46 is connected to the lower FET1 included in the switch group 134-1 connected to the phase-shifting element 154-3. The FET1 included in the switch group 134-1 connected to the phase-shifting element 154-3 is connected to the FET2 included in the switch group 134-2 connected to the phase-shifting element 154-2. The second end (right side) of the phase-shifting wiring PSW45 is connected to the upper FET2 included in the switch group 134-2 connected to the phase-shifting element 154-3. The second end (right side) of the phase-shifting wiring PSW46 is connected to the lower FET2 included in the switch group 134-2 connected to the phase-shifting element 154-3. The FET2 included in the switch group 134-2 connected to the phase-shifting element 154-3 is connected to the FET1 included in the switch group 134-1 connected to the phase-shifting element 154-4.

[0074] The phase-shifting element 154-4 includes the phase-shifting wiring PSW47 and the phase-shifting wiring PSW48. The phase-shifting wiring PSW47 is U-shaped and has a longer line length than the linear phase-shifting wiring PSW48. The phase-shifting wiring PSW47 of the phase-shifting element 154-4 has a longer line length than the phase-shifting wiring PSW45 of the phase-shifting element 154-3. The line length of the phase-shifting wiring PSW48 of the phase-shifting element 154-4 is the same as the line length of the phase-shifting wiring PSW46 of the phase-shifting element 154-3. For example, the phase shift amount of the phase-shifting element 154-4 is set to 180 degrees.

[0075] The first end (left side) of the phase shift wiring PSW47 is connected to the lower FET1 included in the switch group 134-1 connected to the phase shift element 154-4. The first end (left side) of the phase shift wiring PSW48 is connected to the upper FET1 included in the switch group 134-1 connected to the phase shift element 154-4. The FET1 included in the switch group 134-1 connected to the phase shift element 154-4 is connected to the FET2 included in the switch group 134-2 connected to the phase shift element 154-3. The second end (right side) of the phase shift wiring PSW47 is connected to the lower FET2 included in the switch group 134-2 connected to the phase shift element 154-4. The second end (right side) of the phase shift wiring PSW48 is connected to the upper FET2 included in the switch group 134-2 connected to the phase shift element 154-4. The FET2 included in the switch group 134-2 connected to the phase shift element 154-4 is connected to the FET1 included in the switch group 134-1 connected to the phase shift element 154-4. The FET2 included in the switch group 131-2 connected to the phase shift element 154-4 is connected to one end (left side) of the signal line SGL2. The other end (right side) of the signal line SGL2 extends beyond the lower part of the slot SL opened in association with the patch antenna 110.

[0076] That is, in the order of the phase shift wiring PSW41, the phase shift wiring PSW43, the phase shift wiring PSW45, and the phase shift wiring PSW47, the line length becomes longer. Also, the line lengths of the phase shift wiring PSW42, the phase shift wiring PSW44, the phase shift wiring PSW46, and the phase shift wiring PSW48 are the same. The lengths of the phase shift wirings PSW41 to 38 are set according to the wavelength of the radio wave to be transmitted.

[0077] The phase shift amount of the phase shift wiring PSW connected to FET1 and FET2 set to the on state according to the control signal from the signal source 19 is set as the phase shift amount for each of the phase shift elements 154-1 to 4. The total value of the phase shift amounts for each of the phase shift elements 154-1 to 4 corresponds to the overall phase shift amount of the phase shift element 154. The signal that reaches the signal line SGL2 below the slot SL via the phase shift wiring PSW connected to the on-state FET1 and FET2 is transmitted as radio waves due to the inductive resonance between the patch antenna 110 and the signal line SGL2. In the case of the structure of FIG. 8, since there is no delay in the response in the dielectric layer 113, the phase can be switched at high speed.

[0078] Also, in the case of the structure of FIG. 8, by selecting the phase shift wiring PSW according to the situation, the phase shift amount of the phase shift element 154 can be set to an appropriate value. Also, in the case of the structure of FIG. 8, among the pairs of the phase shift wirings PSW included in each of the phase shift elements 154-1 to 4, the phase shift wiring PSW with the longer line length is distributed vertically. Therefore, compared with the third example (FIG. 7), in the fourth example (FIG. 8), the distance between the phase shift wirings PSW with the longer line length included in the adjacent phase shift elements 154-1 to 4 becomes larger. As a result, compared with the third example (FIG. 7), the electromagnetic interference is reduced in the fourth example (FIG. 8).

[0079] FIG. 9 is a conceptual diagram showing an example in which the phase shift element 154 of the fourth example is arranged in association with the patch antennas 110 arranged in an array. In FIG. 9, the position corresponding to the patch antenna 110 is indicated by a dashed-line rectangle. FIG. 9 shows an example in which the phase shift element 154 is arranged in association with the patch antennas 110 arranged in a 2×2 array. The adjacent phase shift elements 154 are arranged with a spacing of the wavelength λ of the radio wave to be transmitted, sandwiching the lower region of the patch antenna 110. In FIG. 9, the portions of FET1 and FET2 included in the switch group 134 are indicated by dots.

[0080] The phase shift wiring PSW41 shifts the phase of a signal by 22.5° (degrees). The phase shift wiring PSW43 shifts the phase of a signal by 45° (degrees). The phase shift wiring PSW45 shifts the phase of a signal by 90° (degrees). The phase shift wiring PSW47 shifts the phase of a signal by 180° (degrees). In FIG. 9, the phase shift wirings PSW42, PSW44, PSW46, and PSW48 are omitted.

[0081] An electromagnetic interference reduction structure EIS1 is formed between the phase shift wiring PSW41 and the phase shift wiring PSW45. The electromagnetic interference reduction structure EIS1 is composed of a plurality of vias. The plurality of vias included in the electromagnetic interference reduction structure EIS1 are formed along the phase shift wiring PSW45 with the longer line length. The electromagnetic interference reduction structure EIS1 suppresses electromagnetic interference between the phase shift wiring PSW41 and the phase shift wiring PSW45.

[0082] An electromagnetic interference reduction structure EIS2 is formed between the phase shift wiring PSW43 and the phase shift wiring PSW47. The electromagnetic interference reduction structure EIS2 is composed of a plurality of vias. The plurality of vias included in the electromagnetic interference reduction structure EIS2 are formed along the phase shift wiring PSW47 with the longer line length. The electromagnetic interference reduction structure EIS2 suppresses electromagnetic interference between the phase shift wiring PSW43 and the phase shift wiring PSW47.

[0083] The plurality of vias included in the electromagnetic interference reduction structure EIS1 and the electromagnetic interference reduction structure EIS2 penetrate from the formation layer of the phase shift wiring PSW to the ground layer GL. A conductive portion is formed inside the via and around the opening. For example, the conductive portion of the via is plated with a conductive material. The conductive portion of the via electrically connects the formation layer of the phase shift wiring PSW and the ground layer GL.

[0084] In the configuration of FIG. 9, since the electromagnetic interference reduction structure EIS is formed between the phase shift wirings PSW in the same direction with the signal line interposed therebetween, the interval between the phase shift wirings PSW can be reduced. Therefore, compared with the case where there is no electromagnetic interference reduction structure EIS, the area of the phase shifter 15 composed of a plurality of phase shift elements 154 can be reduced when there is the electromagnetic interference reduction structure EIS.

[0085] <Example 5> FIG. 10 is a conceptual diagram for explaining a fifth example (phase shifter 155) of a phase shifter included in the planar antenna device 10. FIG. 10 is a view of the range including the phase shifter 155 as seen from an upper viewing position. The phase shifter 155 includes four phase shifters 155-1 to 4. The phase shifter 155 is a 4-bit phase shifter in which four phase shifters 155-1 to 4 are connected in series. The phase shifter 155 of the fifth example can set the phase shift amount by selecting a combination of a plurality of phase shift wirings PSW having different phase shift amounts. The four phase shifters 155-1 to 4 include reflective phase shift wirings. The phase shifter 155 of the fifth example has a configuration in which the phase shift wiring included in the phase shifter 154 of the fourth example is changed to a reflective phase shift wiring.

[0086] The phase shifter 155-1 includes a phase shift wiring PSW51. The phase shift wiring PSW51 is I-shaped and is a reflective phase shift wiring. The phase shifter 155-1 includes a signal line (lower stage) where the phase shift wiring PSW is not arranged. The phase shift wiring PSW may also be arranged in the portion of the signal line (lower stage) of the phase shifter 155-1. For example, the phase shift amount of the phase shifter 155-1 is set to 22.5 degrees.

[0087] The first end (lower side) of the phase shift wiring PSW51 is connected to the upper FET1 included in the switch group 135-1 connected to the phase shifter 155-1 and the upper FET2 included in the switch group 135-2 connected to the phase shifter 155-1. The second end (upper side) of the phase shift wiring PSW51 is an open end. The signal line (lower stage) connects the lower FET1 included in the switch group 135-1 connected to the phase shifter 155-1 and the lower FET2 included in the switch group 135-2 connected to the phase shifter 155-1. The FET1 included in the switch group 135-1 connected to the phase shifter 155-1 is connected to one end (right side) of the signal line SGL1. The FET2 included in the switch group 135-2 connected to the phase shifter 155-1 is connected to the FET1 included in the switch group 135-1 connected to the phase shifter 155-2.

[0088] The phase shifter element 155-2 includes a phase shift wiring PSW52. The phase shift wiring PSW52 is in an I shape and is a reflective phase shift wiring. The phase shifter element 155-2 includes a signal line (upper stage) where the phase shift wiring PSW is not arranged. The phase shift wiring PSW may also be arranged in a part of the signal line (upper stage) of the phase shifter element 155-2. The phase shift wiring PSW52 of the phase shifter element 155-2 has a longer line length than the phase shift wiring PSW51 of the phase shifter element 155-1. For example, the phase shift amount of the phase shifter element 155-2 is set to 45 degrees.

[0089] The first end (upper side) of the phase shift wiring PSW52 is connected to the lower FET1 included in the switch group 135-1 connected to the phase shifter element 155-2 and the lower FET2 included in the switch group 135-2 connected to the phase shifter element 155-2. The second end (lower side) of the phase shift wiring PSW52 is an open end. The signal line (upper stage) connects the upper FET1 included in the switch group 135-1 connected to the phase shifter element 155-2 and the upper FET2 included in the switch group 135-2 connected to the phase shifter element 155-2. The FET1 included in the switch group 135-1 connected to the phase shifter element 155-2 is connected to the FET2 included in the switch group 135-2 connected to the phase shifter element 155-1. The FET2 included in the switch group 135-2 connected to the phase shifter element 155-2 is connected to the FET1 included in the switch group 135-1 connected to the phase shifter element 155-3.

[0090] The phase shifter element 155-3 includes a phase shift wiring PSW53. The phase shift wiring PSW53 is in an I shape and is a reflective phase shift wiring. The phase shifter element 155-3 includes a signal line (lower stage) where the phase shift wiring PSW is not arranged. The phase shift wiring PSW may also be arranged in a part of the signal line (lower stage) of the phase shifter element 155-3. The phase shift wiring PSW53 of the phase shifter element 155-3 has a longer line length than the phase shift wiring PSW52 of the phase shifter element 155-2. For example, the phase shift amount of the phase shifter element 155-3 is set to 90 degrees.

[0091] The first end (lower side) of the phase shift wiring PSW53 is connected to the lower FET1 included in the switch group 135-1 connected to the phase shift element 155-3 and the lower FET2 included in the switch group 135-2 connected to the phase shift element 155-3. The second end (upper side) of the phase shift wiring PSW53 is an open end. The signal line (lower stage) connects the lower FET1 included in the switch group 135-1 connected to the phase shift element 155-3 and the lower FET2 included in the switch group 135-2 connected to the phase shift element 155-3. The FET1 included in the switch group 135-1 connected to the phase shift element 155-3 is connected to the FET2 included in the switch group 135-2 connected to the phase shift element 155-2. The FET2 included in the switch group 135-2 connected to the phase shift element 155-3 is connected to the FET1 included in the switch group 135-1 connected to the phase shift element 155-4.

[0092] The phase shift element 155-4 includes the phase shift wiring PSW54. The phase shift wiring PSW54 is in an I shape and is a reflective phase shift wiring. The phase shift element 155-4 includes a signal line (upper stage) where the phase shift wiring PSW is not arranged. The phase shift wiring PSW may also be arranged in a part of the signal line (upper stage) of the phase shift element 155-4. The phase shift wiring PSW54 of the phase shift element 155-4 has a longer line length than the phase shift wiring PSW53 of the phase shift element 155-3. For example, the phase shift amount of the phase shift element 155-4 is set to 180 degrees.

[0093] The first end (upper side) of the phase shift wiring PSW54 is connected to the upper FET1 included in the switch group 135-1 connected to the phase shift element 155-4 and the upper FET2 included in the switch group 135-2 connected to the phase shift element 155-4. The second end (lower side) of the phase shift wiring PSW54 is an open end. The signal line (upper stage) connects the lower FET1 included in the switch group 135-1 connected to the phase shift element 155-4 and the lower FET2 included in the switch group 135-2 connected to the phase shift element 155-4. The FET1 included in the switch group 135-1 connected to the phase shift element 155-4 is connected to the FET2 included in the switch group 135-2 connected to the phase shift element 155-3. The FET2 included in the switch group 135-2 connected to the phase shift element 155-4 is connected to one end (left side) of the signal line SGL2. The other end (right side) of the signal line SGL2 extends beyond the lower part of the slot SL opened in association with the patch antenna 110.

[0094] That is, in the order of the phase shift wiring PSW51, the phase shift wiring PSW52, the phase shift wiring PSW53, and the phase shift wiring PSW54, the line length becomes longer. The lengths of the phase shift wirings PSW51 to 54 are set according to the wavelength of the radio wave to be transmitted.

[0095] The phase shift amount of the phase shift wiring PSW connected to the FET1 and FET2 set to the on state according to the control signal from the signal source 19 is set as the phase shift amount for each of the phase shift elements 155-1 to 4. The total value of the phase shift amounts for each of the phase shift elements 155-1 to 4 corresponds to the overall phase shift amount of the phase shift element 155. The signal that reaches the signal line SGL2 below the slot SL via the phase shift wiring PSW connected to the on-state FET1 and FET2 is transmitted as a radio wave by the inductive resonance between the patch antenna 110 and the signal line SGL2.

[0096] In the structure of FIG. 10, since there is no delay in the response in the dielectric layer 113, the phase can be switched at high speed. In the structure of FIG. 10, by selecting the phase shift wiring PSW according to the situation, the phase shift amount of the phase shift element 155 can be set to an appropriate value. The structure of FIG. 10 includes a reflective type phase shift wiring PSW. Therefore, compared with the fourth example (FIG. 8), the fifth example (FIG. 10) can be configured smaller in the direction perpendicular to the phase shift wiring PSW.

[0097] FIG. 11 is a conceptual diagram showing an example in which the phase shift elements 155 of the fifth example are arranged in association with the patch antennas 110 arranged in an array. In FIG. 11, the positions corresponding to the patch antennas 110 are indicated by dashed quadrangles. FIG. 11 shows an example in which the phase shift elements 155 are arranged in association with the patch antennas 110 arranged in a 2×2 array. The adjacent phase shift elements 155 are arranged with a spacing of the wavelength λ of the radio wave to be transmitted, sandwiching the lower region of the patch antenna 110. In FIG. 11, the portions of the FET1 and FET2 included in the switch group 135 are indicated by dots.

[0098] The phase shift wiring PSW51 shifts the phase of the signal by 22.5° (degrees). The phase shift wiring PSW53 shifts the phase of the signal by 45° (degrees). The phase shift wiring PSW55 shifts the phase of the signal by 90° (degrees). The phase shift wiring PSW57 shifts the phase of the signal by 180° (degrees).

[0099] An electromagnetic interference reduction structure EIS1 is formed between the phase shift wiring PSW51 and the phase shift wiring PSW53. The electromagnetic interference reduction structure EIS1 is composed of a plurality of vias. The plurality of vias included in the electromagnetic interference reduction structure EIS1 are formed along the phase shift wiring PSW53 with the longer line length. The electromagnetic interference reduction structure EIS1 suppresses electromagnetic interference between the phase shift wiring PSW51 and the phase shift wiring PSW53.

[0100] An electromagnetic interference reduction structure EIS2 is formed between the phase shift wiring PSW52 and the phase shift wiring PSW54. The electromagnetic interference reduction structure EIS2 is composed of a plurality of vias. The plurality of vias included in the electromagnetic interference reduction structure EIS2 are formed along the phase shift wiring PSW54 with the longer line length. The electromagnetic interference reduction structure EIS2 suppresses electromagnetic interference between the phase shift wiring PSW52 and the phase shift wiring PSW54.

[0101] The plurality of vias included in the electromagnetic interference reduction structure EIS1 and the electromagnetic interference reduction structure EIS2 penetrate through to the ground layer GL. A conductive portion is formed inside the via and around the opening. For example, the conductive portion of the via is plated with a conductive plating. The conductive portion of the via electrically connects the formation layer of the phase shift wiring PSW and the ground layer GL.

[0102] In the configuration of FIG. 11, since the electromagnetic interference reduction structure EIS is formed between the phase shift wirings PSW in the same direction with the signal line interposed therebetween, the interval between the phase shift wirings PSW can be reduced. Therefore, the area of the phase shifter 15 composed of the plurality of phase shift elements 155 can be made smaller when there is the electromagnetic interference reduction structure EIS than when there is no electromagnetic interference reduction structure EIS.

[0103] As described above, the planar antenna device of the present embodiment includes a first substrate, a dielectric layer, and a second substrate. A patch antenna is disposed on the upper surface of the first substrate. A ground layer having a slot formed in a region below the patch antenna is disposed on the lower surface of the first substrate. The dielectric layer is disposed such that its upper surface is in contact with the ground layer disposed on the lower surface of the first substrate. The second substrate is disposed in contact with the lower surface of the dielectric layer. The second substrate has a matrix circuit, a first signal line, a phase-shifting wiring, a second signal line, and a switch group. The matrix circuit includes a transistor pair composed of a first thin-film transistor and a second thin-film transistor. The first signal line is formed on the upper surface of the second substrate and receives a signal to be transmitted. The phase-shifting element is formed on the upper surface of the second substrate and is composed of a plurality of phase-shifting wirings. The second signal line is formed on the upper surface of the second substrate, disposed below the slot, and is electromagnetically coupled to the patch antenna through the slot. The switch group has a first switching element and a second switching element formed using the manufacturing process technology of a micro LED display. The first switching element has a first end of a channel connected to one end of any of the plurality of phase-shifting wirings, and a control electrode connected to the first thin-film transistor. The second switching element has a first end of a channel connected to the other end of any of the plurality of phase-shifting wirings, and a control electrode connected to the second thin-film transistor.

[0104] By using the manufacturing process technology of a micro LED display, the planar antenna device of the present embodiment can disperse and form switching elements with a high response speed for a plurality of thin-film transistors constituting a large-area matrix circuit. Since the planar antenna device of the present embodiment does not include a liquid crystal layer, no delay in the response occurs in the liquid crystal layer. Therefore, the planar antenna device of the present embodiment can switch the phase of the signal to be transmitted at a high speed compared with a general planar antenna using liquid crystal. Further, since the planar antenna device of the present embodiment has a larger gain than a general planar antenna, a sufficient bandwidth can be ensured. That is, according to the planar antenna device of the present embodiment, the phase of the signal to be transmitted can be switched at a high speed while ensuring a sufficient bandwidth.

[0105] In one aspect of this embodiment, the phase shifter has a structure in which a plurality of phase shift wirings with different line lengths are arranged in parallel. According to this aspect, by selecting any one of the plurality of phase shift wirings arranged in parallel, the phase shift amount of the phase shifter can be adjusted.

[0106] In one aspect of this embodiment, the phase shifter has a structure in which a plurality of pairs, each having two phase shift wirings with different line lengths arranged in parallel, are connected in series. Among the plurality of pairs, the phase shift wiring with the longer line length has a U-shaped configuration in which one end is connected to the first end of the first switching element and the other end is connected to the first end of the second switching element. According to this aspect, regarding the plurality of pairs of phase shift wirings arranged in parallel, by selecting any one of the phase shift wirings, the phase shift amount of the phase shifter can be adjusted. Further, according to this aspect, since the phase shift wiring having a U-shaped configuration is included in each phase shifter, the phase shift amount of the phase shifter can be significantly changed.

[0107] In one aspect of this embodiment, the phase shifter has a structure in which a plurality of pairs, each having two phase shift wirings with different line lengths connected in parallel, are connected in series. Among the plurality of pairs, the phase shift wiring with the longer line length has an I-shaped configuration in which one end is connected to the first end of the first switching element and the first end of the second switching element, and the other end is an open end. According to this aspect, since a reflective type phase shift wiring is included in each phase shifter, the size of the phase shifter can be reduced.

[0108] In one aspect of this embodiment, for adjacent phase shifters, the phase shift wiring with the longer line length is arranged at a position on the opposite side with respect to the straight line connecting the first signal line and the second signal line. According to this aspect, regarding adjacent phase shifters, since the phase shift wiring with the longer line length is directed in opposite directions, interference between adjacent phase shift wirings can be reduced.

[0109] In one aspect of the present embodiment, an electromagnetic interference reduction structure is formed between the longer phase shift wirings with adjacent line lengths on the same side with respect to the straight line connecting the first signal line and the second signal line. The electromagnetic interference reduction structure is composed of a plurality of vias that electrically connect the upper surface of the second substrate and the ground layer. According to this aspect, since the electromagnetic interference reduction structure is formed between the longer phase shift wirings with adjacent line lengths, interference between adjacent phase shift wirings can be reduced.

[0110] In one aspect of the present embodiment, the phase shift device included in the planar antenna device is manufactured by combining the manufacturing process technology of thin film transistors and the manufacturing process technology of micro-LED displays. A matrix circuit including a transistor pair composed of a first thin film transistor and a second thin film transistor is formed using the manufacturing process technology of thin film transistors. The phase shift element composed of a plurality of phase shift wirings is formed above the matrix circuit. The first switching element and the second switching element are formed using the manufacturing process technology of micro-LED displays.

[0111] In the manufacturing method of the phase shift device of this aspect, a switching element with a high response speed is formed using the manufacturing process technology of micro-LED displays in correspondence with the matrix circuit manufactured by the manufacturing process technology of thin film transistors. Therefore, according to the manufacturing method of the phase shift device of this aspect, switching elements with a high response speed can be formed dispersedly for the plurality of thin film transistors constituting the large-area matrix circuit.

[0112] (Second Embodiment) Next, the planar antenna device according to the second embodiment will be described with reference to the drawings. The planar antenna device of the present embodiment has a configuration in which the dielectric layer included in the planar antenna device according to the first embodiment is changed to a liquid crystal layer. The liquid crystal layer is a form of the dielectric layer included in the planar antenna device according to the first embodiment. The liquid crystal layer can adjust the dielectric constant according to the control of the applied voltage.

[0113] (Configuration) FIG. 12 is a conceptual diagram showing an example of the appearance of the planar antenna device 20 according to the present embodiment. The planar antenna device 20 includes a first substrate 211, a second substrate 212, and a liquid crystal layer 213. The planar antenna device 20 has a structure in which the first substrate 211, the second substrate 212, and the liquid crystal layer 213 are laminated.

[0114] The first substrate 211 has the same configuration as the first substrate of the first embodiment. The first substrate 211 includes a transmission surface for the radio wave to be transmitted. On the first surface (transmission surface) of the first substrate 211, a patch antenna array 21 is disposed. The patch antenna array 21 is composed of a plurality of patch antennas 210. A ground layer (described later) is formed on the second surface of the first substrate 211 facing the first surface.

[0115] The second substrate 212 has the same configuration as the second substrate 112 of the first embodiment. The second substrate 212 corresponds to the backplane of a liquid crystal display. A matrix circuit is formed on the upper surface of the second substrate 212. The matrix circuit is formed using TFT process technology. Also, a signal layer is formed above the matrix circuit. The signal layer is formed with phase shift wiring constituting a phase shifter, a switch group including a plurality of switching elements, signal lines connecting the phase shift wiring and the switch group, and the like. The switching elements are formed using micro-LED process technology.

[0116] The liquid crystal layer 213 is sandwiched between the first substrate 211 and the second substrate 212. The liquid crystal layer 213 is filled with liquid crystal molecules (simply referred to as liquid crystal). There is no particular limitation on the liquid crystal material. The liquid crystal contained in the liquid crystal layer 213 sandwiched between the first substrate 211 and the second substrate 212 is oriented in response to the application of a voltage based on the operating principle of a liquid crystal display. As a result, the dielectric constant of the liquid crystal layer 213 changes according to the applied voltage.

[0117] An antenna including the function of a phase shifter is formed by sandwiching a liquid crystal layer 213 between a first substrate 211 and a second substrate 212 facing each other. A single antenna (also referred to as an antenna unit) is configured for each patch antenna 210. The function of the phase shifter is exhibited for each antenna unit. That is, a phase shifter element is configured for each antenna unit.

[0118] FIG. 13 is a block diagram showing an example of the configuration of a planar antenna device 20. The planar antenna device 20 includes a patch antenna array 21, a matrix circuit 22, a switch group 23, a phase shifter 25, a drive circuit 27, a control circuit 28, and a signal source 29. The matrix circuit 22, the switch group 23, and the phase shifter 25 constitute a phase shifter device 250.

[0119] The patch antenna array 21 has the same configuration as the patch antenna array 11 of the first embodiment. The patch antenna array 21 includes a plurality of patch antennas 210. The patch antenna array 21 has a configuration in which a plurality of patch antennas 210 are arranged in a two-dimensional array. The plurality of patch antennas 210 are arranged along the X direction and the Y direction orthogonal to each other. The plurality of patch antennas 210 are phased arrayed.

[0120] The patch antenna 210 has the same configuration as the patch antenna 110 of the first embodiment. The patch antenna 210 is a plate-shaped radiating element. In the example of FIG. 12, the patch antenna 210 is square. The shape of the patch antenna 210 is not limited to square, and may be circular or other shapes. The patch antenna 210 is fed by an electromagnetic coupling feeding method. An opening (also called a slot) is formed in the ground layer below the patch antenna 210. The patch antenna 210 is electromagnetically coupled to a signal line (microstrip line) formed on the upper surface side of the second substrate 212 through the slot in the ground layer. By electromagnetically coupling the patch antenna 210 and the microstrip line through the slot, the patch antenna 210 is excited. The impedance can be matched by setting the open end of the microstrip line at a position about a quarter wavelength away from directly below the slot of the wavelength of the radio wave to be transmitted and adjusting the dimensions of the slot.

[0121] The matrix circuit 22 has a configuration in which a plurality of thin film transistors (TFTs) are arranged in a two-dimensional array. The matrix circuit 22 is formed on the upper surface of the second substrate 212 using TFT process technology. A shield layer (described later) is formed above the matrix circuit 22. Each of the plurality of TFTs is associated with one of the plurality of patch antennas 210 that make up the patch antenna array 21. One of the plurality of TFTs associated with one patch antenna 210 is used to apply a voltage to a part of the liquid crystal material included in the liquid crystal layer 213. For example, the TFT is composed of a semiconductor layer such as amorphous silicon or polysilicon.

[0122] The switch group 23 has the same configuration as the switch group 13 in the first embodiment. The switch group 23 includes a plurality of switching elements. The plurality of switching elements are formed above the region where the matrix circuit 22 is formed using micro-LED process technology (device transfer technology). The plurality of switching elements are connected to signal lines and phase shift lines included in a signal layer formed above a shield layer (described later). One of the plurality of TFTs is connected to each of the plurality of switching elements. A plurality of phase shift lines constituting a phase shift element for each antenna unit are arranged between the TFTs associated with the patch antenna 210.

[0123] The phase shifter 25 includes a phase shift element formed for each antenna unit. The phase shift element for each antenna unit includes a plurality of phase shift lines. The plurality of phase shift lines are arranged in parallel. The ends of the plurality of phase shift lines are connected to any one of the switches included in the switch group 23. By switching the connection states of the plurality of phase shift lines, the phase shift conditions of the phase shift element for each antenna unit are set. Either one of the switches constituting the switch group 23 is connected to both ends of each phase shift line. By turning ON / OFF the switches connected to both ends of each phase shift line, at least one of the plurality of phase shift lines is selected.

[0124] The drive circuit 27 has the same configuration as the drive circuit 17 in the first embodiment. The drive circuit 27 drives a plurality of TFTs constituting the matrix circuit 22 according to the control of the control circuit 28. The drive circuit 27 individually drives a plurality of TFTs arranged in a two-dimensional array. Also, the drive circuit 27 applies a voltage to the liquid crystal material of the liquid crystal layer 213 according to the control of the control circuit 28.

[0125] The control circuit 28 has the same configuration as the control circuit 18 of the first embodiment. The control circuit 28 performs control to drive the drive circuit 27 in response to a control signal from the outside. The control circuit 28 drives the drive circuit 27 in an active matrix driving method. Also, the control circuit 28 outputs a control signal from the outside to the signal source 29. For example, the control circuit 28 is realized by a microcomputer (also called a microcontroller) or a microcontroller. For example, the control circuit 28 includes a CPU (Central Processing Unit), a RAM (Random Access Memory), a ROM (Read Only Memory), a flash memory, and the like. The control circuit 28 executes control and processing according to a program stored in advance. The control circuit 28 executes control and processing according to a program in response to a preset schedule, timing, a control instruction from the outside, and the like.

[0126] The signal source 29 is connected to a plurality of switching elements constituting the switch group 23. Also, the signal source 29 is connected to the control circuit 28. The signal source 29 acquires a control signal from the control circuit 28. The signal source 29 controls the on / off of a plurality of switching elements constituting the switch group 23 according to the control signal. The signal source 29 may be configured to directly receive a control signal from the outside without passing through the control circuit 28.

[0127] FIG. 14 is a conceptual diagram for explaining the antenna unit 200 constituting the patch antenna array 21. FIG. 14 is a cross-sectional view of a part of the planar antenna device 20 cut along the B-B cut line in FIG. 12. FIG. 14 shows an example in which a switch is realized by an FET.

[0128] On the second substrate 212, a plurality of TFTs (TFT1, TFT2, TFT3) are formed for each antenna unit 200. The TFT1, TFT2, and TFT3 that constitute the matrix circuit 22 are formed on the upper surface of the second substrate 212 using a liquid crystal display manufacturing process. TFT1 is also called the first thin film transistor. TFT2 is also called the second thin film transistor. TFT3 may also be called the third thin film transistor. For example, the upper part of the matrix circuit 22 is covered with an insulating layer. A void may be formed above the matrix circuit 22.

[0129] A shield layer SHL is formed on the second substrate 212. The shield layer SHL is formed to prevent electromagnetic coupling above and below the shield layer. For example, the shield layer SHL is composed of a conductor. The potential of the shield layer SHL is basically the ground potential. Therefore, a capacitance corresponding to the dielectric constant of the liquid crystal layer 213 is formed between the shield layer SHL and the phase shift wiring PSW.

[0130] A signal layer is formed above the shield layer SHL. The signal layer includes a signal line SGL1, a phase shift wiring PSW, and a signal line SGL2. A signal from the signal source 29 is input to the signal line SGL1 (also called the first signal line). When the connected switching element (FET1 / FET2) is in the on state, the signal input to the signal line SGL1 propagates to the phase shift wiring PSW and the signal line SGL2 (also called the second signal line). According to the voltage applied to TFT3, the dielectric constant of the liquid crystal layer 213 between the signal layer and the ground layer GL changes. According to the dielectric constant of the liquid crystal layer 213, the phase shift amount of the phase shift wiring PSW changes. That is, according to the applied voltage by TFT3, the phase shift amount of the phase shift wiring PSW can be controlled.

[0131] In the shield layer SHL, through-holes for connecting the TFT1 and the FET1, and through-holes for connecting the TFT2 and the FET2 are formed. Further, in the shield layer SHL, a through-hole for connecting the TFT3 and the phase shift wiring PSW is formed. The through-holes (via holes) are formed below the FET1 and the FET2 and above the TFT3. The TFT1 and the FET1 are electrically connected by the via V1. The TFT2 and the FET2 are electrically connected by the via V2. The TFT3 and the phase shift wiring PSW are electrically connected by the via V3.

[0132] Among the three through-holes formed in the shield layer SHL, the FET1 (also called the first switching element) is formed above the upper part of the left through-hole. Among the three through-holes formed in the shield layer SHL, the FET2 (also called the second switching element) is formed above the upper part of the right through-hole. The FET1 and the FET2 constituting the switch group 23 are formed using the device transfer technology of the micro-LED process technology. For example, above the signal line SGL1, the signal line SGL2, the phase shift wiring PSW, the via V1, and the via V2, the FET1 and the FET2 are transferred using the device transfer technology.

[0133] The TFT1 is connected to the gate electrode of the FET1 through the through-hole (left side) formed in the shield layer SHL. The TFT3 is connected to the gate electrode of the FET2 through the through-hole (right side) formed in the shield layer SHL. The TFT3 is connected to the phase shift wiring PSW through the through-hole (center) formed in the shield layer SHL.

[0134] At both ends of the channel of the FET1, a first end (right side in FIG. 14) and a second end (left side in FIG. 14) corresponding to the source or the drain are formed. The first end (right side) of the channel of the FET1 is connected to the first end (left side) of the phase shift wiring PSW included in the phase shifter 25. The second end (left side) of the channel of the FET1 is connected to one end of the signal line SGL1. The other end of the signal line SGL1 is connected to the signal source 29.

[0135] At both ends of the channel of FET2, a first end (left side in FIG. 14) and a second end (right side in FIG. 14) corresponding to the source or drain are formed. The first end (left side) of the channel of FET2 is connected to the second end (right side) of the phase shift wiring PSW included in the phase shifter 25. The second end (right side) of the channel of FET2 is connected to one end of the signal line SGL2. The other end of the signal line SGL2 extends beyond the lower region of the patch antenna 210. The signal line SGL2 functions as a microstrip line.

[0136] Switch group 23 Above the signal layer including the switch group, a liquid crystal layer 213 is disposed. Above the liquid crystal layer 213, a first substrate 211 is disposed. On the upper surface of the first substrate 211, a patch antenna 210 is disposed. In the example of FIG. 14, the patch antenna 210 is disposed on the right side of the upper surface of the first substrate 211. On the lower surface of the first substrate 211, a ground layer GL is formed. A slot SL is formed in the ground layer GL corresponding to the lower part of the patch antenna 210. The patch antenna 210 and the signal line SGL2 (microstrip line) are electromagnetically coupled through the slot SL.

[0137] The signal reaching the phase shift wiring PSW through the signal line SGL1 is phase-shifted by a phase shift amount corresponding to the dielectric constant of the liquid crystal layer 213 due to the voltage applied by the TFT3. The signal phase-shifted by the phase shift wiring PSW is transmitted as a radio wave in the wavelength band to be transmitted by electromagnetic induction between the signal line SGL2 and the patch antenna 210.

[0138] The radio wave received by the patch antenna 210 is received according to the dielectric constant of the liquid crystal layer 213 between the patch antenna 210 and the signal line SGL2. The received radio wave is phase-shifted by the phase shift wiring PSW. The phase-shifted signal is received by a receiving circuit (not shown) through the signal line SGL1. The information included in the signal received by the receiving circuit is decoded by a decoder (not shown). The information included in the signal is not particularly limited.

[0139] The phase shifter element composed of a plurality of phase shift wirings PSW has the same structure as the pixel of a liquid crystal display and operates in the same manner. In a liquid crystal display, the voltage applied to the pixel electrode according to the switching of the TFT is maintained for one frame by the storage capacitor. In the planar antenna device 20 of the present embodiment, a voltage is applied to the phase shift wiring PSW according to the switching of the TFT. The voltage applied to the phase shift wiring PSW is maintained for one frame by the capacitance formed between the phase shift wiring PSW and the shield layer SHL. That is, the shield layer SHL has two roles. The first role is to prevent interference between the signal layer and the TFT circuit. The second role is to form a capacitance between the phase shift wiring PSW and the shield layer SHL.

[0140] The plurality of switching elements (FETs) included in the switch group 23 are formed using the device transfer technology of the micro-LED process technology. By using the device transfer technology of the micro-LED process technology, the thickness of the switching element can be formed to be 1 μm (micrometer) or less, so that the switching element can be mounted in the gap of the liquid crystal.

[0141] 〔Phase shifter element〕 Next, the phase shifter element that constitutes the phase shifter 25 included in the planar antenna device 20 will be described with reference to the drawings. In the following, some examples of the phase shifter element for each antenna unit 200 will be described.

[0142] <First example> FIG. 15 is a conceptual diagram for explaining the first example (phase shifter element 251) of the phase shifter element included in the planar antenna device 20. FIG. 15 is a view of the range including the phase shifter element 251 seen from the upper visual position. The dielectric constant of the liquid crystal layer 213 included in the planar antenna device 20 is adjusted according to the voltage applied to the TFT 233. The phase shifter element 251 of the first example can set a desired phase shift amount by selecting any one of the phase shift wirings PSW to which different voltages are applied.

[0143] The phase shifter 251 of the first example includes four phase shift wirings PSW with the same line length. A voltage is individually applied to each of the four phase shift wirings PSW. According to the applied voltage, the phase shift amount of the phase shift wiring PSW is set. The phase shift amount of the phase shift wiring PSW is set according to the wavelength of the radio wave to be transmitted. For example, a plurality of the four phase shift wirings PSW may be selected and the phase shift amount may be set. For example, the same voltage may be applied to the four phase shift wirings PSW, and the phase shift amount may be set according to the number of selected phase shift wirings PSW.

[0144] The first ends (left sides) of the plurality of phase shift wirings PSW are connected to any one of the FETs 1 included in the switch group 231-1. The FET 1 included in the switch group 231-1 is connected to one end (right side) of the signal line SGL1. The second ends (right sides) of the phase shift wirings PSW are connected to any one of the FETs 2 included in the switch group 231-2. The FET 2 included in the switch group 231-2 is connected to one end (left side) of the signal line SGL2. The other end (right side) of the signal line SGL2 extends beyond the slot SL opened in association with the patch antenna 210.

[0145] The phase shift amount of the phase shift wiring PSW connected to the FETs 1 and FETs 2 set to the on state according to the control signal from the signal source 29 is set as the phase shift amount of the phase shifter 251. The signal that reaches the signal line SGL2 below the slot SL through the phase shift wiring PSW connected to the on-state FETs 1 and FETs 2 is transmitted as a radio wave by the inductive resonance between the patch antenna 210 and the signal line SGL2. In the case of the structure of FIG. 15, since there is no delay in the response in the liquid crystal layer 213, the phase can be switched at high speed. Also, in the case of the structure of FIG. 15, by adjusting the voltage applied to the plurality of phase shift wirings PSW and selecting at least any one of the phase shift wirings PSW, the phase shift amount of the phase shifter 251 can be set to an appropriate value according to the situation.

[0146] <Second Example> FIG. 16 is a conceptual diagram for explaining a second example (phase shifter 252) of the phase shifter included in the planar antenna device 20. FIG. 16 is a view of the range including the phase shifter 252 seen from an upper viewing position. The phase shifter 252 is a 4-bit phase shifter in which four phase shifters 252-1 to 4 are connected in series. The phase shifter 252 of the second example can control the phase shift amount by selecting a phase shift wiring PSW for each of the phase shifters 252-1 to 4 with respect to the phase shifters 252-1 to 4 to which voltages are individually applied.

[0147] The phase shifter 252 of the second example includes four phase shifters 252-1 to 4. The four phase shifters 252-1 to 4 are connected in series. The line lengths of the four phase shifters 252-1 to 4 are equal. By controlling the applied voltage using the TFT3 associated with each of the four phase shifters 252-1 to 4, the phase shift amounts of the four phase shifters 252-1 to 4 can be adjusted.

[0148] The first end (left side) of the upper phase shift wiring PSW is connected to the upper FET1 included in the switch group 232-1 connected to each of the phase shifters 252-1 to 4. The first end (left side) of the lower phase shift wiring PSW is connected to the lower FET1 included in the switch group 232-1 connected to each of the phase shifters 252-1 to 4. The FET1 included in the switch group 232-1 connected to the phase shifter 252-1 is connected to one end (right side) of the signal line SGL1. The FET1 included in the switch group 232-1 connected to each of the phase shifters 252-2 to 4 is connected to the FET2 included in the switch group 232-2 connected to each of the adjacent phase shifters 252-1 to 3 on the left.

[0149] The second end (right side) of the upper-phase-shifting wiring PSW is connected to the upper FET2 included in the switch group 232-2 connected to each of the phase-shifting elements 252-1 to 4. The second end (right side) of the lower-phase-shifting wiring PSW is connected to the lower FET2 included in the switch group 232-2 connected to each of the phase-shifting elements 252-1 to 4. The FET2 included in the switch group 232-2 connected to each of the phase-shifting elements 252-1 to 3 is connected to the FET1 included in the switch group 232-1 connected to each of the adjacent phase-shifting elements 252-2 to 4. The FET2 included in the switch group 232-2 connected to the phase-shifting element 252-4 is connected to one end (left side) of the signal line SGL2. The other end (right side) of the signal line SGL2 extends beyond the lower part of the slot SL opened in association with the patch antenna 210.

[0150] The phase shift amount of the phase-shifting wiring PSW connected to the FET1 and FET2 set to the on state according to the control signal from the signal source 29 is set as the phase shift amount for each of the phase-shifting elements 252-1 to 4. The total value of the phase shift amounts for each of the phase-shifting elements 252-1 to 4 corresponds to the overall phase shift amount of the phase-shifting element 252. The signal that reaches the signal line SGL2 below the slot SL through the phase-shifting wiring PSW connected to the on-state FET1 and FET2 is transmitted as radio waves by the inductive resonance between the patch antenna 210 and the signal line SGL2. In the case of the structure of FIG. 16, since there is no delay in the response in the liquid crystal layer 213, the phase can be switched at high speed.

[0151] In the case of the structure of FIG. 16, by selecting the phase shift wiring PSW according to the situation, the phase shift amount of the phase shift element 252 can be set to an appropriate value. Assume that the phase shift amount of the phase shift wiring PSW arranged above each of the phase shift elements 252-2 to 252-4 is twice that of the phase shift wiring PSW arranged above each of the left adjacent phase shift elements 252-1 to 252-3. Also, assume that the phase shift amount of the phase shift wiring PSW arranged below each of the phase shift elements 252-1 to 252-4 is sufficiently smaller than the phase shift amount of the phase shift wiring PSW arranged above the phase shift element 252-1. In such a case, the overall phase shift amount of the phase shift element 252 can be digitally controlled according to the selection method of the phase shift wiring PSW included in the phase shift elements 252-1 to 252-4. Also, by controlling the voltage applied to the liquid crystal layer 213 via the TFT 223, the overall phase shift amount of the phase shift element 252 can also be non-linearly controlled.

[0152] <Example 3> FIG. 17 is a conceptual diagram for explaining a third example (phase shift element 253) of the phase shift element included in the planar antenna device 20. FIG. 17 is a view of the range including the phase shift element 253 seen from an upper viewing position. The phase shift element 253 of the third example sets an appropriate phase shift amount for the frequency of the radio wave to be transmitted by selecting any one of the phase shift wirings PSW having different line widths.

[0153] The phase shift element 253 of the third example includes a plurality of phase shift wirings (PSW61, PSW62, PSW63) having different line widths. The phase shift wiring PSW61 has a wider line width than the phase shift wiring PSW62. The phase shift wiring PSW62 has a wider line width than the phase shift wiring PSW63. The thicknesses of the phase shift wiring PSW61, the phase shift wiring PSW62, and the phase shift wiring PSW63 are set according to the frequency of the radio wave to be transmitted.

[0154] The first end (left side) of the phase-shifting wiring PSW61 is connected to the upper FET1 included in the switch group 233-1. The first end (left side) of the phase-shifting wiring PSW62 is connected to the middle FET1 included in the switch group 233-1. The first end (left side) of the phase-shifting wiring PSW63 is connected to the lower FET1 included in the switch group 233-1. The FET1 included in the switch group 233-1 is connected to one end (right side) of the signal line SGL1. The second end (right side) of the phase-shifting wiring PSW61 is connected to the upper FET2 included in the switch group 233-2. The second end (right side) of the phase-shifting wiring PSW62 is connected to the middle FET2 included in the switch group 233-2. The second end (right side) of the phase-shifting wiring PSW63 is connected to the lower FET2 included in the switch group 233-2. The FET2 included in the switch group 233-2 is connected to one end (left side) of the signal line SGL2. The other end (right side) of the signal line SGL2 extends beyond the lower part of the slot SL opened in association with the patch antenna 210.

[0155] The phase shift amount of the phase-shifting wiring PSW connected to the FET1 and FET2 set to the on state according to the control signal from the signal source 29 is set as the phase shift amount of the phase-shifting element 253. The signal that reaches the signal line SGL2 below the slot SL through the phase-shifting wiring PSW connected to the on-state FET1 and FET2 is transmitted as radio waves by the inductive resonance between the patch antenna 210 and the signal line SGL2. In the case of the structure of FIG. 17, since there is no delay in the response in the liquid crystal layer 213, the phase of the signal to be transmitted can be switched at high speed. Also, in the case of the structure of FIG. 17, by selecting the phase-shifting wiring PSW according to the situation, an appropriate phase shift amount can be set for the frequency of the radio wave to be transmitted.

[0156] As described above, the planar antenna device of the present embodiment includes a first substrate, a dielectric layer, and a second substrate. A patch antenna is disposed on the upper surface of the first substrate. A ground layer having a slot formed in a region below the patch antenna is disposed on the lower surface of the first substrate. The dielectric layer is disposed such that its upper surface contacts the ground layer disposed on the lower surface of the first substrate. The dielectric layer is a liquid crystal layer filled with liquid crystal molecules. The second substrate is disposed in contact with the lower surface of the dielectric layer. The second substrate has a matrix circuit, a first signal line, a phase shifter wiring, a second signal line, and a switch group. The matrix circuit includes a transistor pair composed of a first thin film transistor and a second thin film transistor. Further, the matrix circuit includes a third thin film transistor electrically connected to a plurality of phase shifter wirings. The first signal line is formed on the upper surface of the second substrate, and a signal to be transmitted is input thereto. The phase shifter element is formed on the upper surface of the second substrate and is composed of a plurality of phase shifter wirings. The second signal line is formed on the upper surface of the second substrate, is disposed below the slot, and is electromagnetically coupled to the patch antenna via the slot. The switch group has a first switching element and a second switching element formed using the manufacturing process technology of a micro LED display. The first switching element has a first end of a channel connected to one end of any of the plurality of phase shifter wirings, and a control electrode connected to the first thin film transistor. The second switching element has a first end of a channel connected to the other end of any of the plurality of phase shifter wirings, and a control electrode connected to the second thin film transistor.

[0157] In the present embodiment, instead of setting the phase shift amount according to the length of the phase shifter wiring, the phase shift amount is set according to the voltage applied to the phase shifter wiring. Therefore, according to the present embodiment, the phase shifter can be miniaturized compared to the first embodiment. Further, in the present embodiment, by controlling the voltage applied to the phase shifter wiring according to the situation, a more flexible phase shift setting is possible compared to the first embodiment.

[0158] In a general planar antenna device using liquid crystal, the TFT is used only for changing the dielectric constant of the liquid crystal. In the present embodiment, the TFT is also used for switching a switching element such as an FET that can operate at high speed, which is implemented using the manufacturing process technology (device transfer technology) of a micro LED display. Therefore, according to the present embodiment, since a switching element that can operate at high speed is used, the phase shift can be switched at high speed.

[0159] In one aspect of the present embodiment, the phase shift element has a structure in which a plurality of phase shift wirings having different line widths are arranged in parallel. According to this aspect, by selecting the phase shift wiring according to the situation, an appropriate phase shift amount can be set for the frequency of the radio wave to be transmitted.

[0160] (Third Embodiment) Next, the phase shift device according to the third embodiment will be described with reference to the drawings. The phase shift device of the present embodiment has a simplified configuration of the phase shift device included in the planar antenna device according to the first to second embodiments.

[0161] FIG. 18 is a block diagram showing an example of the configuration of the phase shift device 350 of the present embodiment. The phase shift device 350 includes a matrix circuit 32, a switch group 33, and a phase shifter 35. The matrix circuit 32 includes a transistor pair composed of a first thin film transistor and a second thin film transistor. The phase shifter 35 is composed of a plurality of phase shift wirings. The switch group 33 includes a first switching element and a second switching element formed using the manufacturing process technology of a micro LED display. The first end of the channel of the first switching element is connected to any one of the plurality of phase shift wirings. The control electrode of the first switching element is connected to the first thin film transistor. The first end of the channel of the second switching element is connected to the other end of any one of the plurality of phase shift wirings. The control electrode of the second switching element is connected to the second thin film transistor.

[0162] Since the phase shifter of this embodiment does not include a liquid crystal layer, the delay in the response in the liquid crystal layer does not occur. Therefore, the phase shifter of this embodiment can switch the phase of the signal to be transmitted at a high speed as compared with a general phase shifter using liquid crystal. Further, since the phase shifter of this embodiment has a larger gain than a general phase shifter, a sufficient bandwidth can be secured. That is, according to the phase shifter of this embodiment, the phase of the signal to be transmitted can be switched at high speed while securing a sufficient bandwidth.

[0163] (Hardware) Here, the hardware configuration for executing the control and processing according to each embodiment of the present disclosure will be described by taking the information processing apparatus 90 in FIG. 19 as an example. Note that the information processing apparatus 90 in FIG. 19 is a configuration example for executing the control and processing of each embodiment, and does not limit the scope of the present disclosure.

[0164] As shown in FIG. 19, the information processing apparatus 90 includes a processor 91, a main storage device 92, an auxiliary storage device 93, an input / output interface 95, and a communication interface 96. In FIG. 19, the interface is abbreviated as I / F (Interface). The processor 91, the main storage device 92, the auxiliary storage device 93, the input / output interface 95, and the communication interface 96 are connected to each other via a bus 98 so as to be capable of data communication. Further, the processor 91, the main storage device 92, the auxiliary storage device 93, and the input / output interface 95 are connected to a network such as the Internet or an intranet via the communication interface 96.

[0165] The processor 91 expands the program stored in the auxiliary storage device 93 or the like into the main storage device 92. The processor 91 executes the program expanded in the main storage device 92. In this embodiment, a configuration using the software program installed in the information processing apparatus 90 may be employed. The processor 91 executes the control and processing according to each embodiment.

[0166] The main memory device 92 has an area where programs are expanded. Programs stored in the auxiliary storage device 93 or the like are expanded in the main memory device 92 by the processor 91. The main memory device 92 is realized by a volatile memory such as a DRAM (Dynamic Random Access Memory), for example. Also, a non-volatile memory such as an MRAM (Magnetoresistive Random Access Memory) may be configured / added as the main memory device 92.

[0167] The auxiliary storage device 93 stores various data such as programs. The auxiliary storage device 93 is realized by a local disk such as a hard disk or a flash memory. Note that it is also possible to configure the system such that various data is stored in the main memory device 92 and omit the auxiliary storage device 93.

[0168] The input / output interface 95 is an interface for connecting the information processing device 90 and peripheral devices based on standards and specifications. The communication interface 96 is an interface for connecting to external systems and devices through a network such as the Internet or an intranet based on standards and specifications. The input / output interface 95 and the communication interface 96 may be shared as an interface for connecting to external devices.

[0169] Input devices such as a keyboard, a mouse, and a touch panel may be connected to the information processing device 90 as needed. These input devices are used for inputting information and settings. When a touch panel is used as an input device, the display screen of the display device may also serve as the interface of the input device. Data communication between the processor 91 and the input device may be mediated by the input / output interface 95.

[0170] Further, the information processing apparatus 90 may be provided with a display device for displaying information. When a display device is provided, it is preferable that the information processing apparatus 90 is provided with a display control device (not shown) for controlling the display of the display device. The display device may be connected to the information processing apparatus 90 via the input / output interface 95.

[0171] Also, the information processing apparatus 90 may be provided with a drive device. The drive device mediates the reading of data and programs from a recording medium and the writing of the processing results of the information processing apparatus 90 to the recording medium between the processor 91 and the recording medium (program recording medium). The drive device may be connected to the information processing apparatus 90 via the input / output interface 95.

[0172] The above is an example of the hardware configuration for enabling the control and processing according to each embodiment of the present invention. Note that the hardware configuration in FIG. 19 is an example of the hardware configuration for executing the control and processing according to each embodiment, and does not limit the scope of the present invention. Also, a program for causing a computer to execute the control and processing according to each embodiment is included in the scope of the present invention. Further, a program recording medium on which the program according to each embodiment is recorded is included in the scope of the present invention. The recording medium can be realized by, for example, an optical recording medium such as a CD (Compact Disc) or a DVD (Digital Versatile Disc). The recording medium may be realized by a semiconductor recording medium such as a USB (Universal Serial Bus) memory or an SD (Secure Digital) card. Also, the recording medium may be realized by a magnetic recording medium such as a flexible disk or other recording media. When the program executed by the processor is recorded on the recording medium, the recording medium corresponds to a program recording medium.

[0173] The components of each embodiment may be combined arbitrarily. Also, the components of each embodiment may be realized by software or by a circuit.

[0174] Although the present invention has been described with reference to the embodiments above, the present invention is not limited to the above embodiments. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.

Explanation of Reference Numerals

[0175] 10, 20 Planar antenna device 11, 21 Patch antenna array 12, 22, 32 Matrix circuit 13, 23, 33 Switch group 15, 25, 35 Phase shifter 17, 27 Drive circuit 18, 28 Control circuit 19, 29 Signal source 110, 210 Patch antenna 111, 211 First substrate 112, 212 Second substrate 113 Dielectric layer 131, 132, 133, 134, 135, 231, 232, 233 Switch group 150, 250, 350 Phase shifter device 151, 152, 153, 154, 155, 251, 252, 253 Phase shifter element 171 First drive circuit 172 Second drive circuit 213 Liquid crystal layer

Claims

1. A first substrate on which a patch antenna is disposed on the upper surface and a ground layer having a slot formed in a region below the patch antenna is disposed on the lower surface; A dielectric layer disposed on the lower surface of the first substrate so that the upper surface is in contact with the ground layer; A second substrate disposed in contact with the lower surface of the dielectric layer, The second substrate includes: A matrix circuit including a transistor pair composed of a first thin film transistor and a second thin film transistor; A first signal line formed on the upper surface of the second substrate and to which a signal to be transmitted is input; A phase shifter formed on the upper surface of the second substrate and composed of a plurality of phase shift wirings; A second signal line formed on the upper surface of the second substrate, disposed below the slot, and electromagnetically coupled to the patch antenna through the slot; A first switching element having a first end of a channel connected to one end of any one of the plurality of phase shift wirings and a control electrode connected to the first thin film transistor; and a second switching element having a first end of a channel connected to the other end of any one of the plurality of phase shift wirings and a control electrode connected to the second thin film transistor, and a switch group composed of the second switching element. A planar antenna device.

2. The phase shifter, The planar antenna device according to claim 1, having a structure in which a plurality of the phase shift wirings having different line lengths are arranged in parallel.

3. The phase shifter, Has a structure in which a plurality of pairs in which two of the phase shift wirings having different line lengths are connected in parallel are connected in series, Among the plurality of pairs, the phase shift wiring having the longer line length, The planar antenna device according to claim 1, having a U-shaped shape in which one end is connected to the first end of the first switching element and the other end is connected to the first end of the second switching element.

4. The phase shifter, Has a structure in which a plurality of pairs in which two of the phase shift wirings having different line lengths are connected in parallel are connected in series, Among the plurality of pairs, the phase shift wiring having the longer line length, The planar antenna device according to claim 1, having an I-shaped shape in which one end is connected to the first end of the first switching element and the first end of the second switching element and the other end is an open end.

5. Adjacent phase shifters to each other, The planar antenna device according to claim 3 or 4, wherein the phase shift wiring having the longer line length is disposed at a position opposite to a straight line connecting the first signal line and the second signal line.

6. The planar antenna device according to any one of claims 3 to 5, wherein an electromagnetic interference reduction structure is formed by a plurality of vias that electrically connect the upper surface of the second substrate and the ground layer between the longer of the adjacent transmission line lengths on the same side with respect to the straight line connecting the first signal line and the second signal line.

7. The dielectric layer is a liquid crystal layer filled with liquid crystal molecules, The matrix circuit The planar antenna device according to any one of claims 1 to 6, including a third thin film transistor electrically connected to a plurality of the transmission lines.

8. The phase shifter The planar antenna device according to claim 7, having a structure in which a plurality of the transmission lines with different line widths are arranged in parallel.

9. A matrix circuit including a transistor pair composed of a first thin film transistor and a second thin film transistor, A phase shifter composed of a plurality of transmission lines, A switching device including a first switching element having a first end of a channel connected to one end of any of the plurality of transmission lines and a control electrode connected to the first thin film transistor, and a second switching element having a first end of a channel connected to the other end of any of the plurality of transmission lines and a control electrode connected to the second thin film transistor.

10. Using the manufacturing process technology of thin film transistors, a matrix circuit including a transistor pair composed of a first thin film transistor and a second thin film transistor is formed, Above the matrix circuit, a phase shifter composed of a plurality of transmission lines is formed, A method of manufacturing a phase shifter, using the manufacturing process technology of a micro LED display, to form a first switching element having a first end of a channel connected to one end of any of the plurality of transmission lines and a control electrode connected to the first thin film transistor, and a switching device composed of a second switching element having a first end of a channel connected to the other end of any of the plurality of transmission lines and a control electrode connected to the second thin film transistor.

Images