Systems, devices, and methods for real-time interference detection

Abstract

To solve the following situation: signals, such as, radar signals, communication signals, etc. may experience undesired burst interference, and an interference is falsely detected.SOLUTION: Signal processing circuitry includes at least one processor configured to obtain a digitized radar signal, and further configured, for one or more iterations, to: determine a first power of at least one first signal sample of the radar signal; determine a second power of at least one second signal sample of the radar signal, the at least one second signal sample being subsequent in time to the at least one first signal sample; and determine a difference value between the second power and the first power. The at least one processor further configured to detect a burst interference signal occurring within the radar signal based on the one or more difference values from the one or more iterations.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] Various embodiments generally relate to interference detectors.

Background Art

[0002] Signals such as radar signals and communication signals may be subject to unwanted burst interference. When the interference causes a large power change, known approaches may be appropriate, and such known approaches may include establishing a comparison threshold to detect the presence of interference within a desired signal.

[0003] However, such approaches that include an approach using cell-averaging (CA) techniques may be incomplete or inappropriate because they may perform inappropriate interference detection when the window period is too short or may perform inappropriate interference detection when the window period is too long. Further, such known approaches may perform incorrect interference detection when the burst interference has a low amplitude. In the case of the previous approach, a low frequency component of the acquired signal or the desired signal is another scenario that is problematic. This is because the interference may be incorrectly detected or the interference may not be detected. Further, known approaches may include buffering signals that will cause an unwanted delay.

[0004] In the drawings, like reference numerals generally refer to the same parts throughout different views. The drawings are not necessarily to scale and instead generally focus on explaining the principles of the present invention. In the following description, various embodiments of the present invention are described with reference to the following drawings.

Brief Description of the Drawings

[0005] [Figure 1] A diagram showing a graph of a signal subject to interference. [Figure 2]This is a diagram illustrating an exemplary CFAR engine. [Figure 3] This figure shows an interference detection method according to at least one exemplary embodiment of the present disclosure. [Figure 4] This figure shows an exemplary representation of data according to at least one exemplary embodiment of the present disclosure. [Figure 5] This figure shows exemplary code that may be implemented according to at least one exemplary embodiment of the present disclosure. [Figure 6] This figure shows an exemplary system according to at least one exemplary embodiment of the present disclosure. [Figure 7] This figure shows exemplary code that may be implemented according to at least one exemplary embodiment of the present disclosure. [Figure 8] This figure shows an exemplary system according to at least one exemplary embodiment of the present disclosure. [Modes for carrying out the invention]

[0006] The following detailed description refers to the accompanying drawings illustrating specific details and embodiments in which the present invention may be carried out.

[0007] Note that throughout the drawings, similar reference numbers are used to depict the same or similar elements, features, and structures.

[0008] The term “exemplary” is used herein to mean “serving as an example, illustration, or representation.” Any embodiment or design described herein as “exemplary” should not necessarily be construed as being preferable or advantageous to other embodiments or designs.

[0009] The terms "at least one" and "one or more" may be understood to include one or more numbers (e.g., 1, 2, 3, 4, [...] etc.). The term "multiple" may be understood to include two or more numbers (e.g., 2, 3, 4, 5, [...] etc.).

[0010] The phrase “at least one of” with respect to a group of elements may be used herein to mean at least one element from the group comprising those elements. For example, the phrase “at least one of” with respect to a group of elements may be used herein to mean a selection of one of the listed elements, one of several of the listed elements, several of the individually listed elements, or several of the listed multiple elements.

[0011] The terms “multiple” and “multiple” in the specification and claims explicitly refer to a quantity greater than one. Thus, any phrase explicitly referencing the aforementioned terms that refer to a quantity of an object (e.g., “multiple (objects),” “multiple (objects)”) explicitly refers to a quantity greater than one of the aforementioned objects. Terms such as “group,” “set,” “collection,” “series,” “sequence,” “grouping,” etc., and similar terms in the specification and claims, refer to a quantity greater than one, if any, i.e., one or more. The terms “appropriate subset,” “reduced subset,” and “lesser subset” refer to a subset of a set, where this subset is not equal to the set, i.e., contains fewer elements than the set.

[0012] As used herein, the term “data” may be understood to include information in any appropriate analog or digital format, provided, for example, as a file, a portion of a file, a set of files, a signal or stream, a portion of a signal or stream, a set of signals or streams, etc. Furthermore, the term “data” may also be used to mean, for example, a reference to information in the form of a pointer. However, the term “data” may take various forms and may represent any information as understood in the art, and is not limited to the examples given above.

[0013] For example, the terms “processor” or “controller” as used herein may be understood as any type of entity that enables the processing of data, signals, etc. Data, signals, etc. may be processed according to one or more specific functions performed by the processor or controller.

[0014] Therefore, a processor or controller may be or include analog circuits, digital circuits, mixed-signal circuits, logic circuits, processors, microprocessors, central processing units (CPUs), neuromorphic computer units (NCUs), graphics processing units (GPUs), digital signal processors (DSPs), field-programmable gate arrays (FPGAs), integrated circuits, application-specific integrated circuits (ASICs), etc., or any combination thereof. Implementations of any other kind of each function, which will be described in more detail hereafter, may also be understood as processors, controllers, or logic circuits. Any two (or more) processors, controllers, or logic circuits detailed herein may be implemented as a single entity, etc., having equivalent functions, and conversely, any single processor, controller, or logic circuit detailed herein may be implemented as two (or more) separate entities, etc., having equivalent functions.

[0015] The term “system” as described herein (e.g., drive system, position detection system, etc.) may be understood as a set of interacting elements, which may, for example, be one or more mechanical components, one or more electrical or electronic components, one or more instructions (e.g., encoded in a storage medium), one or more controllers, etc.

[0016] As used herein, “circuit” is understood to mean any kind of logic implementation entity, which may include special-purpose hardware or processor execution software. Thus, a circuit may be an analog circuit, a digital circuit, a mixed-signal circuit, a logic circuit, a processor, a microprocessor, a signal processor, a central processing unit ("CPU"), a graphics processing unit ("GPU"), a neuromorphic computer unit (NCU), a digital signal processor ("DSP"), a field-programmable gate array ("FPGA"), an integrated circuit, an application-specific integrated circuit ("ASIC"), etc., or any combination thereof. Implementations of any other kind of each function, which will be described in more detail hereafter, may also be understood as “circuit.” Any two (or more) circuits detailed herein may be implemented as a single circuit having substantially equivalent functionality, and conversely, any single circuit detailed herein may be implemented as two (or more) distinct circuits having substantially equivalent functionality. Furthermore, a reference to “circuit” may refer to two or more circuits that collectively form a single circuit.

[0017] As used herein, a signal may be transmitted or conducted through a signal chain in which the signal is processed to alter its characteristics, such as phase, amplitude, and frequency. Even if such characteristics are adapted, the signal may still be referred to as the same signal. Generally, a signal may be considered the same signal as long as it continues to encode the same information. For example, a transmitted signal may be considered to refer to a transmitted signal in the baseband, intermediate, and radio frequencies.

[0018] As used herein, “memory” may be understood as a non-temporary, computer-readable medium on which data or information can be stored for retrieval. Therefore, references to “memory” as included herein may be understood to refer to volatile or non-volatile memory, including random-access memory (“RAM”), read-only memory (“ROM”), flash memory, solid-state storage, magnetic tape, hard disk drives, optical drives, etc., or any combination thereof. Furthermore, registers, shift registers, processor registers, data buffers, etc., are also understood to be included in the term “memory” as used herein. A single component referred to as “memory” or “memory” may consist of multiple different types of memory, and therefore may refer to a collective component containing one or more types of memory. It is readily understood that any single memory component may be separated into multiple collectively equivalent memory components, and vice versa. Furthermore, while memory may be depicted separately from one or more other components (in drawings, etc.), it is understood that memory may be integrated within another component, such as on a common integrated chip.

[0019] Various embodiments of this disclosure relate to systems, devices, and / or methods for detecting or handling burst interference. Such burst interference may occur in radar systems, communication systems, or other known systems.

[0020] Figure 1 is a graph 100 showing signal 110 being subjected to burst interference. The interference window 120 identifies the portion of signal 110 being subjected to burst interference. Signal 110 may be a digital signal created or output from an analog-to-digital converter (ADC) device. Before being digitized, signal 110 may have been an RF signal, a radar signal (e.g., a continuous wave such as an FM-CW radar signal), or any other type of analog signal.

[0021] FIG. 2 shows an architecture for a Constant False Alarm Rate (CFAR) detector 200 that can be used in detecting interference. The CFAR 200 processes a signal 205 that can include samples or cells that can be indexed in time. Known CFARs, such as CFAR 200, may perform various types of detection schemes, which include schemes involving a comparison of a power level determined from one or more Cells Under Test (CUTs) 210 with a threshold. Such a threshold may be predefined (e.g., may have a constant value), or may be dynamically established or calculated from the power levels of reference cells 230. Such reference cells 230 are, for example, cells adjacent to or surrounding a Cell Under Test (CUT). The reference cells 230 may be separated from the CUT 210 by guard cells 220. The reference cells 230 can include lagging cells (230a) or leading cells (230b). When the CUT power level exceeds a determined or established threshold, a target or interference may be considered to be detected at the CUT.

[0022] For example, in FIG. 2, the CFAR 200 may perform a type of Cell Averaging (CA) scheme, CASUM. Here, the determined power levels of the reference cells 230 surrounding the CUT 210 are averaged together by a processing block 240. The processing block 240 can include a processing circuit (e.g., a processor or any suitable signal processing circuit).

[0023] The determined result (Z) can then be multiplied by a value (alpha or α) that can create or generate a threshold (Y). In other cases, instead of multiplying the result Z by the value α, the processing block 240 may calculate or determine the threshold Y by adding the logarithm of Z (e.g., log2(Z)) to the logarithm of α (e.g., log2(α)).

[0024] CUT210 is compared to a determined boundary by, for example, suitable means (such as a comparator circuit, one or more processors, or other suitable circuitry). If it is determined that the power level of CUT210 is above the determined boundary, interference is considered to be present. Further, CFAR210 may be configured to output a signal to indicate the presence of detected interference in the sample. This comparison is performed repeatedly or iteratively over the range of cells of the input signal.

[0025] The detection schemes performed by CFAR include various methods or ways to establish or determine the threshold used in the comparison with the CUT. One example is the cell-averaging greatest (CAGO) approach, where each set or group of reference cells (such as leading and trailing reference cells) for each CUT is averaged separately or individually. The maximum average from these two different averages is used to calculate or determine the boundary (e.g., multiplied by α).

[0026] Similarly, the cell-averaging smallest (CASO) approach can be used. CASO is similar to CAGO except that the minimum of the averages (e.g., from leading and trailing reference cells) is used (e.g., multiplied by α) to establish the boundary. Other known techniques include using other types of statistical analysis known as generalized ordered statistics (GOS), which may be applied collectively (GOSSUM) to the reference cells or individually or separately to sets of reference cells. Further, in the GOS approach, the maximum power value (GOSGO) or the minimum power value (GOSSO) may be used to determine the boundary or threshold.

[0027] To implement these techniques, parameters such as the sum of the reference cells (both leading and lagging reference cells), the sum of the guard cells, the alpha value, and other relevant parameters may be determined in advance.

[0028] The techniques described above have drawbacks. For example, low-amplitude bursts can present difficulties in setting an appropriate alpha value (α), which can lead to false detections, particularly at the signal's position just outside the actual interference burst period. High-amplitude bursts can also be problematic, as with some techniques such as CASO or GOSSO, as they may only detect interference within an excessively narrow or short window, thus misdetecting or missing some burst interferences.

[0029] Furthermore, in cases where the interfered signal has low-frequency components (e.g., close to DC), known techniques may falsely detect interference at a signal location just outside where the actual interference burst occurs. Moreover, the aforementioned techniques may fail to detect some instances of actual interference.

[0030] The exemplary interference detectors present herein are designed to address the shortcomings of the detectors and detection methods described above.

[0031] Figure 3 illustrates an exemplary method for detecting interference in accordance with an exemplary embodiment of the present disclosure. The method of Figure 3 may be implemented or carried out by a CFAR device that includes a CFAR device having the same or similar architecture as CFAR200. CFAR200 may include one or more processors (e.g., signal processing circuits or similar electronic components) that can be used to carry out methods such as the method of Figure 3.

[0032] The method in Figure 3 involves acquiring a signal at 305. This signal may be a digital signal containing multiple signal samples that can be indexed, for example, in time. This signal may be a radio frequency (RF) signal, a radar signal (e.g., continuous wave radar), audio, or a digitized version of any other suitable type of signal. Furthermore, this signal may be a real signal or a complex signal that can include, for example, IQ signals (including common-mode and quadrature). In one example, a radar signal may be represented as an IQ signal, or, for example, in terms of its demodulated common-mode and quadrature components. Furthermore, the signal may be an audio signal, for example, an audio signal acquired from any suitable signal source, which in one example includes an audio signal acquired from a vinyl record during record playback.

[0033] This method may include repeating or iterating at least a portion of this method, particularly portions 310-320. In 310, this method includes determining a first power of at least one first signal sample of a signal; that is, the power of a first selection of one or more first samples or cells of a signal may be determined or calculated. In 315, this method includes determining a second power of at least one second signal sample of a signal, where at least one second signal sample temporally follows at least one first signal sample. In 320, this method includes determining the difference between the determined second power and the determined first power.

[0034] As described above, the method in Figure 3 may include repeating steps 310 to 320. The number of iterations or repetitions may be predetermined or may continue as long as there are samples or cells of the signal to be detected. Each iteration may be performed on subsequent or later portions or samples of the signal. For example, in the case of 310, at least one first signal sample may be one or more samples that temporally follow at least one first signal sample of the previous iteration, or one or more samples that occur after at least one first signal sample of the previous iteration. Similarly, in the case of 315, at least one second signal sample may be one or more samples that temporally follow at least one second signal sample of the previous iteration, or one or more samples that occur after at least one second signal sample of the previous iteration.

[0035] In one example, for each iteration, at least one first signal sample may be a single, distinct signal sample (first signal sample), and at least one second signal sample may also be a single, distinct signal sample occurring temporally after the first sample (second signal sample). In some cases, the second signal sample may occur immediately after the first signal sample or consecutively after the first signal sample. In other situations, for a given iteration, the second signal sample may be separated from the first signal sample by one or more signal samples.

[0036] In one or more examples, a processing window or sliding window may be used in determining power values ​​from input samples. For example, a first power may be determined from one or more samples or cells of the signal (at least one first signal sample) located within a first processing window of the input signal. The first processing window is advanceable or slideable, or advanceable in the signal for each iteration, to select subsequent samples for each additional determination of the first power. Furthermore, the determination of at least one second signal sample of the input signal or acquired signal may similarly use a second processing window to select one or more samples from the signal. The second processing window may contain one or more samples of the input signal, which is accompanied by at least one signal sample from the signal samples of this second window that (e.g., temporally) follows all the signal samples in the first processing window. The second processing window, like the first processing window, is advanceable or slideable for each iteration to select subsequent samples for each determination of the second power.

[0037] Repeating or performing steps 310-320 for a series of subsequent or consecutive cuts (in time) creates or generates several or more differential values ​​or power differential values. These generated differential values ​​or local power differences provide an estimate of the rate of change of the power of the input signal.

[0038] As shown in Figure 3, this method further includes detecting the presence of burst interference signals in the signal based on or using one or more determined difference values. That is, difference values ​​or a portion thereof can be used to detect the occurrence of burst interference in the acquired signal.

[0039] Determining or detecting burst interference may include determining whether each power difference value is greater than a first boundary or a first threshold. In other words, it may be determined whether each difference value is greater than a first boundary. This first boundary may be predetermined, predetermined, or set, for example, by the user. In another case, the first boundary may be set or determined dynamically, for example, based on input or specific feedback.

[0040] To detect interference, a population count can be implemented based on or using the results of determining or comparing difference values ​​with respect to a first boundary. That is, for each of the one or more signal samples under consideration, the interference detector can implement a population count mechanism. The population count mechanism can determine a quantity representing the number of difference values ​​that cross the first boundary and can determine or evaluate whether this quantity is greater than or equal to a second boundary. If this quantity is greater than the second boundary, burst interference can be considered detected for the corresponding input signal.

[0041] This quantity or number created by the population count mechanism can be determined or evaluated from the results of a decision or comparison made to a selected group of difference values ​​with respect to a first boundary. A selected group of difference values ​​that can correspond to a particular population count can be selected using a sliding window technique. The sliding window can advance or slide for each subsequent input sample that is considered or evaluated in terms of interference.

[0042] The method in Figure 3 may further include outputting a signal indicating a specific sample signal in which interference was detected or determined.

[0043] The local power difference or differential value obtained from the signal can provide an estimate of the rate of change of the signal's power. Some valid signals (e.g., uninterfering signals) may have an instantaneous rate of change that exceeds a given boundary. In contrast, interference will generally have an increasing rate of change over a long period, for example, beyond one or two samples. However, burst interference will have a rate of change below a defined boundary, for example, in at least some instances. Therefore, the use of a population count across a sliding window in the first boundary determination output can be used to eliminate gaps in both spurious detection and interference detection. The boundary for the population count (e.g., a second boundary) may be modified or adjusted depending on the determined conditions in the environment in which the signal exists.

[0044] Figure 4 shows an exemplary output for the first boundary determination described above. Each entry or data in data 410 and 430 may represent the result of a determination of whether the individually determined power difference value exceeds the (first) boundary. Data 410 can be generated from the (power) difference value from the first signal, and data 430 can be generated from the (power) difference value from the second signal. In this example, "1" represents a calculated difference value that exceeds the (first) boundary, and "0" represents a difference value that does not exceed the (first) threshold. When using such data, a population count mechanism can be implemented to determine the presence of burst interference. Population counting can be performed using a sliding window technique to determine the number or amount of determined difference values ​​that lie within a window (of a predetermined size or length) that exceeds the second boundary.

[0045] In the example in Figure 4, a sliding window of size or length 5 is used for the population count mechanism. Therefore, in this example, burst signal interference can be detected in the signal or signal sample if the number of corresponding difference values ​​within each window exceeds the first boundary and the number of the (second) boundary of 3. In some cases, such as in Figure 4, the population count for each window instance may be determined by summing up the "1"s in each window instance (e.g., 420a, 420b, 420c…). Therefore, in the case of the first data stream 410, the boundary of 3 is exceeded at least in window instances 420a, 420b, and 420c, each having a population count of 4. In other cases, the value of the (second) boundary used for population counting is variable, and in some examples, the boundary may have a low value of 1 to determine or detect the presence or occurrence of interference.

[0046] In Figure 4, some samples of the input signal corresponding to window examples 420a, 420b, and 420c may be considered to be affected by interference. In the case of data 430, the population counts in window examples 440a, 440b, and 440c are 2, 3, and 4, respectively. Therefore, some of the input signal corresponding to window 440c can be considered to be affected by burst interference, but some of the signals corresponding to window examples 440a and 440b cannot be considered to be affected by burst interference. In various examples, the sample or subsignal corresponding to the determined population count may be a specific part or sample of the signal corresponding to the difference value in the middle of the sliding window example.

[0047] Figure 5 shows exemplary code or pseudocode 500 for performing power difference value determination for an input signal and population count mechanism for a given input. In this example, Plin represents or is the power of the sampled input sample, Ns is the number of samples in Plin, param.threshold is the first boundary or power boundary, and param.pcThreshold is the population count boundary.

[0048] Figure 6 shows an exemplary interference detection system relating to at least one exemplary embodiment of the present disclosure. The interference detection system 600 may include an interference detector 610. The interference detector 610 may have the same architecture as or similar to the architecture of Figure 2, and may implement a method similar to or similar to the method described in relation to Figure 3. That is, the interference detector 610 may be designed to determine a power difference value from a sample of an input signal and to determine interference based on the value of the difference value compared to a boundary (here, for example, a population counting mechanism is used).

[0049] Additionally, system 600 may include a high-pass filter 630 and a power calculation component 620. For example, the power calculation component 620 may be a circuit configured to calculate power from a real or complex input. (The calculation can be performed, for example, as x^2 for a real signal or as |x|^2 for a complex signal). In the example in Figure 6, the input signal or acquired signal (which may or may not be processed) may be filtered by the high-pass filter 630. The high-pass filter 630, the power calculation component 620, and the interference detector 610 are implemented as hardware modules, which can significantly increase processing speed. In some embodiments, a threshold value may be set for use in the interference detector 610.

[0050] The interference detector described above improves the detection of interference bursts, where the amplitude of the interference burst is relatively low compared to the amplitude of the useful signal. To further improve the interference detection performance of the input signal undergoing burst interference while the signal itself is undergoing a gradually or continuously changing amplitude (this is caused, for example, by low-frequency components), the system in Figure 6 includes a high-pass filter 630. The high-pass filter can reduce or remove any low-frequency components from the signal that may cause the detector to miss interference.

[0051] In general, the 630 high-pass filter may be implemented digitally. In some cases, the high-pass filter may be implemented in the analog domain (e.g., before or after the input signal is digitized).

[0052] Figure 7 shows pseudocode or exemplary code for implementing an exemplary first-order high-pass filter that may be used for the high-pass filter 630. However, other types or other kinds of digital filters, including higher-order high-pass filters, may be implemented or used for the high-pass filter 630. The digital filter may be implemented by at least one circuit or signal processor, such as one or more processors that may be part of the interference detector 610.

[0053] Figure 8 shows an exemplary system relating to at least one embodiment of the present disclosure. System 800 may be used for processing, removing, or reducing interference in acquired or received signals. In this example, the signal or input signal may be any type of analog signal (e.g., an RF signal or a radar signal). This signal may first be input to an analog-to-digital converter (ADC) 810 that digitizes the signal. The digital signal produced by the ADC 810 may be transmitted or transferred as input to various other components of System 800. As shown, the digital signal is input to an interference detector 820, a sample synthesizer 830, and a coupling and swapping unit 840.

[0054] The interference detector 820 may be the interference detector described above in relation to Figure 3. Furthermore, the interference detector 820 may be implemented as an interference detection system 600, or similarly to an interference detection system 600.

[0055] System 800 includes a sample synthesizer 830. The sample synthesizer 830 may be any suitable device or circuit (e.g., including a processor) that synthesizes or creates samples based on digital signals received or acquired from the ADC 810. The sample synthesizer 830 may synthesize input signal samples based on all or a subset of the digital signal sample inputs from the ADC.

[0056] The system further includes a coupling and replacement unit 840. The coupling and replacement unit 840 can take the outputs of the ADC 810, the interference detector 820, and the sample synthesizer as inputs. The coupling and replacement unit 840 may be configured to selectively modify the digital signal received from the ADC 810. That is, the coupling and replacement unit 840 can replace a sample of the signal received from the ADC 810 with a corresponding sample created or synthesized by the synthesizer 830, based on or in response to the indication of the received output signal of the interference detector 820. The coupling and replacement unit 840 replaces a sample of the input signal, indicated by the interference detector 820 as being interfered with, with a corresponding signal sample from the sample synthesizer 830 or a concurrently created signal sample. The coupling and replacement unit 840 outputs this modified or reconstructed signal.

[0057] The coupling and replacement unit 840 can be implemented by any suitable circuit including a processor. Furthermore, the various components of system 800 can be implemented together or as separate circuits. System 800 can generate output signals in real time or near real time; that is, the use of buffers in system 800 can be avoided.

[0058] The following examples relate to further exemplary implementations.

[0059] Example 1 is a signal processing circuit comprising one or more processors. The one or more processors are configured to determine a first power of at least one first signal sample of a radar signal for one or more iterations, wherein at least one first signal sample of the radar signal is within a first processing window of the radar signal, the first processing window comprises one or more samples of the radar signal; the one or more processors are configured to determine a second power of at least one second signal sample of the radar signal, wherein at least one second signal sample is within a second processing window of the radar signal, the second processing window comprises one or more samples of the radar signal, which is accompanied by at least one of one or more signal samples of the second window that temporally follows all signal samples of the first processing window; and the one or more processors are configured to determine a difference value between the second power and the first power, wherein the one or more processors are further configured to use one or more difference values ​​from all of one or more iterations to detect the occurrence of a burst interference signal in the radar signal.

[0060] Example 2 is the same as Example 1, and here, one or more processors configured to detect burst interference signals include one or more processors that determine a quantity indicating the number of one or more differential values ​​that cross a first boundary and determine whether that quantity crosses a second boundary in order to detect the occurrence of burst interference signals in the radar signal.

[0061] Example 3 is related to Example 2, where one or more processors dynamically define the first boundary and / or the second boundary.

[0062] Example 4 is the subject of Example 2, where the first boundary and / or second boundary are predetermined.

[0063] Example 5 is subject to any one of Examples 1 through 4, and may further include a high-pass filter configured to filter radar signals.

[0064] Example 6 is subject to any one of Examples 1 through 5, where the radar signal may be a digitized radio frequency (RF) signal.

[0065] Example 7 is subject to any one of Examples 1 through 6, where at least one first signal sample in each iteration may be a single signal sample, and where at least one second signal sample in each iteration may be a single signal sample.

[0066] Example 8 is the subject of Example 7, where, for at least one iteration, the second signal sample is a sample immediately following the first signal sample.

[0067] Example 9 is subject to any one of Examples 1 through 8, where one or more iterations may include multiple iterations, where for each second or subsequent iteration, at least one first signal of the radar signal may temporally follow at least one first signal of the radar signal of the previous iteration, and / or at least one second signal of the radar signal may temporally follow at least one second signal of the radar signal of the previous iteration.

[0068] Example 10 is the subject of any one of Examples 1 through 9, and the number of iterations, one or more, may be predetermined.

[0069] Example 11 is a method for processing a digitized radar signal, the method comprising acquiring a radar signal, where, for one or more iterations, the method further comprises determining a first power of at least one first signal sample of the radar signal, determining a second power of at least one second signal sample of the radar signal, wherein the second signal sample is temporally subsequent to at least one first signal sample, and determining a difference value between the second power and the first power, where the method further comprises detecting the occurrence of a burst interference signal in the radar signal based on one or more difference values ​​from all of one or more iterations.

[0070] Example 12 is related to Example 11, and here, detecting the occurrence of a burst interference signal in the radar signal may further include determining a quantity that indicates the number of one or more difference values ​​that exceed a first boundary, and determining whether that quantity exceeds a second boundary in order to detect that a burst interference signal has occurred in the radar signal.

[0071] Example 13 is subject to Example 12 and may further include setting a first boundary and / or a second boundary.

[0072] Example 14 is the subject of Example 12, where the first boundary and / or second boundary are predetermined.

[0073] Example 15 is subject to any one of the examples from Examples 11 to 14, which may further include applying a high-pass filter to the first radar signal, where acquiring the radar signal includes acquiring the first radar signal after applying the high-pass filter.

[0074] Example 16 is subject to any one of Examples 11 through 15, where the radar signal may be a digitized radio frequency (RF) signal.

[0075] Example 17 is subject to any one of Examples 11 through 16, where at least one first signal sample in each iteration may be a single sample, and where at least one second signal sample in each iteration may be a single sample.

[0076] Example 18 is related to Example 17, where, for at least one iteration, the second signal sample may be a signal sample immediately following the first signal sample.

[0077] Example 19 is subject to any one of Examples 11 through 18, where one or more iterations may be multiple iterations, where for each second or subsequent iteration, at least one first signal of the radar signal temporally follows at least one first signal of the radar signal in the previous iteration, and / or at least one second signal of the radar signal temporally follows at least one second signal of the radar signal in the previous iteration.

[0078] Example 20 is subject to any one of Examples 11 through 19, and this method may further involve setting the number of iterations, one or more times.

[0079] Example 21 is a non-temporary computer-readable medium which, when executed by at least one processor, includes instructions that cause at least one processor to do the following: for one or more iterations, determine a first power of at least one first signal sample of a radar signal, where at least one first signal sample of the radar signal is within a first processing window of the radar signal, the first processing window includes one or more samples or radar signals; determine a second power of at least one second signal sample of the radar signal, where at least one second signal sample is within a second processing window of the radar signal, the second processing window includes one or more samples of the radar signal, where this includes at least one of one or more signal samples from the second window that temporally follows all the signal samples in the first processing window; and determine a difference value between the second power and the first power, where these instructions, when executed, further cause at least one processor to detect the occurrence of a burst interference signal in the radar signal using one or more difference values ​​from all of one or more iterations.

[0080] Example 22 is a follow-up to Example 21, where at least one processor for detecting burst interference signals includes at least one processor that determines a quantity indicating the number of one or more differential values ​​that cross a first boundary and determines whether that quantity crosses a second boundary in order to detect the occurrence of burst interference signals in the radar signal.

[0081] Example 23 is a device comprising an interference detector including a signal processing circuit, the signal processing circuit further comprising one or more processors, the one or more processors configured to determine a first power of at least one first signal sample of a radar signal for one or more iterations, the at least one first signal sample of the radar signal being within a first processing window of the radar signal, the first processing window comprising one or more samples or radar signals, the one or more processors configured to determine a second power of at least one second signal sample of the radar signal being within a second processing window of the radar signal, the second processing window comprising one or more samples of the radar signal, the time of all signal samples in the first processing window Intermittently following, with at least one of one or more signal samples from a second window, one or more processors are configured to determine a difference value between the second power and the first power, wherein one or more processors are further configured to detect the occurrence of a burst interference signal in the radar signal using one or more difference values ​​from all of one or more iterations, wherein the device further includes a sample synthesizer, which is configured to synthesize one or more synthesized samples from the radar signal, wherein the device further includes coupling and swapping circuits, which are configured to swap one or more interfered samples with each synthesized sample in response to an interference detector that detects a burst interference signal occurring in the radar signal in order to create a modified radar signal.

[0082] Example 24 is the device of Example 23, which may further include an analog-to-digital converter (ADC) configured to receive a first analog radar signal and provide the radar signal as a digital signal to one or more processors.

[0083] Example 25 is a signal processing circuit which includes at least one processor configured to acquire a digitized radar signal and further configured to determine a first power of at least one first signal sample of the radar signal for one or more iterations, and to determine a second power of at least one second signal sample of the radar signal, the second signal sample being temporally subsequent to at least one first signal sample, and to determine a difference value between the second power and the first power, wherein this at least one processor is further configured to detect burst interference signals occurring in the radar signal based on one or more difference values ​​from all of one or more iterations.

[0084] Example 26 is a relation to Example 25, where at least one processor configured to detect burst interference signals may include at least one processor that determines a quantity indicating the number of one or more differential values ​​that cross a first boundary and determines whether that quantity crosses a second boundary in order to detect the occurrence of burst interference signals in the radar signal.

[0085] The above examples may be combined together or combined with other aspects of the disclosure.

[0086] While the present invention has been specifically shown and described with reference to certain embodiments, those skilled in the art will understand that various modifications of form and detail can be made therein without departing from the spirit and scope of the invention, as defined by the appended claims. Accordingly, the scope of the invention is defined by the appended claims, and therefore, all modifications that fall within the meaning and equivalent scope of the claims are intended to be encompassed.

Claims

1. A signal processing circuit, The signal processing circuitry includes one or more processors, the one or more processors performing, for one or more iterations: configured to determine a first power of at least one first signal sample of a radar signal, the at least one first signal sample of the radar signal being within a first processing window of the radar signal, the first processing window including one or more samples of the radar signal; configured to determine a second power of at least one second signal sample of the radar signal, the at least one second signal sample being within a second processing window of the radar signal, the second processing window including one or more samples of the radar signal, with at least one of the one or more signal samples of the second processing window succeeding in time all signal samples of the first processing window; configured to determine a difference value between the second power and the first power; the one or more processors are further configured to detect occurrences of burst interference signals in the radar signal using one or more of the difference values ​​from all of the one or more iterations. Signal processing circuit.

2. The one or more processors configured to detect the burst interference signal: determining a quantity indicative of the number of said one or more difference values ​​that exceed a first boundary; the one or more processors configured to determine whether the amount exceeds a second boundary to detect the occurrence of the burst interference signal in the radar signal.

2. The signal processing circuit according to claim 1.

3. the one or more processors dynamically define the first boundary and / or the second boundary; 3. The signal processing circuit according to claim 2.

4. the first boundary and / or the second boundary are predefined; 3. The signal processing circuit according to claim 2.

5. the signal processing circuit further includes a high-pass filter configured to filter the radar signal; 5. A signal processing circuit according to claim 1.

6. the radar signal is a digitized radio frequency (RF) signal; 6. A signal processing circuit according to any one of claims 1 to 5.

7. the at least one first signal sample in each iteration is a single signal sample, and the at least one second signal sample in each iteration is a single signal sample.

7. A signal processing circuit according to any one of claims 1 to 6.

8. for at least one of the iterations, the second signal sample is the sample immediately consecutive to the first signal sample.

8. The signal processing circuit according to claim 7.

9. the one or more iterations are multiple iterations, and for each second or subsequent iteration, the at least one first signal of the radar signals follows in time the at least one first signal of the radar signals of a previous iteration, and / or the at least one second signal of the radar signals follows in time the at least one second signal of the radar signals of a previous iteration; 9. A signal processing circuit according to any one of claims 1 to 8.

10. the number of said one or more iterations is predetermined; 10. A signal processing circuit according to any one of claims 1 to 9.

11. 1. A method for processing a digitized radar signal, the method comprising: acquiring a radar signal; For one or more iterations, the method comprises: determining a first power of at least one first signal sample of the radar signal; determining a second power of at least one second signal sample of the radar signal, the second signal sample following in time the at least one first signal sample; determining a difference value between the second power and the first power; The method further includes detecting an occurrence of a burst interfering signal in the radar signal based on one or more of the difference values ​​from all of the one or more iterations. method.

12. Detecting the occurrence of the burst interference signal in the radar signal further comprises: determining a quantity indicative of the number of said one or more difference values ​​that exceed a first boundary; determining whether the amount exceeds a second boundary to detect the occurrence of the burst interfering signal within the radar signal; Contains, The method of claim 11.

13. The method further includes setting the first boundary and / or the second boundary.

13. The method of claim 12.

14. predefining the first boundary and / or the second boundary; 13. The method of claim 12.

15. The method further includes applying a high pass filter to the first radar signal; acquiring the radar signal includes acquiring the first radar signal after applying the high-pass filter.

15. The method according to any one of claims 11 to 14.

16. the radar signal is a digitized radio frequency (RF) signal; 16. The method according to any one of claims 11 to 15.

17. the at least one first signal sample in each iteration is a single sample, and the at least one second signal sample in each iteration is a single sample.

17. The method according to any one of claims 11 to 16.

18. for at least one of the iterations, the second signal sample is the signal sample immediately consecutive to the first signal sample.

18. The method of claim 17.

19. the one or more iterations are multiple iterations, and for each second or subsequent iteration, the at least one first signal of the radar signals follows in time the at least one first signal of the radar signals of a previous iteration, and / or the at least one second signal of the radar signals follows in time the at least one second signal of the radar signals of a previous iteration; 19. The method according to any one of claims 11 to 18.

20. The method further includes setting a number of the one or more iterations.

20. The method of any one of claims 11 to 19.

21. A non-transitory computer-readable medium containing instructions, The instructions, when executed by at least one processor, cause the at least one processor to: For one or more iterations, determining a first power of at least one first signal sample of a radar signal, the at least one first signal sample of the radar signal being within a first processing window of the radar signal, the first processing window including one or more samples of the radar signal; determining a second power of at least one second signal sample of the radar signal, the at least one second signal sample being within a second processing window of the radar signal, the second processing window including one or more samples of the radar signal, with at least one of the one or more signal samples of the second processing window succeeding in time all signal samples of the first processing window; determining a difference value between the second power and the first power; The instructions, when executed, further cause the at least one processor to detect occurrences of burst interference signals in the radar signal using one or more of the difference values ​​from all of the one or more iterations. Non-transitory computer-readable medium.

22. The at least one processor that detects the burst interference signal: determining a quantity indicative of the number of said one or more difference values ​​that exceed a first boundary; and determining whether the amount exceeds a second boundary to detect the occurrence of the burst interference signal in the radar signal.

22. The non-transitory computer-readable medium of claim 21.

23. 1. A device including an interference detector including a signal processing circuit, the signal processing circuit comprising: one or more processors, the one or more processors performing, for one or more iterations: configured to determine a first power of at least one first signal sample of a radar signal, the at least one first signal sample of the radar signal being within a first processing window of the radar signal, the first processing window including one or more samples of the radar signal; configured to determine a second power of at least one second signal sample of the radar signal, the at least one second signal sample being within a second processing window of the radar signal, the second processing window including one or more samples of the radar signal, with at least one of the one or more signal samples of the second processing window succeeding in time all signal samples of the first processing window; configured to determine a difference value between the second power and the first power; the one or more processors are further configured to use one or more of the difference values ​​from all of the one or more iterations to detect occurrences of burst interference signals in the radar signal; The device further comprises: a sample synthesizer configured to synthesize one or more synthesized samples from the radar signal; a combining and switching circuit configured to replace one or more of the interfered samples with each of the synthesized samples in response to an interference detector detecting a burst interfering signal occurring in the radar signal to create a modified radar signal; device.

24. the device further includes an analog-to-digital converter (ADC) configured to receive a first analog radar signal and provide the radar signal to the one or more processors as a digital signal.

24. The device of claim 23.

25. A signal processing circuit, The signal processing circuit includes at least one processor configured to acquire a digitized radar signal, and further configured to, for one or more iterations: configured to determine a first power of at least one first signal sample of the radar signal; configured to determine a second power of at least one second signal sample of the radar signal, the second signal sample temporally succeeding the at least one first signal sample; configured to determine a difference value between the second power and the first power; the at least one processor is further configured to detect a burst interfering signal occurring within the radar signal based on one or more of the difference values ​​from all of the one or more iterations. Signal processing circuit.

26. The at least one processor configured to detect the burst interference signal: determining a quantity indicative of the number of said one or more difference values ​​that exceed a first boundary; and determining whether the amount exceeds a second boundary to detect the occurrence of the burst interference signal in the radar signal.

26. The signal processing circuit according to claim 25.

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