Conversion Adapter and Ultrasonic Diagnostic Apparatus

Abstract

To make it possible to read a probe ID implemented using a hard wire while reducing the number of terminals of a device side connector.SOLUTION: A conversion adapter comprises a first connector, a second connector, a conversion unit, an acquisition unit, and an output unit. The first connector is connected to an ultrasound probe. The second connector is connected to a device side connector of an ultrasound diagnostic device body. The conversion unit receives, from the first connector, a probe ID output from a hard wired circuit of the ultrasound probe and associates the probe ID with an address to convert it into a memory format. When a read request designating the address of the probe ID is input from the device side connector via the second connector, the acquisition unit acquires the probe ID from the memory format on the basis of the read request. The output unit outputs the acquired probe ID from the second connector to the device side connector.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] Embodiments of the present invention relate to a conversion adapter and an ultrasonic diagnostic apparatus.

Background Art

[0002] An ultrasonic probe has a probe identifier (identification data: hereinafter referred to as ID) representing information unique to the ultrasonic probe, such as various characteristics of the probe and a driving method, and is connected via a probe connector to a device-side connector of an ultrasonic diagnostic apparatus main body. The ultrasonic diagnostic apparatus identifies the ultrasonic probe by recognizing the probe ID in the ultrasonic probe via each connector.

[0003] Here, the ultrasonic probe has a plurality of hard wires (hereinafter referred to as HW) for causing the ultrasonic diagnostic apparatus to recognize the probe ID in the probe connector. Here, each of the plurality of HWs represents a binary signal by being open or grounded. Each binary signal represents each bit of the probe ID and is read into the ultrasonic diagnostic apparatus via the probe connector and the device-side connector. Therefore, the probe ID corresponding to the combination of these binary signals is recognized by the ultrasonic diagnostic apparatus.

[0004] On the other hand, instead of HW, there is an ultrasonic probe having a memory for storing the probe ID. In this ultrasonic probe, the probe ID in the memory is read and recognized by the ultrasonic diagnostic apparatus via the probe connector and the device-side connector.

[0005] Therefore, if the ultrasound probe implements the probe ID in hardware, the device-side connector will require many terminals. Conversely, if the ultrasound probe stores the probe ID in memory, the number of terminals on the device-side connector can be reduced, but the probe ID implemented in hardware will become unreadable. Furthermore, if the ultrasound diagnostic device is designed to allow connection of both hardware-implemented and memory-implemented ultrasound probes to the device-side connector, the device-side connector will require many terminals. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2014-050674 [Overview of the Initiative] [Problems that the invention aims to solve]

[0007] One of the problems that the embodiments disclosed in this specification and drawings aim to solve is to enable reading of hardwired probe IDs while reducing the number of terminals on the device-side connector.

[0008] However, the problems that the embodiments disclosed in this specification and drawings aim to solve are not limited to those described above. Problems corresponding to the effects of each configuration shown in the embodiments described later can also be positioned as other problems. [Means for solving the problem]

[0009] The conversion adapter according to the embodiment comprises a first connector, a second connector, a conversion unit, an acquisition unit, and an output unit. The first connector is connected to an ultrasound probe. The second connector is connected to a device-side connector on the ultrasound diagnostic device body. If the ultrasound probe has a hardwired circuit that outputs a probe ID, the conversion unit receives the output probe ID from the first connector and converts the probe ID into a memory format by associating it with an address. When a read request specifying the address of the probe ID is input from the device-side connector via the second connector, the acquisition unit acquires the probe ID from the memory format based on the read request. The output unit outputs the acquired probe ID from the second connector to the device-side connector. [Brief explanation of the drawing]

[0010] [Figure 1] Figure 1 is a block diagram showing an example configuration of an ultrasound diagnostic apparatus equipped with a conversion adapter according to the first embodiment. [Figure 2] Figure 2 is a block diagram showing an example of a conversion adapter and its peripheral configuration according to the first embodiment. [Figure 3] Figure 3 is a schematic diagram illustrating the memory format according to the first embodiment. [Figure 4] Figure 4 is a time chart illustrating the operation in the first embodiment. [Figure 5] Figure 5 is a time chart illustrating the operation in the first embodiment. [Figure 6] Figure 6 is a block diagram showing an example of a conversion adapter and its peripheral configuration according to the second embodiment. [Figure 7] Figure 7 is a schematic diagram illustrating the IDPROM according to the second embodiment. [Figure 8] Figure 8 is a time chart illustrating the operation in the second embodiment. [Figure 9] Figure 9 is a block diagram showing an example of a conversion adapter and its peripheral configuration according to the third embodiment. [Figure 10] Figure 10 is a flowchart illustrating the operation in the third embodiment. [Figure 11] Figure 11 is a block diagram showing an example of a conversion adapter and its peripheral configuration according to the fourth embodiment. [Figure 12] Figure 12 is a block diagram showing an example of a conversion adapter and its peripheral configuration according to the fifth embodiment. [Figure 13] Figure 13 is a flowchart illustrating the operation in the fifth embodiment. [Modes for carrying out the invention]

[0011] The following describes each embodiment with reference to the drawings. In each embodiment, parts similar to those in the preceding drawings are denoted by the same reference numerals, and their detailed descriptions are omitted. The main differences will be described.

[0012] <First Embodiment> Figure 1 is a block diagram showing an example configuration of an ultrasound diagnostic apparatus equipped with a conversion adapter according to the first embodiment, and Figure 2 is a block diagram showing an example configuration of the conversion adapter and its surrounding components. The ultrasound diagnostic apparatus 1 in Figure 1 comprises a main unit 100, ultrasound probes 101A, 101B, and 101C, and conversion adapters 200A, 200B, and 200C that connect the two. Specifically, the conversion adapters 200A, 200B, and 200C are detachably connected to the probe connectors PC_A, PC_B, and PC_C on the ultrasound probes 101A, 101B, and 101C, and to the device-side connectors C_A, C_B, and C_C on the main unit 100, respectively. The main unit 100 is connected to an input device 102 and an output device 103. The main unit 100 is also connected to an external device 104 via a network NW. The external device 104 is, for example, a server equipped with PACS (Picture Archiving and Communication Systems). The main unit 100 of the device may also be called the main unit of the ultrasound diagnostic device.

[0013] Since the ultrasonic probes 101A, 101B, and 101C have the same block configuration, the ultrasonic probe 101A will be described below as a representative example. Similarly, for the conversion adapters 200A, 200B, and 200C described later, the conversion adapter 200A will be described as a representative example.

[0014] Here, the ultrasonic probe 101A includes a plurality of elements that transmit ultrasonic signals and receive reflected wave signals from a subject or the air, and is connected to a device main body 100 that can generate an ultrasonic image based on the outputs of the plurality of elements. The ultrasonic probe 101A, for example, performs an ultrasonic scan on a scan region within a living subject P in accordance with control from the device main body 100. The ultrasonic probe 101A, for example, has a plurality of piezoelectric vibrators, a matching layer provided between the plurality of piezoelectric vibrators and a case, and a backing material that prevents the propagation of ultrasonic waves backward in the radial direction from the plurality of piezoelectric vibrators. The ultrasonic probe 101A is, for example, a one-dimensional array linear probe in which a plurality of ultrasonic vibrators are arranged along a predetermined direction. Buttons may be arranged on the ultrasonic probe 101A for operations such as offset processing and an operation (freeze operation) to freeze the ultrasonic image. Note that the ultrasonic probe 101A may be, for example, a two-dimensional array probe in which a plurality of ultrasonic vibrators are arranged along a first element arrangement direction (elevation direction) and a second element arrangement direction (azimuth direction).

[0015] The plurality of piezoelectric vibrators generate ultrasonic waves based on a drive signal supplied from an ultrasonic transmission circuit 110, which will be described later, that the apparatus main body 100 has. Thereby, ultrasonic waves are transmitted from the ultrasonic probe - 101A to the subject P. When ultrasonic waves are transmitted from the ultrasonic probe - 101A to the subject P, the transmitted ultrasonic waves are successively reflected at the discontinuous surfaces of the acoustic impedance in the body tissue of the subject P and are received by the plurality of piezoelectric vibrators as reflected wave signals. The amplitude of the received reflected wave signal depends on the difference in acoustic impedance at the discontinuous surface where the ultrasonic wave is reflected. Further, when the transmitted ultrasonic pulse is reflected at the surface of a moving blood flow or a heart wall or the like, the reflected wave signal is subject to a frequency shift depending on the velocity component in the ultrasonic transmission direction of the moving object due to the Doppler effect. The ultrasonic probe - 101A receives the reflected wave signal from the subject P and converts it into an electrical signal.

[0016] Also, as shown in FIG. 2, the ultrasonic probe - 101A has a HW_ID circuit - 105, which is a hard-wired circuit that outputs a probe ID, and a probe connector PC_A that is detachably connected to a first connector - 201A that the conversion adapter - 200A has. The HW_ID circuit - 105 has a plurality of hard wires that output each bit of the probe ID in parallel. Each of the plurality of hard wires represents a binary signal corresponding to each bit of the probe ID by being open or grounded. Thereby, the HW_ID circuit - 105 outputs each bit of the probe ID in parallel from each terminal of the probe connector PC_A. Here, the probe ID represents information unique to the ultrasonic probe, such as various characteristics of the probe and the driving method, and is information corresponding to the model number. Therefore, in the case of the probe ID, unlike the probe manufacturing number, there may be a situation where the same probe ID is output from a plurality of ultrasonic probes connected to the apparatus main body 100.

[0017] The probe connector PC_A includes terminals for transmitting the aforementioned ultrasonic signal and reflected wave signal, terminals for operation signals to notify the operation of the aforementioned buttons, terminals for connection detection signals to detect the connection of the ultrasonic probe 101A, and terminals for outputting the probe ID. However, the terminals for operation signals are not mandatory and may be omitted. Furthermore, the probe connector PC_A in Figure 2 has a number of terminals corresponding to the number of bits in the probe ID for outputting the probe ID. The probe connector PC_A is detachably connected to the first connector 201A of the conversion adapter 200A.

[0018] Figure 1 illustrates the connection relationship between the three ultrasound probes 101A to 101C and the main unit 100. However, it is possible to connect any number of ultrasound probes, not just three, to the main unit 100. Which of the connected ultrasound probes to be used for ultrasound scanning can be arbitrarily selected, for example, by using the software buttons on the touch panel corresponding to each probe ID.

[0019] The main unit 100 is a device that generates an ultrasonic image based on a reflected wave signal received by one of the ultrasonic probes 101A to 101C. The main unit 100 includes an ultrasonic transmitting circuit 110, a switch 115, an ultrasonic receiving circuit 120, an internal storage circuit 130, an image memory 140, an input interface 150, an output interface 160, a communication interface 170, memory interface circuits 171A, 171B, 171C, a processing circuit 180, and device-side connectors C_A, C_B, C_C. Since the device-side connectors C_A, C_B, and C_C have the same configuration, the following explanation will use device-side connector C_A as a representative example.

[0020] Here, the ultrasonic transmission circuit 110 is a processor that supplies a drive signal to the ultrasonic probe 101A via the switch 115, the device-side connector C_A, and the conversion adapter 200A. The ultrasonic transmission circuit 110 is implemented by, for example, a trigger generation circuit, a delay circuit, and a pulser circuit. The trigger generation circuit repeatedly generates rate pulses at a predetermined rate frequency to form the transmitted ultrasonic waves. The delay circuit provides a delay time for each of the multiple piezoelectric transducers necessary to focus the ultrasonic waves generated from the ultrasonic probe into a beam shape and determine the transmission directivity, to each rate pulse generated by the trigger generation circuit. The pulser circuit applies a drive signal (drive pulse) to the multiple ultrasonic transducers provided on the ultrasonic probe 101A at a timing based on the rate pulse. By changing the delay time provided to each rate pulse by the delay circuit, the transmission direction from the surface of the multiple piezoelectric transducers can be arbitrarily adjusted.

[0021] Furthermore, the ultrasonic transmission circuit 110 can arbitrarily change the output intensity of the ultrasound using a drive signal. In an ultrasound diagnostic device, increasing the output intensity can reduce the effect of ultrasound attenuation within the subject P. By reducing the effect of ultrasound attenuation, the ultrasound diagnostic device can acquire a reflected wave signal with a high signal-to-noise ratio during reception.

[0022] Generally, when ultrasound propagates within a subject P, the intensity of the ultrasound vibrations (also called acoustic power), which corresponds to the output intensity, attenuates. This attenuation of acoustic power occurs through absorption, scattering, and reflection. The degree of decrease in acoustic power also depends on the frequency of the ultrasound and the distance in the direction of ultrasound radiation. For example, increasing the frequency of the ultrasound increases the degree of attenuation. Also, the longer the distance in the direction of ultrasound radiation, the greater the degree of attenuation.

[0023] The switch 115 is controlled by the processing circuit 180 to switch the connection between the ultrasonic transmitting circuit 110 and the ultrasonic receiving circuit 120 and one of the device-side connectors C_A to C_C.

[0024] The ultrasonic receiving circuit 120 is a processor that acquires the reflected wave signal received by the ultrasonic probe 101A via the conversion adapter 200A, the device-side connector C_A, and the switch 115, performs various processing on the reflected wave signal, and generates a received signal. The ultrasonic receiving circuit 120 generates a received signal for the ultrasonic reflected wave signal acquired from the ultrasonic probe 101A via the conversion adapter 200A, the device-side connector C_A, and the switch 115. Specifically, the ultrasonic receiving circuit 120 is implemented by, for example, a preamplifier, an A / D converter, a demodulator, and a beamformer. The preamplifier amplifies the reflected wave signal received by the ultrasonic probe 101A for each channel and performs gain correction processing. The A / D converter converts the gain-corrected reflected wave signal into a digital signal. The demodulator demodulates the digital signal. The beamformer, for example, gives the demodulated digital signal a delay time necessary to determine the receiving directivity and adds up multiple digital signals to which the delay time has been given. The beamformer's additive processing generates a received signal in which the reflected component from the direction corresponding to the receiving directivity is emphasized.

[0025] The internal memory circuit 130 has a storage medium that can be read by the processor, such as a magnetic storage medium, an optical storage medium, or a semiconductor memory. The internal memory circuit 130 stores a program for realizing ultrasound transmission and reception, a program for realizing each function of the processing circuit 180, and various data. The program and various data may be pre-stored in the internal memory circuit 130, for example. Alternatively, the program and various data may be stored and distributed on a non-transient storage medium, for example, and read from the non-transient storage medium and installed in the internal memory circuit 130. The internal memory circuit 130 also stores B-mode image data, contrast-enhanced image data, and blood flow image data generated by the processing circuit 180 according to operations input via the input interface 150. The internal memory circuit 130 can also transfer the stored image data to an external device 104, etc., via the communication interface 170.

[0026] The internal memory circuit 130 may also be a drive device that reads and writes various information to and from a portable storage medium such as a CD drive, DVD drive, and flash memory. The internal memory circuit 130 can also write the stored data to the portable storage medium and store the data in the external device 104 via the portable storage medium.

[0027] The image memory 140 has a storage medium that can be read by the processor, such as a magnetic storage medium, an optical storage medium, or a semiconductor memory. The image memory 140 stores image data corresponding to multiple frames immediately preceding the freeze operation, which are input via the input interface 150. The image data stored in the image memory 140 is displayed, for example, in a continuous display (cine display).

[0028] The internal memory circuit 130 and the image memory 140 do not necessarily have to be implemented by independent storage devices. The internal memory circuit 130 and the image memory 140 may be implemented by a single storage device. Alternatively, the internal memory circuit 130 and the image memory 140 may each be implemented by multiple storage devices.

[0029] The input interface 150 receives various instructions from the operator via the input device 102. The input device 102 includes, for example, a mouse, keyboard, panel switch, slider switch, trackball, rotary encoder, control panel, and touch command screen (TCS). The input interface 150 is connected to the processing circuit 180, for example via a bus, and converts the operation instructions input by the operator into electrical signals and outputs the electrical signals to the processing circuit 180. Note that the input interface 150 is not limited to those connected to physical operating components such as a mouse and keyboard. For example, a circuit that receives electrical signals corresponding to operation instructions input from an external input device provided separately from the ultrasound diagnostic device 1 and outputs these electrical signals to the processing circuit 180 is also included as an example of an input interface.

[0030] The output interface 160 is an interface for outputting electrical signals from, for example, the processing circuit 180 to the output device 103. The output device 103 is any display such as a liquid crystal display, organic EL display, LED display, plasma display, or CRT display. The output device 103 may also be a touch panel display that also functions as the input device 102. In addition to the display, the output device 103 may further include a speaker for outputting sound. The output interface 160 is connected to the processing circuit 180, for example, via a bus, and outputs electrical signals from the processing circuit 180 to the output device 103.

[0031] The communication interface 170 is connected to an external device 104, for example, via a network NW, and performs data communication with the external device 104.

[0032] Since the memory interface circuits 171A, 171B, and 171C have the same configuration, the memory interface circuit 171A will be used as a representative example in the following explanation.

[0033] The memory interface circuit 171A is controlled by the processing circuit 180 and performs memory access to the ultrasonic probe 101A via the device-side connector C_A and the conversion adapter 200A. For example, the memory interface circuit 171A reads the probe ID from the ultrasonic probe 101A via the conversion adapter 200A by outputting a read request specifying the address of the probe ID from the device-side connector C_A. Such a memory interface circuit 171A includes, for example, a processor and memory (not shown). In this specification, the memory interface circuit 171A is provided as an I2C master I / F circuit implemented according to the specifications of the I2C (Inter-Integrated Circuit) serial interface. However, the memory interface circuit 171A is not limited to I2C.

[0034] The device-side connector C_A is provided on the device body 100 and is detachably connected to the second connector 202A of the conversion adapter 200A. The device-side connector C_A has terminals for transmitting ultrasonic signals and reflected wave signals, terminals for operation signals to notify button operation, terminals for connection detection signals to detect the connection of the ultrasonic probe 101A, and terminals to output the probe ID. However, the terminals for operation signals are not mandatory and may be omitted. Furthermore, since the device-side connector C_A outputs the probe ID to the second connector 202A via serial communication, the number of terminals to which the probe ID is output only needs to be the number of terminals for serial communication (e.g., 2-3). For this reason, the number of terminals on the device-side connector C_A is less than the number of terminals on the first connector 201A of the conversion adapter 200A. The first connector 201A has a number of terminals corresponding to the number of bits in the probe ID, with each bit of the probe ID being output in parallel from the HW_ID circuit 105. For example, if each character of the model number corresponding to the probe ID is 8 bits (= 1 byte), then 8 bits × the number of characters in the model number is required.

[0035] The processing circuit 180 is, for example, a processor that functions as the central hub of the ultrasound diagnostic device 1. The processing circuit 180 realizes the functions corresponding to the program by executing the program stored in the internal memory circuit 130. The processing circuit 180 has, for example, a B-mode processing function 181, a Doppler processing function 182, an image generation function 183, a display control function 184, and a system control function 185. In Figure 1, it is explained that each function is realized by a single processing circuit 180, but it is also possible to configure a processing circuit by combining multiple independent processors, and each processor realizes each function by executing a program. Furthermore, the B-mode processing function 181, the Doppler processing function 182, the image generation function 183, the display control function 184, and the system control function 185 may also be called the B-mode processing circuit, the Doppler processing circuit, the image generation circuit, the display control circuit, and the system control circuit, respectively, and may be implemented as individual hardware circuits.

[0036] The B-mode processing function 181 is a function that generates B-mode data based on the received signal from the ultrasonic receiving circuit 120. In the B-mode processing function 181, the processing circuit 180 performs, for example, envelope detection processing and logarithmic compression processing on the received signal from the ultrasonic receiving circuit 120 to generate data (B-mode data) in which the signal strength is expressed as brightness. The generated B-mode data is stored as B-mode RAW data on a two-dimensional ultrasonic scan line (raster) in a RAW data memory (not shown).

[0037] The Doppler processing function 182 is a function that generates data (Doppler information) by performing frequency analysis on the received signal received from the ultrasonic receiving circuit 120, thereby extracting motion information based on the Doppler effect of moving objects within the ROI (Region of Interest) set in the scan area. The generated Doppler information is stored as Doppler RAW data (also referred to as Doppler data) on a two-dimensional ultrasonic scan line in a RAW data memory (not shown).

[0038] Specifically, the processing circuit 180 uses the Doppler processing function 182 to estimate, for example, the average velocity, average variance, and average power value as motion information of a moving object at each of multiple sample points, and generates Doppler data showing the estimated motion information. The moving object may be, for example, blood flow, tissue such as the heart wall, or contrast agent.

[0039] The image generation function 183 generates B-mode image data based on the data generated by the B-mode processing function 181. For example, in the image generation function 183, the processing circuit 180 converts the scan line signal sequence of the ultrasound scan into a scan line signal sequence of a video format, such as that used in televisions (scan conversion), and generates image data for display (image data for display). Specifically, the processing circuit 180 generates two-dimensional B-mode image data (also called ultrasound image data) composed of pixels by performing a RAW-to-pixel conversion on the B-mode RAW data stored in the RAW data memory, for example, a coordinate transformation according to the ultrasound scanning pattern by the ultrasound probe 101A. In other words, the processing circuit 180 generates multiple ultrasound images (medical images) corresponding to multiple consecutive frames by transmitting and receiving ultrasound through the image generation function 183.

[0040] Furthermore, the processing circuit 180 generates Doppler image data in which blood flow information is visualized by, for example, performing a RAW-to-pixel conversion on Doppler RAW data stored in the RAW data memory. The Doppler image data is average velocity image data, variance image data, power image data, or image data that combines these. The processing circuit 180 generates color Doppler image data in which blood flow information is displayed in color, and Doppler image data in which a single blood flow information is displayed in grayscale as a waveform.

[0041] The display control function 184 is a function that displays images based on various ultrasound image data generated by the image generation function 183 on the display, which serves as the output device 103. The display may also be called the display unit. Specifically, for example, the processing circuit 180 controls the display of images based on B-mode image data, Doppler image data, or image data including both, generated by the image generation function 183, via the display control function 184. In addition, the processing circuit 180 in the display control function 184 receives instructions for selecting various display modes, for example, via the input interface 150. Various display modes include, for example, display modes for reading and confirming probe IDs, display modes for selecting ultrasound probes 101A to 101C, and ultrasound image display modes.

[0042] More specifically, the processing circuit 180, using the display control function 184, converts, for example, the scan line signal sequence of an ultrasonic scan into a scan line signal sequence of a video format such as that used in televisions (scan conversion), and generates display image data. The processing circuit 180 may also perform various processing on the display image data, such as dynamic range, brightness, contrast, gamma curve correction, and RGB conversion. The processing circuit 180 may also add ancillary information to the display image data, such as character information for various parameters, scales, and body marks. Furthermore, the processing circuit 180 may generate a user interface (GUI: Graphical User Interface) for the operator to input various instructions using an input device, and display the GUI on the display.

[0043] The system control function 185 is a function that comprehensively controls the operation of the entire ultrasound diagnostic device 1. For example, in the system control function 185, the processing circuit 180 outputs a read request from the device-side connector C_A via the memory interface circuit 171A. The processing circuit 180 also recognizes the ultrasound probe 101A based on the probe ID read by the read request. The processing circuit 180 also controls the switching of the switch 115 according to the selected ultrasound probe 101A, and controls the ultrasound transmission circuit 110 and the ultrasound reception circuit 120 based on parameters related to the transmission and reception of ultrasound to the ultrasound probe 101A. In addition, in the system control function 185, the processing circuit 180 accepts selection instructions for various imaging modes, for example, via the input interface 150. Various imaging modes include, for example, B-mode, Doppler mode, elastography mode, etc.

[0044] On the other hand, as mentioned above, the 200A, 200B, and 200C adapters have the same block configuration, so the 200A adapter will be used as a representative example in the following description.

[0045] As shown in Figure 2, the conversion adapter 200A includes a first connector 201A, a second connector 202A, and an internal I / F circuit 210.

[0046] The first connector 201A is connected to the ultrasonic probe 101A. Specifically, for example, the first connector 201A is detachably connected to the probe connector PC_A of the ultrasonic probe 101A. The first connector 201A has terminals for transmitting ultrasonic signals and reflected wave signals, terminals for operation signals that notify the operation of the aforementioned buttons, terminals for connection detection signals that detect the connection of the ultrasonic probe 101A, and terminals to which the probe ID is output. However, the terminals for operation signals are not mandatory and may be omitted. Also, the first connector 201A in Figure 2 has a number of terminals corresponding to the number of bits in the probe ID, with each bit of the probe ID being output in parallel from the HW_ID circuit 105. The probe ID represents ultrasonic probe-specific information such as various characteristics and driving methods of the probe, and is equivalent to the model number. For this reason, the number of bits in the probe ID is 8 bits × the number of characters in the model number, for example, if each character of the model number is 8 bits (= 1 byte).

[0047] The second connector 202A is connected to the device-side connector C_A of the device body 100. Specifically, for example, the second connector 202A is detachably connected to the device-side connector C_A. The second connector 202A also includes terminals for transmitting ultrasonic signals and reflected wave signals, terminals for operation signals to notify button operation, terminals for connection detection signals to detect the connection of the ultrasonic probe 101A, and terminals to output the probe ID. However, the terminals for operation signals are not mandatory and may be omitted. Furthermore, since the second connector 202A outputs the probe ID to the device-side connector C_A via serial communication, the number of terminals to which the probe ID is output only needs to be the number of terminals for serial communication (e.g., 2-3). For this reason, the number of terminals on the second connector 202A is less than the number of terminals on the first connector 201A.

[0048] The adapter's internal I / F circuit 210 is controlled by the memory interface circuit 171A via the second connector 202A and the device-side connector C_A, and has a processor and memory that function as the central hub of the conversion adapter 200A. The adapter's internal I / F circuit 210 implements the functions corresponding to the program stored in the memory by executing the program. However, it is not limited to this, and instead of executing the program, the adapter's internal I / F circuit 210 may directly incorporate the functions as logic circuits within the processor's circuitry. The adapter's internal I / F circuit 210 has, for example, a first access function 211. The first access function 211 may also be called a first access circuit. In this specification, the adapter's internal I / F circuit 210 is provided as an I2C slave I / F circuit implemented according to the I2C serial interface specifications. As a result, an I2C bus is formed between the adapter's internal I / F circuit 210 and the memory interface circuit 171A. However, the adapter's internal I / F circuit 210 is not limited to I2C. In any case, the interface specifications used in the adapter's internal I / F circuit 210 will be the same as or correspond to the interface specifications used in the memory interface circuit 171A within the main unit 100.

[0049] The first access function 211 receives the probe ID output by the ultrasonic probe 101A from the first connector 201A if the ultrasonic probe 101A has a HW_ID circuit 105 that outputs the probe ID. That is, the first access function 211 receives the probe ID, with each bit output in parallel from the HW_ID circuit 105, from the first connector 201A. The first access function 211 also converts the probe ID received from the first connector 201A into a memory format by associating it with an address. Specifically, for example, the first access function 211 associates the value of the probe ID with the address value "0x0000" corresponding to the probe ID, as shown in Figure 3. As a result, the first access function 211 obtains a memory format including the corresponding probe ID and address, and stores the memory format in memory. Furthermore, the first access function 211 may calculate a checksum from the probe ID and associate the calculation result with the address "0x0001" corresponding to the checksum. Furthermore, the first access function 211 may calculate a CRC (Cyclic Redundancy Check) from the probe ID and associate the calculation result with the address "0x0002" corresponding to the CRC. The first access function 211 may also obtain the probe type from the output probe ID and associate the probe type with the address "0x0003" corresponding to the probe type. The probe type is information indicating the type of probe, such as a two-dimensional array type having multiple oscillators arranged in two dimensions, or a one-dimensional array type having multiple oscillators arranged in one dimension. As a method for obtaining the probe type from the probe ID, for example, it may be a method based on the fact that a specific bit of the probe ID is a value indicating the probe type, or it may be a method that uses a table that associates probe IDs and probe types in advance.

[0050] Furthermore, when a read request specifying the address of the probe ID is input from the device-side connector C_A via the second connector 202A, the first access function 211 retrieves the probe ID from the memory format based on the read request. Specifically, for example, when the first access function 211 receives a read request input from the device body 100 via serial communication through the device-side connector C_A and the second connector 202A, it retrieves the probe ID from the memory format based on the read request. The first access function 211 outputs the retrieved probe ID from the second connector 202A to the device-side connector C_A. Specifically, for example, the first access function 211 outputs the retrieved probe ID via serial communication through the second connector 202A to the device-side connector C_A. The first access function 211 and the adapter internal I / F circuit 210 are examples of a conversion unit, an acquisition unit, and an output unit.

[0051] Next, the operation of the ultrasound diagnostic device equipped with the conversion adapters configured as described above will be explained using the time charts in Figures 4 and 5. It is assumed that the main unit 100 of the ultrasound diagnostic device 1 has three conversion adapters 200A, 200B, and 200C connected to it. Furthermore, it is assumed that two of the three conversion adapters 200A to 200C, 200A and 200C, are connected to ultrasound probes 101A and 101C, respectively.

[0052] (time t0) First, the ultrasound diagnostic device 1 is activated by an operator such as a physician, as shown in Figure 4(a).

[0053] In the ultrasonic probe 101A, as shown in Figure 4(b) as "HW probe ID output", the HW_ID circuit 105 outputs each bit of the probe ID in parallel from each terminal of the probe connector PC_A. The conversion adapter 200A is in an idle state, as shown in Figure 4(c), and ignores the probe ID input via the probe connector PC_A and the second connector 202A.

[0054] Furthermore, as shown in Figures 4(d) and 4(e), the ultrasonic probe 101B is not connected, and the conversion adapter 200B is in an idle state.

[0055] Furthermore, in the ultrasonic probe 101C, as shown in Figure 4(f) as "HW probe ID output", the HW_ID circuit 105 outputs each bit of the probe ID in parallel from each terminal of the probe connector PC_C. The conversion adapter 200C is in an idle state, as shown in Figure 4(g), and ignores the probe ID input via the probe connector PC_C and the second connector 202C.

[0056] (time t1) As shown in Figure 4(a), the processing circuit 180 of the ultrasound diagnostic device 1 checks the connection status of the probe port A corresponding to the conversion adapter 200A and the device-side connector C_A, and determines that a connection exists. For example, the processing circuit 180 determines that a connection exists based on a connection detection signal from a connection detection circuit that detects the connection of the ultrasound probe 101A. This type of connection detection circuit can be realized, for example, by providing a closed-loop circuit that becomes conductive when the ultrasound probe 101A is connected and becomes open when the ultrasound probe 101A is disconnected, with the device-side connector C_A, the second connector 202A, the first connector 201A, and the probe connector PC_A interposed therebetween. However, the connection detection circuit for the ultrasound probe 101A may be realized using existing connection detection technology.

[0057] (time t2) After detecting the connection of the ultrasonic probe 101A, the processing circuit 180 controls the memory interface circuit 171A to output a request to read the probe ID, as shown in Figure 4(a). The memory interface circuit 171A outputs a read request from the device-side connector C_A specifying the probe ID address "0x0000".

[0058] As shown in Figure 4(c), when a read request is input from the device-side connector C_A via the second connector 202A, the adapter's internal I / F circuit 210 converts the probe ID shown in Figure 4(b) into a memory format, associating it with the address "0x0000". Subsequently, the adapter's internal I / F circuit 210 obtains the probe ID corresponding to the address "0x0000" from the memory format based on the address "0x0000" in the read request. The adapter's internal I / F circuit 210 also outputs the obtained probe ID to the device-side connector C_A via serial communication through the second connector 202A.

[0059] The memory interface circuit 171A receives the outputted probe ID and sends it to the processing circuit 180. This allows the processing circuit 180 to virtually read the probe ID from the ultrasonic probe 101A via the conversion adapter 200A. In reality, the processing circuit 180 reads the probe ID from the conversion adapter 200A. However, since the processing circuit 180 read the probe ID in response to a read request specifying an address, it effectively reads the probe ID from the memory address of the ultrasonic probe 101A. In any case, the processing circuit 180 stores the read probe ID in the internal storage circuit 130.

[0060] (time t3) After reading the probe ID of the ultrasonic probe 101A, the processing circuit 180 controls the memory interface circuit 171A to output a checksum read request, as shown in Figure 4(a). The memory interface circuit 171A outputs a read request specifying the checksum address "0x0001" from the device-side connector C_A.

[0061] As shown in Figure 4(c), when a read request is input to the conversion adapter 200A from the device-side connector C_A via the second connector 202A, the adapter's internal I / F circuit 210 calculates a checksum from the probe ID output at time t2, associates the calculation result with the address "0x0001" corresponding to the checksum, and converts it into a memory format. Subsequently, the adapter's internal I / F circuit 210 obtains the checksum corresponding to the address "0x0001" from the memory format based on the address "0x0001" in the read request. The adapter's internal I / F circuit 210 also outputs the obtained checksum to the device-side connector C_A via serial communication through the second connector 202A. After that, the conversion adapter 200A transitions to an idle state.

[0062] The memory interface circuit 171A receives the output checksum and sends it to the processing circuit 180. This allows the processing circuit 180 to virtually read the checksum from the ultrasonic probe 101A via the conversion adapter 200A. In fact, as previously mentioned, the processing circuit 180 actually reads the checksum from the conversion adapter 200A. However, since the processing circuit 180 read the checksum in response to a read request specifying an address, it effectively reads the checksum from a memory address within the ultrasonic probe 101A. In any case, the processing circuit 180 stores the read checksum in the internal storage circuit 130.

[0063] (time t4) After reading the checksum of the probe ID, the processing circuit 180 checks the read probe ID based on the checksum in order to recognize the probe, as shown in Figure 4(a). Specifically, the processing circuit 180 calculates a checksum from the read probe ID, compares the calculation result with the read checksum, and confirms that the read probe ID is valid if they match. If they do not match, a communication error has occurred, and the processing from time t2 onwards is repeated. However, it is preferable to perform this repeated processing after the processing related to the other probe ports B and C has been completed, in order to avoid an infinite loop if the communication error is not resolved. The processing circuit 180 then recognizes the ultrasonic probe 101A based on the probe ID that has been confirmed to be valid.

[0064] (time t5) After recognizing the ultrasonic probe 101A, the processing circuit 180 of the ultrasonic diagnostic device 1 checks the connection status of the conversion adapter 200B and the probe port B corresponding to the device-side connector C_B, as shown in Figure 4(a), and determines that there is no connection. For example, the processing circuit 180 determines that there is no connection based on the connection detection signal from the connection detection circuit that detects the connection of the ultrasonic probe 101B. Therefore, as shown in Figure 4(d), the ultrasonic probe 101B is not connected. Also, as shown in Figure 4(e), the conversion adapter 200B is in an idle state.

[0065] (time t6) After confirming the connection status of probe port B, the processing circuit 180 of the ultrasound diagnostic device 1 checks the connection status of the conversion adapter 200C and probe port C corresponding to the device-side connector C_C, as shown in Figure 4(a), and determines that a connection exists. For example, the processing circuit 180 determines that a connection exists based on the connection detection signal from the connection detection circuit that detects the connection of the ultrasound probe 101C.

[0066] (time t7) After detecting the connection of the ultrasonic probe 101C, the processing circuit 180 controls the memory interface circuit 171C to output a request to read the probe ID, as shown in Figure 4(a). The memory interface circuit 171C outputs a read request from the device-side connector C_C specifying the probe ID address "0x0000".

[0067] As shown in Figure 4(g), when a read request is input from the device-side connector C_C via the second connector 202C, the adapter's internal I / F circuit 210 converts the probe ID shown in Figure 4(f) into a memory format that associates it with an address. Subsequently, the adapter's internal I / F circuit 210 obtains the probe ID corresponding to the address in the read request from the memory format. The adapter's internal I / F circuit 210 also outputs the obtained probe ID to the device-side connector C_C via serial communication through the second connector 202C.

[0068] The memory interface circuit 171C receives the outputted probe ID and sends it to the processing circuit 180. The processing circuit 180 then reads the probe ID from the ultrasonic probe 101C via the conversion adapter 200C. The processing circuit 180 stores the read probe ID in the internal memory circuit 130.

[0069] (time t8) After reading the probe ID of the ultrasonic probe 101C, the processing circuit 180 controls the memory interface circuit 171C to output a checksum read request, as shown in Figure 4(a). The memory interface circuit 171C outputs a read request specifying the checksum address from the device-side connector C_C.

[0070] As shown in Figure 4(g), when a read request is input to the conversion adapter 200C from the device-side connector C_C via the second connector 202C, the adapter's internal I / F circuit 210 calculates a checksum from the probe ID output at time t7, associates the calculation result with the address corresponding to the checksum, and converts it into a memory format. Subsequently, the adapter's internal I / F circuit 210 obtains the checksum corresponding to the address in the read request from the memory format. The adapter's internal I / F circuit 210 also outputs the obtained checksum to the device-side connector C_C via serial communication through the second connector 202C. After that, the conversion adapter 200C transitions to an idle state.

[0071] The memory interface circuit 171C receives the output checksum and sends it to the processing circuit 180. The processing circuit 180 then reads the checksum from the ultrasonic probe 101C via the conversion adapter 200C. The processing circuit 180 stores the read checksum in the internal memory circuit 130.

[0072] (time t9) After reading the checksum of the probe ID, the processing circuit 180 checks the read probe ID based on the checksum in order to recognize the probe, as shown in Figure 4(a). Specifically, the processing circuit 180 calculates a checksum from the read probe ID, compares the calculation result with the read checksum, and confirms that the read probe ID is valid if the two match. If the two do not match, a communication error has occurred, and the processing from time t7 onwards is repeated. However, to avoid an infinite loop if the communication error is not resolved, it is preferable that this repeated processing terminates after a predetermined number of failures. The processing circuit 180 then recognizes the ultrasonic probe 101C based on the probe ID that has been confirmed to be valid. With the recognition of the ultrasonic probe 101C, the series of processes related to probe ports A to C are completed.

[0073] (time t10) The ultrasound diagnostic device 1 registers patient information, for example, about subject P, in response to the operator's actions. Based on this patient information, the operator determines which ultrasound probes 101A and 101C to be used for the ultrasound examination. Meanwhile, the processing circuit 180 displays a selection screen for ultrasound probes 101A and 101C on the output device 103 based on the respective probe IDs of the ultrasound probes 101A and 101C. The processing circuit 180 also selects ultrasound probe 101A, for example, in response to the operation of software buttons displayed on the touch panel of the output device 103 corresponding to each probe ID. The processing circuit 180 switches the switch 115 according to the selected ultrasound probe 101A and controls the ultrasound transmission circuit 110 and the ultrasound reception circuit 120 based on parameters related to the transmission and reception of ultrasound to ultrasound probe 101A. As a result, the ultrasound diagnostic device 1 performs an ultrasound scan using ultrasound probe 101A.

[0074] Next, we will describe the operation when a new ultrasound probe 101B is connected during an ultrasound scan, using Figure 5.

[0075] (time t20) As shown in Figure 5(a), the ultrasound diagnostic device 1 is performing an ultrasound scan using the ultrasound probe 101A. At this time, as shown in Figures 5(b) and (c), the ultrasound probe 101A is connected and the conversion adapter 200A is idle. Similarly, as shown in Figures 5(f) and (g), the ultrasound probe 101C is connected and the conversion adapter 200C is idle. On the other hand, as shown in Figures 5(d) and (e), the ultrasound probe 101B is not connected and the conversion adapter 200B is idle.

[0076] (time t21) In the ultrasound diagnostic device 1, the probe connector PC_B of the ultrasound probe 101B is connected to the first connector 201B of the conversion adapter 200B by the operator. At this time, the processing circuit 180 of the ultrasound diagnostic device 1 detects that the connection status of the probe port B has changed to connected, based on the connection detection signal from the connection detection circuit that detects the connection of the ultrasound probe 101B, as shown in Figure 5(a).

[0077] (time t22) After detecting the connection of the ultrasonic probe 101B, the processing circuit 180 controls the memory interface circuit 171B to output a request to read the probe ID, as shown in Figure 5(a). The memory interface circuit 171B outputs a read request specifying the address of the probe ID from the device-side connector C_B.

[0078] As shown in Figure 5(e), when a read request is input from the device-side connector C_B via the second connector 202B, the adapter's internal I / F circuit 210 converts the probe ID shown in Figure 5(d) into a memory format that associates it with an address. Subsequently, the adapter's internal I / F circuit 210 obtains the probe ID corresponding to the address from the memory format based on the address in the read request. The adapter's internal I / F circuit 210 also outputs the obtained probe ID to the device-side connector C_B via serial communication through the second connector 202B.

[0079] The memory interface circuit 171B receives the outputted probe ID and sends it to the processing circuit 180. The processing circuit 180 then reads the probe ID from the ultrasonic probe 101B via the conversion adapter 200B. The processing circuit 180 stores the read probe ID in the internal memory circuit 130.

[0080] (time t23) After reading the probe ID of the ultrasonic probe 101B, the processing circuit 180 controls the memory interface circuit 171B to output a checksum read request, as shown in Figure 5(a). The memory interface circuit 171B outputs a read request specifying the address of the checksum from the device-side connector C_B.

[0081] As shown in Figure 5(e), when a read request is input to the conversion adapter 200B from the device-side connector C_B via the second connector 202B, the adapter's internal I / F circuit 210 calculates a checksum from the probe ID output at time t22, associates the calculation result with the address corresponding to the checksum, and converts it into a memory format. Subsequently, the adapter's internal I / F circuit 210 obtains the checksum corresponding to the address in the read request from the memory format. The adapter's internal I / F circuit 210 also outputs the obtained checksum to the device-side connector C_B via serial communication through the second connector 202B. After that, the conversion adapter 200B transitions to an idle state.

[0082] The memory interface circuit 171B receives the output checksum and sends it to the processing circuit 180. The processing circuit 180 then reads the checksum from the ultrasonic probe 101B via the conversion adapter 200B. The processing circuit 180 stores the read checksum in the internal memory circuit 130.

[0083] (time t24) After reading the checksum of the probe ID, the processing circuit 180 checks the read probe ID based on the checksum in order to recognize the probe, as shown in Figure 5(a). Specifically, the processing circuit 180 calculates a checksum from the read probe ID, compares the calculation result with the read checksum, and confirms that the read probe ID is valid if they match. If they do not match, a communication error has occurred, and the processing from time t22 onwards is repeated. However, as mentioned above, it is preferable that this repeated processing terminates after a predetermined number of failures. The processing circuit 180 then recognizes the ultrasonic probe 101B based on the probe ID that has been confirmed to be valid. The recognition of the ultrasonic probe 101B completes the series of processes related to probe port B.

[0084] (time t25) The processing circuit 180 displays a selection screen for ultrasonic probes 101A, 101B, and 101C on the output device 103, based on the respective probe IDs of the ultrasonic probes 101A, 101B, and 101C. When starting an ultrasonic scan using the newly connected ultrasonic probe 101B, the operator selects ultrasonic probe 101B. When continuing an ultrasonic scan with ultrasonic probe 101A, the operator closes the selection screen display.

[0085] As described above, according to the first embodiment, the first connector of the conversion adapter in the ultrasound diagnostic device is connected to the ultrasound probe, and the second connector of the conversion adapter is connected to the device-side connector of the ultrasound diagnostic device body. If the ultrasound probe has a hardwired circuit that outputs a probe ID, the conversion adapter receives the output probe ID from the first connector and converts the probe ID to a memory format by associating it with an address. When a read request specifying the address of the probe ID is input from the device-side connector via the second connector to the conversion adapter, the conversion adapter obtains the probe ID from the memory format based on the read request. The conversion adapter outputs the obtained probe ID from the second connector to the device-side connector.

[0086] Therefore, it is possible to reduce the number of terminals on the device-side connector while still making it possible to read the probe ID, which is implemented with hardwires. This effect can be obtained not only with the conversion adapter, but also with an ultrasound diagnostic device equipped with the conversion adapter and the ultrasound diagnostic device itself.

[0087] Specifically, for example, the conversion adapter receives the probe ID, with each bit output in parallel from the hardwired circuit, through the first connector. The conversion adapter receives a read request input from the main unit of the device via serial communication through the device-side connector and the second connector. The conversion adapter outputs the acquired probe ID to the device-side connector via serial communication through the second connector. In this case, the number of terminals on the second connector is less than the number of terminals on the first connector.

[0088] To elaborate, when transmitting probe IDs output from a hardwired circuit, the probe connector and the first connector require a number of terminals corresponding to the number of bits in the probe ID. In contrast, the conversion adapter converts the probe ID output from the hardwired circuit into a memory format and outputs the converted probe ID from the second connector to the device-side connector. Therefore, while the number of terminals on the probe connector and the first connector is required to correspond to the number of bits in the probe ID, the number of terminals on the second connector and the device-side connector only needs to be, for example, the number of terminals required for serial communication. This makes it possible to read hardwired probe IDs while reducing the number of terminals on the device-side connector by the amount obtained by subtracting the number of terminals required for serial communication from the number of output terminals on the hardwired circuit.

[0089] Furthermore, according to the first embodiment, the number of terminals on the device-side connector can be reduced, and by assigning the freed terminal to ground, resistance to external noise can be enhanced and image quality can be improved. In addition, by using the freed terminal for position signals from a magnetic sensor or for notifications of operation buttons such as freeze operations, the effect of enhanced functionality can also be obtained.

[0090] (modified version) Next, a modification of the first embodiment will be described. This modification can also be applied to each of the following embodiments.

[0091] In the first embodiment, the memory interface circuits 171A to 171C and the adapter's internal I / F circuit 210 were implemented according to the I2C serial interface specification, but are not limited thereto. For example, the memory interface circuits 171A to 171C and the adapter's internal I / F circuit 210 may be implemented according to the specifications of serial interfaces such as SPI (Serial Peripheral Interface), SIO (Serial Input Output), or Microwire, or according to the specifications of storage interfaces such as SDRAM (Synchronous Dynamic Random Access Memory) or SRAM (Static Random Access Memory). However, the interface specifications are not limited thereto. In addition, instead of a memory interface, a high-speed communication interface such as PCI Express (Peripheral Component Interconnect Express), USB (Universal Serial Bus), Ethernet®, or LVDS (Low Voltage Differential Signaling) may be implemented, and packet communication may also be used.

[0092] Furthermore, in the first embodiment, the data output from the adapter's I / F circuit 210 (such as probe ID and checksum) was in plaintext, but this is not limited to this. For example, the data output from the adapter's I / F circuit 210 may be encrypted or scrambled. In this case, the memory interface circuits 171A to 171C decrypt the encrypted data, or decrypt the scrambled data by reverse-transforming it. In this case, the scrambling may include an encryption process, and the reverse-transformation of scrambling may include a decryption process. For such encryption and decryption, a symmetric-key cryptography scheme may be used in which the processing circuit 180 or each of the memory interface circuits 171A to 171C and each of the adapter's I / F circuit 210 of the conversion adapters 200A to 200C have a common key. Furthermore, for encryption and decryption, a public-key cryptography scheme may be used in which each of the memory interface circuits 171A to 171C or the processing circuit 180 holds a secret key, and each of the I / F circuits 210 within the conversion adapters 200A to 200C holds a public key corresponding to that secret key. Alternatively, in a public-key cryptography scheme, each of the memory interface circuits 171A to 171C or the processing circuit 180 holds a public key, and each of the I / F circuits 210 within the conversion adapters 200A to 200C holds a secret key corresponding to that public key.

[0093] Furthermore, in the first embodiment, the probe ID was mapped to a memory address and the probe ID was output according to the address, but this is not limited to this. For example, the I / F circuit 210 inside the adapter may output the probe ID as a device ID such as PCI Express or USB.

[0094] Furthermore, in the first embodiment, each of the device-side connectors C_A to C_C was connected to each of the memory interface circuits 171A to 171C, but this is not limited to this. For example, each of the device-side connectors C_A to C_C may be connected to one memory interface circuit 171A, and the other memory interface circuits 171B and 171C may be omitted. In this case, the memory interface circuit 171A selects one of the adapter I / F circuits 210 of the conversion adapters 200A to 200C to communicate.

[0095] Furthermore, in the first embodiment, a switch 115 is provided to switch the connection between the ultrasonic transmitting circuit 110 and the ultrasonic receiving circuit 120 and any of the device-side connectors C_A to C_C, but the system is not limited to this. For example, the switch 115 may be omitted, and multiple sets of ultrasonic transmitting circuits 110 and ultrasonic receiving circuits 120 may be provided, with each set of ultrasonic transmitting circuit 110 and ultrasonic receiving circuit 120 connected to each device-side connector C_A, C_B, C_C.

[0096] Furthermore, in the first embodiment, a checksum was calculated from the probe ID and the result was used for checking, but this is not limited to this. For example, the CRC may be calculated from the probe ID and the result may be used for checking. Alternatively, for example, a parity bit may be calculated from the probe ID and the result may be used for checking.

[0097] Furthermore, in the first embodiment, the conversion adapter performed conversions such as memory formatting and checksums each time a read request was received, but this is not limited to this. For example, the conversion adapter may perform conversions such as memory formatting and checksums in advance at a time unrelated to read requests. In this case, the conversion adapter can omit the time required for conversion after receiving a read request from the main unit, and can output probe IDs and checksums in response to read requests at a faster speed.

[0098] <Second Embodiment> Next, a second embodiment will be described using Figures 6 and 7. Parts that are substantially the same as those in Figure 2 are denoted by the same reference numerals, and their detailed descriptions are omitted. Here, we will mainly describe the differences. Similarly, redundant descriptions will be omitted for each of the following embodiments.

[0099] In the second embodiment, at least one of the ultrasonic probes 101A to 101C is equipped with an IDPROM 107, which is a memory, instead of the HW_ID circuit 105, which is a hardwired circuit. In the following description, the case in which the ultrasonic probe 101B is equipped with an IDPROM 107 instead of the HW_ID circuit 105 will be used as an example. Note that "IDPROM" is an abbreviation for "ID programmable read-only memory".

[0100] Here, as shown in Figure 7, IDPROM107 is an EEPROM (registered trademark) (electrically erasable programmable read-only memory) that stores unique information of the ultrasound probe 101B associated with each address. Unique information of the ultrasound probe 101B includes, for example, probe ID, checksum, CRC, probe type, serial number, manufacture date, and manufacturer ID, which can be used as appropriate. The probe ID, checksum, CRC, and probe type are as described above. The serial number is information that identifies each individual ultrasound probe 101B. The manufacture date is the date the ultrasound probe 101B was manufactured. The manufacturer ID is information indicating the company that manufactured the ultrasound probe 101B. Furthermore, IDPROM107 allows not only data reading but also data writing.

[0101] On the other hand, as shown in Figure 6, the conversion adapter 200B further includes a second access function 212 in addition to the adapter's internal I / F circuit 210 described above. Accordingly, the conversion adapter 200B includes an adapter's internal memory I / F circuit 220 between the adapter's internal I / F circuit 210 and the first connector 201B.

[0102] The second access function 212 is implemented as a function corresponding to a program by the adapter's I / F circuit 210 executing a program in memory. However, the adapter's I / F circuit 210 is not limited to this; instead of executing a program, the function may be directly incorporated as a logic circuit within the processor circuit of the adapter's I / F circuit 210. The second access function 212 may also be called the second access circuit.

[0103] If the ultrasonic probe 101B has an IDPROM 107 that outputs a probe ID in response to a read request, the second access function 212 accesses the IDPROM 107 via the adapter's internal memory I / F circuit 220 and the first connector 201B based on the read request, thereby obtaining the probe ID output from the IDPROM 107.

[0104] Furthermore, when a write request containing an address and data in the IDPROM 107 is input from the device-side connector C_B via the second connector 202B, the second access function 212 accesses the IDPROM 107 via the adapter's internal memory I / F circuit 220 and the first connector 201B based on the write request, and writes the data to the IDPROM 107.

[0105] The adapter's internal memory interface circuit 220 is controlled by the second access function 212 and performs read and write operations to the IDPROM 107. In this specification, the adapter's internal memory interface circuit 220 is provided as an I2C master interface circuit implemented according to the I2C serial interface specifications. This forms an I2C bus between the adapter's internal memory interface circuit 220 and the IDPROM 107. However, as mentioned above, the adapter's internal memory interface circuit 220 is not limited to I2C.

[0106] The second access function 212, the adapter internal I / F circuit 210, and the adapter internal memory I / F circuit 220 are examples of acquisition and writing units.

[0107] The other configurations are the same as in the first embodiment.

[0108] With the above configuration, when a new ultrasound probe 101B is connected during an ultrasound scan, the operations at times t30 to t35 shown in the time chart of Figure 8 are performed instead of the operations at times t20 to t25 shown in the time chart of Figure 5.

[0109] (time t30) As shown in Figure 8(a), the ultrasound diagnostic device 1 is performing an ultrasound scan using the ultrasound probe 101A. At this time, as shown in Figures 8(b) and (c), the ultrasound probe 101B is not connected, and the conversion adapter 200B is idle.

[0110] (time t31) In the ultrasound diagnostic device 1, the probe connector PC_B of the ultrasound probe 101B is connected to the first connector 201B of the conversion adapter 200B by the operator. At this time, the processing circuit 180 of the ultrasound diagnostic device 1 detects that the connection status of probe port B has changed to connected, based on the connection detection signal from the connection detection circuit that detects the connection of the ultrasound probe 101B, as shown in Figure 8(a). Note that, as shown in Figure 8(b), although the ultrasound probe 101B is connected to the conversion adapter 200B, it is in an idle state because there is no access to the IDPROM 107.

[0111] (time t32) After detecting the connection of the ultrasonic probe 101B, the processing circuit 180 controls the memory interface circuit 171B to output a request to read the probe ID, as shown in Figure 8(a). The memory interface circuit 171B outputs a read request from the device-side connector C_B specifying the probe ID address "0x0000".

[0112] As shown in Figure 8(c), when a read request is input from the device-side connector C_B to the second connector 202B, the adapter's internal I / F circuit 210 sends the read request to the adapter's internal memory I / F circuit 220. Based on the read request, the adapter's internal memory I / F circuit 220 accesses the IDPROM 107 via the first connector 201B and obtains the probe ID output from the IDPROM 107. The adapter's internal memory I / F circuit 220 sends the obtained probe ID to the adapter's internal I / F circuit 210. In this way, the adapter's internal I / F circuit 210 obtains the probe ID from the IDPROM 107. The adapter's internal I / F circuit 210 also outputs the obtained probe ID to the device-side connector C_B via serial communication through the second connector 202B.

[0113] The memory interface circuit 171B receives the outputted probe ID and sends it to the processing circuit 180. The processing circuit 180 then reads the probe ID from the ultrasonic probe 101B via the conversion adapter 200B. The processing circuit 180 stores the read probe ID in the internal memory circuit 130.

[0114] (time t33) After reading the probe ID of the ultrasonic probe 101B, the processing circuit 180 controls the memory interface circuit 171B to output a checksum read request, as shown in Figure 8(a). The memory interface circuit 171B outputs a read request specifying the checksum address "0x0001" from the device-side connector C_B.

[0115] As shown in Figure 8(c), when a read request is input from the device-side connector C_B to the second connector 202B, the adapter's internal I / F circuit 210 sends the read request to the adapter's internal memory I / F circuit 220. Based on this read request, the adapter's internal memory I / F circuit 220 accesses the IDPROM 107 via the first connector 201B and obtains the checksum output from the IDPROM 107. After the checksum is output, the ultrasonic probe 101B enters an idle state.

[0116] The adapter's internal memory interface circuit 220 sends the acquired checksum to the adapter's internal interface circuit 210. In this way, the adapter's internal interface circuit 210 acquires the checksum from the IDPROM 107. The adapter's internal interface circuit 210 then outputs the acquired checksum to the device-side connector C_B via serial communication through the second connector 202B. After that, the conversion adapter 200B transitions to an idle state.

[0117] The memory interface circuit 171B receives the output checksum and sends it to the processing circuit 180. The processing circuit 180 then reads the checksum from the ultrasonic probe 101B via the conversion adapter 200B. The processing circuit 180 stores the read checksum in the internal memory circuit 130.

[0118] The operations at times t34 and t35 are performed in the same manner as the operations at times t24 and t25 described above. Furthermore, when a write request including an address and data is input from the main unit 100, the adapter's internal I / F circuit 210 accesses the IDPROM 107 via the adapter's internal memory I / F circuit 220 based on the write request and writes the data to the IDPROM 107.

[0119] As described above, according to the second embodiment, if the ultrasonic probe has a memory that outputs a probe ID in response to a read request, the conversion adapter accesses the memory via the first connector based on the read request and obtains the probe ID output from the memory. Therefore, in addition to the effects of the first embodiment, the probe ID can be read from the memory within the ultrasonic probe.

[0120] Furthermore, according to the second embodiment, when a write request including the address and data in the memory of the ultrasound probe is input from the device-side connector via the second connector, the conversion adapter accesses the memory via the first connector based on the write request and writes the data to the memory. Therefore, in addition to the effects of the first embodiment, data can be written to the memory within the ultrasound probe.

[0121] <Third Embodiment> Next, a third embodiment will be described with reference to Figure 9.

[0122] The third embodiment is a modification of the second embodiment, wherein at least one of the ultrasonic probes 101A to 101C is equipped with both the HW_ID circuit 105 and the IDPROM 107. In the following description, the case in which ultrasonic probe 101A is equipped with both the HW_ID circuit 105 and the IDPROM 107 will be described as an example.

[0123] Accordingly, the second access function 212 of the adapter's I / F circuit 210, if it is unable to obtain the probe ID from the IDPROM 107 based on the read request, activates the first access function 211 to obtain the probe ID from the memory format. As mentioned above, the probe ID of the memory format is output from the HW_ID circuit 105.

[0124] The other configurations are the same as in the second embodiment.

[0125] Next, the operation of the ultrasound diagnostic apparatus equipped with the conversion adapters configured as described above will be explained using the flowchart in Figure 10. It is assumed that the three conversion adapters 200A, 200B, and 200C are connected to ultrasound probes 101A, 101B, and 101C, respectively. Here, as mentioned above, ultrasound probe 101A is equipped with both the HW_ID circuit 105 and the IDPROM 107. Ultrasound probe 101B, similar to the second embodiment, lacks the HW_ID circuit 105 but is equipped with the IDPROM 107. Ultrasound probe 101C, similar to the first embodiment, lacks the IDPROM 107 but is equipped with the HW_ID 105. Furthermore, steps ST1 to ST8 shown in Figure 10 are executed for each conversion adapter 200A, 200B, and 200C. These steps ST1 to ST8 may be executed in series or in parallel. For ease of understanding, the following explanation will use the example of a case where steps ST1 to ST8 for each conversion adapter 200A, 200B, and 200C are executed in series after the ultrasound diagnostic device 1 is started up. Furthermore, the details of the operation are the same as in the first or second embodiment.

[0126] (Steps ST1-ST8 regarding the 200A conversion adapter) (Step ST1) The main unit 100 initiates memory access to the ultrasonic probe 101A. That is, after detecting the connection of the ultrasonic probe 101A, the processing circuit 180 controls the memory interface circuit 171A to output a request to read the probe ID. The memory interface circuit 171A outputs a read request from the device-side connector C_A specifying the probe ID address "0x0000".

[0127] (Step ST2) The conversion adapter 200A initiates memory access to the ultrasonic probe 101A. Specifically, when a read request is input to the conversion adapter 200A from the device-side connector C_A via the second connector 202A, the adapter's internal I / F circuit 210 sends the read request to the adapter's internal memory I / F circuit 220. Based on the read request, the adapter's internal memory I / F circuit 220 receives the probe ID responded from the IDPROM 107 of the ultrasonic probe 101A by accessing the IDPROM 107 via the first connector 201A.

[0128] (Step ST3) The adapter's I / F circuit 210 determines, in parallel with step ST2, whether or not there is a response from the probe ID to the memory access. If there is a response, the process proceeds to step ST4; otherwise, it proceeds to step ST5. In this example, the probe ID is responded from the ultrasonic probe 101A, so the process proceeds to step ST4.

[0129] (Step ST4) In step ST2, the adapter 200A's internal memory interface circuit 220 receives a probe ID from the IDPROM 107. The internal memory interface circuit 220 then sends the received probe ID to the internal interface circuit 210. As a result, the internal interface circuit 210 obtains the probe ID from the IDPROM 107.

[0130] (Step ST6) The conversion adapter 200A transmits the acquired probe ID to the main unit 100. Specifically, the I / F circuit 210 inside the conversion adapter 200A outputs the acquired probe ID to the device-side connector C_A via serial communication through the second connector 202A.

[0131] (Step ST7) On the main unit 100, the memory interface circuit 171A receives the outputted probe ID and sends it to the processing circuit 180. The processing circuit 180 stores the read probe ID in the internal storage circuit 130.

[0132] (Step ST8) The processing circuit 180 reads the checksum from the ultrasonic probe 101A via the conversion adapter 200A, in the same manner as in the second embodiment. The processing circuit 180 stores the read checksum in the internal memory circuit 130.

[0133] Subsequently, the processing circuit 180 checks the read probe ID based on the checksum, as described above. Based on the probe ID that has been confirmed to be valid through this check, the processing circuit 180 identifies the ultrasonic probe 101A.

[0134] With the above steps, steps ST1 to ST8 for adapter 200A are completed. Next, steps ST1 to ST8 for adapter 200B will begin.

[0135] (Steps ST1-ST8 regarding the 200B adapter) As mentioned above, the ultrasonic probe 101B lacks the HW_ID circuit 105 and is equipped with the IDPROM 107. Therefore, steps ST1 to ST8 for the conversion adapter 200B are performed in the same way as steps ST1 to ST8 for the conversion adapter 200A. After the completion of steps ST1 to ST8 for the conversion adapter 200B, steps ST1 to ST8 for the conversion adapter 200C are started.

[0136] (Steps ST1-ST8 regarding the 200C conversion adapter) As mentioned above, the ultrasound probe 101C lacks the IDPROM 107 and has the HW_ID 105. Therefore, steps ST1 to ST8 related to the conversion adapter 200C do not proceed from step ST3 to step ST4, and step ST5 is executed instead. The following explains each step in order.

[0137] (Step ST1) The main unit 100 starts accessing the memory for the ultrasonic probe 101C. Specifically, step ST1 is performed in the same manner as described above.

[0138] (Step ST2) The conversion adapter 200C initiates memory access to the ultrasound probe 101C. Specifically, the memory access in step ST2 is performed as described above. However, since the ultrasound probe 101C does not have an IDPROM 107, the adapter's internal memory I / F circuit 220 does not receive a probe ID as a response to the memory access.

[0139] (Step ST3) The adapter's I / F circuit 210 determines, in parallel with step ST2, whether or not there is a response from the probe ID to the memory access. If there is a response, the process proceeds to step ST4; otherwise, it proceeds to step ST5. In this example, there is no response from the ultrasonic probe 101C, so the process proceeds to step ST5.

[0140] (Step ST5) The second access function 212 of the adapter's I / F circuit 210 activates the first access function 211 if it is unable to obtain the probe ID from the IDPROM 107 based on the read request. As a result, the adapter's I / F circuit 210 converts each bit of the probe ID output in parallel from the HW_ID circuit 105 of the ultrasonic probe 101C into a memory format, associating it with the address "0x0000". Subsequently, the adapter's I / F circuit 210 obtains the probe ID corresponding to the address "0x0000" from the memory format based on the address "0x0000" in the read request.

[0141] (Steps ST6~ST8) Steps ST6 to ST8 related to the 200C adapter are executed in the same manner as steps ST6 to ST8 described above. This completes steps ST6 to ST8 related to the 200C adapter.

[0142] As described above, a selection screen for ultrasound probes 101A, 101B, and 101C will be displayed, and an ultrasound scan will be performed based on the selection result.

[0143] As described above, according to the third embodiment, if a probe ID cannot be obtained from memory based on a read request, the first access function 211, which acts as a conversion unit, is activated to obtain the probe ID from the memory format.

[0144] To elaborate, if the ultrasound probe has built-in memory, the conversion adapter outputs the probe ID read from the memory to the main unit of the device. If the ultrasound probe does not have built-in memory but has a hardwired circuit, there is no response from the ultrasound probe's memory, so the probe ID output from the hardwired circuit is converted to a memory format and output to the main unit of the device.

[0145] Therefore, in addition to the effects of the second embodiment, the probe ID can be read even when an ultrasonic probe is connected that includes both a hardwired circuit for outputting the probe ID and a memory for storing the probe ID.

[0146] <Fourth Embodiment> Next, a fourth embodiment will be described using Figure 11.

[0147] The fourth embodiment is a modification of the first to third embodiments, wherein the conversion adapters 200A to 200C further include a flash memory 230 that stores management information for the conversion adapter body. The flash memory 230 is an example of a management memory. In the following description, the case in which the flash memory 230 is provided in the conversion adapter 200A of the third embodiment will be used as an example.

[0148] Here, the flash memory 230 is readable / writable from the adapter's I / F circuit 210 and is a storage unit that stores management information for the main body of the conversion adapter 200A. This management information may include, for example, the serial number, manufacturing date, and manufacturer ID of the conversion adapter 200A, or any other information that can be used for product management of the conversion adapter. However, it is not limited to this; any information can be written to the flash memory 230. Furthermore, the information written to the flash memory 230 is not limited to product management information.

[0149] Accordingly, the adapter's internal interface circuit 210 is further equipped with a third access function 213. The third access function 213 is realized as a function corresponding to a program when the adapter's internal interface circuit 210 executes a program in memory. However, it is not limited to this; instead of executing a program, the adapter's internal interface circuit 210 may directly incorporate the function as a logic circuit within the processor circuit of the adapter's internal interface circuit 210. The third access function 213 may also be called a third access circuit.

[0150] When a read request specifying an address corresponding to management information is input from the device-side connector C_A via the second connector 202A, this third access function 213 accesses the flash memory 230 based on the read request. As a result, the adapter's I / F circuit 210 obtains the management information output from the flash memory 230.

[0151] The other configurations are the same as in the third embodiment.

[0152] With the above configuration, after the same operation as in the third embodiment, the processing circuit 180 performs product management of the conversion adapter 200A periodically or irregularly. The processing circuit 180 controls the memory interface circuit 171A to output a request to read the serial number of the conversion adapter 200A. The memory interface circuit 171A outputs a read request specifying the address of the serial number from the device-side connector C_A.

[0153] When a read request is input to the conversion adapter 200A from the device-side connector C_A via the second connector 202A, the adapter's internal I / F circuit 210 accesses the flash memory 230 based on the read request. The adapter's internal I / F circuit 210 then obtains the serial number output from the flash memory 230. The adapter's internal memory I / F circuit 220 outputs the obtained serial number to the device-side connector C_A via serial communication through the second connector 202A.

[0154] The memory interface circuit 171A receives the outputted serial number and sends it to the processing circuit 180. The processing circuit 180 then reads the serial number of the conversion adapter 200A from the flash memory 230 within the conversion adapter 200A. The processing circuit 180 stores the read serial number in the internal storage circuit 130. The reading and saving of the manufacturing date and manufacturer ID are then performed in the same manner.

[0155] As described above, according to the fourth embodiment, the conversion adapter is equipped with a management memory that stores management information for the conversion adapter body. Therefore, in addition to the effects of the third embodiment, product management of the conversion adapter can be performed by reading the management information from the management memory to the device body as needed.

[0156] <Fifth Embodiment> Next, a fifth embodiment will be described using Figure 12.

[0157] The fifth embodiment is a modification of the fourth embodiment, and is a form in which the terminals of the device-side connector C_A to C_C are reduced in accordance with the first function 109a, second function 109b, ... that any of the ultrasonic probes 101A to 101C appropriately possess. However, the fifth embodiment is not limited to the fourth embodiment, but may also be a modification of each of the first to third embodiments. Furthermore, the first function 109a, second function 109b, ... are any functions that the ultrasonic probe may have. Examples of such arbitrary functions include, for example, a function that pauses (freezes) the displayed ultrasonic image in response to the operation of a button (switch) on the ultrasonic probe, or a function that switches whether or not to group multiple ultrasonic transducers into element groups of a unit number. However, such arbitrary functions are not limited to functions that respond to the operation of a button (switch) on the ultrasonic probe. For example, an optional function may be to receive a selection signal from the main unit 100 for a probe internal switch that switches which transducer's signal to connect to the connector terminal when the number of terminals on the probe connector is less than the number of transducers, and to perform the switch according to the selection signal. Other optional functions of this type can also be used as appropriate, such as a bus function to control the probe's internal electronic circuitry (e.g., a transmitting / receiving circuit), a notification function for detection signals from a temperature sensor installed on the probe, and a communication function for control signals from a magnetic sensor attached to the probe.

[0158] Specifically, for example, let's assume that the ultrasound probe 101A has a first function 109a, and the ultrasound probe 101B has a second function 109b.

[0159] On the other hand, the conversion adapter 200A further includes a selector 240 that can switch the connection between one of several terminals different from the probe ID terminal on the first connector 201A and a predetermined terminal in the second connector 202A. Here, the several terminals different from the probe ID terminal on the first connector 201A are the terminals corresponding to the first function 109a and the second function 109b, respectively, in Figure 12. The first connector 201A is equipped with terminals corresponding to the first function 109a and the second function 109b, respectively, so that the selector 240 can be electrically connected regardless of whether the ultrasonic probe 101A or 101B is connected. Furthermore, the adapter's I / F circuit 210 further includes a switching control function 214 for controlling the switching of the selector 240. The switching control function 214 is realized as a function corresponding to the program when the adapter's I / F circuit 210 executes a program in memory. However, the adapter's internal I / F circuit 210 may, instead of executing a program, have the function directly incorporated as a logic circuit within the processor circuit of the adapter's internal I / F circuit 210. The switching control function 214 may also be called a switching control circuit. The description of the conversion adapter 200A and its components also applies to the conversion adapters 200B and 200C by replacing the "A" at the end of the code with the other codes "B" and "C".

[0160] The switching control function 214 controls the switching of the selector 240 based on the probe ID obtained from the ultrasonic probe 101A. The switching control function 214 and the adapter's internal I / F circuit 210 are examples of a switching control unit.

[0161] The other configurations are the same as in the fourth embodiment.

[0162] Next, the operation of the ultrasound diagnostic apparatus equipped with the conversion adapter configured as described above will be explained using the flowchart in Figure 13. The details of the operation are the same as in the third embodiment. In addition, if necessary, the serial number of the conversion adapter 200A may be read from the flash memory 230, as in the fourth embodiment.

[0163] (Steps ST1-ST9 regarding the 200A conversion adapter) Of the steps ST1 to ST9 relating to the conversion adapter 200A, steps ST1 to ST8 are performed in the same manner as in the third embodiment. Below, steps ST6a and ST9, which operate differently from the third embodiment, will be described.

[0164] (Step ST6a) After step ST6, the I / F circuit 210 inside the adapter 200A controls the switching of the selector 240 based on the probe ID of the ultrasonic probe 101A.

[0165] The selector 240 switches the connection according to the switching control to connect the terminal of the first function 109a in the first connector 201A to a predetermined terminal in the second connector 202A. Note that this step ST6 can be performed at any time after the probe ID of the ultrasonic probe 101A has been obtained. For example, step ST6a may be performed before step ST6.

[0166] (Step ST9) After step ST8, for example, suppose the button of the first function 109a on the ultrasound probe 101A is operated during an ultrasound scan using the ultrasound probe 101A. At this time, the first function 109a outputs an operation signal notifying the operation of the said button to the device body 100 via the probe connector PC_A, the first connector 201A, the selector 240, the second connector 202A, and the device-side connector C_A.

[0167] When the processing circuit 180 of the main unit 100 receives this operation signal, it executes the processing corresponding to the first function 109a based on the operation signal.

[0168] Steps ST1 to ST9, including steps ST6a and ST9 as described above, are also performed in the conversion adapter 200B. However, in the conversion adapter 200B, the selector 240 switches the connection to connect the terminal of the second function 109b in the first connector 201B to a predetermined terminal in the second connector 202B, according to the switching control. Accordingly, when the button of the second function 109b is operated during an ultrasonic scan using the ultrasonic probe 101B, the second function 109b outputs the operation signal to the device body 100 via the probe connector PC_B, the first connector 201B, the selector 240, the second connector 202B, and the device-side connector C_B. When the processing circuit 180 of the device body 100 receives this operation signal, it executes processing corresponding to the second function 109b based on the operation signal.

[0169] As described above, the fifth embodiment includes a selector that can switch the connection between one of several terminals in the first connector that are different from the probe ID terminal and a predetermined terminal in the second connector. Furthermore, the adapter's internal I / F circuit 210, which is the switching control unit, controls the switching of the selector based on the acquired probe ID. As a result, in addition to the effects of the fourth embodiment, the number of terminals on the device-side connector connected to the second connector can be reduced because any of the several terminals in the first connector other than the probe ID terminal is connected to the predetermined terminal in the second connector.

[0170] According to at least one embodiment described above, it is possible to reduce the number of terminals on the device-side connector while making it possible to read the probe ID implemented with hardwires.

[0171] In the above description, the term "processor" refers to circuits such as a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), an Application Specific Integrated Circuit (ASIC), or a programmable logic device (e.g., a Simple Programmable Logic Device (SPLD), a Complex Programmable Logic Device (CPLD), and a Field Programmable Gate Array (FPGA)). When the processor is a CPU, for example, it implements its functions by reading and executing a program stored in a memory circuit. On the other hand, when the processor is an ASIC, for example, instead of storing the program in a memory circuit, the function is directly incorporated as a logic circuit within the processor's circuit. In this embodiment, each processor is not limited to being configured as a single circuit; multiple independent circuits may be combined to form a single processor and implement its functions. Furthermore, the multiple components shown in Figure 1 may be integrated into a single processor to implement its functions.

[0172] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims and their equivalents. [Explanation of Symbols]

[0173] 1. Ultrasound diagnostic equipment 100 Main unit of the device 101A~101C Ultrasound Probe 102 Input device 103 Output device 104 External device 105 HW_ID Circuit 107 IDPROM 109a 1st function 109b Second function 110 Ultrasonic Transmitter Circuit 115 Switch 120 Ultrasonic receiving circuit 130 Internal memory circuit 140 Image Memory 150 Input Interfaces 160 output interfaces 170 Communication Interfaces 171A~171C Memory Interface Circuit 180 Processing Circuits 181 B-mode processing function 182 Doppler Processing Function 183 Image generation function 184 Display control function 185 System control function 200A, 200B, 200C Conversion Adapter 201A, 201B, 201C First Connector 202A, 202B, 202C Second Connector 210 Adapter Internal I / F Circuit 211 First Access Function 212 Second Access Function 213 Third Access Function 214 Switching control function 220 Adapter internal memory I / F circuit 230 Flash Memory 240 Selector C_A, C_B, C_C Device-side connectors PC_A, PC_B, PC_C Probe Connectors

Claims

1. a first connector connected to the ultrasound probe; a second connector connected to the device-side connector of the ultrasound diagnostic device body; a conversion unit that receives the output probe ID from the first connector when the ultrasound probe has a hardwired circuit that outputs a probe ID, and converts the probe ID into a memory format by associating the probe ID with an address; an acquiring unit that acquires the probe ID from the memory format based on a read request specifying the address of the probe ID when the read request is input from the device-side connector via the second connector; an output unit that outputs the acquired probe ID from the second connector to the device-side connector; A conversion adapter equipped with

2. 2. The conversion adapter according to claim 1, wherein, when the ultrasound probe has a memory that outputs a probe ID in response to the read request, the acquisition unit acquires the probe ID output from the memory by accessing the memory via the first connector based on the read request.

3. 3. The conversion adapter according to claim 2, further comprising a writing unit that, when a write request including an address and data in the memory is input from the device-side connector via the second connector, writes the data to the memory by accessing the memory via the first connector based on the write request.

4. 4. The conversion adapter according to claim 2, wherein the acquisition unit, when unable to acquire the probe ID from the memory based on the read request, activates the conversion unit to acquire the probe ID from the memory format.

5. 5. The conversion adaptor according to claim 1, further comprising a management memory for storing management information for the conversion adaptor itself.

6. a selector capable of switching a connection between any one of a plurality of terminals in the first connector that are different from the terminal of the probe ID and a predetermined terminal in the second connector; a switching control unit that controls switching of the selector based on the acquired probe ID; The conversion adaptor according to claim 1 , further comprising:

7. the converter receives, from the first connector, the probe ID, the bits of which are output in parallel from the hardwired circuit; the acquisition unit receives the read request input by serial communication from the ultrasound diagnostic device body via the device-side connector and the second connector, The conversion adaptor according to claim 1 , wherein the output unit outputs the acquired probe ID to the device-side connector via the second connector by serial communication.

8. The conversion adaptor according to claim 7 , wherein the number of terminals of the second connector is smaller than the number of terminals of the first connector.

9. 9. An ultrasonic diagnostic apparatus comprising the conversion adapter according to claim 1 and an ultrasonic diagnostic apparatus main body.

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