Wireless communication device, communication control method, and communication control program

Abstract

To provide a wireless communication device, a communication control method, and a communication control program capable of notifying a state even when synchronization cannot be established between devices.SOLUTION: A wireless communication device 1 includes a communication unit 2, a communication control unit 3 that receives a frame synchronization signal from another wireless communication device, and a monitoring control unit 4 that monitors the communication control unit 3. Either one of the communication control unit 3 and the monitoring control unit 4 controls the optical output of the communication unit 2 to generate an optical pulse signal indicating the state of the wireless communication device 1 when the communication control unit 3 does not receive a frame synchronization signal from the other wireless communication device, and transmits the optical pulse signal to the other wireless communication device.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a wireless communication device, a communication control method, and a communication control program.

Background Art

[0002] In a wireless communication system, a radio base station composed of a radio control device (REC: Radio Equipment Control) and a radio device (RE: Radio Equipment) is widely used. The radio base station composed of the radio control device and the radio device is configured to separate the functions implemented in the radio base station between the radio control device and the radio device. A CPRI (Common Public Radio Interface) is adopted for the interface between the radio control device and the radio device (for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The radio control device and the radio device establish synchronization between the devices by transmitting and receiving a frame synchronization signal to and from each other. On the other hand, when the radio device cannot receive the frame synchronization signal, the radio device does not transmit the frame synchronization signal to the radio control device. Therefore, when the radio device cannot receive the frame synchronization signal, the radio control device and the radio device cannot establish synchronization, resulting in a communication interruption. In this case, the radio control device and the radio device cannot notify each other of the states of the radio control device and the radio device, respectively.

[0005] One object of the present disclosure is to provide a wireless communication device, a communication control method, and a communication control program capable of notifying a state even when synchronization cannot be established between devices, in view of the problems described above.

Means for Solving the Problems

[0006] A first aspect is a wireless communication device, a communication unit, a communication control unit that receives a frame synchronization signal from another wireless communication device, a monitoring control unit that monitors the communication control unit, When the communication control unit does not receive the frame synchronization signal from the other wireless communication device, either the communication control unit or the monitoring control unit generates an optical pulse signal indicating the state of the wireless communication device by controlling the optical output of the communication unit, and transmits the optical pulse signal to the other wireless communication device.

[0007] A second aspect is a communication control method executed by a wireless communication device, When a frame synchronization signal is not received from another wireless communication device, an optical pulse signal indicating the state of the wireless communication device is generated by controlling the optical output of the wireless communication device, and the optical pulse signal is transmitted to the other wireless communication device.

[0008] A third aspect is a communication control program for causing a wireless communication device to execute, When a frame synchronization signal is not received from another wireless communication device, an optical pulse signal indicating the state of the wireless communication device is generated by controlling the optical output of the wireless communication device, and the optical pulse signal is transmitted to the other wireless communication device.

Advantages of the Invention

[0009] According to the present disclosure, even when synchronization cannot be established between devices, a wireless communication device, a communication control method, and a communication control program capable of notifying the state can be provided.

Brief Description of the Drawings

[0010]

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Embodiments for Carrying Out the Invention

[0011] Hereinafter, embodiments will be described with reference to the drawings. In the embodiments, the same elements are denoted by the same reference numerals, and redundant descriptions are omitted.

[0012] (Embodiment 1) The wireless communication device 1 according to Embodiment 1 will be described with reference to FIG. 1. FIG. 1 is a diagram showing a configuration example of the wireless communication device according to Embodiment 1. The wireless communication device 1 may be a wireless control device (REC) or a wireless device (RE). The wireless communication device 1 includes a communication unit 2, a communication control unit 3, and a monitoring control unit 4.

[0013] The communication unit 2 transmits the signal generated by the communication control unit 3 to another wireless communication device (not shown) facing the wireless communication device 1, receives the signal from the other wireless communication device, and transmits it to the communication control unit 3. The communication control unit 3 receives a frame synchronization signal from another wireless communication device via the communication unit 2. The monitoring control unit 4 monitors and controls the communication control unit 3.

[0014] Either the communication control unit 3 or the monitoring control unit 4 generates an optical pulse signal indicating the state of the wireless communication device 1 by controlling the optical output of the communication unit 2 when the communication control unit 3 does not receive a frame synchronization signal from another wireless communication device. Either the communication control unit 3 or the monitoring control unit 4 transmits the optical pulse signal to another wireless communication device. Note that the optical pulse signal may be referred to as an optical pulse control signal, an optical output control signal, an optical output ON·OFF signal, or a code pattern.

[0015] Next, an operation example of the wireless communication device 1 according to Embodiment 1 will be described with reference to FIG. 2. FIG. 2 is a flowchart showing an operation example of the wireless communication device according to Embodiment 1. The communication control unit 3 determines whether or not a frame synchronization signal has been received from another wireless communication device (step S1). The communication control unit 3 waits for a frame synchronization signal transmitted from another wireless communication device.

[0016] When the frame synchronization signal is received (YES in step S1), the communication control unit 3 transmits and receives data signals via the communication unit 2 (step S2). On the other hand, when the frame synchronization signal is not received (NO in step S1), either the communication control unit 3 or the monitoring control unit 4 transmits an optical pulse signal indicating the state of the wireless communication device 1 to another wireless communication device by controlling the optical output of the communication unit 2 (step S3).

[0017] As described above, either the communication control unit 3 or the monitoring control unit 4 controls the optical output of the communication unit 2 and transmits an optical pulse signal indicating the device state of the wireless communication device 1 to another wireless communication device when the frame synchronization signal is not received. Therefore, even when the wireless communication device 1 according to the first embodiment does not receive a frame synchronization signal from another wireless communication device and synchronization cannot be established, the state of the wireless communication device 1 can be notified to another wireless communication device by the optical pulse signal.

[0018] (Second Embodiment) Subsequently, the second embodiment will be described. Before explaining the details of the second embodiment, the outline of this embodiment will be explained.

[0019] <Outline> In a radio base station composed of REC and RE, in order to synchronize between REC and RE, REC transmits KByte, which is a frame synchronization signal, to RE. KByte is a control code called K28.5 that indicates the head portion of a data frame. KByte may also be referred to as a K code. When RE receives KByte from REC, RE transmits KByte to REC. By receiving KByte from RE, synchronization can be established between REC and RE.

[0020] Here, when the RE cannot receive the KByte transmitted from the REC, the RE does not transmit the KByte to the REC. Therefore, even if there is no abnormality in the functional unit that transmits the data signal from the RE to the REC, the data signal cannot be transmitted from the RE to the REC, and the state between the REC and the RE becomes a communication failure, resulting in a state where synchronization is impossible (LOF: Loss Of Frame). In this case, the RE cannot notify the REC of the state of the RE. Also, the REC cannot notify the RE of the state of the REC. Therefore, the REC can only determine that there is a communication failure with the RE, and cannot determine whether it is an abnormality in the communication functional unit of the RE or an abnormality in the software (SW). Therefore, the maintainer cannot determine whether the state can be restored by resetting (restarting) the communication functional unit of the RE, whether the state can be restored by resetting the RE device, or whether it is a system alarm state indicating a state where operation cannot be continued due to a power failure or the like. Also, if the maintainer performs a device reset of the RE to restore the state where synchronization is impossible, it takes time until the RE starts up, leading to a system down state. Furthermore, since the RE is generally installed in a place where it is not easily removable, the maintainer cannot easily identify the abnormal part of the RE at the location where the RE is installed in order to eliminate the state where synchronization is impossible. This embodiment realizes a configuration in which the REC and the RE can notify the states of the REC and the RE respectively even when the state where synchronization is impossible occurs.

[0021] <Configuration example of a wireless communication system> With reference to FIG. 3, a configuration example of the radio base station 100 will be described. FIG. 3 is a diagram showing a configuration example of the radio base station according to Embodiment 2. The radio base station 100 includes a REC10, a RE20, and a CPRI link 30. In FIG. 3, the radio base station 100 is configured to include one RE20, but a configuration including a plurality of RE20s may also be used.

[0022] The REC10 and the RE20 correspond to the wireless communication device 1 according to Embodiment 1. The REC10 is a device that controls the radio base station 100 and performs, for example, baseband signal processing. RE20 performs RF (Radio Frequency) signal processing on the signal transmitted from REC10 and generates a wireless signal. RE20 transmits the wireless signal to a user terminal (UE: User Equipment) (not shown) via an antenna (not shown). RE20 receives a wireless signal from the UE via the antenna and transmits the signal obtained by converting the wireless signal to REC10.

[0023] REC10 and RE20 communicate with each other via the CPRI link 30. REC10 and RE20 perform CPRI communication using a CPRI frame compliant with CPRI, which is the internal interface specification of the radio base station 100. REC10 and RE20 set a KByte indicating a frame synchronization signal, an L1 message indicating a layer 1 message, and an L3 message indicating a layer 3 message in the CPRI frame. REC10 and RE20 each transmit a CPPI frame to RE20 and REC10 via the CPRI link 30. REC10 and RE20 each receive a CPPI frame from RE20 and REC10 via the CPRI link 30. In the present embodiment, the direction from REC10 to RE20 is defined as the downlink direction, and the direction from RE20 to REC10 is defined as the uplink direction. That is, REC10 transmits a downlink signal to RE20, and RE20 transmits an uplink signal to REC10.

[0024] The CPRI link 30 is, for example, an optical cable. The CPRI link 30 is a communication line (transmission path) for performing CPRI communication between REC10 and RE20. The CPRI link 30 may be, for example, a communication line (transmission path) including a first transmission path through which a signal is transmitted from REC10 to RE20 and a second transmission path through which a signal is transmitted from RE20 to REC10. Alternatively, the CPRI link 30 may be configured such that a signal transmitted from REC10 to RE20 and a signal transmitted from RE20 to REC10 are transmitted and received through a single transmission path (communication line). Note that the CPRI link 30 may be referred to as a CPRI cable.

[0025] <Configuration Example of Wireless Control Device (REC)> Next, a configuration example of REC10 will be described. REC10 includes a CPU (Central Processing Unit) 11, an FPGA (field-programmable gate array) 12, an SFP (Small Form Factor Pluggable) 13, and a PLD (Programmable Logic Device) 14.

[0026] The CPU 11 reads software instructions stored in a memory (not shown) and performs data operations. The CPU 11 functions as a communication control unit. The CPU 11 processes L3 messages, which are messages in communication at a higher layer than the signals generated by the FPGA 12. The CPU 11 receives L3 messages from other radio base stations (not shown) and core network devices (not shown), and transmits them to the RE20 via the FPGA 12 and the SFP 13. Also, the CPU 11 receives L3 messages from the RE20 via the SFP 13 and the FPGA 12.

[0027] The FPGA 12 corresponds to the communication control unit 3 in Embodiment 1. The FPGA 12 functions as a communication control unit. The FPGA 12 may be referred to as the first communication control unit, and the CPU 11 may be referred to as the second communication control unit. The FPGA 12 processes L1 messages transmitted and received between the FPGA 12 and the RE20. The FPGA 12 receives L3 messages from the CPU 11. The FPGA 12 generates a CPRI frame, which is a data signal, including a KByte, which is a frame synchronization symbol, an L1 message, and an L3 message. The KByte is set at the head of the CPRI frame. The FPGA 12 transmits the CPRI frame including the KByte to the RE20 via the SFP 13.

[0028] FPGA 12 waits for a CPRI frame by waiting for a KByte, which is a frame synchronization code indicating the start of the CPRI frame, via SFP 13. FPGA 12 receives the CPRI frame from RE 20 via SFP 13. FPGA 12 generates an L1 message and an L3 message from the CPRI frame. FPGA 12 transmits the L3 message to CPU 11.

[0029] FPGA 12 can control the ON and OFF of the optical output of SFP 13 and is configured to be able to control the optical output of SFP 13 by turning the optical output ON and OFF. Either FPGA 12 or PLD 14 functions as an optical control unit for the operation system, and the other functions as an optical control unit for the standby system. The optical control unit for the operation system performs optical output control. When the optical control unit for the operation system is in an abnormal state, the optical control unit for the standby system switches to the optical control unit for the operation system and performs optical output control. That is, with respect to optical output control, FPGA 12 is redundantly configured with PLD 14.

[0030] FPGA 12 monitors the optical output state of SFP 13 and detects that an optical pulse signal has been transmitted from RE 20. When FPGA 12 functions as the optical control unit for the operation system, it receives the optical pulse signal transmitted from RE 20. When FPGA 12 does not receive KByte from RE 20 and performs optical output control as the optical control unit for the operation system, it generates an optical pulse signal indicating the state of REC 10 by controlling the optical output of SFP 13 and transmits the optical pulse signal to RE 20.

[0031] When the optical pulse signal received by FPGA 12 from RE 20 indicates an error state (ERR state) where a downstream signal cannot be received, FPGA 12 and SFP 13 are restarted. In other words, when the optical pulse signal received by FPGA 12 from RE 20 indicates that KByte cannot be received, FPGA 12 and SFP 13 are restarted. In the following description, restarting FPGA 12 and SFP 13 may be described as "resetting the communication function unit".

[0032] When FPGA12 restarts CPU11, FPGA12, and SFP13, it takes several minutes for CPU11, FPGA12, and SFP13 to start up. On the other hand, when FPGA12 restarts FPGA12 and SFP13 without restarting CPU11, FPGA12 and SFP13 start up in a few seconds. Therefore, when the optical pulse signal received by FPGA12 from RE20 indicates that KByte cannot be received, FPGA12 restarts FPGA12 and SFP13 without restarting CPU11.

[0033] FPGA12 performs a reset of the communication function unit of REC10, and after FPGA12 and SFP13 restart, generates an optical pulse signal based on a reset control pattern indicating that the reset of the communication function unit of REC10 has been performed, and transmits it to RE20. In other words, after FPGA12 and SFP13 restart, FPGA12 transmits an optical pulse signal indicating that FPGA12 and SFP13 have restarted to RE20. When FPGA12 transmits an optical pulse signal indicating that the reset of the communication function unit of REC10 has been performed, it ends the optical output control and transmits a CPRI frame including KByte to RE20.

[0034] When FPGA12 performs optical output control as an optical control unit of the operation system and receives an optical pulse signal indicating that the communication function unit of RE20 has been reset from RE20, it ends the optical output control and transmits a CPRI frame including KByte to RE20. When the error state where the downstream signal cannot be received is recovered, FPGA12 receives a CPRI frame in which information indicating that the error state has been recovered is set together with KByte. When the error state is recovered, FPGA12 continues the CPRI communication.

[0035] Also, when the FPGA 12 performs optical output control, the FPGA 12 generates an optical pulse signal indicating a health check pattern for performing optical output control and notifying the state of the REC 10. The FPGA 12 transmits the generated optical pulse signal to the RE 20. For example, after receiving an optical pulse signal indicating that the communication function unit has been reset, if the FPGA 12 receives from the RE 20 an optical pulse signal indicating an error state where the downstream signal cannot be received again, the FPGA 12 transmits an optical pulse signal indicating the health check pattern. Also, as will be described later, the RE 20 also transmits a health check pattern, but the health check pattern transmitted by the REC 10 and the health check pattern transmitted by the RE 20 are transmitted asynchronously. Note that the FPGA 12 may transmit the health check pattern at the timing when the REC 10 transitions to an abnormal state. Also, the health check pattern transmitted by the REC 10 and the health check pattern transmitted by the RE 20 may be transmitted synchronously.

[0036] The FPGA 12 receives from the PLD 14 information indicating whether the REC 10 is normal or not. Also, the FPGA 12 receives from the SFP 13 information indicating whether the communication line between the REC 10 and the RE 20 is normal or not. When the information received from the PLD 14 and the SFP 13 indicates that it is normal, the FPGA 12 determines that the REC 10 is normal. When there is information indicating an abnormality in any of the information received from the PLD 14 and the SFP 13, the FPGA 12 determines that the REC 10 is abnormal.

[0037] The FPGA 12 changes the control pattern of the optical output according to whether the REC 10 is normal or not, and generates an optical pulse signal indicating whether the REC 10 is normal or not. Also, when the REC 10 is abnormal, the FPGA 12 receives from at least one of the PLD 14 and the SFP 13 information indicating the abnormal location of the REC 10. The FPGA 12 generates an optical pulse signal indicating the abnormal location of the REC 10 based on the control pattern of the optical output according to the abnormal location of the REC 10. The FPGA 12 transmits the optical pulse signal based on each control pattern to the RE 20.

[0038] When FPGA 12 determines that REC 10 is normal, it generates an optical pulse signal based on a first control pattern indicating that REC 10 is normal. Also, when FPGA 12 determines that REC 10 is abnormal and the abnormal part is the communication line, it generates an optical pulse signal based on a second control pattern indicating that the communication line is the abnormal part.

[0039] In addition, FPGA 12 may generate an optical pulse signal based on a control pattern for instructing RE 20 to reset, and an optical pulse signal based on at least one control pattern for notifying at least one combination of failure content and service impact level. The optical pulse signal for notifying at least one combination of failure content and service impact level may include an optical pulse signal based on a control pattern indicating a combination of an alarm (ALM) indicating a high service impact level and an ALM code indicating the failure content. Also, the optical pulse signal for notifying at least one combination of failure content and service impact level may include an optical pulse signal based on a control pattern indicating a combination of an error (ERR) indicating that the service impact level is lower than that of the ALM and an ERR code indicating the failure content.

[0040] SFP 13 corresponds to the communication unit 2 in Embodiment 1. SFP 13 functions as a communication unit. SFP 13 converts an electrical signal into an optical signal. SFP 13 converts the CPRI frame generated by FPGA 12 into an optical signal and transmits the optical signal to RE 20. SFP 13 converts the CPRI frame transmitted from RE 20 from an optical signal into an electrical signal and transmits it to FPGA 12. SFP 13 detects that the communication line between REC 10 and RE 20 is abnormal. SFP 13 transmits information indicating whether the communication line is normal to FPGA 12 and PLD 14. Note that SFP 13 may transmit information indicating that the communication line is abnormal to the functional unit that performs optical output control among FPGA 12 and PLD 14.

[0041] SFP13 is configured to continue with the optical output in the ON state while the FPGA12 transmits and receives CPRI frames. When the FPGA12 is unable to receive KBytes, SFP13 switches the ON or OFF of the optical output according to the control of either the FPGA12 or the PLD14.

[0042] PLD14 corresponds to the monitoring control unit 4 in Embodiment 1. PLD14 functions as a monitoring control unit. PLD14 performs monitoring control of the FPGA12 functioning as the first communication control unit and the CPU11 functioning as the second communication control unit. PLD14 detects that either the CPU11 or the FPGA12 has become abnormal. When the FPGA12 performs optical output control, PLD14 transmits information indicating whether REC10 is normal to the FPGA12. Also, when the FPGA12 performs optical output control and REC10 is abnormal, PLD14 identifies the abnormal location of REC10 and transmits information indicating the abnormal location to the FPGA12. PLD14 receives information indicating whether the communication line between REC10 and RE20 is normal from SFP13.

[0043] PLD14 can control the ON and OFF of the optical output of SFP13, and is configured to be able to control the optical output of SFP13 by turning the optical output ON and OFF. As described above, either the FPGA12 or the PLD14 functions as the optical control unit of the operation system, and the other functions as the optical control unit of the standby system. The optical control unit of the operation system performs optical output control. Among the FPGA12 and the PLD14, the optical control unit of the standby system is configured to perform optical output control when the optical control unit of the operation system is in an abnormal state. Also, when the FPGA12 transitions to an abnormal state, PLD14 transitions to the optical control unit of the operation system, performs optical output control, and transmits an optical pulse signal to RE20. That is, with respect to optical output control, PLD14 is redundantly configured with the FPGA12.

[0044] PLD14 monitors the optical output state of SFP13 and detects that an optical pulse signal has been transmitted from RE20. When functioning as the optical control unit of the operation system, PLD14 receives the optical pulse signal transmitted from RE20. When performing optical output control as the optical control unit of the operation system, PLD14 performs the same optical output control as FPGA12. Regarding the optical output control of PLD14, descriptions common to the optical output control performed by FPGA12 are omitted as appropriate.

[0045] If the optical pulse signal received by PLD14 from RE20 indicates that it is in an error state (ERR state) where the downstream signal cannot be received, PLD14 restarts FPGA12 and SFP13. PLD14 performs a reset of the communication function unit of REC10, generates an optical pulse signal based on a reset control pattern indicating that the reset of the communication function unit of REC10 has been performed after FPGA12 and SFP13 have restarted, and transmits it to RE20 via SFP13. When PLD14 transmits an optical pulse signal indicating that the reset of the communication function unit of REC10 has been performed, it terminates the optical output control. PLD14 transmits information indicating the resumption of CPRI communication to FPGA12.

[0046] When performing optical output control as the optical control unit of the operation system and receiving an optical pulse signal from RE20 indicating that the reset of the communication function unit of RE20 has been performed, PLD14 terminates the optical output control. PLD14 transmits information indicating the resumption of CPRI communication to FPGA12.

[0047] When performing optical output control as the optical control unit of the operation system, PLD14 generates an optical pulse signal indicating a health check pattern and transmits the optical pulse signal to RE20. After receiving an optical pulse signal indicating that the reset of the communication function unit has been performed, if PLD14 receives from RE20 an optical pulse signal indicating that it is again in an error state where the downstream signal cannot be received, it may transmit an optical pulse signal indicating a health check pattern.

[0048] When the CPU 11 and the FPGA 12 are normal and the information received from the SPF 13 indicates that the communication line is normal, the PLD 14 determines that the REC 10 is normal. When either the CPU 11 or the FPGA 12 is abnormal or the information received from the SPF 13 indicates an abnormality, the PLD 14 determines that the REC 10 is abnormal.

[0049] The PLD 14 changes the control pattern of the optical output according to whether the REC 10 is normal or not, and generates an optical pulse signal indicating whether the REC 10 is normal or not. When the REC 10 is abnormal, if the information received from the SFP 13 indicates that it is not normal, the PLD 14 identifies that the communication line is abnormal. Also, the PLD 14 identifies the abnormal location based on the monitored content. When the REC 10 is abnormal, the PLD 14 generates an optical pulse signal indicating the abnormal location of the REC 10 based on the control pattern of the optical output according to the abnormal location of the REC 10.

[0050] In addition to the optical pulse signals based on the first control pattern and the second control pattern, the PLD 14 generates an optical pulse signal based on a third control pattern indicating that the FPGA 12 is abnormal. The PLD 14 transmits the optical pulse signals based on each control pattern to the RE 20. Note that the PLD 14 may also generate an optical pulse signal based on a control pattern for instructing a reset to the RE 20 and an optical pulse signal based on at least one control pattern for notifying at least one combination of the failure content and the service impact degree.

[0051] Here, with reference to FIG. 4, the optical pulse signal indicating the health check pattern will be described. FIG. 4 is a diagram for explaining the optical pulse signal indicating the health check pattern. In order from the left in FIG. 4, it shows an example of the device state of the REC 10, the optical output state of the SFP 13, and the optical pulse signal transmitted to the RE 20. For the sake of convenience of explanation, it will be described that the PLD 14 performs optical output control.

[0052] As shown at the top of FIG. 4, when the device state of REC10 is normal (OK), PLD14 performs optical output control based on the first control pattern and generates an optical pulse signal based on the first control pattern. PLD14 transmits the generated optical pulse signal to RE20. Note that the control pattern may also be referred to as a code pattern. Note that FPGA12 also generates an optical pulse signal based on the first control pattern when the device state of REC10 is normal (OK), similar to PLD14.

[0053] As shown second from the top in FIG. 4, when the communication line is abnormal, PLD14 performs optical output control based on the second control pattern and generates an optical pulse signal based on the second control pattern. PLD14 transmits the generated optical pulse signal to RE20. Note that FPGA12 also generates an optical pulse signal based on the second control pattern when the communication line is abnormal, similar to PLD14.

[0054] As shown third from the top in FIG. 4, when FPGA12 is abnormal, such as a failure of FPGA12 in REC10, PLD14 performs optical output control based on the third control pattern and generates an optical pulse signal based on the third control pattern. PLD14 transmits the optical pulse signal to RE20. When FPGA12 is abnormal, PLD14 may generate an optical pulse signal indicating that FPGA12 is abnormal by pulling up the power voltage on the substrate where SFP13 is arranged. That is, PLD14 generates an optical pulse signal based on the fourth control pattern in which the ON state of the optical output continues. Note that when FPGA12 is abnormal, PLD14 may perform optical output control based on the third control pattern different from the first control pattern and the second control pattern and generate an optical pulse signal indicating that FPGA12 is abnormal.

[0055] The bottom of FIG. 4 shows a state where RE20 is not connected to REC10. Since RE20 is not connected to REC10, PLD14 stops the optical output and does not transmit an optical pulse signal.

[0056] <Configuration Example of Radio Device (RE)> Next, a configuration example of RE20 will be described. RE20 includes a CPU 21, an FPGA 22, an SFP 23, and a PLD 24. Since the CPU 21, the FPGA 22, the SFP 23, and the PLD 24 basically have the same configuration as the CPU 21, the FPGA 22, the SFP 23, and the PLD 24 respectively, descriptions that are common to them will be omitted as appropriate.

[0057] The CPU 21 reads software instructions stored in a memory (not shown) and performs data operations. The CPU 21 functions as a communication control unit. The CPU 21 processes L3 messages. The CPU 21 receives L3 messages from the REC 10 via the SFP 23 and the FPGA 22, generates a radio signal, and transmits the radio signal to a UE (not shown) via an antenna (not shown). The CPU 21 receives a radio signal via the antenna, generates an L3 message based on the radio signal, and transmits the L3 message to the REC 10 via the FPGA 22 and the SFP 23.

[0058] The FPGA 22 corresponds to the communication control unit 3 in Embodiment 1. The FPGA 22 functions as a communication control unit. The FPGA 22 may be referred to as a first communication control unit, and the CPU 21 may be referred to as a second communication control unit. The FPGA 22 processes L1 messages transmitted and received between the FPGA 22 and the REC 10. The FPGA 22 receives L3 messages from the CPU 21. The FPGA 22 generates a CPRI frame, which is a data signal including a KByte, which is a frame synchronization symbol, an L1 message, and an L3 message. The FPGA 22 transmits the CPRI frame including the KByte to the REC 10 via the SFP 23.

[0059] The FPGA 22 waits for a CPRI frame by waiting for a KByte, which is a frame synchronization symbol indicating the head of the CPRI frame, via the SFP 23. The FPGA 22 receives the CPRI frame from the REC 10 via the SFP 23. The FPGA 22 generates an L1 message and an L3 message from the CPRI frame. The FPGA 22 transmits the L3 message to the CPU 21.

[0060] The FPGA 22 can control the ON and OFF of the optical output of the SFP 23, and is configured to be able to control the optical output of the SFP 23 by turning the optical output ON and OFF. Either one of the FPGA 22 and the PLD 24 functions as the optical control unit of the operation system, and the other functions as the optical control unit of the standby system. The optical control unit of the operation system performs optical output control. When the optical control unit of the operation system is in an abnormal state, the optical control unit of the standby system switches to the optical control unit of the operation system and performs optical output control. That is, with respect to the optical output control, the FPGA 22 is redundantly configured with the PLD 24.

[0061] The FPGA 22 monitors the optical output state of the SFP 23 and detects that an optical pulse signal has been transmitted from the REC 10. When the FPGA 22 functions as the optical control unit of the operation system, it receives the optical pulse signal transmitted from the RE 20. When the FPGA 22 does not receive the KByte from the REC 10 and performs optical output control as the optical control unit of the operation system, it generates an optical pulse signal indicating the state of the RE 20 by controlling the optical output of the SFP 23 and transmits the optical pulse signal to the REC 10. When the FPGA 22 does not receive the KByte from the REC 10 and the FPGA 22 performs optical output control, it generates an optical pulse signal indicating an error state (ERR state) in which the downstream signal cannot be received. The FPGA 22 performs optical output control based on an uncontrollable synchronization pattern and transmits to the REC 10 an optical pulse signal based on the uncontrollable synchronization pattern and indicating the ERR state.

[0062] When the communication function unit reset is performed in the REC 10, the FPGA 22 receives, via the SFP 23, an optical pulse signal indicating that the communication function unit reset of the REC 10 has been performed. In other words, the FPGA 22 receives from the REC 10 an optical pulse signal based on a reset control pattern indicating that the SFP 13 and the FPGA 12 of the REC 10 have restarted. When the FPGA 22 receives an optical pulse signal based on the reset control pattern, it ends the optical output control and waits for a CPRI frame including the KByte transmitted from the REC 10.

[0063] After receiving the optical pulse signal based on the reset control pattern, if the FPGA22 cannot receive KByte within a predetermined time, it resets the communication function unit of the RE20. In other words, after receiving the optical pulse signal indicating that the SFP13 of the REC10 and the FPGA12 have restarted, if the FPGA22 does not receive KByte, which is the frame synchronization signal, it restarts the SFP23 and the FPGA22.

[0064] After the FPGA22 and the SFP23 have restarted, the FPGA22 generates an optical pulse signal based on the reset control pattern indicating that the communication function unit of the RE20 has been reset, and transmits it to the REC10. In other words, after the FPGA22 and the SFP23 have restarted, the FPGA22 transmits an optical pulse signal indicating that the FPGA22 and the SFP23 have restarted to the REC10. When the FPGA22 transmits an optical pulse signal indicating that the communication function unit of the RE20 has been reset, it ends the optical output control and waits for the CPRI frame including KByte transmitted from the REC10.

[0065] After receiving from the REC10 an optical pulse signal indicating that the communication function unit of the REC10 has been reset, if the FPGA22 receives KByte, it sets an ERR recovery notification indicating that the ERR state where the downstream signal cannot be received has been recovered in the CPRI frame. The FPGA22 sets the ERR recovery notification in the CPRI frame together with KByte. The FPGA22 transmits the CPRI frame to the REC10. In other words, after receiving an optical pulse signal indicating that the SFP23 and the FPGA22 have restarted, if the FPGA22 receives KByte, it transmits to the REC10 a CPRI frame, which is a data signal indicating that the state where KByte cannot be received has been recovered.

[0066] Also, when the FPGA 22 performs optical output control as an operation system optical control unit, it generates an optical pulse signal indicating a health check pattern for performing optical output control and notifying the state of the RE 20. After the FPGA 22 transmits an optical pulse signal indicating that the communication function unit has been reset, if it transmits an optical pulse signal indicating an error state where the downstream signal cannot be received again to the REC 10, it may transmit an optical pulse signal indicating a health check pattern.

[0067] The FPGA 22 receives information indicating whether the RE 20 is normal from the PLD 24. The FPGA 22 receives information indicating whether the communication line between the REC 10 and the RE 20 is normal from the SFP 23. When the information received from the PLD 24 and the SPF 23 indicates that it is normal, the FPGA 22 determines that the RE 20 is normal. When there is information indicating an abnormality in any of the information received from the PLD 24 and the SPF 23, the FPGA 22 determines that the RE 20 is abnormal.

[0068] The FPGA 22 changes the optical output control pattern according to whether the RE 20 is normal and generates an optical pulse signal indicating whether the RE 20 is normal. When the RE 20 is abnormal, the FPGA 22 receives information indicating the abnormal location of the RE 20 from at least one of the PLD 24 and the SFP 23, and generates an optical pulse signal indicating the abnormal location of the RE 20 based on the optical output control pattern corresponding to the abnormal location of the RE 20.

[0069] The FPGA 22 generates a health check pattern similar to that of the FPGA 12. When the FPGA 22 determines that the RE 20 is normal, it generates an optical pulse signal based on the first control pattern indicating that the RE 20 is normal. Also, when the FPGA 22 determines that the RE 20 is abnormal and the abnormal location is the communication line, it generates an optical pulse signal based on the second control pattern indicating that the communication line is the abnormal location.

[0070] Note that the FPGA 22 may generate an optical pulse signal based on a control pattern for instructing a reset to the REC 10 and an optical pulse signal based on at least one control pattern for notifying a combination of at least one failure content and service impact level. Also, in the present embodiment, for convenience, the FPGA 22 will be described as generating an optical pulse signal based on the same control pattern as the FPGA 12, but the FPGA 22 may generate an optical signal based on a control pattern different from that of the FPGA 12.

[0071] The SFP 23 corresponds to the communication unit 2 in the first embodiment. The SFP 23 functions as a communication unit. The SFP 23 converts an electrical signal into an optical signal. The SFP 23 converts the CPRI frame generated by the FPGA 22 into an optical signal and transmits the optical signal to the REC 10. The SFP 23 converts the CPRI frame transmitted from the REC 10 from an optical signal into an electrical signal and transmits it to the FPGA 22. The SFP 23 detects that the communication line between the REC 10 and the RE 20 is abnormal. The SFP 23 transmits information indicating whether the communication line is normal to the FPGA 22 and the PLD 24. Note that the SFP 23 may transmit information indicating whether the communication line is normal to a functional unit that performs optical output control among the FPGA 22 and the PLD 24 and indicates that the communication line is abnormal.

[0072] The SFP 23 is configured to continue in the ON state of the optical output while the FPGA 22 performs transmission and reception of the CPRI frame. When the FPGA 22 cannot receive KBytes, the SFP 23 switches the ON or OFF of the optical output according to the control of either the FPGA 22 or the PLD 24.

[0073] PLD24 corresponds to the monitoring control unit 4 in Embodiment 1. PLD24 functions as a monitoring control unit. PLD24 performs monitoring control of the FPGA22 that functions as the first communication control unit and the CPU21 that functions as the second communication control unit. PLD24 detects that either the CPU21 or the FPGA22 has become abnormal. When the FPGA22 performs optical output control, PLD24 transmits information indicating whether the RE20 is normal to the FPGA22. When the FPGA22 performs optical output control and the RE20 is abnormal, PLD24 identifies the abnormal location of the RE20 and transmits information indicating the abnormal location to the FPGA22. PLD24 receives information indicating whether the communication line between the REC10 and the RE20 is normal from the SFP23.

[0074] PLD24 can control the ON and OFF of the optical output of the SFP23, and is configured to be able to control the optical output of the SFP23 by turning the optical output ON and OFF. Regarding optical output control, PLD24 is redundantly configured with the FPGA22. Either one of the FPGA22 and the PLD24 functions as the optical control unit of the operation system, and the other functions as the optical control unit of the standby system. The optical control unit of the operation system performs optical output control. Among the FPGA22 and the PLD24, the optical control unit of the standby system is configured to perform optical output control when the optical control unit of the operation system enters an abnormal state. When the FPGA22 transitions to an abnormal state, PLD24 transitions to the optical control unit of the operation system, performs optical output control, and transmits an optical pulse signal to the REC10.

[0075] PLD24 monitors the optical output state of SFP23 and detects that an optical pulse signal has been transmitted from REC10. When functioning as the optical control unit of the operation system, PLD24 receives the optical pulse signal transmitted from RE20. When PLD24 does not receive KByte from REC10 and performs optical output control as the optical control unit of the operation system, it generates an optical pulse signal indicating the state of RE20 by controlling the optical output of SFP23 and transmits the optical pulse signal to REC10. When performing optical output control as the optical control unit of the operation system, PLD24 performs the same optical output control as FPGA22. Regarding the optical output control of PLD24, descriptions common to the optical output control performed by FPGA22 are omitted as appropriate.

[0076] When PLD24 does not receive KByte from REC10 and PLD24 performs optical output control, it generates an optical pulse signal indicating an ERR state where the downstream signal cannot be received. PLD24 performs optical output control based on an uncontrollable synchronization pattern, generates an optical pulse signal based on the uncontrollable synchronization pattern, and transmits the generated optical pulse signal to REC10.

[0077] When the communication function unit reset is performed at REC10, PLD24 receives, via SFP23, an optical pulse signal indicating that the communication function unit reset of REC10 has been performed. When PLD24 receives an optical pulse signal based on a reset control pattern, it terminates the optical output control and transmits information indicating the resumption of CPRI communication to FPGA22.

[0078] After the FPGA 22 receives an optical pulse signal based on a reset control pattern and does not receive KBytes within a predetermined time, the PLD 24 resets the communication function unit of the RE 20. After the FPGA 22 and the SFP 23 restart, the PLD 24 generates an optical pulse signal based on a reset control pattern indicating that the communication function unit of the RE 20 has been reset and transmits it to the REC 10 via the SFP 23. When the PLD 24 transmits an optical pulse signal indicating that the communication function unit of the RE 20 has been reset, it ends the optical output control and transmits information indicating to resume the CPRI communication to the FPGA 22.

[0079] When the PLD 24 performs optical output control as an optical control unit of the operation system, it performs optical output control and generates an optical pulse signal indicating a health check pattern for notifying the state of the RE 20. After the PLD 24 transmits an optical pulse signal indicating that the communication function unit has been reset, if it transmits an optical pulse signal indicating an error state where a downstream signal cannot be received again to the REC 10, it may transmit an optical pulse signal indicating a health check pattern.

[0080] The PLD 24 determines that the RE 20 is normal when the CPU 21 and the FPGA 22 are normal and the information received from the SPF 23 indicates that the communication line is normal. The PLD 24 determines that the RE 20 is abnormal when either the CPU 21 or the FPGA 22 is abnormal or the information received from the SPF 23 indicates an abnormality.

[0081] The PLD 24 changes the control pattern of the optical output according to whether the RE 20 is normal or not and generates an optical pulse signal indicating whether the RE 20 is normal or not. When the RE 20 is abnormal, if the information received from the SFP 23 indicates that it is not normal, the PLD 24 identifies that the communication line is abnormal. The PLD 24 identifies the abnormal location based on the monitored content. When the RE 20 is abnormal, the PLD 24 generates an optical pulse signal indicating the abnormal location of the RE 20 based on the control pattern of the optical output according to the abnormal location of the RE 20.

[0082] In addition to the optical pulse signal based on the first control pattern and the second control pattern, PLD24 generates an optical pulse signal based on a third control pattern indicating that FPGA22 is abnormal. Note that PLD24 may also generate an optical pulse signal based on a control pattern for instructing REC10 to perform reset, and an optical pulse signal based on at least one control pattern for notifying at least one combination of failure content and service impact level. Also, in the present embodiment, PLD24 is described as generating an optical pulse signal based on the same control pattern as PLD14, but PLD24 may generate an optical signal based on a control pattern different from that of PLD14.

[0083] <Operation Example of Radio Base Station> Next, an operation example of the radio base station 100 according to Embodiment 1 will be described. With reference to FIGS. 5 to 8, signals transmitted in each device state will be described. FIGS. 5 to 8 are diagrams for explaining signals transmitted in each device state. Note that the signals transmitted in each device state are basically the same for both REC10 and RE20, and thus, hereinafter, the device state of REC10 will be used for the description. Also, for the sake of convenience in the description, it will be described that FPGA12 functions as an operation system optical control unit and PLD14 functions as a standby system optical control unit.

[0084] First, FIG. 5 will be described. FIG. 5 shows signals transmitted in a state where REC10 and RE20 are in a normal state, RE20 receives KBytes transmitted from REC10, and REC10 receives KBytes transmitted from RE20. As shown in FIG. 5, solid arrows represent L3 messages. Dashed-dotted lines represent L1 messages and represent CPRI frames including KBytes. Dotted arrows represent optical pulse signals. Note that the signals indicated by each arrow are the same in FIGS. 6 to 8.

[0085] As shown in FIG. 5, when REC10 and RE20 are in a normal state, CPU11 transmits the L3 message to RE20 via FPGA12, SFP13, and CPRI link 30. The L3 message is transmitted to CPU21 of RE20 via SFP23 and FPGA22. Also, when REC10 and RE20 are in a normal state, FPGA12 transmits a CPRI frame set with KByte including the L1 message to RE20 via SFP13 and CPRI link 30. The L1 message is transmitted to FPGA22 via SFP23.

[0086] In this way, when REC10 and RE20 are in a normal state and synchronization between REC10 and RE20 can be established, REC10 can transmit the L1 message and the L3 message to RE20. Since RE20 can also transmit the L1 message and the L3 message to REC10, normal communication can be established.

[0087] Next, FIG. 6 will be described. FIG. 6 shows signals transmitted in a state where the KByte transmitted from REC10 is not received by RE20 and synchronization between REC10 and RE20 is not established. As shown in FIG. 6, when synchronization between REC10 and RE20 is not established, CPU11 transmits the L3 message to FPGA12. However, since REC10 and RE20 are in a state where synchronization is impossible, the L3 message cannot be transmitted to RE20.

[0088] Also, since synchronization has not been established between REC10 and RE20, FPGA12 cannot send a CPRI frame to RE20 even if it sends a CPRI frame containing KByte. After sending the CPRI frame, FPGA12 receives an optical pulse signal from RE20 indicating that it is in an ERR state where it cannot receive KByte or the downstream signal within a predetermined time from RE20. FPGA12 controls the optical output of SFP13 and sends the optical pulse signal to RE20. That is, FPGA12 sends the optical pulse signal to RE20, and via SFP23, FPGA22 receives the optical pulse signal.

[0089] In this way, when synchronization between REC10 and RE20 cannot be established, REC10 cannot send an L3 message to RE20 but can send an optical pulse signal to RE20. Also, since RE20 can also send an optical pulse signal to REC10, normal communication can be established for the L1 message.

[0090] Next, FIG. 7 will be described. FIG. 7 shows the signals transmitted when the FPGA12 of REC10 is in an abnormal state such as a failure. As shown in FIG. 7, when FPGA12 is in an abnormal state, CPU11 sends an L3 message to FPGA12, but since FPGA12 is in an abnormal state, REC10 cannot send the L3 message to RE20. Also, since FPGA12 is in an abnormal state, FPGA12 cannot send an L1 message, so REC10 cannot send the L1 message and the L3 message. In this case, since FPGA12 cannot perform optical output control, PLD14 operates as the optical control unit of the operation system from the optical control unit of the standby system. PLD14 generates an optical pulse signal by controlling the optical output of SFP13 and sends the optical pulse signal to RE20. The optical pulse signal is received by FPGA22.

[0091] Thus, when the FPGA 12 of REC10 is in an abnormal state, REC10 cannot send the L1 message and the L3 message to RE20, but can send an optical pulse signal to RE20. Since RE20 can also send an optical pulse signal to REC10, REC10 and RE20 can send and receive the states of REC10 and RE20 to and from each other. Therefore, the maintainer can grasp the states of REC10 and RE20, and can isolate the abnormal part.

[0092] Next, FIG. 8 will be described. FIG. 8 shows signals transmitted when the CPU 11 of REC10 is in an abnormal state such as a failure. As shown in FIG. 8, when the CPU 11 is in an abnormal state, since the CPU 11 cannot send the L3 message to the FPGA 12, REC10 cannot send the L3 message to RE20. On the other hand, since the FPGA 12 is in a normal state, the CPRI frame set with KByte including the L1 message is sent to RE20 via the SFP 13 and the CPRI link 30. The L1 message is sent to the FPGA 22 via the SFP 23.

[0093] Thus, when the CPU 11 of REC10 is in an abnormal state, REC10 cannot send the L3 message to RE20, but can send the L1 message to RE20. Since RE20 can also send the L1 message to REC10, normal communication can be established regarding the L1 message. When the CPU 11 is in an abnormal state, the FPGA 12 may send and receive the L1 message with the FPGA 22, or may send and receive an optical pulse signal.

[0094] Subsequently, with reference to FIGS. 9 to 12, an operation example when the KByte transmitted from REC10 cannot be received at RE20 will be described. FIGS. 9 to 12 are diagrams showing operation examples when synchronization cannot be established between the REC and the RE. In FIGS. 9 to 12, although REC10 and RE20 are connected by the CPRI link 30, the illustration of the CPRI link 30 is omitted. Also, the description will be made on the premise that the FPGA 12 and the FPGA 22 perform the operations of REC10 and RE20, respectively.

[0095] First, as shown in FIG. 9, REC10 (FPGA12) transmits a CPRI frame including KByte to RE20 (step S1).

[0096] If RE20 (FPGA22) cannot receive a CPRI frame including KByte, it performs optical output control based on a synchronization uncontrollable pattern and transmits an optical pulse signal indicating that the downlink signal is in an ERR state where it cannot be received (step S2).

[0097] REC10 monitors the optical output state, detects an optical pulse signal indicating that the downlink signal is in an ERR state where it cannot be received, and performs a reset of the communication function unit (step S3). When FPGA12 receives an optical pulse signal indicating that RE20 has not received KByte which is a frame synchronization signal, it restarts FPGA12 and SFP13 which are the communication function units.

[0098] Next, as shown in FIG. 10, REC10 performs optical output control based on a reset control pattern and transmits an optical pulse signal indicating that the communication function unit has been reset to RE20 (step S4). After transmitting the optical pulse signal, FPGA12 ends the optical output control and transmits a CPRI frame including KByte. FPGA22 monitors the optical output state and receives the optical pulse signal. Then, FPGA22 ends the optical output control and waits for a CPRI frame including KByte.

[0099] If RE20 cannot receive a CPRI frame including KByte, RE20 performs a reset of the communication function unit (step S5) and transmits an optical pulse signal indicating that the communication function unit has been reset (step S6). When FPGA22 does not receive KByte which is a frame synchronization signal from REC10, it restarts FPGA12 and SFP13 which are the communication function units. FPGA22 performs optical output control based on a reset control pattern and transmits an optical pulse signal indicating that the communication function unit has been reset to REC10.

[0100] Next, as shown in FIG. 11, when REC10 receives an optical pulse signal indicating that the communication function unit has been reset, it terminates the optical output control and transmits a CPRI frame including KByte to RE20 (step S7). FPGA12 monitors the optical output state and receives an optical pulse signal indicating that the communication function unit has been reset. FPGA12 terminates the optical output control and transmits a CPRI frame including KByte to RE20.

[0101] When RE20 receives a CPRI frame including KByte from REC10, it transmits a CPRI frame including an ERR recovery notification indicating that KByte and the ERR state where the downstream signal cannot be received have been recovered (step S8). FPGA22 terminates the optical output control and waits for a CPRI frame including KByte. When FPGA22 receives a CPRI frame including KByte, it sets KByte and the ERR recovery notification in the CPRI frame and transmits the CPRI frame to REC10.

[0102] Next, FIG. 12 will be described. When RE20 does not receive the CPRI frame including KByte transmitted in step S7, REC10 and RE20 transmit an asynchronous health check pattern. Note that the operation shown in FIG. 12 may be performed in parallel with steps S1 to S8 described above.

[0103] REC10 and RE20 transmit the health check pattern shown in FIG. 4. When the device states of REC10 and RE20 are normal (OK), REC10 and RE20 transmit an optical pulse signal based on the first control pattern. When the communication line is abnormal, REC10 and RE20 transmit an optical pulse signal based on the second control pattern. When FPGA12 and FPGA22 are abnormal, respectively, REC10 and RE20 transmit an optical pulse signal based on the third control pattern.

[0104] Note that REC10 and RE20 may each transmit an optical pulse signal based on a control pattern that instructs reset for RE20 and REC10, respectively. Further, REC10 and RE20 may transmit an optical pulse signal based on a control pattern corresponding to a combination of ALM and an ALM code. Furthermore, an optical pulse signal based on a control pattern corresponding to a combination of ERR and an ERR code may be transmitted.

[0105] Next, an operation example of REC10 will be described with reference to FIG. 13. FIG. 13 is a flowchart showing an operation example of the REC according to the second embodiment. Note that PLD14 will be described as performing optical output control as an optical control unit for an operation system.

[0106] FPGA12 generates a CPRI frame including KByte and transmits it to RE20 (step S10). Step S10 is repeatedly executed. PLD14 determines whether it has received an optical pulse signal indicating an ERR state in which a downlink signal cannot be received (step S11). PLD14 monitors the optical output state and determines whether an optical pulse signal indicating an ERR state in which a downlink signal cannot be received has been transmitted from RE20.

[0107] When PLD14 has received an optical pulse signal indicating an ERR state in which a downlink signal cannot be received (YES in step S11), PLD14 performs a communication function unit reset (step S12). When PLD14 has received an optical pulse signal indicating an ERR state in which a downlink signal cannot be received, PLD14 restarts FPGA12 and SFP13. PLD14 transmits an optical pulse signal indicating that the communication function unit reset has been performed. PLD14 transmits information indicating that CPRI communication is to be restarted to FPGA12.

[0108] FPGA12 generates a CPRI frame including KByte and transmits it to RE20 (step S13). FPGA12 determines whether it has received a CPRI frame including an ERR recovery notification and KByte (step S14). FPGA12 waits for a CPRI frame transmitted from RE20.

[0109] When a CPRI frame including an ERR recovery notification and KByte is not received (NO in step S14), PLD14 transmits a health check pattern (step S15). If FPGA12 does not receive a CPRI frame including an ERR recovery notification and KByte within a predetermined time after transmitting the CPRI frame, PLD14 determines that a CPRI frame including an ERR recovery notification and KByte is not received. Also, if PLD14 receives an optical pulse signal indicating an ERR state where a downstream signal cannot be received after FPGA12 transmits a CPRI frame, PLD14 determines that a CPRI frame including an ERR recovery notification and KByte is not received. PLD14 performs optical output control and transmits a health check pattern to RE20. When the device state of REC10 is normal (OK), PLD14 transmits an optical pulse signal based on the first control pattern. When the communication line is abnormal, PLD14 transmits an optical pulse signal based on the second control pattern. When FPGA12 is abnormal, PLD14 transmits an optical pulse signal based on the third control pattern. Note that step S15 may be executed in parallel with steps S10 to S14.

[0110] On the other hand, when a CPRI frame including an ERR recovery notification and KByte is received (YES in step S14), FPGA12 continues CPRI communication (step S16). Also, in step S11, when PLD14 does not receive an optical pulse signal indicating an ERR state where a downstream signal cannot be received (NO in step S11), FPGA12 continues CPRI communication (step S16).

[0111] Next, an operation example of RE20 will be described with reference to FIG. 14. FIG. 14 is a flowchart showing an operation example of the RE according to the second embodiment. Note that PLD24 will be described as performing optical output control as an optical control unit of the operation system.

[0112] The FPGA 22 determines whether it has received a CPRI frame containing KByte (step S21). The FPGA 22 waits for a CPRI frame transmitted from the REC 10. The FPGA 22 issues a CPRI reception waiting timer at a predetermined timing, for example, when the SFP 23 is connected to the CPRI link 30. The FPGA 22 determines whether it has received a CPRI frame containing KByte according to whether a CPRI frame has been received before the CPRI reception waiting timer expires.

[0113] When a CPRI frame containing KByte is not received (NO in step S21), the PLD 24 notifies (transmits) an optical pulse signal indicating an ERR state in which a downstream signal cannot be received (step S22). For example, when the CPRI reception waiting timer expires and the FPGA 22 does not receive a CPRI frame containing KByte, the PLD 24 determines that an ERR recovery notification and a CPRI frame containing KByte have not been received. The PLD 24 performs optical output control based on an out-of-synchronization uncontrollable pattern and notifies the REC 10 of the ERR state by transmitting an optical pulse signal indicating the ERR state in which a downstream signal cannot be received.

[0114] On the other hand, when a CPRI frame containing KByte is received (YES in step S21), the FPGA 22 transmits the CPRI frame containing KByte to the REC 10 and continues the CPRI communication (step S23).

[0115] In step S24, the FPGA 22 determines whether it has received a CPRI frame containing KByte (step S24). The FPGA 22 determines whether a CPRI frame has been received in the same manner as in step S21.

[0116] If a CPRI frame containing KByte is not received (NO in step S24), PLD24 performs a communication function unit reset (step S25). If FPGA22 does not receive a CPRI frame, PLD24 restarts FPGA22 and SFP23. PLD24 transmits an optical pulse signal indicating that it has performed a communication function unit reset. PLD24 transmits information indicating the resumption of CPRI communication to FPGA22.

[0117] On the other hand, if a CPRI frame containing KByte is received (YES in step S24), FPGA22 transmits the CPRI frame containing KByte to REC10 and continues CPRI communication (step S23).

[0118] In step S26, FPGA22 determines whether a CPRI frame containing KByte has been received (step S26). FPGA22 determines whether a CPRI frame has been received in the same manner as in step S21.

[0119] If a CPRI frame containing KByte is received (YES in step S26), FPGA22 transmits an ERR recovery notification and the CPRI frame containing KByte to REC10 and continues CPRI communication (step S27).

[0120] On the other hand, if a CPRI frame containing KByte is not received (NO in step S26), PLD24 transmits a health check pattern (step S28). PLD24 performs optical output control and transmits a health check pattern to REC10. When the device state of RE20 is normal (OK), PLD24 transmits an optical pulse signal based on the first control pattern. When the communication line is abnormal, PLD24 transmits an optical pulse signal based on the second control pattern. When FPGA22 is abnormal, PLD24 transmits an optical pulse signal based on the third control pattern. Note that step S28 may be executed in parallel with steps S21 to S27.

[0121] As described above, when either one of the FPGA 12 and the PLD 14 does not receive the KByte which is the frame synchronization signal, the REC 10 can transmit an optical pulse signal indicating the state of the REC 10 by performing optical output control. Similarly, when either one of the FPGA 22 and the PLD 24 does not receive the KByte which is the frame synchronization signal, the RE 20 can transmit an optical pulse signal indicating the state of the RE 20 by performing optical output control. Therefore, according to the REC 10 and the RE 20 according to the second embodiment, even when the KByte cannot be received and synchronization between devices cannot be established, the states of the REC 10 and the RE 20 can be transmitted to the RE 20 and the REC 10 by the optical pulse signal.

[0122] In addition, since the REC 10 can receive the state of the RE 20 and grasp the states of the REC 10 and the RE 20, for example, the states of the REC 10 and the RE 20 can be notified to the operation device of the communication carrier. As a result, since the maintainer can grasp the states of the REC 10 and the RE 20, the maintainer can take measures for state recovery according to the states of the REC 10 and the RE 20 without going to the location where the RE 20 is arranged. Therefore, according to the radio base station 100 according to the second embodiment, it is possible to contribute to shortening the service interruption time and reducing the maintenance man-hours due to the inability to establish synchronization between the REC 10 and the RE 20.

[0123] Furthermore, the REC 10 and the RE 20 perform a communication function unit reset at a predetermined timing. Therefore, an abnormal state that can be recovered by the communication function unit reset can be autonomously eliminated. Also, when a reset including the CPUs 11 and 21 is performed, it takes several minutes from the reset to startup, but the communication function unit reset (the FPGA 12 and the SFP 13, and the FPGA 22 and the SFP 23) can be started in several seconds. Therefore, according to the radio base station 100 according to the second embodiment, in the case of a failure that can be recovered by the communication function unit reset, the REC 10 and the RE 20 can be started in a short time, and the failure can be autonomously eliminated.

[0124] Furthermore, REC10 and RE20 can send the location of abnormalities to RE20 and REC10 by transmitting a health check pattern. Therefore, based on the information of REC10 and RE20, the maintainer can identify the location of abnormalities without going to the site where RE20 is installed. Thus, in the site where RE20 is installed, the time and effort required to identify the location of abnormalities can be reduced. Therefore, according to the radio base station 100 according to Embodiment 2, the service interruption time can be shortened, and the reduction of the service interruption time can contribute to the improvement of the customer satisfaction of the users receiving the service.

[0125] Also, as described above, regarding the optical output control, in REC10, FPGA12 and PLD14 are in a redundant configuration, and in RE20 as well, FPGA22 and PLD24 are in a redundant configuration. Therefore, according to REC10 according to Embodiment 2, even if either one of FPGA12 and PLD14 is abnormal, the optical output control can be performed. Similarly, according to RE20 according to Embodiment 2, even if either one of FPGA22 and PLD24 is abnormal, the optical output control can be performed. Furthermore, since the PLD is less expensive than the FPGA, according to REC10 and RE20 according to Embodiment 2, the optical output control can be easily implemented, and the increase in development costs can be suppressed.

[0126] (Other embodiments) <1>In Embodiment 2 described above, it has been described that the data communication between REC10 and RE20 is CPRI communication using a CPRI frame. However, the present disclosure is not limited thereto, and the communication between REC10 and RE20 may be serial communication and may be applied to communication that transmits an uplink signal based on a downlink signal.

[0127] <2>The wireless communication device 1 described in Embodiment 1 may have the following hardware configuration. In Embodiment 2, although REC10 and RE20 were described as being configured by hardware such as an FPGA, a PLD, and an SFP, REC10 and RE20 may have the following hardware configuration. And REC10 and RE20 may perform the processing of the FPGA, the PLD, and the SFP with the following hardware configuration.

[0128] The wireless communication device 1, REC10, and RE20 will be referred to as the wireless communication device 1 etc. in the following description. FIG. 15 is a block diagram illustrating the hardware configuration of the wireless communication device etc. according to each embodiment.

[0129] Referring to FIG. 15, the wireless communication device 1 etc. includes a network interface 1201, a processor 1202, and a memory 1203. The network interface 1201 is used to communicate with other communication devices having a communication function. The network interface 1201 may include, for example, a network interface card (NIC) compliant with a communication method including IEEE (Institute of Electrical and Electronics Engineers) 802.11 series, IEEE 802.3 series, etc.

[0130] The processor 1202 reads and executes software (computer program) from the memory 1203 to perform the processing of the wireless communication device 1 etc. described using a flowchart etc. in the above-described embodiment. The processor 1202 may be, for example, a microprocessor, an MPU (Micro Processing Unit), or a CPU (Central Processing Unit). The processor 1202 may include a plurality of processors.

[0131] The memory 1203 is composed of a combination of a volatile memory and a non-volatile memory. The memory 1203 may include storage arranged separately from the processor 1202. In this case, the processor 1202 may access the memory 1203 via an I / O (Input / Output) interface (not shown).

[0132] In the example of FIG. 15, the memory 1203 is used to store a group of software modules. The processor 1202 can perform the processing of the wireless communication device 1 etc. described in the above embodiments by reading out and executing these groups of software modules from the memory 1203.

[0133] As described with reference to FIG. 15, each of the processors included in the wireless communication device 1 etc. executes one or more programs including a group of instructions for causing a computer to perform the algorithms described with reference to the drawings.

[0134] In the above example, the program can be stored using various types of non-transitory computer readable media and supplied to a computer. Non-transitory computer readable media include various types of tangible storage media. Examples of non-transitory computer readable media include magnetic recording media (such as flexible disks, magnetic tapes, hard disk drives), magneto-optical recording media (such as magneto-optical disks). Further, examples of non-transitory computer readable media include CD-ROM (Read Only Memory), CD-R, CD-R / W, DVD-ROM (Digital Versatile Disc Read Only Memory), DVD-R (DVD Recordable), DVD-R DL (DVD-R Dual Layer), DVD-RW (DVD ReWritable), DVD-RAM, DVD+R, DVR+R DL, DVD+RW, BD-R (Blu-ray (registered trademark) Disc Recordable), BD-RE (Blu-ray (registered trademark) Disc Rewritable), BD-ROM. Further, examples of non-transitory computer readable media include semiconductor memory. Semiconductor memory includes, for example, mask ROM, PROM (Programmable ROM), EPROM (Erasable PROM), flash ROM, RAM (Random Access Memory). Also, the program may be supplied to the computer by various types of transitory computer readable media. Examples of transitory computer readable media include electrical signals, optical signals, and electromagnetic waves. Transitory computer readable media can supply the program to the computer via wired communication channels such as electric wires and optical fibers, or wireless communication channels.

[0135] Note that the present disclosure is not limited to the above embodiments, and can be appropriately changed without departing from the spirit. Also, the present disclosure may be implemented by appropriately combining each embodiment.

[0136] Also, some or all of the above embodiments may be described as follows, but are not limited thereto. (Appendix 1) A wireless communication device, a communication unit, a communication control unit that receives a frame synchronization signal from another wireless communication device, and a monitoring control unit that monitors the communication control unit, wherein either the communication control unit or the monitoring control unit generates an optical pulse signal indicating the state of the wireless communication device by controlling the optical output of the communication unit when the communication control unit does not receive the frame synchronization signal from the other wireless communication device, and transmits the optical pulse signal to the other wireless communication device. (Appendix 2) When the communication control unit transitions to an abnormal state, the monitoring control unit transmits the optical pulse signal to the other wireless communication device. The wireless communication device according to Appendix 1. (Appendix 3) Either the communication control unit or the monitoring control unit restarts the communication unit and the communication control unit when the optical pulse signal received from the other wireless communication device indicates that the frame synchronization signal cannot be received. The wireless communication device according to Appendix 1 or 2. (Appendix 4) Either the monitoring control unit or the communication control unit restarts the communication unit and the communication control unit when the optical pulse signal indicating that the communication unit and the communication control unit have restarted is received from the other communication device and then the frame synchronization signal is not received. The wireless communication device according to Appendix 1 or 2. (Appendix 5) After the communication control unit receives the optical pulse signal indicating that the communication unit and the communication control unit have restarted from the other wireless communication device and then receives the frame synchronization signal, the communication control unit transmits a data signal indicating that the state where the frame synchronization signal cannot be received has been restored to the other wireless communication device. The wireless communication device according to Appendix 4. (Appendix 6) Either the communication control unit or the monitoring control unit transmits the optical pulse signal indicating that the communication unit and the communication control unit have restarted to the other wireless communication device after the communication unit and the communication control unit have restarted. The wireless communication device according to any one of Appendices 3 to 5. (Appendix 7) Either the monitoring control unit or the communication control unit changes the control pattern of the optical output according to whether the wireless communication device is normal or not, and generates the optical pulse signal indicating whether the wireless communication device is normal. The wireless communication device according to any one of Appendices 1 to 6. (Appendix 8) Either the monitoring control unit or the communication control unit controls the optical output based on the first control pattern when the wireless communication device is normal, and generates the optical pulse signal indicating that the wireless communication device is normal. The wireless communication device according to Appendix 7. (Appendix 9) Either the monitoring control unit or the communication control unit generates the optical pulse signal indicating the abnormal part of the wireless communication device based on the control pattern of the optical output corresponding to the abnormal part of the wireless communication device when the wireless communication device is abnormal. The wireless communication device according to Appendix 7 or 8. (Appendix 10) Either the monitoring control unit or the communication control unit controls the optical output based on the second control pattern when the communication line between the wireless communication device and the other wireless communication device is abnormal, and generates the optical pulse signal indicating that the communication line is abnormal. The wireless communication device according to Appendix 9. (Appendix 11) When the communication control unit is abnormal, the monitoring control unit controls the optical output based on the third control pattern, and generates the optical pulse signal indicating that the communication control unit is abnormal. The wireless communication device according to Appendix 9 or 10. (Appendix 12) A communication control method executed by a wireless communication device, When not receiving a frame synchronization signal from another wireless communication device, a light pulse signal indicating the state of the wireless communication device is generated by controlling the optical output of the wireless communication device, A communication control method for transmitting the light pulse signal to the other wireless communication device. (Appendix 13) A communication control program to be executed by a wireless communication device, When not receiving a frame synchronization signal from another wireless communication device, a light pulse signal indicating the state of the wireless communication device is generated by controlling the optical output of the wireless communication device, A communication control program including a process of transmitting the light pulse signal to the other wireless communication device.

Explanation of Signs

[0137] 1 Wireless communication device 2 Communication unit 3 Communication control unit 4 Monitoring control unit 10 REC 11, 21 CPU 12, 22 FPGA 13, 23 SFP 14, 24 PLD 20 RE 100 Wireless base station

Claims

1. A wireless communication device, comprising: a communication unit; a communication control unit that receives a frame synchronization signal from another wireless communication device; a monitoring control unit that monitors the communication control unit, wherein either the communication control unit or the monitoring control unit generates an optical pulse signal indicating the state of the wireless communication device by controlling the optical output of the communication unit when the communication control unit fails to receive the frame synchronization signal from the other wireless communication device, and transmits the optical pulse signal to the other wireless communication device; a wireless communication device, wherein either the communication control unit or the monitoring control unit restarts the communication unit and the communication control unit after receiving the optical pulse signal indicating that the communication unit and the communication control unit in the other wireless communication device have restarted from the other wireless communication device, and when the frame synchronization signal cannot be received.

2. When the communication control unit transitions to an abnormal state, the monitoring control unit transmits the optical pulse signal to the other wireless communication device. The wireless communication device according to claim 1.

3. After receiving the optical pulse signal indicating that the communication unit and the communication control unit have restarted from the other wireless communication device, the communication control unit transmits a data signal indicating that the state where the frame synchronization signal cannot be received has been restored to the other wireless communication device. The wireless communication device according to claim 1 or 2.

4. Either the communication control unit or the monitoring control unit transmits the optical pulse signal indicating that the communication unit and the communication control unit have restarted to the other wireless communication device after the communication unit and the communication control unit have restarted. The wireless communication device according to any one of claims 1 to 3.

5. Either the monitoring control unit or the communication control unit changes the control pattern of the optical output according to whether the wireless communication device is normal, and generates an optical pulse signal indicating whether the wireless communication device is normal. The wireless communication device according to any one of claims 1 to 4.

6. Either the monitoring control unit or the communication control unit controls the optical output based on a first control pattern when the wireless communication device is normal, and generates an optical pulse signal indicating that the wireless communication device is normal. The wireless communication device according to claim 5.

7. In the wireless communication device according to claim 5 or 6, either one of the monitoring control unit and the communication control unit generates the optical pulse signal indicating the abnormal part of the wireless communication device based on the control pattern of the optical output according to the abnormal part of the wireless communication device when the wireless communication device is abnormal.

8. In the wireless communication device according to claim 7, either one of the monitoring control unit and the communication control unit controls the optical output based on a second control pattern and generates the optical pulse signal indicating that the communication line between the wireless communication device and the other wireless communication device is abnormal when the communication line is abnormal.

9. In the wireless communication device according to claim 7 or 8, the monitoring control unit controls the optical output based on a third control pattern and generates the optical pulse signal indicating that the communication control unit is abnormal when the communication control unit is abnormal.

10. A communication control method executed by a wireless communication device, comprising: generating an optical pulse signal indicating the state of the wireless communication device by controlling the optical output of the wireless communication device when a frame synchronization signal is not received from another wireless communication device; transmitting the optical pulse signal to the other wireless communication device; restarting the communication unit and the communication control unit in the wireless communication device when the frame synchronization signal cannot be received after receiving the optical pulse signal indicating that the communication unit and the communication control unit for receiving the frame synchronization signal in the other wireless communication device have restarted from the other wireless communication device.

11. A communication control program for causing a wireless communication device to execute, comprising: generating an optical pulse signal indicating the state of the wireless communication device by controlling the optical output of the wireless communication device when a frame synchronization signal is not received from another wireless communication device; transmitting the optical pulse signal to the other wireless communication device; restarting the communication unit and the communication control unit in the wireless communication device when the frame synchronization signal cannot be received after receiving the optical pulse signal indicating that the communication unit and the communication control unit for receiving the frame synchronization signal in the other wireless communication device have restarted from the other wireless communication device.

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