Resonator and Method for Measuring Conductivity
The resonator addresses the challenge of measuring interfacial conductivity between via conductors and dielectrics by employing a specific arrangement of conductor layers and via conductor groups, facilitating accurate conductivity measurements for enhanced electronic circuit board design.
Patent Information
- Application Number
- JP2022029855
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-02-28
- Publication Date
- 2025-06-12
- Estimated Expiration
- 2042-02-28
AI Technical Summary
There is a lack of methods for measuring the interfacial conductivity between a via conductor and a dielectric in electronic circuit boards, particularly for conductors that penetrate the dielectric in the thickness direction.
A resonator is designed with a dielectric substrate, pair of conductor layers, and via conductor groups arranged in specific patterns to enable measurement of conductivity at the interface between the via conductor and the dielectric. The resonator includes a first via conductor group with via conductors arranged in a circular shape penetrating the dielectric, and a second via conductor group with via conductors arranged in a circular shape but only partially penetrating the dielectric.
The resonator allows for accurate measurement of conductivity at the interface between the via conductor and the dielectric, enabling improved design and optimization of electronic circuit boards.
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Abstract
Description
Technical Field
[0001] The present disclosure relates to a resonator and a method for measuring conductivity.
Background Art
[0002] In recent years, mobile communications such as mobile phones have been progressing in expanding the frequency band used and increasing the frequency in order to secure communication capacity and increase speed. Communication devices such as mobile phones use electronic circuit boards and electronic components. In order to design such electronic circuit boards and electronic components, it is necessary to grasp the dielectric properties of dielectrics and the conductivity of conductors.
[0003] The present applicant has hitherto disclosed a method for measuring the interfacial conductivity applicable to a wiring board having a metal film on the surface of a flat dielectric (see Patent Document 1). However, a method for measuring the interfacial conductivity in the case of having a conductor (commonly referred to as a via conductor) that penetrates the dielectric in the thickness direction on a flat plate has not been disclosed so far.
Prior Art Documents
Patent Documents
[0004]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0005] An object of the present disclosure is to obtain a resonator that enables measurement of the conductivity at the interface between a via conductor and a dielectric, and a method for measuring the conductivity at the interface between the via conductor and the dielectric using this resonator.
Means for Solving the Problems
[0006] A resonator according to one aspect of the present disclosure includes a dielectric substrate, a pair of conductor layers, a first via conductor group, and a second via conductor group. The pair of conductor layers are arranged so as to sandwich the dielectric substrate. The first via conductor group has a plurality of first via conductors, and the plurality of first via conductors are arranged in a circumferential shape of a first circle so as to have predetermined intervals when the dielectric substrate is viewed in plan view, and are provided so as to penetrate the dielectric substrate in the thickness direction and are electrically connected to both of the pair of conductor layers. The second via conductor group has a plurality of second via conductors, and the plurality of second via conductors are arranged in a circumferential shape of a second circle so as to have predetermined intervals when the dielectric substrate is viewed in plan view, and are provided from one surface of the dielectric substrate to a position at a predetermined depth and are electrically connected to one of the pair of conductor layers. The diameter of the first circle is larger than the diameter of the second circle, and the center of the first circle coincides with the center of the second circle. Further, in the resonator according to one aspect of the present disclosure, the dielectric substrate has a structure in which a plurality of dielectric layers are laminated, and the plurality of first via conductors of the first via conductor group are electrically connected by a first ring-shaped conductor disposed between the dielectric layers inside the dielectric substrate, and the plurality of second via conductors of the second via conductor group may be electrically connected by a second ring-shaped conductor disposed between the dielectric layers inside the dielectric substrate.
[0007] Further, a method for measuring conductivity according to another aspect of the present disclosure includes the following first step, second step, and third step. The first step is a step of preparing a first resonator in which the radius of the second circle is Ra1 and a second resonator in which the radius of the second circle is Ra2 different from Ra1 as the resonator according to one aspect of the present disclosure, and measuring the unloaded Q; Q1 of the first resonator and the unloaded Q; Q2 of the second resonator using a probe. The second step is to prepare a flat sample in which a conductor layer is provided on the surface of a flat dielectric substrate separately from the first resonator and the second resonator, and the interface conductivity σ between the dielectric substrate and the conductor layer in the flat sample i is measured by a method conforming to IEC61338-1-5. The third step is to introduce the unloaded Q; Q1 and unloaded Q; Q2 measured in the first step, and the interface conductivity σ measured in the second step i into the following formulas (1) and (2) to obtain the dielectric loss tangent tanδ of the dielectric substrate in the first resonator and the second resonator and the conductivity σ at the interface between the via conductor and the dielectric substratevia is a step of obtaining. [Number] (In Formula (1) and Formula (2), Q1 and Q2 are values measured in the first step, σi is a value measured in the second step, and A1, B1, C1, A2, B2, and C2 are values obtained by computer simulation respectively) [Advantages of the Invention]
[0008] According to the resonator according to an embodiment of the present disclosure, it is possible to measure the conductivity at the interface between the via conductor and the dielectric. Further, according to the method for measuring conductivity according to an embodiment of the present disclosure, the conductivity at the interface between the via conductor and the dielectric can be measured using the above resonator. [Brief Description of the Drawings]
[0009]
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
[0010] Hereinafter, embodiments for implementing the resonator and the method for measuring conductivity according to the present disclosure (hereinafter referred to as "embodiments") will be described in detail with reference to the drawings. Note that the resonator and the method for measuring conductivity according to the present disclosure are not limited by this embodiment. Further, the embodiments can be appropriately combined as long as the processing contents do not conflict.
[0011] In addition, in the embodiments described below, expressions such as "constant", "orthogonal", "perpendicular", or "parallel" may be used, but these expressions do not necessarily require strict "constant", "orthogonal", "perpendicular", or "parallel". That is, each of the above expressions is assumed to allow deviations such as manufacturing accuracy and installation accuracy.
[0012] In addition, each of the figures referred to below is schematic for convenience of explanation. Therefore, details may be omitted in each figure, and the dimensions of the members in each figure do not faithfully represent the dimensions and dimensional ratios of the actual constituent members.
[0013] 〔Configuration of Resonator According to First Embodiment〕 FIG. 1 shows an exploded perspective view of an example of a resonator 10A according to the first embodiment. FIG. 2 is a plan view of the resonator 10A shown in FIG. 1 as viewed from above. FIG. 3 is a cross-sectional view taken along line III-III of FIG. 2.
[0014] In this specification, the directions of the respective parts of the resonator 10A are described in an XYZ orthogonal coordinate system with the thickness direction of the resonator 10A as the Z direction. In this specification, the direction facing the +Z direction of the resonator 10A and each layer constituting the resonator 10A may be expressed as "up", and the surface facing the +Z direction may be expressed as "upper surface". The direction facing the -Z direction may be expressed as "down", and the surface facing the -Z direction may be expressed as "lower surface". In addition, a plan view refers to viewing in the Z direction unless otherwise specified.
[0015] The resonator 10A has a dielectric substrate 1. The resonator 10A has a pair of conductor layers 2a and 2b arranged so as to sandwich the dielectric substrate 1. In FIG. 1, the conductor layer 2a (hereinafter also referred to as the "first conductor layer 2a") is provided on the upper surface of the dielectric substrate 1, and the conductor layer 2b (hereinafter also referred to as the "second conductor layer 2b") is provided on the lower surface. The resonator 10A has a first via conductor group G1 and a second via conductor group G2, each of which is composed of a plurality of first via conductors V1 and second via conductors V2.
[0016] FIG. 2 is a plan view of the resonator 10A as viewed from above. In FIG. 2, the arrangement of the first via conductor group G1 and the second via conductor group G2 on the upper surface of the dielectric substrate 1 is indicated by a broken line. As shown in FIG. 2, the first via conductors V1 and the second via conductors V2 are arranged in a circumferential shape so as to have predetermined intervals when the dielectric substrate 1 is viewed in plan. In FIG. 2, a first circle GC1 connecting the centers of the respective first via conductors V1 constituting the first via conductor group G1 in plan view and a second circle GC2 connecting the centers of the respective second via conductors V2 constituting the second via conductor group G2 in plan view are shown by a two-dot chain line.
[0017] In FIG. 2, the radius of the first circle GC1 is denoted by Rb and the center is denoted by C1. Similarly, the radius of the second circle GC2 is denoted by Ra and the center is denoted by C2. The relationship between the first circle GC1 and the second circle GC2 is such that the diameter 2×Rb of the first circle GC1 is larger than the diameter 2×Ra of the second circle GC2, and the center C1 of the first circle GC1 and the center C2 of the second circle GC2 coincide.
[0018] As shown in FIG. 3, all of the first via conductors V1 penetrate in the thickness direction (Z direction) of the dielectric substrate 1. That is, each first via conductor V1 is formed at the same height as the thickness of the dielectric substrate 1 from the position of the upper surface of the dielectric substrate 1 to the position of the lower surface, and is electrically connected to the first conductor layer 2a at the upper end E1 and to the second conductor layer 2b at the lower end E2. On the other hand, each of the second via conductors V2 is formed from one surface (here, the upper surface) of the dielectric substrate 1 to a position at a predetermined depth, and is electrically connected to the first conductor layer 2a at the upper end E3, but the lower end E4 does not reach the second conductor layer 2b and is insulated from the second conductor layer 2b. In this specification, an end portion where the second via conductor group G2 does not contact one of the pair of conductor layers 2a and 2b, such as the lower end E4 of the second via conductor V2, is referred to as a free end FE.
[0019] (Effects of the First Embodiment) By using the resonator 10A according to this embodiment, for example, by the method for measuring conductivity according to one aspect of the present disclosure, it becomes possible to measure the conductivity at the interface S between the first via conductor V1 and the second via conductor V2 and the dielectric substrate 1. Note that in order to measure the above conductivity using the resonator 10A, a signal (electromagnetic wave) is input to the resonator 10A to excite it, and then the resonance frequency and unloaded Q of the resonator 10A are measured from the signal (electromagnetic wave) output from the excited resonator 10A using a network analyzer. In order to perform such measurement, the resonator 10A typically has an input port portion and an output port portion. Hereinafter, the configuration of the resonator 10A according to this embodiment will be described in detail.
[0020] The upper and lower surfaces of the dielectric substrate 1 are parallel to the XY plane. In the resonator 10A shown in FIGS. 1 to 3, the dielectric substrate 1 is composed of four dielectric layers 1a, 1b, 1c, and 1d. Note that the dielectric substrate 1 may be composed of, for example, a single layer or a multilayer dielectric layer other than four layers. The dielectric materials constituting the dielectric layers 1a to 1d are dielectric materials that are the objects of measuring the conductivity of these via conductors at the interfaces with the first via conductor V1 and the second via conductor V2, and are not particularly limited, but typically the same dielectric material is used in the four layers.
[0021] On the upper surface of the dielectric substrate 1, a first conductor layer 2a is disposed. Also, on the upper surface of the dielectric substrate 1, an input port portion 11 and an output port portion 12 are provided so as not to contact the first conductor layer 2a. Specifically, the first conductor layer 2a has a notch portion N1 at a location corresponding to the input port portion 11 and a notch portion N2 at a location corresponding to the output port portion 12. The opening areas of the notch portion N1 and the notch portion N2 are each designed to be larger than the areas of the input port portion 11 and the output port portion 12 in a plan view, and the input port portion 11 and the output port portion 12 are provided so as not to contact the inner walls of the notch portion N1 and the notch portion N2.
[0022] The first conductor layer 2a, the input port portion 11, and the output port portion 12 are composed of, for example, a metal conductor, typically copper or the like.
[0023] Note that the input port section 11 and the output port section 12 are in a relationship where input is performed from one side and output is performed from the other side, and their configurations are the same. Therefore, during measurement, the input port section 11 may be used as the output port, and the output port section 12 may be used as the input port.
[0024] Here, the surface on which the input port section 11 and the output port section 12 are provided is the surface reached by the end of the second via conductor group G2 among the surfaces on which the pair of conductor layers 2a and 2b of the dielectric substrate 1 are formed. In the resonator 10A shown in FIGS. 1 and 3, it is the upper surface on which the first conductor layer 2a of the dielectric substrate 1 is formed. On the lower surface of the dielectric substrate 1, the second conductor layer 2b is disposed. The second conductor layer 2b is composed of, for example, a metal conductor, typically copper or the like, and is disposed on the entire lower surface of the dielectric substrate 1.
[0025] Note that the surface reached by the end of the second via conductor group G2 is either the upper surface or the lower surface of the dielectric substrate 1. Different from that shown in FIGS. 1 and 3, a configuration in which the end of the second via conductor group G2 reaches the lower surface of the dielectric substrate 1 may also be adopted. In that case, the input port section 11 and the output port section 12 are formed on the lower surface of the dielectric substrate 1, and the second conductor layer 2b has corresponding cutout portions N1 and N2. And the first conductor layer 2a is disposed on the entire upper surface of the dielectric substrate 1.
[0026] The arrangement positions of the input port section 11 and the output port section 12 in a plan view are inside the first via conductor group G1 and in the region outside the second via conductor group G2. In other words, the input port section 11 and the output port section 12 are arranged between the first via conductor group G1 and the second via conductor group G2 so as not to be in contact with them.
[0027] The input port section 11 and the output port section 12 are typically arranged symmetrically at positions sandwiching the centers C1 and C2 on a straight line passing through the centers C1 and C2 of the second circle GC2 and the first circle GC1. Further, the notch portions N1 and N2 of the first conductor layer 2a are arranged so as not to overlap any of the first via conductors V1 and the second via conductors V2 in a plan view.
[0028] The first via conductor group G1 is composed of a plurality of first via conductors V1. The second via conductor group G2 is composed of a plurality of second via conductors V2. The shapes of the first via conductor V1 and the second via conductor V2 are not limited, and examples of the shapes in a plan view include circular, polygonal, elliptical, oval (racetrack) - shaped, etc., and a typical shape is circular. The shapes of the first via conductor V1 and the second via conductor V2 are, for example, columnar.
[0029] The first via conductors V1 constituting the first via conductor group G1 and the second via conductors V2 constituting the second via conductor group G2 are each arranged circumferentially so as to have a predetermined interval in a plan view. The predetermined interval is, for example, an interval such that the interval L1 between two adjacent first via conductors V1 on the circumference of the first circle GC1 and the interval L2 between two adjacent second via conductors V2 on the circumference of the second circle GC2 are each 1 / 4 or less of the wavelength λ of the input signal (electromagnetic wave) used for measurement. The interval L1 and the interval L2 may be the same or different as long as they are 1 / 4 or less of the wavelength λ.
[0030] The materials of the first via conductor V1 and the second via conductor V2 are conductors for which the conductivity at the interface with the dielectric substrate 1 is to be measured, and there is no limitation as long as they are conductors. For example, they are metals, typically copper. The number and the diameters in plan view of the first via conductor V1 and the second via conductor V2 are appropriately selected such that, for example, the intervals L1 and L2 satisfy the above conditions and each can have a planar arrangement as shown in FIG. 2. The plurality of first via conductors V1 may each have different sizes and shapes, but typically they have the same dimensions and the same shape. The plurality of second via conductors V2 may each have different sizes and shapes, but typically they have the same dimensions and the same shape. Furthermore, the first via conductor V1 and the second via conductor V2 typically have the same shape and size except that they have different heights.
[0031] The relationship between the radius Rb of the first circle GC1 and the radius Ra of the second circle GC2 is Rb > Ra, and Rb and Ra are appropriately adjusted so that the first via conductor V1 and the second via conductor V2 do not overlap in plan view. For example, when the first via conductor V1 and the second via conductor V2 are cylinders and the radii of the upper and lower surfaces of the cylinders are both r, it is required to satisfy Rb > Ra + 2r. Furthermore, considering the arrangement of the input port portion 11 and the output port portion 12 between the first via conductor group G1 and the second via conductor group G2, it is required to satisfy Rb > Ra + 2r + α (the diameter of the input port portion 11 or the output port portion).
[0032] As described above, the height (length in the Z direction) T1 of the first via conductor V1 is the same as the thickness of the dielectric substrate 1 (hereinafter, the same symbol "T1" as the height of the first via conductor V1 is used). The height T2 (length in the Z direction) of the second via conductor V2 is smaller than the thickness T1 of the dielectric substrate 1.
[0033] In the cross-sectional view shown in FIG. 3, the dielectric substrate 1 is composed of four dielectric layers 1a, 1b, 1c, and 1d arranged in order from the upper surface to the lower surface. The first via conductor V1 is composed of first via conductors V1a, V1b, V1c, and V1d that penetrate the dielectric layers 1a, 1b, 1c, and 1d, respectively. With this configuration, the height T1 of the first via conductor V1 becomes the same as the thickness T1 of the dielectric substrate 1. Also, the first via conductor V1 is configured to be electrically connected to the first conductor layer 2a at the upper end E1 and to the second conductor layer 2b at the lower end E2, respectively.
[0034] On the other hand, the second via conductor V2 is composed of second via conductors V2a, V2b, and V2c that penetrate the dielectric layers 1a, 1b, and 1c, respectively. With this configuration, the height T2 of the second via conductor V2 becomes smaller than the thickness T1 of the dielectric substrate 1 by the thickness of the dielectric layer 1d. Also, the second via conductor V2 is electrically connected to the first conductor layer 2a at the upper end E3, but the lower end E4 is not electrically connected to the second conductor layer 2b and is insulated.
[0035] The resonator 10A can be manufactured, for example, by preparing a structure in which a first via conductor group G1 and a second via conductor group G2 are formed on the dielectric substrate 1, forming the first conductor layer 2a, the input port portion 11, and the output port portion 12 on the upper surface of the dielectric substrate 1, and laminating the second conductor layer 2b on the lower surface.
[0036] The above structure can be obtained by forming and laminating the above first via conductors V1a to V1d on each of the dielectric layers 1a to 1b and the second via conductors V2a to V2c on each of the dielectric layers 1a to 1c by a conventionally known method. For example, when the dielectric substrate 1 is composed of a single layer, for the first via conductor V1, a hole that penetrates the dielectric substrate 1 from the upper surface to the lower surface is formed by a conventionally known method, and for the second via conductor V2, a hole is formed from the upper surface of the dielectric substrate 1 to a position at a predetermined depth that does not reach the lower surface in the thickness direction, and a conductor material is filled in these holes.
[0037] 〔Configuration of Resonator According to Second Embodiment〕 FIG. 4 shows a plan view of an example of the resonator 10B according to the second embodiment as viewed from above. FIG. 5 is a cross-sectional view taken along line V-V of FIG. 4.
[0038] In the resonator 10B shown in FIGS. 4 and 5, in the resonator 10A shown in FIGS. 1 to 3, a plurality of first via conductors V1 and second via conductors V2 that respectively constitute the first via conductor group G1 and the second via conductor group G2 are each arranged between the dielectric layers 1a, 1b, 1c, and 1d inside the dielectric substrate 1 and are electrically connected by a first ring-shaped conductor R1 (R1a, R1b, R1c) and a second ring-shaped conductor R2 (R2a, R2b, R2c).
[0039] In the resonator 10A shown in FIGS. 1 to 3, the dielectric substrate 1 is composed of four dielectric layers 1a, 1b, 1c, and 1d, but the dielectric substrate 1 may be a single layer. Different from the resonator 10A, the dielectric substrate 1 of the resonator 10B is composed of a plurality of dielectric layers. The resonator 10B shown in FIGS. 4 and 5 is composed of four dielectric layers 1a, 1b, 1c, and 1d, but the number of dielectric layers constituting the dielectric substrate 1 is not limited to four and may be a plurality. The resonator 10B has the same configuration as the resonator 10A except that the dielectric substrate 1 is composed of a plurality of dielectric layers and has the above-described first ring-shaped conductor R1 and second ring-shaped conductor R2.
[0040] (Effect of the Second Embodiment) By using the resonator 10B according to the present embodiment, similar to the resonator 10A according to the first embodiment, for example, by the conductivity measurement method according to one aspect of the present disclosure, it is possible to measure the conductivity at the interface S between the first via conductor V1 and the second via conductor V2 and the dielectric substrate 1.
[0041] In addition, the area of the second ring-shaped conductor R2 electrically connected to the open end FE of the second via conductor group G2 can be used to control the resonance frequency, and fine adjustment of the measurement frequency is possible with a slight design change of changing the area of the second ring-shaped conductor R2.
[0042] Hereinafter, the configuration of the resonator 10B according to the present embodiment will be described in detail. In the following description regarding the resonator 10B, for the configurations common to the resonator 10A, the same reference numerals as those of the resonator 10A are given and redundant descriptions are omitted, and mainly the points different from the resonator 10A, that is, the first ring-shaped conductor R1 and the second ring-shaped conductor R2 will be described.
[0043] In FIG. 4, the planar view shapes of the first ring-shaped conductor R1 in which a plurality of first via conductors V1 constituting the first via conductor group G1 are electrically connected inside the dielectric substrate 1 and the second ring-shaped conductor R2 in which a plurality of via conductors constituting the second via conductor group G2 are electrically connected inside the dielectric substrate 1 are shown by broken lines.
[0044] FIG. 5 shows the arrangement positions in the thickness direction (Z direction) of the first ring-shaped conductor R1 and the second ring-shaped conductor R2 inside the dielectric substrate 1. The dielectric substrate 1 is formed by laminating four dielectric layers 1d, 1c, 1b, and 1a in this order from the bottom, and a first ring-shaped conductor R1a and a second ring-shaped conductor R2a are provided between the dielectric layer 1a and the dielectric layer 1b, and a first ring-shaped conductor R1b and a second ring-shaped conductor R2b are provided between the dielectric layer 1b and the dielectric layer 1c, and a first ring-shaped conductor R1c and a second ring-shaped conductor R2c are provided between the dielectric layer 1c and the dielectric layer 1d, respectively.
[0045] More specifically, the first ring-shaped conductors R1a and R2a are formed on the upper surface of the dielectric layer 1b and are in contact with the lower surfaces of the first via conductor V1a and the second via conductor V2a provided so as to penetrate the dielectric layer 1a. Similarly, the first ring-shaped conductors R1b and R2b are formed on the upper surface of the dielectric layer 1c and are in contact with the lower surfaces of the first via conductor V1b and the second via conductor V2b provided so as to penetrate the dielectric layer 1b. Further, the first ring-shaped conductors R1c and R2c are formed on the upper surface of the dielectric layer 1d and are in contact with the lower surfaces of the first via conductor V1c and the second via conductor V2c provided so as to penetrate the dielectric layer 1c.
[0046] The thicknesses of the first ring-shaped conductors R1a, R1b, R1c and the second ring-shaped conductors R2a, R2b, R2c may be the same or different. The first ring-shaped conductors R1a, R1b, R1c and the second ring-shaped conductors R2a, R2b, R2c are typically formed with generally the same thickness.
[0047] The first ring-shaped conductor R1 and the second ring-shaped conductor R2 are typically formed between all dielectric layers, like the resonator 10B shown in FIG. 5. Here, the symbols R1 and R2 for the ring-shaped conductors are used as general terms for the first ring-shaped conductors R1a, R1b, R1c and the second ring-shaped conductors R2a, R2b, R2c, respectively. The materials of the first ring-shaped conductor R1 and the second ring-shaped conductor R2 are not limited as long as they are conductors, and are typically composed of, for example, a metal conductor such as copper.
[0048] In the first ring-shaped conductor R1 and the second ring-shaped conductor R2, the planar shapes may be the same or different between the individual first ring-shaped conductors R1a, R1b, R1c and between the individual second ring-shaped conductors R2a, R2b, R2c. FIG. 4 depicts an example of the resonator 10B in which the planar shapes of the first ring-shaped conductors R1a, R1b, R1c are the same and the planar shapes of the second ring-shaped conductors R2a, R2b, R2c are the same. Also, in this example, the planar shapes of the first via conductors V1a, V1b, V1c, V1d are the same, and the planar shapes of the second via conductors V2a, V2b, V2c are also the same.
[0049] As shown in FIG. 4, the first ring-shaped conductor R1 is formed such that in a plan view, the entirety of all the first via conductors V1 is in contact with the first ring-shaped conductor R1. The distances from the first circle GC1 to the inner circumference and the outer circumference of the first ring-shaped conductor R1 are each set to be the same as or greater than the radius r of the first via conductor V1 in the plan view. Similarly, the second ring-shaped conductor R2 is formed such that in a plan view, the entirety of all the second via conductors V2 is in contact with the second ring-shaped conductor R2. The distances from the second circle GC2 to the inner circumference and the outer circumference of the second ring-shaped conductor R2 are each set to be the same as or greater than the radius r of the second via conductor V2 in the plan view. However, the respective shapes are designed so that the inner circumference of the first ring-shaped conductor R1 and the outer circumference of the second ring-shaped conductor R2 do not come into contact with each other.
[0050] Let the distance between the inner circumference and the outer circumference of the first ring-shaped conductor R1 be the width W1 of the first ring-shaped conductor R1. Let the distance between the inner circumference and the outer circumference of the second ring-shaped conductor R2 be the width W2 of the second ring-shaped conductor R2. In the resonator 10B shown in FIGS. 4 and 5, as described above, the widths of the first ring-shaped conductors R1a, R1b, and R1c are the same as the width W1, and the widths of the second ring-shaped conductors R2a, R2b, and R2c are the same as the width W2, but they may each have different widths.
[0051] In particular, the width W2 of the second ring-shaped conductor R2c located at the free end FE of the second via conductor group G2 may be appropriately changed. By changing the width W2 of the second ring-shaped conductor R2c, the area of the second ring-shaped conductor R2c in the plan view can be changed, and thereby the resonance frequency can be controlled.
[0052] As described above, the first embodiment and the second embodiment have been described with reference to the resonator 10A and the resonator 10B. However, the specific details such as the configuration, structure, positional relationship, and shape shown in the above embodiments can be appropriately changed without departing from the spirit of the present disclosure. Also, within the scope not departing from the spirit of the present disclosure, the configurations, structures, positional relationships, and shapes shown in the above embodiments can be appropriately combined.
[0053] [Configuration of the conductivity measurement method according to the embodiment] The conductivity measurement method of the embodiment can be performed using, for example, the resonator of the first or second embodiment. In the following description, the case of using the resonator 10A is described as an example, but the conductivity can also be measured in the same manner when using the resonator 10B.
[0054] In this embodiment, for example, a network analyzer is used to measure the unloaded Q of the resonator shown below. The measurement environment can be, for example, a measurement temperature of 25 ± 1°C and a humidity of about 40 ± 20%.
[0055] (First step) In the first step, as the resonator 10A, a first resonator 10A-1 with the radius of the second circle GC2 being Ra1 and a second resonator 10A-2 with the radius of the second circle being Ra2 different from Ra1 are prepared, and using a probe, the unloaded Q; Q1 of the first resonator 10A-1 and the unloaded Q; Q2 of the second resonator 10A-2 are measured.
[0056] Here, in the first resonator 10A-1 and the second resonator 10A-2, typically, the configurations are the same except that the radius Ra of the second circle GC2 is Ra1 and Ra2 different from it, respectively. That is, the radius Rb of the first circle GC1 of the first resonator 10A-1 and the second resonator 10A-2 is the same. By setting Ra1 and Ra2 to different values in the first resonator 10A-1 and the second resonator 10A-2, the distance between the first circle GC1 and the second circle GC2 can be changed. Therefore, the electromagnetic field distribution in the resonator can be changed between 10A-1 and 10A-2.
[0057] The relationship between Ra1 and Ra2 is preferably, for example, when Ra1 < Ra2, Rb - Ra1 > Rb - Ra2. In the first resonator 10A-1 and the second resonator 10A-2, in order to make Ra1 < Ra2, the number of the second via conductors V2 of the second via conductor group G2 may be different between the two resonators.
[0058] The probe used in the first step is used to supply an input signal of a predetermined frequency, for example, an electromagnetic wave, to the input port section 11. The type of the probe is not particularly limited. Typically, a GSG probe or a GS probe is used.
[0059] (Second step) In the second step, separately from the first resonator 10A-1 and the second resonator 10A-2, a flat sample having a conductor layer provided on the surface of a flat dielectric substrate is prepared. Then, the interfacial conductivity σ i between the dielectric substrate and the conductor layer in the flat sample is measured by a method conforming to IEC61338-1-5.
[0060] The shapes and sizes of the dielectric substrate and the conductor layer in the flat sample are not particularly limited. Also, the materials constituting the dielectric substrate and the conductor layer are typically the same as the materials constituting the dielectric substrate 1, the first via conductor V1, and the second via conductor V2 in the first resonator 10A-1 and the second resonator 10A-2.
[0061] (Third step) In the third step, the unloaded Q; Q1 and unloaded Q; Q2 measured in the first step, and the interfacial conductivity; σ i measured in the second step are introduced into the following formulas (1) and (2) to obtain the dielectric loss tangent tanδ of the dielectric substrate 1 in the first resonator 10A-1 and the second resonator 10A-2 and the conductivity σ via at the interface S between the first via conductor V1, the second via conductor V2 and the dielectric substrate 1.
[0062] [Number]
[0063] Note that in formulas (1) and (2), Q1 and Q2 are the values measured in the first step, σi is the value measured in the second step, and A1, B1, C1, A2, B2, and C2 are the values obtained by computer simulation, respectively.
[0064] A1, B1, C1, A2, B2, and C2 can be specifically obtained as follows in (3-1) to (3-3).
[0065] (3-1) Obtain A1 and A2. In the first resonator 10A-1 and the second resonator 10A-2, input an appropriate tanδ and set σ i to infinity and σ via to infinity. Then, the above equations (1) and (2) become the following equations (11) and (21), respectively. By performing computer simulation calculations, the no-load Q; Q1 and no-load Q; Q2 at that time can be obtained. Therefore, A1 and A2 can be obtained from the above tanδ and those values.
[0066] [Number]
[0067] (3-2) Obtain B1 and B2. In the first resonator 10A-1 and the second resonator 10A-2, input an appropriate σ i and set tanδ to 0 and σ via to infinity. Then, the above equations (1) and (2) become the following equations (12) and (22), respectively. By performing computer simulation calculations, the no-load Q; Q1 and no-load Q; Q2 at that time can be obtained. Therefore, B1 and B2 can be obtained from the above σ i and those values.
[0068] [Number]
[0069] (3-3) Obtain C1 and C2. In the first resonator 10A-1 and the second resonator 10A-2, input an appropriate σ via and set tanδ to 0 and σ iWhen it is set to infinity, the above formulas (1) and (2) become the following formulas (13) and (23), respectively. When calculating by computer simulation, the no-load Q; Q1 and no-load Q; Q2 at that time can be obtained, so the above σ via and from those values, C1 and C2 can be obtained.
[0070] [Number]
[0071] Here, in the method for measuring conductivity according to the present embodiment, if two resonators 10B having radii Ra1 and Ra2 of the second circular GC2 are used as the first resonator and the second resonator, in the same manner as above, it becomes possible to measure the conductivity at the interface S between the first via conductor V1 and the second via conductor V2 and the dielectric substrate 1.
[0072] Also, the area of the second ring-shaped conductor R2 electrically connected to the open end FE of the second via conductor group G2 can be used to control the resonance frequency, and by changing the area of the second ring-shaped conductor R2, fine adjustment of the measurement frequency can be achieved with a slight design change.
[0073] As described above, the method for measuring conductivity of the embodiment has been described, but these are examples, and various changes can be made without departing from the spirit of the present disclosure. [Example]
[0074] Hereinafter, the embodiments will be specifically described with examples, but the present embodiment is not limited thereto.
[0075] [Examples 1 to 3; Measurement of Conductivity] For three types with different via conductors, using a first resonator and a second resonator whose basic configuration is the same as that of the resonator 10B and whose details are shown below, the specific conductivity σ of the interface S between the first via conductor V1, the second via conductor V2 and the dielectric substrate 1 via (Conductivity σ of copper 0 =5.8×10 7The value normalized by S / m was measured.
[0076] The first resonator and the second resonator were prepared, with different radii Ra of the second circle GC2. The radius Ra1 of the second circle GC2 of the first resonator was 0.8 mm, and the radius Ra2 of the second circle GC2 of the second resonator was 3 mm. Also, regarding the configurations of the first resonator and the second resonator, they are the same except for the radius Ra of the second circle GC2, as follows.
[0077] The dielectric substrate 1 has a size of 10 mm × 10 mm in plan view and is composed of 14 dielectric layers (thickness 0.075 mm), with an overall thickness of 1.05 mm. The material of the dielectric substrate 1 is LTCC (low-temperature co-fired ceramics).
[0078] The first via conductor V1 and the second via conductor V2 that respectively constitute the first via conductor group G1 and the second via conductor group G2 are cylindrical, and the diameters in plan view are all 0.065 mm. The radius Rb of the first circle GC1 is 4 mm. The first via conductor V1 and the second via conductor V2 are made of copper.
[0079] The first ring conductors R1 and R2 are formed between the 14 dielectric layers. Specifically, on the upper surfaces of each of the 13 dielectric layers excluding the uppermost layer among the 14 dielectric layers, they are all formed of copper, with a width of 0.3 mm and a thickness of 0.006 mm.
[0080] The input port section 11 and the output port section 12 are formed at positions between the first via conductor group G1 and the second via conductor group G2 on the upper surface of the dielectric substrate 1. Specifically, the input port section 11 and the output port section 12 are each formed of copper with a diameter of 0.11 mmφ at positions symmetric with respect to the center C1 on a straight line including the center C1 of the first circle GC1.
[0081] On the upper surface of the dielectric substrate 1, a first conductor layer 2a made of copper with a size of 10 mm × 10 mm in plan view and a thickness of 0.006 mm, which has cutout portions N1 and N2 corresponding to the input port portion 11 and the output port portion 12, is formed. On the lower surface of the dielectric substrate 1, a second conductor layer 2b made of copper with a size of 10 mm × 10 mm in plan view and a thickness of 0.006 mm is formed.
[0082] Using a GSG probe, electromagnetic waves were input from the input port portion 11 to excite the first resonator and the second resonator respectively, and the output signal obtained from the output port portion 12 was measured with a network analyzer to obtain the unloaded Q; Q1 of the first resonator and the unloaded Q; Q2 of the second resonator. The measurement environment was as described above. The results are shown in Table 1.
[0083] Separate from the first resonator and the second resonator, a flat plate sample was prepared by providing a copper conductor layer (with a thickness of 0.006 mm) on the surface of a flat plate dielectric substrate (a substrate made of the same LTCC material as the dielectric substrate 1, with a size of 50 mm × 50 mm in plan view and a thickness of 0.5 mm). The interfacial conductivity; σ i between the dielectric substrate and the conductor layer in this flat plate sample was measured by a method conforming to IEC61338-1-5. σ i was 75% as the specific conductivity.
[0084] The above results were introduced into the above formulas (1) and (2) to obtain the specific conductivity σ via of the interface S between the first via conductor V1, the second via conductor V2 and the dielectric substrate 1, and the tanδ of the dielectric substrate 1 for Examples 1 to 3. The results are shown in Table 1.
[0085]
Table 1
Description of Reference Numerals
[0086] 10A, 10B resonators 1 dielectric substrate 1a, 1b, 1c, 1d dielectric layers 2a, 2b pair of conductor layers G1 First via conductor group G2 Second via conductor group GC1 First circle GC2 Second circle V1 First via conductor V2 Second via conductor R1 First ring-shaped conductor R2 Second ring-shaped conductor
Claims
1. A resonator having a dielectric substrate, a pair of conductor layers, a first via conductor group, and a second via conductor group, wherein the pair of conductor layers are arranged so as to sandwich the dielectric substrate, the first via conductor group has a plurality of first via conductors, and the plurality of first via conductors are arranged in a circumferential shape of a first circle so as to have predetermined intervals when the dielectric substrate is viewed in plan, and are provided so as to penetrate the dielectric substrate in the thickness direction and are electrically connected to both of the pair of conductor layers, the second via conductor group has a plurality of second via conductors, and the plurality of second via conductors are arranged in a circumferential shape of a second circle so as to have predetermined intervals when the dielectric substrate is viewed in plan, and are provided from one surface of the dielectric substrate to a position at a predetermined depth and are electrically connected to one of the pair of conductor layers, the dielectric substrate has a structure in which a plurality of dielectric layers are laminated, the plurality of first via conductors of the first via conductor group are electrically connected by a first ring-shaped conductor disposed between the dielectric layers inside the dielectric substrate, and the plurality of second via conductors of the second via conductor group are electrically connected by a second ring-shaped conductor disposed between the dielectric layers inside the dielectric substrate, wherein the diameter of the first circle is larger than the diameter of the second circle, and the center of the first circle coincides with the center of the second circle. Resonator.
2. A resonator having a dielectric substrate, a pair of conductor layers, a first via conductor group, and a second via conductor group, wherein the pair of conductor layers are arranged so as to sandwich the dielectric substrate, the first via conductor group has a plurality of first via conductors, and the plurality of first via conductors are arranged in a circumferential shape of a first circle so as to have predetermined intervals when the dielectric substrate is viewed in plan, and are provided so as to penetrate the dielectric substrate in the thickness direction and are electrically connected to both of the pair of conductor layers, the second via conductor group has a plurality of second via conductors, and the plurality of second via conductors are arranged in a circumferential shape of a second circle so as to have predetermined intervals when the dielectric substrate is viewed in plan, and are provided from one surface of the dielectric substrate to a position at a predetermined depth and are electrically connected to one of the pair of conductor layers, As a resonator in which the diameter of the first circle is larger than the diameter of the second circle and the centers of the first circle and the second circle coincide, a first resonator in which the radius of the second circle is Ra1 and a second resonator in which the radius of the second circle is Ra2 different from Ra1 are prepared, and a first step of measuring the unloaded Q; Q1 of the first resonator and the unloaded Q; Q2 of the second resonator using a probe is performed. Separate from the first resonator and the second resonator, a flat sample is prepared by providing a conductor layer on the surface of a flat dielectric substrate, and the interfacial conductivity σ between the dielectric substrate and the conductor layer in the flat sample; i a second step of measuring by a method compliant with IEC 61338-1-5; The no-load Q; Q1 and no-load Q; Q2 measured in the first step, and the interfacial conductivity; σ measured in the second step i are introduced into the following formulas (1) and (2) to obtain the dielectric tangent tanδ of the dielectric substrate in the first resonator and the second resonator and the conductivity σ at the interface between the first via conductor and the second via conductor and the dielectric substrate via a third step of obtaining 【Number 1】 (In Equations (1) and (2), Q1 and Q2 are the values measured in the first step, σi is the value measured in the second step, and A1, B1, C1, A2, B2, and C2 are the values obtained by computer simulation, respectively.) A method for measuring conductivity having the above.
3. The method for measuring conductivity according to Claim 2, wherein the resonators according to Claim 1 are used as the first resonator and the second resonator.
4. The method for measuring conductivity according to Claim 3, wherein the frequency used for measuring the conductivity is changed by changing the width of the second ring-shaped conductor located at the open end of the second via conductor group.
Citation Information
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