Semiconductor device

Abstract

To improve reliability in a semiconductor device in which a clip is joined to a semiconductor element by suppressing local heat generation in a vicinity of a joint section of the semiconductor element and the clip.SOLUTION: In a semiconductor device 1, a semiconductor element 3 and a clip 8 are joined via a joining material 4, and an insulation layer 7 is arranged between them as a low heat resistance part. When an area which is between the semiconductor element 3 and the clip 8 and joined via the joining material 4 is used as a joining area, heat radiation of a section of the joining area where the insulation layer 7 is arranged is smaller than the other section of the joining area. As a result, a heat radiation area is intentionally arranged with the clip 8 so that the heat generation area in the semiconductor device 1 is dispersed, and local heat generation in the vicinity of a joint section of the semiconductor element 3 and the clip 8 is suppressed.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present invention relates to a semiconductor device in which a clip is joined to a semiconductor element.

Background Art

[0002] Conventionally, a semiconductor device is known in which a clip of a plate-like member is joined to an electrode of a semiconductor element, and the semiconductor element and the clip are covered with a sealing material (for example, Patent Document 1).

[0003] The semiconductor device described in Patent Document 1 includes a die pad, a plurality of leads, a semiconductor element, a clip, a bonding material, and a sealing resin. In this semiconductor device, the clip is joined to the electrode of the semiconductor element and a part of the leads via the bonding material, and the semiconductor element and a part of the leads are electrically connected.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] In this type of semiconductor device, the area of the joint portion between the semiconductor element and the clip is made as wide as possible, and the heat resistance at these joint portions is reduced, thereby enhancing the heat dissipation performance of the semiconductor element.

[0006] However, as a result of intensive studies by the present inventors on improving the reliability of a semiconductor device having such a structure, it has been found that current concentrates due to local heat generation in the vicinity of the portion of the semiconductor element to which the clip is joined, and damage may occur.

[0007] In view of the above points, an object of the present invention is to suppress local heat generation in the vicinity of the bonding portion between a semiconductor element and a clip in a semiconductor device in which the clip is bonded to the semiconductor element, and to improve reliability.

Means for Solving the Problems

[0008] To achieve the above object, the semiconductor device according to claim 1 is a semiconductor device, comprising a lead frame (2), a semiconductor element (3) mounted on the lead frame, a clip (8) bonded to an electrode (32) on a surface (3a) of the semiconductor element opposite to the lead frame via a bonding material (4), a sealing material (9) covering the semiconductor element and the clip, and a heat resistance portion disposed in a region between the semiconductor element and the clip and in a portion bonded via the bonding material as a bonding region (R j ), and is provided with a heat resistance portion disposed in the bonding region, and the heat resistance portion has a higher thermal resistance than a region different from the heat resistance portion in the bonding region. Insulating layer (7) that functions as The insulating layer is covered with a bonding material, The heat resistance portion has a higher thermal resistance than a region different from the heat resistance portion in the bonding region.

[0009] In this semiconductor device, a heat resistance portion is disposed between the semiconductor element and the clip and within the bonding region bonded via the bonding material, and the heat resistance portion has a higher thermal resistance than other portions in the bonding region. As a result, the portion of the bonding region where the heat resistance portion is disposed has a lower heat dissipation property than other portions, so that the heat generation amount becomes relatively large. As a result, regions with low heat dissipation properties are dispersed, and local heat concentration between the clip with high heat dissipation properties and the region with low heat dissipation properties near the clip in the semiconductor device is suppressed. Therefore, in this semiconductor device, by intentionally providing a region with low heat dissipation properties, local heat concentration in the vicinity of the connection portion between the semiconductor element and the clip, and current concentration and breakage caused thereby are suppressed, and reliability is improved.

[0015] The reference numerals in parentheses attached to each component etc. show an example of the correspondence relationship between the component etc. and the specific components etc. described in the embodiments described later.

Brief Description of the Drawings

[0016]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6A

Figure 6B

Figure 6C

Figure 6D

Figure 6E

Figure 6F

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Mode for Carrying Out the Invention

[0017] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other are denoted by the same reference numerals for description.

[0018] (First Embodiment) The semiconductor device 1 of the first embodiment will be described. The semiconductor device 1 of this embodiment is preferably applied to in-vehicle use mounted on a vehicle such as an automobile, but of course, it can also be adopted for other uses.

[0019] In FIG. 1, in order to make it easy to understand each member and the arrangement relationship constituting the semiconductor device 1, a part of the outer contour of each member covered with the sealing material 9 to be described later is shown by a solid line, and the outer contour of the part covered with a member other than the sealing material 9 is shown by a broken line.

[0020] 〔Basic Configuration〕 The semiconductor device 1 of this embodiment has, for example, as shown in FIG. 1, a lead frame 2 having a die pad 21 and a plurality of leads 22, 23, a semiconductor element 3, a wire 5, a control element 6, a clip 8, and a sealing material 9. The semiconductor device 1 further has, for example, as shown in FIGS. 2 and 3, a bonding material 4 used for connecting the semiconductor element 3 and the clip 8, and an insulating layer 7 disposed between the semiconductor element 3 and the clip 8.

[0021] The lead frame 2 has, for example, a die pad 21, a plurality of first leads 22 extending externally from the die pad 21, a second lead 23 independent of the die pad 21, and a third lead 24. The lead frame 2 is made of, for example, an arbitrary metal material such as Cu (copper) or Fe (iron) or an alloy material thereof. The lead frame 2 is, for example, connected by a tie bar (not shown) for the die pad 21 and the plurality of leads 23, 24 until midway through the manufacture of the semiconductor device 1, and the tie bar is removed by a punching process after the molding of the sealing material 9, so that they are in a separated state.

[0022] As shown in, for example, FIG. 2, the die pad 21 has a semiconductor element 3 and a control IC 6 for driving control thereof mounted via a bonding material 4. For the die pad 21, for example, the surface on the side opposite to the mounting surface on which the semiconductor element 3 is mounted is exposed from the sealing material 9. The same applies to the plurality of first leads 22 extending externally from the die pad 21, the second lead 23 independent of the die pad 21, and the third lead 24.

[0023] The plurality of first leads 22 are, for example, arranged in parallel at a distance from each other and extend externally from the die pad 21. For the plurality of first leads 22, the end surfaces on the side opposite to the die pad 21 side are exposed from the sealing material 9. The same applies to the second lead 23 and the third lead 24.

[0024] The second lead 23 is independent of the die pad 21 and the third lead 24 and is, for example, arranged in parallel away from each other. Some of the plurality of second leads 23 are, for example, electrically connected to the control IC 6 via a wire 5 and are used for driving the control IC 6.

[0025] The third lead 24 has a larger planar size than the second lead 23, and a clip 8 is joined via the bonding material 4. The third lead 24 is electrically connected to the second electrode 32 of the semiconductor element 3 via the clip 8 and serves as a current path when the semiconductor element 3 is driven.

[0026] Note that the configuration of the lead frame 2 described above is merely an example, and the number, size, and arrangement of the die pad 21 and the leads 22 to 24 may be appropriately changed according to the number and size of the semiconductor element 3 and the control IC 6 to be mounted. Further, the lead frame 2 may be provided with an exterior plating (not shown) made of Au (gold), Sn (tin), etc. in, for example, part or all of the regions.

[0027] The semiconductor element 3 is, for example, a vertical power element such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor). The semiconductor element 3 is mainly formed in a rectangular plate shape from a semiconductor material such as Si (silicon) or SiC (silicon carbide), and is manufactured by a known semiconductor process. The semiconductor element 3 has, for example, the surface on the side opposite to the lead frame 2 as the front surface 3a, and the surface facing the lead frame 2 as the back surface 3b, and electrodes are formed on each of the front surface 3a and the back surface 3b. The semiconductor element 3 has, for example, a first electrode 31 formed on the back surface 3b, and a second electrode 32 and a plurality of third electrodes 33 formed on the front surface 3a that are paired with the first electrode 31. The semiconductor element 3 has a configuration in which, for example, the first electrode 31 functions as a drain electrode, the second electrode 32 functions as a source electrode, and the third electrode 33 functions as a gate electrode. The first electrode 31 of the semiconductor element 3 is joined to the die pad 21 via the bonding material 4, and the second electrode 32 is joined to the clip 8 via the bonding material 4. The third electrode 33 of the semiconductor element 3 is electrically connected to the control IC 6 via the wire 5, and the control IC 6 controls the on / off of the current between the first electrode 31 and the second electrode 32.

[0028] The bonding material 4 is, for example, a conductive bonding material such as solder, and is composed of an arbitrary bonding material.

[0029] The wire 5 is composed of a metal material such as Au (gold) or Al (aluminum), and is connected to the lead frame 2, the semiconductor element 3, and the control IC 6 by wire bonding.

[0030] The control IC6 is a control element provided with a control circuit used for current control of the semiconductor element 3, and is, for example, an element for arbitrary power supply control corresponding to a power element such as a MOSFET. The control IC6 has, for example, a plurality of electrode pads 61 on one surface, and is connected to the third electrode 33 of the semiconductor element 3 and the plurality of leads 23 via the wire 5, enabling electrical communication with the semiconductor element 3, an external power supply, etc. The control IC6 is mounted, for example, on the die pad 21 via the bonding material 4 in the same manner as the semiconductor element 3.

[0031] The insulating layer 7 is disposed, for example, as shown in FIG. 3, between the second electrode 32 of the semiconductor element 3 and the clip 8, and functions as a heat resistance portion that intentionally increases the thermal resistance of a partial region between the second electrode 32 and the clip 8. The insulating layer 7 is composed of an arbitrary insulating material, for example, PIQ (Polyimide-isoindolo quinazolinedione), a resist material, etc., and is formed by coating with a dispenser or the like. The insulating layer 7 intentionally forms a region with low heat dissipation between the second electrode 32 and the clip 8, and by dispersing the region with low heat dissipation, plays a role in preventing local heat concentration in the vicinity of the clip 8. Details of this will be described later.

[0032] The clip 8 is composed of, for example, a metal material with high electrical conductivity and thermal conductivity such as Cu or an alloy material thereof, and is a wiring member that electrically connects the semiconductor element 3 and the third lead 24. One end side of the clip 8 is joined to the second electrode 32 of the semiconductor element 3, and the other end side is joined to the third lead 24 with the bonding material 4. The clip 8 has, for example, a configuration in which the thickness of the portion joined to the semiconductor element 3 is larger than the thickness of other portions, as shown in FIG. 2. The clip 8 can be obtained, for example, by preparing a plate material made of Cu or the like, forming a portion with a thin thickness by cutting, half etching, etc., and then performing bending processing. Note that the clip 8 is not limited to the above-described configuration, and may have a uniform thickness. In this case, it can be obtained by performing bending processing on a plate material made of Cu or the like.

[0033] The sealing material 9 is made of an arbitrary resin material having insulating and curable properties such as an epoxy resin, and is a member that covers a part of the lead frame 2 and other components of the semiconductor device 1. The sealing material 9 is formed by an arbitrary resin molding method such as compression molding using a mold (not shown), for example.

[0034] The above is the basic configuration of the semiconductor device 1 of the present embodiment.

[0035] 〔Insulating layer〕 Next, the effects, configuration, etc. of the insulating layer 7 will be described in comparison with the semiconductor device 100 of the comparative example that does not have the insulating layer 7.

[0036] The semiconductor device 100 of the comparative example is the same as the semiconductor device 1 in terms of the basic configuration as shown in FIG. 4, for example, but does not have the insulating layer 7, and the insulating layer 7 is not disposed between the semiconductor element 3 and the clip 8. In the semiconductor device 1 of the comparative example, the clip 8 is joined to the second electrode 32 of the semiconductor element 3, and the joining area thereof is substantially the same as the planar area of the second electrode 32. As a result, in the semiconductor device 100 of the comparative example, the resistance at the joining portion between the second electrode 32 of the semiconductor element 3 and the clip 8 is reduced, and the amount of heat generated due to the connection resistance at the joining portion is reduced.

[0037] The semiconductor device 100 of the comparative example has a directly below portion 3aa located directly below the region where the clip 8 is joined on the surface 3a of the semiconductor element 3, and a nearby portion 3ab in the vicinity thereof where the clip 8 is not joined, as shown in FIG. 5, for example. The directly below portion 3aa where the clip 8 made of Cu or the like having a high thermal conductivity is disposed is a high heat dissipation region R H while the nearby portion 3ab where the sealing material 9 having a lower thermal conductivity than the clip 8 is disposed is a low heat dissipation region R L as shown.

[0038] When the inventors conducted a reliability evaluation on the semiconductor device 100 of the comparative example, it was found that an overcurrent occurred in the vicinity of the clip 8, that is, at the boundary between the vicinity part 3ab or the directly below part 3aa and the vicinity part 3ab, resulting in dielectric breakdown. This is considered to be due to a large difference in heat dissipation between the high heat dissipation region R H and the low heat dissipation region R L causing local heat concentration at these boundaries. Specifically, when local heat concentration occurs in the semiconductor element 3, the temperature at the heat concentration point rises higher than other parts, and the electrical resistance decreases. Along with this decrease in electrical resistance, the amount of current at the location of local heat concentration increases, the amount of heat generation further increases, and ultimately a further decrease in electrical resistance is caused. Due to the repetition of this cycle, it is considered that a local tolerance decrease occurred in the semiconductor element 3, ultimately leading to damage. Therefore, in order to suppress such damage, it is necessary to disperse the heat generation region.

[0039] On the other hand, as shown in, for example, FIG. 6A, the semiconductor device 1 of the present embodiment has a bonding region R j between the semiconductor element 3 and the clip 8, which is joined via a bonding material 4. j As such, an insulating layer 7 as a thermal resistance part is disposed in the bonding region R.

[0040] The insulating layer 7 can be constituted by, for example, a plurality of island parts 71 arranged in an island shape at a distance from each other. The plurality of island parts 71 are all substantially square-shaped, for example, in a top view, and are arranged inside the outer contour of the bonding region R j and serve to increase the thermal resistance in the inner region of the clip 8 compared to its outer contour. That is, the portion of the bonding surface 8a of the clip 8 located above the island part 71 has lower heat dissipation than other parts of the bonding surface 8a. As a result, the heat generation regions on the bonding surface 8a of the clip 8 are dispersed by the number of the island parts 71, the heat concentration in the vicinity of the clip 8 is alleviated, and the current concentration and damage caused thereby are suppressed.

[0041] The insulating layer 7 is not limited to the example of FIG. 6A. For example, as shown in FIG. 6B, in a top view, it may be composed of four island portions 71 having a substantially rectangular shape, and the longitudinal direction may be aligned and arranged in parallel in the vertical direction of the paper surface of FIG. 6B. The insulating layer 7 may have a configuration in which a plurality of island portions 71 are arranged in parallel with their longitudinal directions aligned in the left-right direction of the paper surface, as shown in FIGS. 6C and 6D. The insulating layer 7 may have a substantially rectangular shape in a top view, for example, as shown in FIG. 6E, and is located at a position separated from the outer contour of the bonding region R j , that is, at a position separated from the outer contour of the bonding region R j and only one may be arranged in a predetermined region including the center of. Further, the insulating layer 7 may have a substantially circular shape in a top view, for example, as shown in FIG. 6F.

[0042] Thus, the insulating layer 7 may be arranged at a position away from the vicinity of the outer contour of the bonding region R j , and any configuration may be used as long as it can disperse the heat generation region in the clip 8. The outer contour shape, the number and arrangement of the island portions 71, etc. may be appropriately changed. From the viewpoint of dispersing the heat generation region in the clip 8, the insulating layer 7 preferably has a configuration having a plurality of island portions 71.

[0043] Further, the insulating layer 7 only needs to be arranged between the second electrode 32 and the bonding surface 8a of the clip 8, and may be formed on the bonding surface 8a side of the clip 8, for example, as shown in FIG. 7. In this case, the insulating layer 7 is, for example, pattern-formed in advance on the bonding surface 8a of the clip 8 before the clip 8 is bonded to the semiconductor element 3. The insulating layer 7 may have a configuration in which a plurality of island portions 71 are arranged on the bonding surface 8a, or a configuration in which only one is arranged on the bonding surface 8a. Similar to the case where it is formed on the semiconductor element 3 side, the arrangement, configuration, etc. may be appropriately changed.

[0044] According to the present embodiment, by arranging the insulating layer 7 between the semiconductor element 3 and the clip 8, the semiconductor device 1 has a configuration in which a heat resistance portion having intentionally low heat dissipation is present on the bonding surface 8a of the clip 8. Thereby, the bonding region R between the semiconductor element 3 and the clip 8 jThe heat generation in [the device] is dispersed, heat concentration in the vicinity part 3ab located near the outer contour of the clip 8 among the semiconductor elements 3, current concentration and breakage resulting therefrom are suppressed, and an effect of improving reliability is obtained.

[0045] (Second Embodiment) The semiconductor device 1 of the second embodiment will be described.

[0046] The semiconductor device 1 of the present embodiment is different from the first embodiment in that, for example, as shown in FIG. 8, it does not have an insulating layer 7 and the bonding surface 8a of the clip 8 has an uneven shape. In the present embodiment, this difference will be mainly described.

[0047] In the present embodiment, the clip 8 is provided with a plurality of recesses 81 recessed toward the side opposite to the semiconductor element 3 on the bonding surface 8a, for example. The clip 8 has its bonding surface 8a bonded to the second electrode 32 of the semiconductor element 3 via a bonding material 4, and the bonding material 4 is filled in the recesses 81. The clip 8 is in a state where the recesses 81 are farther from the semiconductor element 3 than the other parts of the bonding surface 8a, and functions as a heat resistance part having a larger heat resistance than the other parts. That is, the clip 8 has a lower heat dissipation property and a larger heat generation amount in the recesses 81 than the other parts of the bonding surface 8a, so that it is substantially in the same state as when the insulating layer 7 is disposed. Therefore, in the semiconductor device 1 of the present embodiment, the heat generation region at the bonding surface 8a of the clip 8 is dispersed, and local heat concentration in the vicinity part 3ab of the semiconductor element 3 is suppressed.

[0048] Note that only one recess 81 may be provided on the bonding surface 8a, or a plurality of recesses 81 may be provided and arranged apart from each other. Further, the recess 81 is, for example, in the shape of a rectangular groove and has a depth of about 10 μm, but is not limited thereto, and the depth, shape, dimensions, etc. thereof may be appropriately changed.

[0049] Also according to the present embodiment, the semiconductor device 1 having the same effect as the first embodiment is obtained. Further, since this semiconductor device 1 does not require the insulating layer 7, there is no influence of the secular deterioration of the insulating layer 7, and an effect of further improving reliability is obtained.

[0050] (Third Embodiment) The semiconductor device 1 of the third embodiment will be described.

[0051] The semiconductor device 1 of the present embodiment is different from the first embodiment in that, as shown in FIG. 9, for example, it has a configuration having a plurality of joints 82 where the clip 8 is joined to the semiconductor element 3, and in that it does not have the insulating layer 7. In the present embodiment, this difference will mainly be described.

[0052] In the present embodiment, the clip 8 has two joints 82 arranged in parallel with a gap therebetween. The clip 8 can be obtained, for example, by providing a plate material made of, for example, Cu with portions having different thicknesses by means of machining such as cutting or half-etching, and then performing press punching to remove unnecessary portions.

[0053] The two joints 82 are, for example, rectangular in a top view, and are arranged in parallel with their extending directions (i.e., longitudinal directions) aligned. The two joints 82 are arranged along two opposing sides among a plurality of sides forming the outer contour of the second electrode 32 of the semiconductor element 3, and are joined to a predetermined region including the vicinity of the two sides. As a result, the area of the region between the joint 82 and one side of the outer contour adjacent thereto in the second electrode 32 becomes smaller, thereby suppressing the spreading resistance in the region, and reducing the amount of heat generated in the outer contour portion of the second electrode 32 located near the clip 8.

[0054] Also, the portion of the clip 8 sandwiched between the two joints 82 is in a state where the second electrode 32 of the semiconductor element 3 is exposed, and the sealing material 9 having a lower thermal conductivity than the clip 8 is arranged. Therefore, the region between the two joints 82 in the second electrode 32 has lower heat dissipation than the region where the joints 82 are joined, and as a result, the heat generation region in the semiconductor element 3 is dispersed, serving to suppress local heat concentration at the nearby portion 3ab.

[0055] Also according to this embodiment, the semiconductor device 1 can achieve the same effects as those of the first embodiment. Further, since the insulating layer 7 is not provided, the semiconductor device 1 of this embodiment can also achieve the same effects as those of the second embodiment.

[0056] (Modification of the Third Embodiment) The semiconductor device 1 of the third embodiment may have a configuration in which, for example, as shown in FIG. 10, the clip 8 has three joint portions 82 arranged apart from each other. In this way, when the clip 8 has a configuration having a plurality of joint portions 82 arranged apart from each other, the gap portion between the joint portions 82 functions as a thermal resistance portion whose heat dissipation property is intentionally made smaller than that of the joint portions 82. Therefore, by using the clip 8 having a plurality of joint portions 82 arranged apart from each other, the semiconductor device 1 suppresses local heat concentration at the boundary portion between the second electrode 32 of the semiconductor element 3 and the clip 8, and improves reliability.

[0057] Note that the clip 8 is not limited to the example in which two or three joint portions 82 are arranged in parallel apart from each other as described above, and may have four or more joint portions 82. It is preferable that at least two of the plurality of joint portions 82 of the clip 8 are arranged along two opposing sides of the outer contour of the second electrode 32 of the semiconductor element 3 and are joined to a region including the vicinity of the two sides. Here, the “vicinity” means, for example, but not limited to, a portion located within 1 mm from the side forming the outer contour of the second electrode 32. The clip 8 may be appropriately changed regarding the number, arrangement, dimensions, etc. of the joint portions 82 according to the electrode of the semiconductor element 3 to be joined.

[0058] Also according to this modification, the semiconductor device 1 can achieve the same effects as those of the third embodiment.

[0059] (Fourth Embodiment) The semiconductor device 1 of the fourth embodiment will be described.

[0060] As shown in, for example, FIG. 11, the semiconductor device 1 of the present embodiment is different from the first embodiment in that the semiconductor element 3 has two second electrodes 32 on the surface 3a, different clips 8 are joined to the two second electrodes 32, and the semiconductor device 1 does not have an insulating layer 7. In the present embodiment, this difference will be mainly described.

[0061] In the present embodiment, the semiconductor element 3 has two second electrodes 32 that are arranged apart from each other on the surface 3a. In the semiconductor element 3, the two second electrodes 32 are paired with the first electrode 31 on the back surface 3b, and a current is generated in the thickness direction, that is, in the longitudinal direction, by applying a voltage to the third electrode 33.

[0062] The number of clips 8 is the same as the number of the second electrodes 32 of the semiconductor element 3, and the clips 8 are respectively joined to different second electrodes 32 via a bonding material 4. The two clips 8 are joined to one semiconductor element 3 and are independent of each other and are arranged so as not to contact the other clip 8. As a result, in the semiconductor device 1, the heat dissipation property of the region of the gap between the two second electrodes 32 in the semiconductor element 3 is smaller than the region joined to the clip 8, and the heat generation locations are dispersed, so that local heat concentration in the portion located near the clip 8 is suppressed.

[0063] Also according to the present embodiment, the semiconductor device 1 that obtains the same effect as the first embodiment is obtained. Further, since the insulating layer 7 is not provided, the semiconductor device 1 of the present embodiment also obtains the same effect as the second embodiment.

[0064] (Other Embodiments) Although the present disclosure has been described based on examples, it is understood that the present disclosure is not limited to the examples and structures. The present disclosure includes various modifications and modifications within an equivalent range. In addition, various combinations and forms, and further, other combinations and forms including only one element thereof, more, or less, fall within the scope and spirit of the present disclosure.

[0065] For example, in each of the above embodiments, a configuration in which one semiconductor element 3 and one control IC 6 are mounted on one die pad 21 was described as a representative example. However, the configuration of the semiconductor device 1 is not limited to this. For example, the semiconductor device 1 may have a plurality of independent die pads 21, and the semiconductor element 3 and the control IC 6 may be mounted on different die pads 21.

[0066] Further, the semiconductor device 1 may be configured such that the control IC 6 is not provided in the encapsulant 9 and the semiconductor element 3 is connected to the control IC 6 disposed outside.

[0067] Furthermore, the semiconductor device 1 may be, for example, a so-called 2in1 configuration in which two semiconductor elements 3 are disposed in the encapsulant 9, or a configuration in which three or more semiconductor elements 3 are disposed in the encapsulant 9. In this case, the configuration of the lead frame 2, the number of clips 8, etc. are appropriately changed according to the number of semiconductor elements 3, etc.

Description of Reference Numerals

[0068] 2... lead frame, 3... semiconductor element, 3a... surface, 32... electrode, 4... bonding material, 7... insulating layer (as a thermal resistance portion), 71... island portion, 8... clip, 8a... bonding surface, 81... recess (as a thermal resistance portion), 82... connection portion, 9... encapsulant, R j ... bonding region

Claims

1. A semiconductor device, a lead frame (2), a semiconductor element (3) mounted on the lead frame, a clip (8) joined to an electrode (32) on a surface (3a) of the semiconductor element opposite to the lead frame via a bonding material (4), a sealing material (9) covering the semiconductor element and the clip, a region between the semiconductor element and the clip, and an insulating layer (7) functioning as a thermal resistance portion disposed in the bonding region (R ｊ ) as a portion joined via the bonding material, the semiconductor device comprising the same. The insulating layer is covered by the bonding material, The thermal resistance portion has a higher thermal resistance than a region different from the thermal resistance portion in the bonding region, the semiconductor device.

2. The semiconductor device according to claim 1, wherein the insulating layer is disposed at one position in the bonding region at a distance from an outer contour of the electrode.

3. The insulating layer is composed of a plurality of independent island portions (71), The semiconductor device according to claim 1, wherein the plurality of island portions are respectively disposed at positions in the bonding region at a distance from an outer contour of the electrode.

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