Projector and method for controlling the projector

The projector addresses the timing deviations and image quality issues in pixel shift technology by controlling the optical path shift element based on image type within multiple unit periods, ensuring synchronized state changes and improved image quality.

JP7694193B2Active Publication Date: 2025-06-18SEIKO EPSON CORP
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Patent Information

Application Number
JP2021105466
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-06-25
Publication Date
2025-06-18
Estimated Expiration
2041-06-25

AI Technical Summary

Technical Problem

In pixel shift technology, the state change of the optical path shift element and the switching of the projected image are not instantaneous, leading to deviations in timing and deteriorated image quality.

Method used

A projector with an electro-optical panel and an optical path shift element, where image signals are supplied in multiple unit periods within a frame period, and the optical path shift element is controlled to change the projection position based on the type of image indicated by the input image signal.

Benefits of technology

The solution enables instantaneous state changes and switching of the projected image, improving image quality by maintaining synchronization between the optical path shift element and the image signal switching.

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Abstract

To control the state of an optical path shift element based on the type of an image to be displayed.SOLUTION: A projector comprises: an electro-optical panel that has a plurality of pixels arranged thereon which emit light based on image signals; an optical path shift element that can change an optical path of the light emitted from the plurality of pixels; and a control circuit that, in a first unit period, controls the state of the optical path shift element so that light emitted from a predetermined pixel of the plurality of pixels reaches a first position of a display screen, in a second unit period, controls the state of the optical path shift element so that the light radiated from the predetermined pixel reaches a second position of the display screen, and controls the state of the optical path shift element in a transition period during which the unit period makes a transition from the first unit period to the second unit period on the basis of the type of an image displayed according to an input image signal.SELECTED DRAWING: Figure 6
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Description

Technical Field

[0001] The present invention relates to a projector and a method for controlling the projector.

Background Art

[0002] In the technical field of projectors, as a method for pseudo-increasing the resolution, a pixel shift technique using an optical path shift element that optically shifts the display position is known. In the pixel shift technique, one frame period corresponding to one frame is divided into a plurality of unit periods, and the optical path shift element is controlled so that the state of the optical path shift element is different for each unit period. As a result, the display position of the image projected from the projector onto the projection surface shifts for each unit period.

[0003] As a pixel shift technique, for example, Patent Document 1 discloses a technique for controlling whether or not to temporally move the position of the pixel image on the projection surface according to whether the image to be displayed is a still image or a moving image. Further, Patent Document 2 discloses a technique for controlling whether or not to move the projection position according to whether or not the size of the pixel of the projection image is equal to or greater than a predetermined value.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0005] In the pixel shift technology, it is desirable that the state change of the optical path shift element and the switching of the projected image are performed instantaneously for each unit period. However, in reality, a certain amount of time is required for the state change of the optical path shift element and the switching of the projected image. Therefore, a deviation may occur between the timing of the start and end of the state change of the optical path shift element and the timing of the start and end of the switching of the projected image. In this case, the image quality of the projected image deteriorates. Note that the time required for the switching of the projected image depends on, for example, the response speed of the liquid crystal panel included in the projector.

[0006] By the way, among the images projected from the projector, there are images in which the gradation values change smoothly between pixels and images in which the boundaries between pixels are distinct. Therefore, in either case of projecting both types of images, a projector that can appropriately execute image shift is required.

Means for Solving the Problem

[0007] A projector according to an aspect of the present invention includes an electro-optical panel in which a plurality of pixels that emit light based on an image signal are arranged, an optical path shift element that can change the optical path of the light emitted from the plurality of pixels, and among a plurality of unit periods included in one frame period, in a first unit period, a first image signal based on an input image signal is supplied to the electro-optical panel as the image signal, and among the plurality of unit periods, in a second unit period after the first unit period, a second image signal based on the input image signal is supplied to the electro-optical panel as the image signal; an image processing circuit; in the first unit period, the state of the optical path shift element is controlled so that the light emitted from a predetermined pixel among the plurality of pixels reaches a first position on the display screen, and in the second unit period, the state of the optical path shift element is controlled so that the light irradiated from the predetermined pixel reaches a second position on the display screen, and a control circuit that controls the state of the optical path shift element in a transition period in which the unit period transitions from the first unit period to the second unit period based on the type of the image indicated by the input image signal.

[0008] Also, a method for controlling a projector according to an aspect of the present invention is a method for controlling a projector including an electro-optical panel in which a plurality of pixels that emit light based on an image signal are arranged, and an optical path shift element capable of changing an optical path of light emitted from the plurality of pixels. Among a plurality of unit periods included in one frame period, in a first unit period, a first image signal based on an input image signal is supplied to the electro-optical panel as the image signal, and among the plurality of unit periods, in a second unit period after the first unit period, a second image signal based on the input image signal is supplied to the electro-optical panel as the image signal. In the first unit period, the state of the optical path shift element is controlled so that light emitted from a predetermined pixel among the plurality of pixels reaches a first position on the display screen, and in the second unit period, the state of the optical path shift element is controlled so that light irradiated from the predetermined pixel reaches a second position on the display screen. The state of the optical path shift element in a transition period in which the unit period transitions from the first unit period to the second unit period is controlled based on the type of image indicated by the input image signal.

Brief Description of the Drawings

[0009]

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Embodiments for Carrying Out the Invention

[0010] Hereinafter, a projector and a method for controlling the projector according to an embodiment will be described with reference to the drawings. Note that, in each figure, the dimensions and scales of each part are appropriately different from the actual ones. Further, since the embodiments described below are preferred specific examples, various technically preferable limitations are imposed. However, the scope of the present disclosure is not limited to these forms unless there is a description to specifically limit the present disclosure in the following description.

[0011] 〔First Embodiment〕 First, a configuration example of a projector 1 according to the first embodiment of the present invention will be described. FIG. 1 is an explanatory diagram showing a configuration example of the projector 1. In the projector 1, an over-drive process is adopted and an optical pixel shift described later is executed.

[0012] The projector 1 includes a lighting device 20, a separation optical system 40, three liquid crystal panels 10R, 10G, and 10B, and a projection optical system 60. Note that, although details will be described in FIG. 6 described later, the projector 1 has functional blocks of a control system that controls an optical path shift element 100, the liquid crystal panels 10R, 10G, and 10B, etc., in addition to the elements shown in FIG. 1. Each of the liquid crystal panels 10R, 10G, and 10B is an example of an “electro-optical panel”. Hereinafter, the liquid crystal panels 10R, 10G, and 10B may be collectively referred to as the liquid crystal panel 10.

[0013] The lighting device 20 has a white light source such as a halogen lamp, for example.

[0014] The separation optical system 40 includes three mirrors 41, 42, and 45, and dichroic mirrors 43 and 44 inside thereof. Then, the separation optical system 40 separates white light, which is visible light emitted from the lighting device 20, into three primary colors of red, green, and blue. Hereinafter, “red” will be referred to as “R”, “green” will be referred to as “G”, and “blue” will be referred to as “B”.

[0015] For example, the white light emitted from the lighting device 20 is separated into three primary color light components of light in the wavelength range of R, light in the wavelength range of G, and light in the wavelength range of B by the mirrors 41, 42, and 45 and the dichroic mirrors 43 and 44 arranged inside the separation optical system 40. Then, the light in the wavelength range of R is guided to the liquid crystal panel 10R, the light in the wavelength range of G is guided to the liquid crystal panel 10G, and the light in the wavelength range of B is guided to the liquid crystal panel 10B.

[0016] Specifically, the dichroic mirror 44 transmits the light in the wavelength range of R among the white light and reflects the light in the wavelength ranges of G and B. The dichroic mirror 43 transmits the light in the wavelength range of B among the light in the wavelength ranges of G and B reflected by the dichroic mirror 44 and reflects the light in the wavelength range of G.

[0017] Here, the liquid crystal panels 10R, 10G, and 10B are each used as a spatial light modulator. Each of the liquid crystal panels 10R, 10G, and 10B has, for example, 800 data lines, 600 scanning lines, and pixels arranged in a matrix of 800 columns horizontally × 600 rows vertically. And in each pixel, the polarization state of the transmitted light, which is the emitted light with respect to the incident light, is controlled according to the gradation. Note that the number of scanning lines, data lines, and pixels of the above-described liquid crystal panels 10R, 10G, and 10B is an example and is not limited to the above example.

[0018] Pixel electrodes having a substantially square shape are provided on the liquid crystal panels 10R, 10G, and 10B corresponding to the intersections of the scanning lines and the data lines, and a common counter electrode is provided facing these pixel electrodes and covering each pixel. Also, for example, a VA-mode liquid crystal is provided between the pixel electrode and the counter electrode.

[0019] In such a configuration, when a certain scanning line is selected, the data line intersecting with the scanning line applies a voltage to the pixel electrode at the intersection of the scanning line and the data line. Even when the selection of the scanning line is released, the applied voltage is held by the capacitance between the pixel electrode and the counter electrode facing the pixel electrode.

[0020] The projection optical system 60 includes a dichroic prism 61, a projection lens system 62, and an optical path shift element 100. The light modulated by the liquid crystal panels 10R, 10G, and 10B respectively enters the dichroic prism 61 from three directions. In this dichroic prism 61, the light in the wavelength range of R and the light in the wavelength range of B are refracted at 90 degrees, while the light in the wavelength range of G travels straight. Thereby, the images of the primary colors R, G, and B are synthesized.

[0021] The light emitted from the dichroic prism 61 passes through the optical path shift element 100 and reaches the projection lens system 62. For example, the optical path shift element 100 is disposed between the dichroic prism 61 and the projection lens system 62.

[0022] The projection lens system 62 enlarges and projects the light emitted from the optical path shift element 100, specifically the synthesized image, onto a projection surface 80 such as a screen. Note that light corresponding to the primary colors R, G, and B respectively corresponding to the liquid crystal panels 10R, 10G, and 10B enters the liquid crystal panels 10R, 10G, and 10B through the dichroic mirrors 43 and 44. Therefore, it is not necessary to provide color filters on the liquid crystal panels 10R, 10G, and 10B.

[0023] Also, the transmitted images of the liquid crystal panels 10R and 10B are projected onto the projection surface 80 after being reflected by the dichroic prism 61, while the transmitted image of the liquid crystal panel 10G travels straight through the dichroic prism 61 and is projected. Therefore, the images formed by the liquid crystal panels 10R and 10B and the image formed by the liquid crystal panel 10G are in a relationship of left - right inversion.

[0024] FIG. 2 is a diagram for explaining the operation of the optical path shift element 100. The optical path shift element 100 is driven based on the output signal of the optical path shift element drive circuit 12, and shifts the optical path of the incident light, thereby shifting the position of the pixel displayed on the projection surface 80. This is referred to as pixel shift in the following description. When the optical path of the light emitted from the dichroic prism 61 is shifted by the optical path shift element 100, on the projection surface 80, the position of the displayed pixel is shifted, that is, shifted.

[0025] Specifically, when displaying an image of one frame by the high-resolution image signal VIDH described later, the period for displaying the one frame is divided into four sub-frames, and the projection position is shifted for each sub-frame. Due to such a shift, one panel pixel is visually recognized as if four display pixels are being displayed in one frame, that is, four sub-frames.

[0026] FIG. 3 is a diagram for explaining the relationship between the frame and the sub-frame in the present embodiment. As shown in this figure, in the present embodiment, the four sub-frames obtained by dividing one frame F are given the symbols f1, f2, f3, and f4 in chronological order.

[0027] Next, the relationship between the display pixel specified by the gray level in the high-resolution image signal VIDH, the panel pixel by the liquid crystal panel 10, and the projection position by the optical path shift element 100 will be described. Regarding the optical path shift element 100, as described above, the projection direction from the dichroic prism 61 is shifted, but for the sake of convenience, the shift amount is converted into the size of the projection pixel (panel pixel) on the projection surface 80.

[0028] The left column in FIG. 4 is a diagram showing only a part of the display image shown by the high-resolution image signal VIDH. The right column in FIG. 4 is a diagram showing an array corresponding to the array of the display pixels in the left column among the panel pixels of the liquid crystal panel 10.

[0029] In the array of display pixels indicated by the high-resolution image signal VIDH in FIG. 4, for the purpose of distinguishing pixels, for convenience, as symbols, from the left side in the first row, A1, B1, A2, B2, A3, and B3 are assigned. Also, from the left side in the second row, D1, C1, D2, C2, D3, and C3 are assigned. Also, from the left side in the third row, A4, B4, A5, B5, A6, and B6 are assigned. Also, from the left side in the fourth row, D4, C4, D5, C5, D6, and C6 are assigned. Also, from the left side in the fifth row, A7, B7, A8, B8, A9, and B9 are assigned. Also, from the left side in the sixth row, D7, C7, D7, C7, D7, and C7 are assigned.

[0030] In the array of panel pixels in FIG. 4, for the purpose of distinguishing pixels, for convenience, as symbols, Pa1 to Pa3 are assigned to the first row, Pb1 to Pb3 are assigned to the second row, and Pc1 to Pc3 are assigned to the third row, respectively. FIG. 4 shows that in the array of display pixels of video data, a total of four display pixels of 2×2 indicated by the thick frame are represented by one panel pixel. For example, the four display pixels A1, B1, C1, and D1 are represented by one panel pixel Pa1. Also, for example, the four display pixels A2, B2, C2, and D2 are represented by one panel pixel Pa2.

[0031] FIG. 5 is a diagram showing at which projection positions the panel pixels of the liquid crystal panel 10G corresponding to G among the three RGB colors are to display the display pixels of G in the high-resolution image signal VIDH in the projector 1. Specifically, FIG. 5 is a diagram showing at which projection positions the panel pixels in FIG. 4 are to display which of the display pixels in FIG. 4 in the sub-frames f1 to f4. The first row of FIG. 5 shows that in the sub-frame f1, for example, the panel pixel Pa1 displays the information corresponding to the display pixel A1 and projects it to the first projection position. The second row of FIG. 5 shows that in the subsequent sub-frame f2, for example, the panel pixel Pa1 displays the information corresponding to the display pixel B1 and projects it to the second projection position. The third row of FIG. 5 shows that in the subsequent sub-frame f3, for example, the panel pixel Pa1 displays the information corresponding to the display pixel C1 and projects it to the third projection position. The fourth row of FIG. 5 shows that in the subsequent sub-frame f4, for example, the panel pixel Pa1 displays the information corresponding to the display pixel D1 and projects it to the fourth projection position. Thus, in one frame F, a high-resolution image based on the display pixels A1, B1, C1, and D1 can be displayed using the panel pixel Pa1. In the present embodiment, the display pixel A1, the display pixel B1, the display pixel C1, and the display pixel D1 respectively correspond to the first display pixel, the second display pixel, the third display pixel, and the fourth display pixel. Also, the sub-frame f1, the sub-frame f2, the sub-frame f3, and the sub-frame f4 respectively correspond to the "first unit period", the "second unit period", the "third unit period", and the "fourth unit period".

[0032] For the sake of convenience in explaining the projection positions by the optical path shift element 100, the first projection position in the first sub-frame f1 of the frame F is defined as the "projection position (A)". Further, the state of the optical path shift element 100 when the light emitted from the dichroic prism 61 reaches the projection position (A) is referred to as the "state A". In sub-frame f1, one panel pixel represents the display pixel located in the upper left with hatching among the 2×2 display pixels. Specifically, in sub-frame f1, panel pixels Pa1~Pa3, Pb1~Pb3, Pc1~Pc3 represent display pixels A1, A2, A3, A4, A5, A6, A7, A8, and A9 in sequence. Here, for example, that panel pixel Pa1 represents display pixel A1 means that the panel pixel Pa1 of liquid crystal panel 10G has a transmittance corresponding to the gradation level of the G component among the display pixels A1 indicated by the high-resolution image signal VIDH.

[0033] In the next sub-frame f2, the optical path shift element 100 is set to the "projection position (B)", which is the second projection position shifted by 0.5 pixel in the panel pixel in the right (Right) direction in the figure from the projection position (A) of sub-frame f1 shown by the dashed line. Further, the state of the optical path shift element 100 when the light emitted from the dichroic prism 61 reaches the projection position (B) is referred to as the "state B". Also, in sub-frame f2, one panel pixel represents the display pixel located in the upper right with hatching among the 2×2 display pixels. Specifically, in sub-frame f2, panel pixels Pa1~Pa3, Pb1~Pb3, Pc1~Pc3 represent display pixels B1, B2, B3, B4, B5, B6, B7, B8, and B9 in sequence.

[0034] In sub-frame f3, the optical path shift element 100 is set to the "projection position (C)", which is the third projection position shifted by 0.5 pixel when viewed in the panel pixel in the down (Down) direction in the figure from the projection position (B) in sub-frame f2 shown by the dashed line. Further, the state of the optical path shift element 100 when the light emitted from the dichroic prism 61 reaches the projection position (C) is referred to as the "state C". Also, in sub-frame f3, one panel pixel represents the display pixel located at the lower right with hatching among the 2×2 display pixels. Specifically, in sub-frame f3, panel pixels Pa1~Pa3, Pb1~Pb3, and Pc1~Pc3 represent display pixels C1, C2, C3, C4, C5, C6, C7, C8, and C9 in sequence.

[0035] Then, in sub-frame f4, the optical path shift element 100 is set to the "projection position (D)", which is the fourth projection position shifted by 0.5 pixel in the left (Left) direction as viewed from the panel pixels from the projection position (C) in sub-frame f3 shown by the dashed line. Also, the state of the optical path shift element 100 when the light emitted from the dichroic prism 61 reaches the projection position (D) is referred to as the "state D". Also, in sub-frame f4, one panel pixel represents the display pixel located at the lower left with hatching among the 2×2 display pixels. Specifically, in sub-frame f4, panel pixels Pa1~Pa3, Pb1~Pb3, and Pc1~Pc3 represent display pixels D1, D2, D3, D4, D5, D6, D7, D8, and D9 in sequence.

[0036] After sub-frame f4, the optical path shift element 100 is shifted by 0.5 pixel in the up (Up) direction as viewed from the panel pixels from the projection position (D) of sub-frame f4 shown by the dashed line and returned to the projection position (A).

[0037] Hereinafter, the configuration of the control system of the projector 1 will be described. FIG. 6 is a block diagram showing a configuration example of the control system of the projector 1. As shown in the figure, the projector 1 includes liquid crystal panels 10R, 10G, and 10B, an image processing circuit 11, an optical path shift element drive circuit 12, a timing control circuit 13, and an optical path shift element 100.

[0038] The image processing circuit 11 includes an image determination circuit 11A that determines the type of an image based on a high-resolution image signal VIDH as an input image signal. The image processing circuit 11 also includes a conversion circuit 11B that converts the high-resolution image signal VIDH into a low-resolution image signal VIDL. Further, the image processing circuit 11 includes an overdrive processing circuit 11C that generates output image signals Dr, Dg, and Db for driving the liquid crystal panels 10R, 10G, and 10B by performing overdrive processing on the low-resolution image signal VIDL.

[0039] The optical path shift element drive circuit 12 drives the optical path shift element 100 based on a control signal CTL1 supplied from the timing control circuit 13. The optical path shift element drive circuit 12 is an example of a "control circuit". Note that the "control circuit" may include the timing control circuit 13 described later.

[0040] The timing control circuit 13 generates a clock signal or the like for supplying a data signal to each pixel electrode of the liquid crystal panels 10R, 10G, and 10B, and supplies the generated clock signal or the like to a data line drive circuit (not shown) of the liquid crystal panels 10R, 10G, and 10B. Further, the timing control circuit 13 generates a control signal CTL1 for controlling the optical path shift element drive circuit 12 and a control signal CTL2 for controlling the overdrive processing circuit 11C based on the input high-resolution image signal VIDH and the determination signal DET input from the image determination circuit 11A. Note that the determination signal DET is a signal indicating the determination result of the type of the image indicated by the high-resolution image signal VIDH, and details thereof will be described later. Thereby, it becomes possible to control the overdrive processing in synchronization with the states A to D of the optical path shift element 100 described with reference to FIG. 5. In this example, the timing control circuit 13 executes various controls based on the high-resolution image signal VIDH and the determination signal DET, but may execute various controls based on the low-resolution image signal VIDL output from the conversion circuit 11B and the determination signal DET. Further, in FIG. 3, the timing control circuit 13 time-divisionally divides a one-frame period corresponding to one frame composed of states A to D into unit periods f1 to f4 corresponding to the respective states. As described above, in the unit period f1, the state of the optical path shift element 100 is the state A. Further, in the unit period f2, the state of the optical path shift element 100 is the state B. Further, in the unit period f3, the state of the optical path shift element 100 is the state C. Further, in the unit period f4, the state of the optical path shift element 100 is the state D.

[0041] The control signal CTL1 is, more specifically, a signal for controlling the projection position of an image by the light emitted from the optical path shift element 100. Hereinafter, the projection position of the image by the light emitted from the optical path shift element 100 is also referred to as the "projection position by the optical path shift element 100". The control signal CTL1 includes a control signal CTL1_X for shifting the projection position vertically and a control signal CTL1_Y for shifting the projection position horizontally on the projection surface 80 of the projector 1. Specifically, among the projection positions by the optical path shift element 100, the upward or downward direction is specified by the voltage of the control signal CTL1_Y, and the leftward or rightward direction is specified by the voltage of the control signal CTL1_X.

[0042] More specifically, as will be described later, referring to FIG. 5, when the voltage of the control signal CTL1_X is at the minimum value, the optical path shift element 100 sets the projection position to (A) or (D), and when the voltage is at the maximum value, the optical path shift element 100 sets the projection position to (B) or (C). When the voltage of the control signal CTL1_X ranges from the minimum value to the maximum value, the optical path shift element 100 sets the projection position to a position between the projection position (A) or (D) and the projection position (B) or (C) according to the voltage.

[0043] Also, when the voltage of the control signal CTL1_Y is at the minimum value, the optical path shift element 100 sets the projection position to (A) or (B), and when the voltage is at the maximum value, the optical path shift element 100 sets the projection position to (C) or (D). When the voltage of the control signal CTL1_Y ranges from the minimum value to the maximum value, the optical path shift element 100 sets the projection position to a position between the projection position (A) or (B) and the projection position (C) or (D) according to the voltage.

[0044] FIG. 7 is a diagram showing the relationship over time between the projection position by the optical path shift element 100 corresponding to FIG. 5 and the control signals CTL1_X and CTL1_Y, and shows the relationship over time as a proportional relationship. In FIG. 7, for example, the maximum value of CTL1_X and CTL1_Y is shown as 100V and the minimum value is shown as 0V. However, the aspect of this embodiment is not limited to this.

[0045] Specifically, the voltage of the control signal CTL1_X maintains the minimum value during the period from timing t0 to timing t1. Also, the voltage of the control signal CTL1_X rises from the minimum value to the maximum value during the period from timing t1 to timing t2. Further, the voltage of the control signal CTL1_X maintains the maximum value during the period from timing t2 to timing t5. Moreover, the voltage of the control signal CTL1_X drops from the maximum value to the minimum value during the period from timing t5 to timing t6. Additionally, the voltage of the control signal CTL1_X maintains the minimum value during the period from timing t6 to timing t9. Also, the voltage of the control signal CTL1_X rises from the minimum value to the maximum value during the period from timing t9 to timing t10.

[0046] Also, the voltage of the control signal CTL1_Y maintains the minimum value during the period from timing t0 to timing t3. Also, the voltage of the control signal CTL1_Y rises from the minimum value to the maximum value during the period from timing t3 to timing t4. Further, the voltage of the control signal CTL1_Y maintains the maximum value during the period from timing t4 to timing t7. Moreover, the voltage of the control signal CTL1_Y drops from the maximum value to the minimum value during the period from timing t7 to timing t8. Additionally, the voltage of the control signal CTL1_Y maintains the minimum value during the period from timing t8 to timing t10.

[0047] Therefore, in the period from timing t0 to timing t1, the state of the optical path shift element 100 is maintained in state A. Also, at timing t1, the state of the optical path shift element 100 starts to transition from state A to state B. Further, at timing t2, the state of the optical path shift element 100 finishes transitioning to state B. Also, in the period from timing t2 to timing t3, the state of the optical path shift element 100 is maintained in state B. Also, at timing t3, the state of the optical path shift element 100 starts to transition from state B to state C. Also, at timing t4, the state of the optical path shift element 100 finishes transitioning to state C. Also, in the period from timing t4 to timing t5, the state of the optical path shift element 100 is maintained in state C. Also, at timing t5, the state of the optical path shift element 100 starts to transition from state C to state D. Also, at timing t6, the state of the optical path shift element 100 finishes transitioning to state D. Also, in the period from timing t6 to timing t7, the state of the optical path shift element 100 is maintained in state D. Also, at timing t7, the state of the optical path shift element 100 starts to transition from state D to state A. At timing t8, the state of the optical path shift element 100 finishes transitioning to state A. Also, in the period from timing t8 to timing t9, the state of the optical path shift element 100 is maintained in state A. Also, at timing t9, the state of the optical path shift element 100 starts to transition from state A to state B. At timing t10, the state of the optical path shift element 100 finishes transitioning to state B.

[0048] Next, the detailed configuration of the image processing circuit 11 will be described. FIG. 8 is a block diagram showing a configuration example of the image processing circuit 11.

[0049] The image determination circuit 11A determines the type of the image indicated by the high-resolution image signal VIDH based on the high-resolution image signal VIDH. Examples of the type of the image include an image with distinct boundaries between pixels and an image with indistinct boundaries between pixels. An image with distinct boundaries between pixels is an image that should be expressed in a state where the pixels are separated. Also, an image with indistinct boundaries between pixels is an image in which the gradation values change smoothly between pixels. In the present embodiment, it is assumed that the image with distinct boundaries between pixels is a character drawing, and it is assumed that the image with indistinct boundaries between pixels is a natural image. However, the image with distinct boundaries between pixels is not limited to a character drawing. Similarly, the image with indistinct boundaries between pixels is not limited to a natural image. Also, the image determination circuit 11A generates a determination signal DET indicating the determination result and outputs the generated determination signal DET to the timing control circuit 13.

[0050] The method for determining the type of the image is not particularly limited. For example, the image determination circuit 11A may determine whether the high-frequency components included in one image indicated by the high-resolution image signal VIDH exceed a threshold value and generate a determination signal DET indicating the determination result. Specifically, when the high-frequency components included in one image exceed the threshold value, the determination signal DET indicates that the image has indistinct boundaries between pixels. On the other hand, when the high-frequency components included in one image do not exceed the threshold value, the determination signal DET indicates that the image has distinct boundaries between pixels.

[0051] Alternatively, as another method, for each of the R, G, and B images that constitute one image indicated by the high-resolution image signal VIDH, the image determination circuit 11A calculates a horizontal difference value, which is the absolute value of the luminance difference between horizontally adjacent pixels. Next, for each of the R, G, and B images, the image determination circuit 11A calculates a vertical difference value, which is the absolute value of the luminance difference between vertically adjacent pixels. Next, the image determination circuit 11A calculates a total difference value by adding the sum of the horizontal difference values and the sum of the vertical difference values. Finally, the image determination circuit 11A may compare the sum of the total difference values of each of the R, G, and B images with a threshold value to generate a determination signal DET. Specifically, when the sum of the total difference values of each of the R, G, and B images exceeds the threshold value, the determination signal DET indicates that the image has distinct boundaries between pixels. On the other hand, when the sum of the total difference values of each of the R, G, and B images does not exceed the threshold value, the determination signal DET indicates that the image does not have distinct boundaries between pixels.

[0052] Alternatively, as yet another method, when information indicating the type of one image indicated by the high-resolution image signal VIDH is added to the high-resolution image signal VIDH, the image determination circuit 11A may generate a determination signal DET based on the added information.

[0053] As described above, the determination signal DET is output to the timing control circuit 13. The timing control circuit 13 generates a control signal CTL1 for controlling the optical path shift element drive circuit 12 based on the high-resolution image signal VIDH and the determination signal DET obtained from the image determination circuit 11A.

[0054] Before explaining the conversion circuit 11B and the like, with reference to FIGS. 9A and 9B, the relationship between the determination result by the image determination circuit 11A and the projection position by the optical path shift element 100 will be explained.

[0055] FIG. 9A and FIG. 9B are diagrams showing, for each determination result by the image determination circuit 11A, an example of the temporal relationship between the projection position by the optical path shift element 100 and the control signals CTL1_X and CTL1_Y in the present embodiment. In FIGS. 9A and 9B, as an example, the maximum value of CTL1_X and CTL1_Y is shown as 100V and the minimum value is shown as 0V. However, the aspect of the present embodiment is not limited to this. Further, FIG. 9A illustrates the case where the image determination circuit 11A determines that the image indicated by the high-resolution image signal VIDH is an image to be expressed in a state where pixels are separated. On the other hand, FIG. 9B illustrates the case where the image determination circuit 11A determines that the gradation value of the image indicated by the high-resolution image signal VIDH is an image that changes smoothly between pixels. However, the embodiment of the present invention is not limited to this. Further, FIG. 9A illustrates the case where it is a character drawing as an example of the former, and FIG. 9B illustrates the case where it is a natural image as an example of the latter, but the embodiment of the present invention is not limited to this. In the description of the embodiments after the second embodiment as well, the case where it is a character drawing is described as an example of the former, and the case where it is a natural image is described as an example of the latter.

[0056] When the determination result by the image determination circuit 11A is a character drawing, the voltage of the control signal CTL1_X maintains the minimum value during the period from timing t20 to timing t21. Further, the voltage of the control signal CTL1_X rises from the minimum value to the maximum value during the period from timing t21 to timing t22. Further, the voltage of the control signal CTL1_X maintains the maximum value during the period from timing t22 to timing t25. Further, the voltage of the control signal CTL1_X drops from the maximum value to the minimum value during the period from timing t25 to timing t26. Further, the voltage of the control signal CTL1_X maintains the minimum value during the period from timing t26 to timing t29. Further, the voltage of the control signal CTL1_X rises from the minimum value to the maximum value during the period from timing t29 to timing t30.

[0057] Also, the voltage of the control signal CTL1_Y maintains the minimum value during the period from timing t20 to timing t23. Also, the voltage of the control signal CTL1_Y rises from the minimum value to the maximum value during the period from timing t23 to timing t24. Also, the voltage of the control signal CTL1_Y maintains the maximum value during the period from timing t24 to timing t27. Also, the voltage of the control signal CTL1_Y decreases from the maximum value to the minimum value during the period from timing t27 to timing t28. Also, the voltage of the control signal CTL1_Y maintains the minimum value during the period from timing t28 to timing t30.

[0058] Therefore, in the period from timing t20 to timing t21, the state of the optical path shift element 100 is maintained in state A. Also, at timing t21, the state of the optical path shift element 100 starts to transition from state A to state B. At timing t22, the state of the optical path shift element 100 finishes transitioning to state B. In the period from timing t22 to timing t23, the state of the optical path shift element 100 is maintained in state B. At timing t23, the state of the optical path shift element 100 starts to transition from state B to state C. At timing t24, the state of the optical path shift element 100 finishes transitioning to state C. In the period from timing t24 to timing t25, the state of the optical path shift element 100 is maintained in state C. At timing t25, the state of the optical path shift element 100 starts to transition from state C to state D. At timing t26, the state of the optical path shift element 100 finishes transitioning to state D. In the period from timing t26 to timing t27, the state of the optical path shift element 100 is maintained in state D. At timing t27, the state of the optical path shift element 100 starts to transition from state D to state A. At timing t28, the state of the optical path shift element 100 finishes transitioning to state A. In the period from timing t28 to timing t29, the state of the optical path shift element 100 is maintained in state A. At timing t29, the state of the optical path shift element 100 starts to transition from state A to state B. At timing t30, the state of the optical path shift element 100 finishes transitioning to state B.

[0059] On the one hand, when the determination result by the image determination circuit 11A is a natural image, the voltage of the control signal CTL1_X maintains the minimum value during the period from timing t40 to timing t41. Also, the voltage of the control signal CTL1_X rises from the minimum value to the maximum value during the period from timing t41 to timing t42. Further, the voltage of the control signal CTL1_X maintains the maximum value during the period from timing t42 to timing t45. Moreover, the voltage of the control signal CTL1_X drops from the maximum value to the minimum value during the period from timing t45 to timing t46. Additionally, the voltage of the control signal CTL1_X maintains the minimum value during the period from timing t46 to timing t49. Also, the voltage of the control signal CTL1_X rises from the minimum value to the maximum value during the period from timing t49 to timing t50.

[0060] Also, the voltage of the control signal CTL1_Y maintains the minimum value during the period from timing t40 to timing t43. Also, the voltage of the control signal CTL1_Y rises from the minimum value to the maximum value during the period from timing t43 to timing t44. Further, the voltage of the control signal CTL1_Y maintains the maximum value during the period from timing t44 to timing t47. Moreover, the voltage of the control signal CTL1_Y drops from the maximum value to the minimum value during the period from timing t47 to timing t48. Additionally, the voltage of the control signal CTL1_Y maintains the minimum value during the period from timing t48 to timing t50.

[0061] Therefore, in the period from timing t40 to timing t41, the state of the optical path shift element 100 is maintained at state A. Also, at timing t41, the state of the optical path shift element 100 begins to transition from state A to state B. At timing t42, the state of the optical path shift element 100 finishes transitioning to state B. Also, in the period from timing t42 to timing t43, the state of the optical path shift element 100 is maintained at state B. At timing t43, the state of the optical path shift element 100 begins to transition from state B to state C. At timing t44, the state of the optical path shift element 100 finishes transitioning to state C. Also, in the period from timing t44 to timing t45, the state of the optical path shift element 100 is maintained at state C. At timing t45, the state of the optical path shift element 100 begins to transition from state C to state D. At timing t46, the state of the optical path shift element 100 finishes transitioning to state D. Also, in the period from timing t46 to timing t47, the state of the optical path shift element 100 is maintained at state D. At timing t47, the state of the optical path shift element 100 begins to transition from state D to state A. At timing t48, the state of the optical path shift element 100 finishes transitioning to state A. Also, in the period from timing t48 to timing t49, the state of the optical path shift element 100 is maintained at state A. At timing t49, the state of the optical path shift element 100 begins to transition from state A to state B. At timing t50, the state of the optical path shift element 100 finishes transitioning to state B.

[0062] As described above, the state of the optical path shift element 100 transitions from state A, via state B and state C, to state D in the same proportion as described in FIG. 7 above.

[0063] The period during which the pixels shift, that is, the period in the transition state, is the period from timing t21 to timing t22, the period from timing t23 to timing t24, the period from timing t25 to timing t26, and the period from timing t29 to timing t30 when the determination result by the image determination circuit 11A is a character drawing. The lengths of these periods are all equal and are assumed to take a value of a. On the other hand, when the determination result by the image determination circuit 11A is a natural image, the period during which the pixels shift, that is, the period in the transition state, is the period from timing t41 to timing t42, the period from timing t43 to timing t44, the period from timing t45 to timing t46, and the period from timing t49 to timing t50. The lengths of these periods are all equal and are assumed to take a value of b. Here, when a and b are compared, the relationship a < b holds. That is, when the type of the projected image is a natural image, the optical path shift element 100 is controlled so that the state of the optical path shift element 100 changes gently compared to the case where the projected image is a character drawing. For this reason, when the type of the projected image is a natural image, the projection position by the optical path shift element 100 changes slowly compared to the case where the projected image is a character drawing. As the projection position by the optical path shift element 100 changes slowly, the expression near the boundary included in the projected image changes gently. Conversely, when the type of the projected image is a character drawing, the optical path shift element 100 is controlled so that the state of the optical path shift element 100 changes quickly compared to the case where the projected image is a natural image. For this reason, when the type of the projected image is a character image, the projection position by the optical path shift element 100 changes quickly compared to the case where the projected image is a natural image. As the projection position by the optical path shift element 100 changes quickly, the expression near the boundary included in the projected image changes rapidly. Thereby, in the present embodiment, it is possible to switch the degree of separation between pixels based on the type of the image displayed by the projector 1.

[0064] In FIGS. 9A and 9B, when changing the state of the optical path shift element 100, the optical path shift element drive circuit 12 shows an example of controlling the change speed. However, the optical path shift element drive circuit 12 may control the change amount or may change both of them.

[0065] Here, return the explanation to FIG. 8. The conversion circuit 11B converts the high-resolution image signal VIDH into a low-resolution image signal VIDL. As an example, the high-resolution image signal VIDH is an image signal indicating an image of 1600 pixels horizontally * 1200 pixels vertically. Also, as an example, the low-resolution image signal VIDL is an image signal indicating an image of 800 pixels horizontally * 600 pixels vertically. The conversion circuit 11B has a frame memory 111 that can store one screen of the high-resolution image signal VIDH, and uses the frame memory 111 to generate the low-resolution image signal VIDL. The high-resolution image signal VIDH and the low-resolution image signal VIDL each consist of R, G, and B signals.

[0066] In the following description, the low-resolution image signals VIDL corresponding to the states A, B, C, and D may be referred to as image signals Va, Vb, Vc, and Vd, respectively.

[0067] The overdrive processing circuit 11C shown in FIG. 8 consists of a processing unit Ur that processes the R low-resolution image signal VIDL, a processing unit Ug that processes the G low-resolution image signal VIDL, and a processing unit Ub that processes the B low-resolution image signal VIDL. In the following, the processing unit Ur will be described, but the processing units Ug and Ub are configured in the same way as the processing unit Ur.

[0068] The processing unit Ur includes a low-resolution frame memory 112, a look-up table LUT, and a selection circuit 113. The storage capacity of the low-resolution frame memory 112 is smaller than the storage capacity of the storage area that stores the high-resolution image signal VIDH of R among the above-described frame memories 111. For example, the storage capacity of the low-resolution frame memory 112 is 1 / 4 of the storage capacity of the frame memory 111. Note that the low-resolution frame memory 112 only needs to have a storage capacity for storing at least one screen of the low-resolution image signal VIDL.

[0069] The current low-resolution image signal VIDL and the low-resolution image signal VIDL read from the low-resolution frame memory 112 one unit period ago are supplied to the look-up table LUT. In the following description, the current low-resolution image signal VIDL is referred to as the first image signal Vx, and the past low-resolution image signal VIDL is referred to as the second image signal Vy.

[0070] The first image signal Vx, the second image signal Vy, and the image signal Dod for overdrive are associated with and stored in the look-up table LUT. For example, the image signal Dod is given by the following equation [1]. Dod = f1(Vx, Vy) [1] The function f1 is determined so that a desired gradation can be obtained in the liquid crystal panel 10 in consideration of the response characteristics of the liquid crystal. Thereby, the response characteristics of the liquid crystal panel 10 are compensated and improved. Note that, for example, when the response delay time of the liquid crystal panel is 10 ms, it is not necessary for the response delay time to be 0 ms. As long as it is less than 10 ms, it means that the response characteristics of the liquid crystal panel are compensated.

[0071] In the overdrive process, assume that the gradation indicated by the first image signal Vx is "100" and the gradation indicated by the second image signal Vy is "10". Then, the gradation indicated by the image signal Dod will be greater than "100". This is because even when a voltage corresponding to the gradation is applied to the liquid crystal, it takes time for the liquid crystal to respond. Therefore, the delay time of the liquid crystal is anticipated in advance and compensated for. For this reason, a gradation greater than the original gradation "100" is set for the image signal Dod. On the other hand, assume that the gradation indicated by the first image signal Vx is "100" and the gradation indicated by the second image signal Vy is "100". Then, the gradation indicated by the image signal Dod will be "100". This is because the current gradation and the past gradation are equal, so there is no need for compensation.

[0072] In states B to D of the optical path shift element 100, the image signals Vb, Vc, and Vd are supplied to the look-up table LUT as the first image signal Vx, and the image signals Va, Vb, and Vc are supplied to the look-up table LUT as the second image signal Vy. Here, if the low-resolution image signal VIDL in state D of the optical path shift element 100 in the frame immediately preceding the current frame is represented by the image signal Vd', then in state A of the current frame, the second image signal Vy becomes the image signal Vd'.

[0073] Based on the low-resolution image signal VIDL(Vx) of the target pixel to be subjected to the overdrive process and the low-resolution image signal VIDL(Vy) of the target pixel in the state of the optical path shift element 100 immediately preceding, the overdrive process is executed. As described above, since the low-resolution frame memory 112 holds the low-resolution image signal VIDL for at least one screen, for the target pixel to be subjected to the overdrive process, the low-resolution image signal VIDL of the target pixel in the state of the optical path shift element 100 immediately preceding is specified.

[0074] Next, the selection circuit 113 shown in FIG. 8 selects the image signal Dod when the overdrive process is effective, and selects the first image signal Vx when the overdrive process is ineffective, and generates the output image signal Dr. The effectiveness and method of the overdrive process are specified by the control signal CTL2.

[0075] As described above, the control signal CTL2 is generated by the timing control circuit 13 based on the high-resolution image signal VIDH and the determination signal DET input from the image determination circuit 11A. Specifically, when the determination result indicated by the determination signal DET is an image with clear boundaries between pixels, the timing control circuit 13 compares it with the case of an image with unclear boundaries between pixels, and generates a control signal CTL2 for an overdrive process in which the response speed from the liquid crystal after applying a voltage to the liquid crystal is faster. Since the response speed from the liquid crystal after applying a voltage to the liquid crystal becomes faster, the projection position by the optical path shift element 100 changes more quickly. Since the projection position by the optical path shift element 100 changes more quickly, the expression near the boundary included in the projected image changes more abruptly.

[0076] Note that when the image has unclear boundaries between pixels, the control signal CTL2 may be a control signal for executing the overdrive process or a control signal for not executing the overdrive process. Specifically, when the image has unclear boundaries between pixels, the control signal CTL2 may be a control signal for executing an overdrive process such that the output image signal Dr is equal to Dod, and when the image has clear boundaries between pixels, the output image signal Dr is larger than Dod. Alternatively, when the image has unclear boundaries between pixels, the control signal CTL2 may be a control signal for executing an overdrive process such that the output image signal Dr is smaller than Dod, and when the image has clear boundaries between pixels, the output image signal Dr is equal to Dod.

[0077] In the pixel shift technology of a conventional projector, the state of the optical path shift element 100 could not be switched based on whether it was desirable to display an image with separated pixels in a video representation. On the other hand, the projector 1 according to the present embodiment includes an optical path shift element drive circuit 12 that controls the state of the optical path shift element 100 in a transition period from a first unit period f1 to a second unit period f2 among a plurality of unit periods included in one frame period, based on the type of the image indicated by the input image signal. As a result, when the projector 1 according to the present embodiment displays an image to be represented in a state where pixels are separated, it can display an image with a clear boundary on the projection surface 80. Also, when the projector 1 according to the present embodiment displays an image with unclear boundaries between pixels, it can display the image on the projection surface 80 such that the gradation values change smoothly between pixels. Furthermore, the projector 1 according to the present embodiment can appropriately execute image shift in either case of displaying an image on the projection surface 80.

[0078] Also, the above timing control circuit 13 controls the change speed of the state of the optical path shift element 100 in the above transition period based on the type of the image. The projector 1 according to the present embodiment controls the change speed of the state of the optical path shift element 100 in the transition period from the first unit period f1 to the second unit period f2 based on the type of the image, so that when displaying an image to be represented in a state where pixels are separated, it can display an image with a clear boundary on the projection surface 80. Also, when the projector 1 according to the present embodiment displays an image with unclear boundaries between pixels, it can display the image on the projection surface 80 such that the gradation values change smoothly between pixels.

[0079] In addition, the above-mentioned overdrive processing circuit 11C adjusts the compensation amount determined by the overdrive processing based on the type of image. As a result, the projector 1 according to the present embodiment can change the overdrive processing so as to change the speed of liquid crystal response based on the type of image to be displayed. Subsequently, the projector 1 according to the present embodiment can separate pixels when displaying an image with a clear boundary, and can display more smoothly when displaying an image with an unclear boundary.

[0080] In addition, the above-mentioned image determination circuit 11A uses the difference value of luminance between adjacent pixels to identify the type of image, and outputs type information indicating the identification result to the timing control circuit 13. As a result, the projector 1 according to the present embodiment can identify the type of image based on the difference value of luminance between pixels, and can change the state of the optical path shift element 100 based on the identified type of image.

[0081] 〔Second Embodiment〕 Next, with reference to FIGS. 10 and 11, a driving method of the projector 1 according to the second embodiment of the present invention will be described. Hereinafter, mainly the differences between the driving method of the projector 1 according to the second embodiment and the driving method of the projector 1 according to the first embodiment will be described.

[0082] FIG. 10 is a diagram showing the state of the optical path shift element 100, specifically, the projection position by the optical path shift element 100. More specifically, "A", "B", "C", and "D" on the left side in FIG. 10 correspond to "A1", "B1", "C1", and "D1" shown in FIG. 5 as an example. Also, "A", "B", "C", and "D" on the right side in FIG. 10 correspond to "A2", "B2", "C2", and "D2" shown in FIG. 5 as an example. FIG. 11 is a diagram showing the temporal relationship between the projection position by the optical path shift element 100 and the control signals CTL1_X and CTL1_Y, and shows the temporal relationship during natural image display. In FIG. 11, for example, the maximum value of CTL1_X and CTL1_Y is shown as 100V, and the minimum value is shown as 0V. However, the aspect of this embodiment is not limited to this. Also, since the temporal relationship between the projection position by the optical path shift element 100 and the control signals CTL1_X and CTL1_Y during character drawing display is the same as that in the first embodiment, the description thereof is omitted. Similarly, for the third to seventh embodiments hereinafter, the temporal relationship between the projection position by the optical path shift element 100 and the control signals CTL1_X and CTL1_Y during character drawing display is omitted from the description.

[0083] As shown in FIG. 10, during natural image display by the projector 1, a transition state a is set between state A and state B. More specifically, a transition period T1 corresponding to the transition state a is set between the unit period f1 corresponding to state A and the unit period f2 corresponding to state B. Similarly, a transition state b is set between state B and state C. More specifically, a transition period T2 corresponding to the transition state b is set between the unit period f2 corresponding to state B and the unit period f3 corresponding to state C. Similarly, a transition state c is set between state C and state D. More specifically, a transition period T3 corresponding to the transition state c is set between the unit period f3 corresponding to state C and the unit period f4 corresponding to state D. Similarly, a transition state d is set between state C and state D. More specifically, a transition period T4 corresponding to the transition state d is set between the unit period f4 corresponding to state D and the unit period f1 corresponding to state A.

[0084] Also, the projection position (a) while the optical path shift element 100 is in the transition state a is the midpoint between the projection position (A) and the projection position (B). Similarly, the projection position (b) while the optical path shift element 100 is in the transition state b is the midpoint between the projection position (B) and the projection position (C). Similarly, the projection position while the optical path shift element 100 is in the transition state c is the midpoint between the projection position (C) and the projection position (D). Similarly, the projection position while the optical path shift element 100 is in the transition state d is the midpoint between the projection position (D) and the projection position (A).

[0085] Also, for example, while the optical path shift element 100 is in the transition state a, an intermediate image between the image displayed while in the state A and the image displayed while in the state B may be displayed. Specifically, when the output image signal Dr is different between when the optical path shift element 100 is in the state A and when it is in the state B, the output image signal Dr while the optical path shift element 100 is in the transition state a may be a signal intermediate between the output image signal Dr while in the state A and the output image signal Dr while in the state B. The output image signals Dg and Db while the optical path shift element 100 is in the transition state a are also determined by the same method as the output image signal Dr.

[0086] Alternatively, as an example, the over - drive image signal Dod while the optical path shift element 100 is in the transition state a may be a signal with a higher output value than the signal intermediate between the output image signal Dr while in the state A and the output image signal Dr while in the state B. Alternatively, as an example, the over - drive image signal Dod while the optical path shift element 100 is in the transition state a may be calculated by the above formula [1] with the low - resolution image signal VIDL when in the state B as the first image signal Vx and the low - resolution image signal VIDL when in the state A as the second image signal Vy.

[0087] The operation while the state of the optical path shift element 100 is in the transition state a has been described above. However, the operation of the projector 1 is the same even while the state of the optical path shift element 100 is in the transition states b to d. That is, if the images to be displayed are different between when the state of the optical path shift element 100 is in state B and when it is in state C, an intermediate image between the image to be displayed when the state of the optical path shift element 100 is in the transition state b, the image to be displayed when in state B, and the image to be displayed when in state C may be displayed. Similarly, if the images to be displayed are different between when the state of the optical path shift element 100 is in state C and when it is in state D, an intermediate image between the image to be displayed when the state of the optical path shift element 100 is in the transition state c, the image to be displayed when in state C, and the image to be displayed when in state D may be displayed. Similarly, if the images to be displayed are different between when the state of the optical path shift element 100 is in state D and when it is in state A, an intermediate image between the image to be displayed when the state of the optical path shift element 100 is in the transition state d, the image to be displayed when in state D, and the image to be displayed when in state A may be displayed.

[0088] As shown in FIG. 11, when the determination result by the image determination circuit 11A is a natural image, the voltage of the control signal CTL1_X rises from the minimum value to the intermediate value in the period from timing t60 to timing t61. Also, the voltage of the control signal CTL1_X maintains the intermediate value in the period from timing t61 to timing t62. Also, the voltage of the control signal CTL1_X rises from the intermediate value to the maximum value in the period from timing t62 to timing t63. Also, the voltage of the control signal CTL1_X maintains the maximum value in the period from timing t63 to timing t68. Also, the voltage of the control signal CTL1_X drops from the maximum value to the intermediate value in the period from timing t68 to timing t69. Also, the voltage of the control signal CTL1_X maintains the intermediate value in the period from timing t69 to timing t70. Also, the voltage of the control signal CTL1_X drops from the intermediate value to the minimum value in the period from timing t70 to timing t71. Also, the voltage of the control signal CTL1_X maintains the minimum value in the period from timing t71 to timing t76. Also, the voltage of the control signal CTL1_X rises from the minimum value to the intermediate value in the period from timing t76 to timing t77.

[0089] Also, the voltage of the control signal CTL1_Y maintains the minimum value during the period from timing t60 to timing t64. Also, the voltage of the control signal CTL1_Y rises from the minimum value to the intermediate value during the period from timing t64 to timing t65. Also, the voltage of the control signal CTL1_Y maintains the intermediate value during the period from timing t65 to timing t66. Also, the voltage of the control signal CTL1_Y rises from the intermediate value to the maximum value during the period from timing t66 to timing t67. Also, the voltage of the control signal CTL1_Y maintains the maximum value during the period from timing t67 to timing t72. Also, the voltage of the control signal CTL1_Y drops from the maximum value to the intermediate value during the period from timing t72 to timing t73. Also, the voltage of the control signal CTL1_Y maintains the intermediate value during the period from timing t73 to timing t74. Also, the voltage of the control signal CTL1_Y drops from the intermediate value to the minimum value during the period from timing t74 to timing t75. Also, the voltage of the control signal CTL1_Y maintains the minimum value during the period from timing t75 to timing t77.

[0090] Therefore, at timing t60, the state of the optical path shift element 100 starts to transition from state A to transition state a. Also, at timing t61, the state of the optical path shift element 100 finishes transitioning to transition state a. Further, during the period from timing t61 to timing t62, the state of the optical path shift element 100 is maintained at transition state a. Also, at timing t62, the state of the optical path shift element 100 starts to transition from transition state a to state B. Also, at timing t63, the state of the optical path shift element 100 finishes transitioning to state B. Further, during the period from timing t63 to timing t64, the state of the optical path shift element 100 is maintained at state B. Also, at timing t64, the state of the optical path shift element 100 starts to transition from state B to transition state b. Also, at timing t65, the state of the optical path shift element 100 finishes transitioning to transition state b. Further, during the period from timing t65 to timing t66, the state of the optical path shift element 100 is maintained at transition state b. Also, at timing t66, the state of the optical path shift element 100 starts to transition from transition state b to state C. Also, at timing t67, the state of the optical path shift element 100 finishes transitioning to state C. Further, during the period from timing t67 to timing t68, the state of the optical path shift element 100 is maintained at state C. Also, at timing t68, the state of the optical path shift element 100 starts to transition from state C to transition state c. Also, at timing t69, the state of the optical path shift element 100 finishes transitioning to transition state c. Further, during the period from timing t69 to timing t70, the state of the optical path shift element 100 is maintained at transition state c. Also, at timing t70, the state of the optical path shift element 100 starts to transition from transition state c to state D. Also, at timing t71, the state of the optical path shift element 100 finishes transitioning to state D. Further, during the period from timing t71 to timing t72, the state of the optical path shift element 100 is maintained at state D. Also, at timing t72, the state of the optical path shift element 100 starts to transition from state D to transition state d. Also, at timing t73, the state of the optical path shift element 100 finishes transitioning to transition state d.Also, in the period from timing t73 to timing t74, the state of the optical path shift element 100 is maintained in the transition state d. Also, at timing t74, the state of the optical path shift element 100 starts to transition from the transition state d to state A. Also, at timing t75, the state of the optical path shift element 100 finishes transitioning to state A. Also, in the period from timing t75 to timing t76, the state of the optical path shift element 100 is maintained in state A. Also, at timing t76, the state of the optical path shift element 100 starts to transition from state A to the transition state a. Also, at timing t77, the state of the optical path shift element 100 finishes transitioning to the transition state a.

[0091] As described above, the state of the optical path shift element 100 transitions from state A, via the transition state a, state B, transition state b, state C, transition state c, state D, and transition state d, to state A.

[0092] In the present embodiment, the above-described timing control circuit 13 controls the amount of change in the state of the optical path shift element 100 during the above-described transition period based on the type of image. More specifically, when displaying an image to be represented in a state where pixels are separated, the timing control circuit 13 changes the position where light is projected by the optical path shift element 100, for example, from the projection position (A) to the projection position (B). On the other hand, when displaying an image in which the boundaries between pixels are not clear, the timing control circuit 13 changes the position where light is projected by the optical path shift element 100, for example, from the projection position (A) to the projection position (a) or from the projection position (a) to the projection position (B). The projector 1 according to the present embodiment can display an image between desired pixels by controlling the amount of change in the state of the optical path shift element 100 during the transition period from the first unit period f1 to the second unit period f2 based on the type of image.

[0093] In this embodiment, the above timing control circuit 13 controls the state of the optical path shift element 100 so that the light irradiated from a predetermined pixel reaches the projection position (a), which is the third position on the display screen, different from the projection position (A), which is the first position on the display screen that reaches in the first unit period f1, and the projection position (B), which is the second position on the display screen that reaches in the second unit period f2, during the first transition period T1 when transitioning from the first unit period f1 to the second unit period f2. In particular, in this embodiment, the projection position (a) is a position intermediate between the projection position (A) and the projection position (B). In the prior art, the projection position when in the first unit period f1 was the projection position (A), and the projection position when in the second unit period f2 was the projection position (B). On the other hand, in this embodiment, when displaying an image with an unclear boundary, as shown in FIG. 10, during the transition period from the first unit period to the second unit period, the optical path shift element 100 irradiates light at the projection position (a), which is intermediate between the projection position (A) and the projection position (B). Thereby, the projector 1 can display an image with an unclear boundary such that the pixels cannot be distinguished from each other.

[0094] Also, the image processing circuit 11 generates, during the above transition period T1, the image signal supplied to the liquid crystal panel 10 as an image signal based on the first image signal Vx supplied to the liquid crystal panel 10 in the first unit period f1 and the second image signal Vy supplied to the liquid crystal panel 10 in the second unit period f2. Further, the image processing circuit 11 sets the output image signal Dr in the transition state a between the state A in the first unit period f1 and the state B in the second unit period f2 as a signal intermediate between the output image signal Dr while in the state A and the output image signal Dr while in the state B. Thereby, the projector 1 can display an image with an unclear boundary such that the pixels cannot be distinguished from each other when displaying the image.

[0095] 〔Third Embodiment〕 Next, with reference to FIGS. 12 to 14, a driving method of the projector 1 according to the third embodiment of the present invention will be described. Hereinafter, mainly, differences between the driving method of the projector 1 according to the third embodiment and the driving methods of the projector 1 according to the first and second embodiments will be described. In the first and second embodiments, it is assumed that one frame period is divided into four unit periods: a first unit period f1, a second unit period f2, a third unit period f3, and a fourth unit period f4. On the other hand, in the present embodiment, the first unit period is f2, the second unit period is f4, the third unit period is f3, and the fourth unit period is f1. Further, in the first and second embodiments, the projection position (A) is taken as an example of the "first position", the projection position (B) is taken as an example of the "second position", and the projection position (a) is taken as an example of the "third position". On the other hand, in the present embodiment, the projection position (B) is taken as an example of the "first position", the projection position (D) is taken as an example of the "second position", the projection position (a) is taken as an example of the "third position", the projection position (C) is taken as an example of the "fourth position", and the projection position (A) is taken as an example of the "fifth position".

[0096] FIG. 12 is a diagram showing the state of the optical path shift element 100, specifically, the projection position by the optical path shift element 100. More specifically, in both the "video odd frame" and "video even frame" in FIG. 12, the left-side "A", "B", "C", and "D" correspond to "A1", "B1", "C1", and "D1" shown in FIG. 5 as an example. Also, in both the "video odd frame" and "video even frame" in FIG. 12, the right-side "A", "B", "C", and "D" correspond to "A2", "B2", "C2", and "D2" shown in FIG. 5 as an example. FIG. 13A and FIG. 13B are diagrams showing the temporal relationship between the projection position by the optical path shift element 100 and the control signals CTL1_X and CTL1_Y, and the temporal relationship during natural image display. More specifically, FIG. 13A is a diagram showing the temporal relationship during natural image display when displaying odd frames of a video. On the other hand, FIG. 13B is a diagram showing the temporal relationship during natural image display when displaying even frames of a video. In FIGS. 13A and 13B, for example, the maximum value of CTL1_X and CTL1_Y is shown as 100V, and the minimum value is shown as 0V. However, the aspects of this embodiment are not limited to this. Also, the temporal relationship between the projection position by the optical path shift element 100 and the control signals CTL1_X and CTL1_Y during character drawing display is the same as that in the first embodiment, so the description is omitted.

[0097] As shown in FIG. 12, when displaying a natural image by the projector 1, the order of switching the state of the optical path shift element 100 is different when displaying odd frames of the video and when displaying even frames of the video. Specifically, when displaying odd frames of the video, the state of the optical path shift element 100 transitions in the order of state A, state B, transition state a, state D, state C, transition state a, state A... On the other hand, when displaying even frames of the video, the state of the optical path shift element 100 transitions in the order of state A, state D, transition state a, state B, state C, transition state a, state A...

[0098] Also, the projection position while the state of the optical path shift element 100 is in the transition state a is the center of a square having the four vertices of projection position (A), projection position (B), projection position (C), and projection position (D).

[0099] In addition, when displaying odd frames of video, if the images to be displayed are different between when the optical path shift element 100 is in state B and when it is in state D, an image intermediate between the image displayed when the optical path shift element 100 is in state B and the image displayed when it is in state D may be displayed while the optical path shift element 100 is in transition state a. Specifically, if the output image signals Dr, Dg, and Db are different between when the optical path shift element 100 is in state B and when it is in state D, the output image signal Dr while the optical path shift element 100 is in transition state a may be a signal intermediate between the output image signal Dr when in state B and the output image signal Dr when in state D. The same applies to the output image signals Dg and Db.

[0100] Therefore, as an example, the overdrive image signal Dod while the optical path shift element 100 is in transition state a between state B and state D is calculated by the above formula [1] with the low-resolution image signal VIDL when in state D as the first image signal Vx and the low-resolution image signal VIDL when in state B as the second image signal Vy.

[0101] In addition, when displaying odd frames of video, if the images to be displayed are different between when the optical path shift element 100 is in state C and when it is in state A, the output image signal Dr in transition state a between state C and state A is, similar to the output image signal Dr in transition state a between state B and state D, a signal intermediate between the output image signal Dr in state C and the output image signal Dr in state A.

[0102] Also, when displaying even frames of the video, if the image to be displayed is different between when the optical path shift element 100 is in state D and when it is in state B, an intermediate image between the image displayed when the optical path shift element 100 is in state D and the image displayed when it is in state B may be displayed while the optical path shift element 100 is in transition state a. Specifically, when the output image signals Dr, Dg, and Db are different between when the optical path shift element 100 is in state D and when it is in state B, the output image signal Dr while the optical path shift element 100 is in transition state a may be an intermediate signal between the output image signal Dr when in state D and the output image signal Dr when in state B. The same applies to the output image signals Dg and Db.

[0103] Therefore, as an example, the image signal Dod for overdrive while the optical path shift element 100 is in transition state a between state D and state B is calculated by the above formula [1] with the low-resolution image signal VIDL when in state B as the first image signal Vx and the low-resolution image signal VIDL when in state D as the second image signal Vy.

[0104] Note that the same also applies to transition state a between state C and state A when the image to be displayed is different between when the optical path shift element 100 is in state C and when it is in state A during the display of even frames of the video.

[0105] As shown in FIG. 13A, when the determination result by the image determination circuit 11A is a natural image and odd frames of the video are to be displayed, the voltage of the control signal CTL1_X rises from the minimum value to the maximum value during the period from timing t80 to timing t81. Also, the voltage of the control signal CTL1_X maintains the maximum value during the period from timing t81 to timing t82. Also, the voltage of the control signal CTL1_X drops from the maximum value to the intermediate value during the period from timing t82 to timing t83. Also, the voltage of the control signal CTL1_X maintains the intermediate value during the period from timing t83 to timing t84. Also, the voltage of the control signal CTL1_X drops from the intermediate value to the minimum value during the period from timing t84 to timing t85. Also, the voltage of the control signal CTL1_X maintains the minimum value during the period from timing t85 to timing t86. Also, the voltage of the control signal CTL1_X rises from the minimum value to the maximum value during the period from timing t86 to timing t87. Also, the voltage of the control signal CTL1_X maintains the maximum value during the period from timing t87 to timing t88. Also, the voltage of the control signal CTL1_X drops from the maximum value to the intermediate value during the period from timing t88 to timing t89. Also, the voltage of the control signal CTL1_X maintains the intermediate value during the period from timing t89 to timing t90. Also, the voltage of the control signal CTL1_X drops from the intermediate value to the minimum value during the period from timing t90 to timing t91. Also, the voltage of the control signal CTL1_X maintains the minimum value during the period from timing t91 to timing t92.

[0106] Also, the voltage of the control signal CTL1_Y maintains the minimum value during the period from timing t80 to timing t82. Also, the voltage of the control signal CTL1_Y rises from the minimum value to the intermediate value during the period from timing t82 to timing t83. Also, the voltage of the control signal CTL1_Y maintains the intermediate value during the period from timing t83 to timing t84. Also, the voltage of the control signal CTL1_Y rises from the intermediate value to the maximum value during the period from timing t84 to timing t85. Also, the voltage of the control signal CTL1_Y maintains the maximum value during the period from timing t85 to timing t88. Also, the voltage of the control signal CTL1_Y drops from the maximum value to the intermediate value during the period from timing t88 to timing t89. Also, the voltage of the control signal CTL1_Y maintains the intermediate value during the period from timing t89 to timing t90. Also, the voltage of the control signal CTL1_Y drops from the intermediate value to the minimum value during the period from timing t90 to timing t91. Also, the voltage of the control signal CTL1_Y maintains the minimum value during the period from timing t91 to timing t92.

[0107] Therefore, at timing t80, the state of the optical path shift element 100 starts to transition from state A to state B. Also, at timing t81, the state of the optical path shift element 100 finishes transitioning to state B. Also, during the period from timing t81 to timing t82, the state of the optical path shift element 100 is maintained at state B. Also, at timing t82, the state of the optical path shift element 100 starts to transition from state B to transition state a. Also, at timing t83, the state of the optical path shift element 100 finishes transitioning to transition state a. Also, during the period from timing t83 to timing t84, the state of the optical path shift element 100 is maintained at transition state a. Also, at timing t84, the state of the optical path shift element 100 starts to transition from transition state a to state D. Also, at timing t85, the state of the optical path shift element 100 finishes transitioning to state D. Also, during the period from timing t85 to timing t86, the state of the optical path shift element 100 is maintained at state D. Also, at timing t86, the state of the optical path shift element 100 starts to transition from state D to state C. Also, at timing t87, the state of the optical path shift element 100 finishes transitioning to state C. Also, during the period from timing t87 to timing t88, the state of the optical path shift element 100 is maintained at state C. Also, at timing t88, the state of the optical path shift element 100 starts to transition from state C to transition state a. Also, at timing t89, the state of the optical path shift element 100 finishes transitioning to transition state a. Also, during the period from timing t89 to timing t90, the state of the optical path shift element 100 is maintained at transition state a. Also, at timing t90, the state of the optical path shift element 100 starts to transition from transition state a to state A. Also, at timing t91, the state of the optical path shift element 100 finishes transitioning to state A. Also, during the period from timing t91 to timing t92, the state of the optical path shift element 100 is maintained at state A. Also, at timing t92, the state of the optical path shift element 100 starts to transition from state A to state B.

[0108] As described above, the state of the optical path shift element 100 transitions from state A, via state B, transition state a, state D, state C, and transition state a, to state A.

[0109] As shown in FIG. 13B, when the determination result by the image determination circuit 11A is a natural image and an even frame of the video is being displayed, the voltage of the control signal CTL1_X maintains the minimum value during the period from timing t100 to timing t102. Also, the voltage of the control signal CTL1_X rises from the minimum value to the intermediate value during the period from timing t102 to timing t103. Also, the voltage of the control signal CTL1_X maintains the intermediate value during the period from timing t103 to timing t104. Also, the voltage of the control signal CTL1_X rises from the intermediate value to the maximum value during the period from timing t104 to timing t105. Also, the voltage of the control signal CTL1_X maintains the maximum value during the period from timing t105 to timing t108. Also, the voltage of the control signal CTL1_X drops from the maximum value to the intermediate value during the period from timing t108 to timing t109. Also, the voltage of the control signal CTL1_X maintains the intermediate value during the period from timing t109 to t110. Also, the voltage of the control signal CTL1_X drops from the intermediate value to the minimum value during the period from timing t110 to timing t111. Also, the voltage of the control signal CTL1_X maintains the minimum value during the period from timing t111 to timing t112.

[0110] Also, the voltage of the control signal CTL1_Y rises from the minimum value to the maximum value during the period from timing t100 to timing t101. Also, the voltage of the control signal CTL1_Y maintains the maximum value during the period from timing t101 to timing t102. Also, the voltage of the control signal CTL1_Y drops from the maximum value to the intermediate value during the period from timing t102 to timing t103. Also, the voltage of the control signal CTL1_Y maintains the intermediate value during the period from timing t103 to timing t104. Also, the voltage of the control signal CTL1_Y drops from the intermediate value to the minimum value during the period from timing t104 to timing t105. Also, the voltage of the control signal CTL1_Y maintains the minimum value during the period from timing t105 to timing t106. Also, the voltage of the control signal CTL1_Y rises from the minimum value to the maximum value during the period from timing t106 to timing t107. Also, the voltage of the control signal CTL1_Y maintains the maximum value during the period from timing t107 to timing t108. Also, the voltage of the control signal CTL1_Y drops from the maximum value to the intermediate value during the period from timing t108 to timing t109. Also, the voltage of the control signal CTL1_Y maintains the intermediate value during the period from timing t109 to timing t110. Also, the voltage of the control signal CTL1_Y drops from the intermediate value to the minimum value during the period from timing t110 to timing t111. Also, the voltage of the control signal CTL1_Y maintains the minimum value during the period from timing t111 to timing t112.

[0111] Therefore, at timing t100, the state of the optical path shift element 100 starts to transition from state A to state D. Also, at timing t101, the state of the optical path shift element 100 finishes transitioning to state D. Further, during the period from timing t101 to timing t102, the state of the optical path shift element 100 is maintained at state D. Also, at timing t102, the state of the optical path shift element 100 starts to transition from state D to transition state a. Also, at timing t103, the state of the optical path shift element 100 finishes transitioning to transition state a. Further, during the period from timing t103 to timing t104, the state of the optical path shift element 100 is maintained at transition state a. Also, at timing t104, the state of the optical path shift element 100 starts to transition from transition state a to state B. Also, at timing t105, the state of the optical path shift element 100 finishes transitioning to state B. Further, during the period from timing t105 to timing t106, the state of the optical path shift element 100 is maintained at state B. Also, at timing t106, the state of the optical path shift element 100 starts to transition from state B to state C. Also, at timing t107, the state of the optical path shift element 100 finishes transitioning to state C. Further, during the period from timing t107 to timing t108, the state of the optical path shift element 100 is maintained at state C. Also, at timing t108, the state of the optical path shift element 100 starts to transition from state C to transition state a. Also, at timing t109, the state of the optical path shift element 100 finishes transitioning to transition state a. Further, during the period from timing t109 to timing t110, the state of the optical path shift element 100 is maintained at transition state a. Also, at timing t110, the state of the optical path shift element 100 starts to transition from transition state a to state A. Also, at timing t111, the state of the optical path shift element 100 finishes transitioning to state A. Further, during the period from timing t111 to timing t112, the state of the optical path shift element 100 is maintained at state A. Also, at timing t112, the state of the optical path shift element 100 starts to transition from state A to state B.

[0112] As described above, the state of the optical path shift element 100 transitions from state A, via state D, transition state a, state B, state C, and transition state a, to state A.

[0113] As shown in FIGS. 13A and 13B, in this embodiment, when the displayed pixel moves in the horizontal direction and the vertical direction, the transition time is short, such as the time from t80 to t81, and when it moves in the diagonal direction, the transition time is long, such as the time from t82 to t85. Further, in the latter transition time, the voltage of the control signal CTL1_X or CTL1_Y maintains an intermediate value. Thereby, it is possible to eliminate the display jitter by pseudo-increasing the amount of information when displaying the diagonal line.

[0114] FIG. 14 shows a display example as a comparative example and a display example according to the display method of this embodiment. In FIG. 14, for the sake of clarity of the display method according to this embodiment, an example of the display according to the comparative example shown in FIG. 7 is also illustrated. More specifically, in the upper part of FIG. 14, display examples of vertical lines, horizontal lines, and diagonal lines by the conventional method as a comparative example are shown. Also, in the lower part of FIG. 14, display examples of vertical lines, horizontal lines, and diagonal lines by the display method according to this embodiment are shown. Comparing the display example as a comparative example with the display example according to the display method of this embodiment, there is no difference in the display of vertical and horizontal lines. However, when displaying a diagonal line in this embodiment, in addition to the image displayed by the conventional method, images corresponding to the transition state a between state B and state D and the transition state a between state A and state C are displayed. Thereby, the degree of display jitter is reduced. In FIG. 14, the image corresponding to the transition state a is shown as a coarse grid for the eyes.

[0115] In this embodiment, during the transition period, the projection position by the optical path shift element 100 is the center of a square with four vertices being the projection position (B) which is the first position reaching the first unit period f2, the projection position (D) which is the second position reaching the second unit period f4, the projection position (C) which is the third position reaching the third unit period f3, and the projection position (A) which is the fourth position reaching the fourth unit period f1. Then, when the position where the light emitted from a predetermined pixel reaches on the display screen moves from the first unit period f2 to the fourth unit period f1, the transition time is short when moving in the horizontal direction and the vertical direction, while the transition time is long when moving in the diagonal direction. Thereby, when displaying a diagonal line, it is possible to reduce the degree of blurring of the display.

[0116] Also, in this embodiment, depending on whether an odd frame or an even frame of the video is to be displayed, the movement of the projection position by the optical path shift element 100 switches between a combination of the horizontal direction and the diagonal direction and a combination of the vertical direction and the diagonal direction. This is because when the movement of the projection position by the optical path shift element 100 is only a combination of the horizontal direction and the diagonal direction, or a combination of the vertical direction and the diagonal direction, asymmetry occurs in the movement direction. Therefore, by generating the combination of the horizontal direction and the diagonal direction and the combination of the vertical direction and the diagonal direction as the movement direction of the projection position by the optical path shift element 100 in a well-balanced manner, it is possible to maintain the symmetry of the movement direction. Also, as the movement direction of the projection position, the movement in all directions of the horizontal direction, the vertical direction, and the diagonal direction is mixed, and by averaging them, the dot display becomes smooth.

[0117] 〔Fourth Embodiment〕 Next, with reference to FIGS. 15 and 16, the driving method of the projector 1 according to the fourth embodiment of the present invention will be described. Hereinafter, mainly, the differences between the driving method of the projector 1 according to the fourth embodiment and the driving methods of the projector 1 according to the first to third embodiments will be described.

[0118] FIG. 15 is a diagram showing the state of the optical path shift element 100, specifically, the projection position by the optical path shift element 100. More specifically, "A", "B", "C", and "D" on the left side in FIG. 15 correspond to "A1", "B1", "C1", and "D1" shown in FIG. 5 as an example. Also, "A", "B", "C", and "D" on the right side in FIG. 15 correspond to "A2", "B2", "C2", and "D2" shown in FIG. 5 as an example. FIG. 16 is a diagram showing the temporal relationship between the projection position by the optical path shift element 100 and the control signals CTL1_X and CTL1_Y. In FIG. 16, as an example, the maximum value of CTL1_X and CTL1_Y is shown as 100V, the minimum value is shown as 0V, and the intermediate value is shown as 50V. However, the aspects of this embodiment are not limited to this.

[0119] When comparing FIG. 15 with FIG. 10 showing the projection position by the optical path shift element 100 according to the second embodiment, in the second embodiment, during the transition states a to d, the projection positions are respectively the midpoint between the projection position (A) and the projection position (B), the midpoint between the projection position (B) and the projection position (C), the midpoint between the projection position (C) and the projection position (D), and the midpoint between the projection position (D) and the projection position (A). On the other hand, in this embodiment, the projection position (a) during the transition state a is a position between the midpoint P between the projection position (A) and the projection position (B) and the center O of the square having the projection positions (A), (B), (C), and (D) as four vertices. Similarly, the projection position (b) during the transition state b is a position between the midpoint Q between the projection position (B) and the projection position (C) and the center O of the square. Similarly, the projection position (c) during the transition state c is a position between the midpoint R between the projection position (C) and the projection position (D) and the center O of the square. Similarly, the projection position (d) during the transition state d is a position between the midpoint S between the projection position (D) and the projection position (A) and the center O of the square.

[0120] Therefore, the image shift state transitions among state A, transition state a, state B, transition state b, state C, transition state c, state D, transition state d, state A... At this time, the projection position by the optical path shift element 100 always moves obliquely.

[0121] As described above, for example, the projection position while the state of the optical path shift element 100 is in the transition state a is closer to the center of the square with the projection positions (A), (B), (C), and (D) as four vertices than the midpoint between the projection positions (A) and (B). For this reason, if the displayed images are different when the state of the optical path shift element 100 is in states A to D respectively, an intermediate image of the images displayed while the state of the optical path shift element 100 is in states A to D may be displayed while the state of the optical path shift element 100 is in the transition state a. Note that an intermediate image may be generated after weighting the images displayed while the state of the optical path shift element 100 is in states A to D respectively.

[0122] As described above, the operation while the state of the optical path shift element 100 is in the transition state a has been described. The operation of the projector 1 is the same while the state of the optical path shift element 100 is in the transition states b to d.

[0123] For this reason, as an example, the over - drive image signal Dod while the state of the optical path shift element 100 is in the transition state a is obtained by using the low - resolution image signal VIDL when in state A as the second image signal V A and using the low - resolution image signal VIDL when in state B as the first image signal V B and using the low - resolution image signal VIDL when in state C as the first image signal V C and using the low - resolution image signal VIDL when in state D as the first image signal V D and may be given by the following formula [2]. Dod = f2(V A , V B , V C , V D ) [2] Note that, similar to the function f1, the function f2 is defined so as to obtain a desired gradation in consideration of the response characteristics of the liquid crystal. Thereby, the response characteristics of the liquid crystal panel 10 are compensated.

[0124] As shown in FIG. 16, when the determination result by the image determination circuit 11A is a natural image, the voltage of the control signal CTL1_X rises from the minimum value to the intermediate value during the period from timing t120 to timing t121. Also, the voltage of the control signal CTL1_X maintains the intermediate value during the period from timing t121 to timing t122. Also, the voltage of the control signal CTL1_X rises from the intermediate value to the maximum value during the period from timing t122 to timing t123. Also, the voltage of the control signal CTL1_X maintains the maximum value during the period from timing t123 to timing t124. Also, the voltage of the control signal CTL1_X drops from the maximum value to the intermediate value during the period from timing t124 to timing t125. Also, the voltage of the control signal CTL1_X maintains the intermediate value during the period from timing t125 to timing t126. Also, the voltage of the control signal CTL1_X rises from the intermediate value to the maximum value during the period from timing t126 to timing t127. Also, the voltage of the control signal CTL1_X maintains the maximum value during the period from timing t127 to timing t128. Also, the voltage of the control signal CTL1_X drops from the maximum value to the intermediate value during the period from timing t128 to timing t129. Also, the voltage of the control signal CTL1_X maintains the intermediate value during the period from timing t129 to timing t130. Also, the voltage of the control signal CTL1_X drops from the intermediate value to the minimum value during the period from timing t130 to timing t131. Also, the voltage of the control signal CTL1_X maintains the minimum value during the period from timing t131 to timing t136. Also, the voltage of the control signal CTL1_X rises from the minimum value to the intermediate value during the period from timing t136 to timing t137.

[0125] Also, the voltage of the control signal CTL1_Y rises from the minimum value to the intermediate value during the period from timing t120 to timing t121. Also, the voltage of the control signal CTL1_Y maintains the intermediate value during the period from timing t121 to timing t122. Also, the voltage of the control signal CTL1_Y drops from the intermediate value to the minimum value during the period from timing t122 to timing t123. Also, the voltage of the control signal CTL1_Y maintains the minimum value during the period from timing t123 to timing t124. Also, the voltage of the control signal CTL1_Y rises from the minimum value to the intermediate value during the period from timing t124 to timing t125. Also, the voltage of the control signal CTL1_Y maintains the intermediate value during the period from timing t125 to timing t126. Also, the voltage of the control signal CTL1_Y rises from the intermediate value to the maximum value during the period from timing t126 to timing t127. Also, the voltage of the control signal CTL1_Y maintains the maximum value during the period from timing t127 to timing t132. Also, the voltage of the control signal CTL1_Y drops from the maximum value to the intermediate value during the period from timing t132 to timing t133. Also, the voltage of the control signal CTL1_Y maintains the intermediate value during the period from timing t133 to timing t134. Also, the voltage of the control signal CTL1_Y drops from the intermediate value to the minimum value during the period from timing t134 to timing t135. Also, the voltage of the control signal CTL1_Y maintains the minimum value during the period from timing t135 to timing t136. Also, the voltage of the control signal CTL1_Y rises from the minimum value to the intermediate value during the period from timing t136 to timing t137.

[0126] Therefore, at timing t120, the state of the optical path shift element 100 begins to transition from state A to transition state a. Also, at timing t121, the state of the optical path shift element 100 finishes transitioning to transition state a. Further, during the period from timing t121 to timing t122, the state of the optical path shift element 100 is maintained at transition state a. Also, at timing t122, the state of the optical path shift element 100 begins to transition from transition state a to state B. Also, at timing t123, the state of the optical path shift element 100 finishes transitioning to state B. Further, during the period from timing t123 to timing t124, the state of the optical path shift element 100 is maintained at state B. Also, at timing t124, the state of the optical path shift element 100 begins to transition from state B to transition state b. Also, at timing t125, the state of the optical path shift element 100 finishes transitioning to transition state b. Further, during the period from timing t125 to timing t126, the state of the optical path shift element 100 is maintained at transition state b. Also, at timing t126, the state of the optical path shift element 100 begins to transition from transition state b to state C. Also, at timing t127, the state of the optical path shift element 100 finishes transitioning to state C. Further, during the period from timing t127 to timing t128, the state of the optical path shift element 100 is maintained at state C. Also, at timing t128, the state of the optical path shift element 100 begins to transition from state C to transition state c. Also, at timing t129, the state of the optical path shift element 100 finishes transitioning to transition state c. Further, during the period from timing t129 to timing t130, the state of the optical path shift element 100 is maintained at transition state c. Also, at timing t130, the state of the optical path shift element 100 begins to transition from transition state c to state D. Also, at timing t131, the state of the optical path shift element 100 finishes transitioning to state D. Further, during the period from timing t131 to timing t132, the state of the optical path shift element 100 is maintained at state D. Also, at timing t132, the state of the optical path shift element 100 begins to transition from state D to transition state d.Also, at timing t133, the state of the optical path shift element 100 finishes transitioning to the transition state d. Also, during the period from timing t133 to timing t134, the state of the optical path shift element 100 is maintained in the transition state d. Also, at timing t134, the state of the optical path shift element 100 starts transitioning from the transition state d to the state A. Also, at timing t135, the state of the optical path shift element 100 finishes transitioning to the state A. Also, during the period from timing t135 to timing t136, the state of the optical path shift element 100 is maintained in the state A. Also, at timing t136, the state of the optical path shift element 100 starts transitioning from the state A to the transition state a. Also, at timing t137, the state of the optical path shift element 100 finishes transitioning to the transition state a.

[0127] As described above, the state of the optical path shift element 100 transitions from the state A, via the transition state a, state B, transition state b, state C, transition state c, state D, and transition state d, to the state A.

[0128] In the present embodiment, the projection position by the optical path shift element 100 always moves in an oblique direction. Thereby, similar to the third embodiment, when displaying an oblique line, it is possible to reduce the degree of blurring of the display.

[0129] 〔Fifth Embodiment〕 Next, with reference to FIGS. 17A and 17B, a driving method of the projector 1 according to the fifth embodiment of the present invention will be described. Hereinafter, mainly, differences between the driving method of the projector 1 according to the fifth embodiment and the driving methods of the projector 1 according to the first to fourth embodiments will be described.

[0130] Figures 17A and 17B are diagrams showing the state of the optical path shift element 100, specifically the projection positions by the optical path shift element 100. More specifically, the left "A", "B", "C", and "D" in Figure 17A correspond to "A1", "B1", "C1", and "D1" shown in Figure 5 as an example. Also, the right "A", "B", "C", and "D" in Figure 17A correspond to "A2", "B2", "C2", and "D2" shown in Figure 5 as an example. Also, the upper left "A", "B", "C", and "D" in Figure 17B correspond to "A1", "B1", "C1", and "D1" shown in Figure 5 as an example. Also, the upper right "A", "B", "C", and "D" in Figure 17B correspond to "A2", "B2", "C2", and "D2" shown in Figure 5 as an example. Also, the lower left "A", "B", "C", and "D" in Figure 17B correspond to "A4", "B4", "C4", and "D4" shown in Figure 5 as an example. Also, the lower right "A", "B", "C", and "D" in Figure 17B correspond to "A5", "B5", "C5", and "D5" shown in Figure 5 as an example.

[0131] As shown in Figures 17A and 17B, in this embodiment, when displaying a natural image by the projector 1, the projection positions when the state of the optical path shift element 100 is in a transition state are switched between the case of displaying odd frames of the video and the case of displaying even frames of the video. Note that the order in which the state of the optical path shift element 100 transitions is common between the case of displaying odd frames of the video and the case of displaying even frames of the video. Specifically, the state of the optical path shift element 100 transitions in the order of state A, transition state a, state B, transition state b, state C, transition state c, state D, transition state d, state A...

[0132] 17A, when odd-numbered frames of an image are displayed, while the state of the light path shift element 100 is in a transition state a, the projection position (a) by the light path shift element 100 is a position between the midpoint P between the projection position (A) and the projection position (B) and the center O1 of a square whose four vertices are in the order of the projection position (A), the projection position (B), the projection position (C), and the projection position (D) clockwise from the upper left. While the state of the light path shift element 100 is in a transition state b, the projection position (b) by the light path shift element 100 is a position between the midpoint Q between the projection position (B) and the projection position (C) and the center O2 of a square whose four vertices are in the order of the projection position (B), the projection position (A), the projection position (D), and the projection position (C) clockwise from the upper left. While the state of the light path shift element 100 is in a transition state c, the projection position (c) of the light path shift element 100 is a position between the midpoint R between the projection position (C) and the projection position (D) and the center O1 of the square. While the state of the light path shift element 100 is in a transition state d, the projection position (d) of the light path shift element 100 is a position between the midpoint S between the projection position (D) and the projection position (A) and the center O3 of the square whose four vertices are in the order of the projection position (B), the projection position (A), the projection position (D), and the projection position (C) clockwise from the upper left. That is, when odd-numbered frames of an image are displayed, the projection positions draw a locus of a figure eight laid down.

[0133] On the other hand, as shown in FIG. 17B, when displaying even frames of the video, while the optical path shift element 100 is in the transition state a, the projection position (a) by the optical path shift element 100 is at the midpoint P between the projection position (A) and the projection position (B), and the center O4 of a square where the four vertices are in the order of the projection position (D), the projection position (C), the projection position (B), and the projection position (A) clockwise from the upper left. While the optical path shift element 100 is in the transition state b, the projection position (b) by the optical path shift element 100 is at a position between the midpoint Q between the projection position (B) and the projection position (C) and the center O1 of the square. While the optical path shift element 100 is in the transition state c, the projection position (c) by the optical path shift element 100 is at a position between the midpoint R between the projection position (C) and the projection position (D) and the center O5 of a square where the four vertices are in the order of the projection position (D), the projection position (C), the projection position (B), and the projection position (A) clockwise from the upper left. While the optical path shift element 100 is in the transition state d, the projection position by the optical path shift element 100 is at a position between the midpoint S between the projection position (D) and the projection position (A) and the center O1 of the square. That is, when displaying odd frames of the video, the projection position draws a figure-eight-like trajectory.

[0134] In this embodiment, the projection position by the optical path shift element 100 always moves in an oblique direction, similar to the fourth embodiment. Thus, similar to the third and fourth embodiments, it is possible to eliminate the flickering of the display when displaying oblique lines.

[0135] Also, in this embodiment, depending on whether the video to be displayed is an odd-frame video or an even-frame video, the trajectory of the projection position switches between a figure-eight lying-down trajectory and a figure-eight standing-up trajectory. This is because if only a figure-eight lying-down trajectory or only a figure-eight standing-up trajectory is used as the trajectory of the projection position, asymmetry occurs in the moving direction. Therefore, by generating a figure-eight lying-down trajectory and a figure-eight standing-up trajectory in a well-balanced manner as the trajectory of the projection position, it is possible to maintain the symmetry of the moving direction. Also, the trajectory of the projection position is averaged, and the dot display becomes smoother.

[0136] 〔Sixth Embodiment〕 Next, with reference to FIG. 18, a driving method of the projector 1 according to the sixth embodiment of the present invention will be described. Hereinafter, mainly, differences between the operation of the projector 1 according to the sixth embodiment and the operation of the projector 1 according to the first to fifth embodiments will be described.

[0137] FIG. 18 is a diagram showing the state of the optical path shift element 100, specifically, the projection position by the optical path shift element 100. More specifically, "A", "B", "C", and "D" on the left side in FIG. 18 correspond to "A1", "B1", "C1", and "D1" shown in FIG. 5 as an example. Further, "A", "B", "C", and "D" on the right side in FIG. 18 correspond to "A2", "B2", "C2", and "D2" shown in FIG. 5 as an example.

[0138] As shown in FIG. 18, in the present embodiment, when displaying a natural image by the projector 1, the projection position during the transition state of the state of the optical path shift element 100 changes depending on the time after starting the image display by the projector 1.

[0139] Specifically, in the present embodiment, the state of the optical path shift element 100 transitions in the order of state A, transition state a1, state B, transition state b1, state C, transition state c1, state D, transition state d1, state A, transition state a2, state B, transition state b2, state C, transition state c2, state D, transition state d2, state A.... Hereinafter, the period during which the state of the optical path shift element 100 transitions in the order of state A, transition state a1, state B, transition state b1, state C, transition state c1, state D, transition state d1 is referred to as the first sub-frame period. Further, hereinafter, the period during which the state of the optical path shift element 100 transitions in the order of state A, transition state a2, state B, transition state b2, state C, transition state c2, state D, transition state d2 is referred to as the second sub-frame period.

[0140] Note that one frame period may be composed of the above-described first sub-frame period and second sub-frame period, or one frame period may be only the above-described first sub-frame period or only the above-described second sub-frame period.

[0141] Also, while the state of the optical path shift element 100 is in the transition state a1, the projection position (a1) by the optical path shift element 100 is between the midpoint P of the projection positions (A) and (B) and the center O1 of a square whose four vertices are in the order of the projection positions (A), (B), (C), and (D) clockwise from the upper left. On the other hand, while the state of the optical path shift element 100 is in the transition state a2, the position of the projection position (a2) by the optical path shift element 100 is between the midpoint P of the projection positions (A) and (B) and the center O4 of a square whose four vertices are in the order of the projection positions (D), (C), (B), and (A) clockwise from the upper left. Similarly, while the state of the optical path shift element 100 is in the transition state b1, the projection position (b1) by the optical path shift element 100 is between the midpoint Q of the projection positions (B) and (C) and the center O2 of a square whose four vertices are in the order of the projection positions (B), (A), (D), and (C) clockwise from the upper left. On the other hand, while the state of the optical path shift element 100 is in the transition state b2, the projection position (b2) by the optical path shift element 100 is between the midpoint Q of the projection positions (B) and (C) and the center O1 of a square whose four vertices are in the order of the projection positions (A), (B), (C), and (D) clockwise from the upper left. Similarly, while the optical path shift element 100 is in the transition state c1, the projection position (c1) by the optical path shift element 100 is between the midpoint R of the projection positions (C) and (D), and the center O1 of a square whose four vertices are in the order of the projection positions (A), (B), (C), and (D) clockwise from the upper left. On the other hand, while the optical path shift element 100 is in the transition state c2, the projection position (c2) by the optical path shift element 100 is between the midpoint R of the projection positions (C) and (D), and the center O5 of a square whose four vertices are in the order of the projection positions (D), (C), (B), and (A) clockwise from the upper left. Similarly, while the optical path shift element 100 is in the transition state d1, the projection position (d1) by the optical path shift element 100 is between the midpoint S of the projection positions (D) and (A), and the center O3 of a square whose four vertices are in the order of the projection positions (B), (A), (D), and (C) clockwise from the upper left. On the other hand, while the optical path shift element 100 is in the transition state d2, the projection position (d2) by the optical path shift element 100 is between the midpoint S of the projection positions (D) and (A), and the center O1 of a square whose four vertices are in the order of the projection positions (A), (B), (C), and (D) clockwise from the upper left. Note that for each of the transition states a to d, the projection position in the first sub-frame period and the projection position in the second sub-frame period may be swapped. For example, the projection position by the optical path shift element 100 while in the transition state a may be at the position a2 in FIG. 18 in the first sub-frame period and at the position a1 in FIG. 18 in the second sub-frame period.

[0142] As an example, the projection position by the optical path shift element 100 may draw the same trajectory as when displaying odd frames of the video in the fifth embodiment in the first sub-frame period, and draw the same trajectory as when displaying even frames of the video in the fifth embodiment in the second sub-frame period.

[0143] In this embodiment, the projection position by the optical path shift element 100 always moves in an oblique direction, similar to the fourth and fifth embodiments. As a result, similar to the third to fifth embodiments, when displaying an oblique line, it is possible to reduce the degree of shaking of the display.

[0144] Also, in this embodiment, based on the time after the start of image display by the projector 1, the locus of the projection position by the optical path shift element 100 is switched. As a result, the projection positions are averaged and the dot display becomes smooth.

[0145] 〔Seventh Embodiment〕 Next, with reference to FIG. 19, a driving method of the projector 1 according to the seventh embodiment of the present invention will be described. Hereinafter, mainly, differences between the driving method of the projector 1 according to the seventh embodiment and the driving methods of the projector 1 according to the first to sixth embodiments will be described.

[0146] FIG. 19 is a diagram showing the state of the optical path shift element 100, specifically, the projection position by the optical path shift element 100. More specifically, "A", "B", "C", and "D" on the left side in FIG. 19 correspond to "A1", "B1", "C1", and "D1" shown in FIG. 5 as an example. Also, "A", "B", "C", and "D" on the right side in FIG. 19 correspond to "A2", "B2", "C2", and "D2" shown in FIG. 5 as an example.

[0147] When comparing the projection position by the optical path shift element 100 according to this embodiment with the projection position by the optical path shift element 100 according to the second embodiment shown in FIG. 10, any of the projection positions (A) to (D) is moving away from the center O1 of the square having the projection positions (A) to (D) in the second embodiment as four vertices. More specifically, the projection position (A) is moving in the upper left direction from the center of the square. The projection position (B) is moving in the upper right direction from the center O1 of the square. The projection position (C) is moving in the lower left direction from the center O1 of the square. The projection position (D) is moving in the lower right direction from the center O1 of the square.

[0148] In this embodiment, by moving the projection positions from (A) to (D) away from the center O1 of the square, the projection positions by the optical path shift element 100 always move in an oblique direction, similar to the fourth to sixth embodiments, starting from the fourth embodiment. As a result, similar to the third to sixth embodiments, when displaying oblique lines, it becomes possible to reduce the degree of display jitter. In the above description, compared with the projection positions (A) to (D) by the optical path shift element 100 according to the second embodiment, the projection positions (A) to (D) in this embodiment are assumed to move in a direction away from the center O1 of the square. However, the aspect of this embodiment is not limited to this. For example, the projection positions from (A) to (D) in this embodiment may move in a direction away from the center O or O1 to O5 of the square, compared with the projection positions (A) to (D) by the optical path shift element 100 according to the third to sixth embodiments.

[0149] 〔Modification Example〕 The present disclosure is not limited to the embodiments exemplified above. Specific modification aspects are exemplified below. Two or more aspects arbitrarily selected from the following examples may be combined.

[0150] 〔Modification Example 1〕 In the above first to seventh embodiments, the projector 1 includes, for example, the optical path shift element 100 and the optical path shift element drive circuit 12. However, the embodiments of the present invention are not limited to this. For example, the embodiments of the present invention may include a DMD (Digital Micro-mirror Device) and its drive circuit instead of the optical path shift element 100 and the optical path shift element drive circuit 12.

[0151] 〔Modification Example 2〕 In the above first to seventh embodiments, for example, a VA-mode liquid crystal is provided between the pixel electrode and the counter electrode. However, the embodiments of the present invention are not limited to this. For example, other reflective liquid crystals, or TN-mode or IPS-mode liquid crystals may be provided between the pixel electrode and the counter electrode.

[0152] [Modification Example 3] In the above-described first to seventh embodiments, the timing control circuit 13 time-divisionally divides one frame period corresponding to one frame into unit periods corresponding to the states of the respective optical path shift elements 100. However, embodiments of the present invention are not limited to this. For example, by the cooperation of the components of the projectors 1 to 1F, particularly the components constituting the control systems of the projectors 1 to 1F, one frame period corresponding to one frame may be time-divisionally divided into unit periods corresponding to the states of the respective optical path shift elements 100.

[0153] [Modification Example 4] In the above-described third embodiment, when displaying odd frames of an image, the movement of the projection position by the optical path shift element 100 is a combination of the horizontal direction and the diagonal direction. On the other hand, when displaying even frames of an image, the movement of the projection position by the optical path shift element 100 is a combination of the vertical direction and the diagonal direction. However, embodiments of the present invention are not limited to this. For example, regardless of whether odd frames or even frames of an image are being displayed, the movement of the projection position by the optical path shift element 100 may be a combination of the horizontal direction and the diagonal direction. Alternatively, regardless of whether odd frames or even frames of an image are being displayed, the movement of the projection position by the optical path shift element 100 may be a combination of the vertical direction and the diagonal direction.

Explanation of Reference Numerals

[0154] 1... Projector, 10R, 10G, 10B... Liquid crystal panel, 11A... Image determination circuit 11B... Conversion circuit, 11C... Overdrive processing circuit, 12... Optical path shift element drive circuit, 13... Timing control circuit, 20... Lighting device, 40... Separation optical system, 41, 42, 45... Mirror, 43, 44... Dichroic mirror, 60... Projection optical system, 62... Projection lens system, 80... Projection surface, 100... Optical path shift element, 111... Frame memory, 112... Low-resolution frame memory, 113... Selection circuit

Claims

1. An electro-optical panel in which a plurality of pixels that emit light based on an image signal are arranged, An optical path shift element capable of changing the optical path of the light emitted from the plurality of pixels, Among a plurality of unit periods included in one frame period, in a first unit period, a first image signal based on an input image signal Is supplied to the electro-optical panel as the image signal, and among the plurality of unit Periods, in a second unit period after the first unit period, a second Image signal is supplied to the electro-optical panel as the image signal, and an image processing circuit, In the first unit period, the state of the optical path shift element is controlled so that the light emitted from a predetermined pixel among the plurality of pixels reaches a first position on the display screen, and in the second unit period The state of the optical path shift element is controlled so that the light irradiated from the predetermined pixel reaches a second position on the display screen, and the unit period changes from the first unit period to the second unit period In the transition period, the state of the optical path shift element is controlled based on the type of the image indicated by the input image signal, And a control circuit, The image processing circuit Includes an overdrive processing circuit that executes overdrive processing for compensating the response characteristics of the electro-optical panel, And is provided with The overdrive processing circuit Adjusts the compensation amount determined by the overdrive processing based on the type of the image, A projector.

2. The control circuit Controls at least one of the change speed and the change amount of the state of the optical path shift element in the transition period based on the type of the image, The projector according to claim 1.

3. An electro-optical panel in which a plurality of pixels that emit light based on an image signal are arranged, An optical path shift element capable of changing the optical path of the light emitted from the plurality of pixels, Among a plurality of unit periods included in one frame period, in a first unit period, a first image signal based on an input image signal is supplied as the image signal to the electro-optical panel, and among the plurality of unit periods, in a second unit period after the first unit period, a second image signal based on the input image signal is supplied as the image signal to the electro-optical panel, an image processing circuit, In the first unit period, the state of the optical path shift element is controlled so that the light emitted from a predetermined pixel among the plurality of pixels reaches a first position on the display screen, and in the second unit period the state of the optical path shift element is controlled so that the light irradiated from the predetermined pixel reaches a second position on the display screen, and in the transition period when the unit period transitions from the first unit period to the second unit period the state of the optical path shift element is controlled based on the type of the image indicated by the input image signal, a control circuit, and is provided with The control circuit controls the state of the optical path shift element so that the light irradiated from the predetermined pixel reaches a third position on the display screen during the transition period, and The image processing circuit generates a third image signal to be supplied to the electro-optical panel as the image signal during the transition period based on the first image signal and the second image signal, a projector.

4. The third position is a position intermediate between the first position and the second position, according to claim 3 projector.

4. The third position is a position intermediate between the first position and the second position, according to claim 3 The projector of

5. Among the plurality of unit periods included in one frame period, the image processing circuit uses, as the image signal, a third image signal based on the input image signal in a third unit period after the second unit period, and supplies it to the electro-optical panel. Among the plurality of unit periods, in a fourth unit period after the third unit period, a fourth image signal based on the input image signal is used as the image signal and supplied to the electro-optical panel. The control circuit controls the state of the optical path shift element so that the light emitted from the predetermined pixel among the plurality of pixels reaches the fourth position on the display screen in the third unit period, and in the fourth unit period, controls the state of the optical path shift element so that the light irradiated from the predetermined pixel reaches the fifth position on the display screen. In the transition period when the unit period transitions from the third unit period to the fourth unit period, the state of the optical path shift element is controlled so that the light irradiated from the predetermined pixel reaches the third position on the display screen. The projector according to claim 4, wherein a position intermediate between the fourth position and the fifth position is the third position.

6. The first position and the second position are located in a first diagonal direction with respect to the arrangement direction of the plurality of pixels, and the fourth position and the fifth position are located in a second diagonal direction with respect to the arrangement direction of the plurality of pixels, and the second diagonal direction is perpendicular to the first diagonal direction. The projector according to claim 5.

7. The projector according to claim 3, wherein the third position is shifted from a position intermediate between the first position and the second position.

8. The control circuit switches the direction in which the light emitted from a predetermined pixel among the plurality of pixels transitions from the first position to the third position and from the third position to the second position on the display screen based on whether the one-frame period is the frame period of an odd-numbered frame or the frame period of an even-numbered frame. The projector according to claim 7.

9. In the one-frame period, a sub-frame period including the first unit period, the transition period, and the second unit period is repeated at least twice, and in the odd-numbered sub-frame period and the even-numbered sub-frame period in the one-frame period, the position where the light irradiated from the predetermined pixel reaches the display screen is different in the transition period. The projector according to claim 8.

10. The control circuit moves the first position and the second position based on the type of the image indicated by the input image signal. The projector according to any one of claims 1 to 9.

11. The image processing circuit identifies the type of the image using the luminance difference value between adjacent pixels and outputs type information indicating the identification result to the control circuit. The projector according to any one of claims 1 to 10.

12. An electro-optical panel in which a plurality of pixels that emit light based on an image signal are arranged, and an optical path shift element capable of changing the optical path of the light emitted from the plurality of pixels. A control method for a projector, comprising: During a first unit period among a plurality of unit periods included in one frame period, an input image signal is input. Supply the first image signal based on the input image signal as the image signal to the electro-optical panel during a second unit period after the first unit period among the plurality of unit periods, and control the state of the optical path shift element so that the light emitted from a predetermined pixel among the plurality of pixels reaches a first position on the display screen during the first unit period, and control the state of the optical path shift element so that the light irradiated from the predetermined pixel reaches a second position on the display screen during the second unit period, and control the state of the optical path shift element during a transition period in which the unit period transitions from the first unit period to the second unit period based on the type of the image indicated by the input image signal, and execute an overdrive process for compensating the response characteristics of the electro-optical panel, and adjust the compensation amount determined by the overdrive process based on the type of the image. A control method for a projector, characterized in that. A control method for a projector, comprising an electro-optical panel in which a plurality of pixels that emit light based on an image signal are arranged, and an optical path shift element capable of changing the optical path of the light emitted from the plurality of pixels, the method being such that during a first unit period among a plurality of unit periods included in one frame period, a first image signal based on an input image signal is supplied as the image signal to the electro-optical panel, and during a second unit period after the first unit period among the plurality of unit periods, a second image signal based on the input image signal is supplied as the image signal to the electro-optical panel, and during the first unit period, the state of the optical path shift element is controlled so that the light emitted from a predetermined pixel among the plurality of pixels reaches a display screen, Control the state of the optical path shift element so as to reach the first position of the surface, and in the second unit period control the state of the optical path shift element so that the light irradiated from the predetermined pixel reaches the second position of the display screen. In the transition period when the unit period transitions from the first unit period to the second unit period, control the state of the optical path shift element based on the type of the image indicated by the input image signal. In the transition period, control the state of the optical path shift element so that the light irradiated from the predetermined pixel reaches the third position of the display screen. In the transition period, generate a third image signal to be supplied to the electro-optical panel as the image signal based on the first image signal and the second image signal. A control method of a projector is characterized by the above. In the transition period, control the state of the optical path shift element so that the light irradiated from the predetermined pixel reaches the third position of the display screen. Control the state of the optical path shift element so that the light irradiated from the predetermined pixel reaches the third position of the display screen. In the transition period, generate a third image signal to be supplied to the electro-optical panel as the image signal based on the first image signal and the second image signal. A control method of a projector is characterized by generating a third image signal to be supplied to the electro-optical panel as the image signal based on the first image signal and the second image signal. A control method of a projector.

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