Method for manufacturing a polysilicon wafer

Abstract

To provide a method for manufacturing a polysilicon wafer capable of manufacturing polysilicon wafers with high reproducibility by reducing variation of a minute wafer shape even in different film formation devices and chambers.SOLUTION: A method for manufacturing a polysilicon wafer in which a polysilicon layer is deposited on a single crystal silicon substrate includes steps of: (1) depositing a first polysilicon layer on a single crystal silicon substrate at temperatures of 1000°C or lower by a CVD method; and (2) depositing a second polysilicon layer on the first polysilicon layer at temperatures higher than 1000°C by a CVD method. In the step (1), a value (%) of the in-plane film thickness distribution of the first polysilicon layer to be formed is controlled within a predetermined range, and the difference between the maximum value (%) and the minimum value (%) of the predetermined range is within 5.2 (%).SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a polysilicon wafer, and more particularly, to a method for manufacturing a polysilicon wafer capable of reproducibly controlling the wafer shape of a Poly-Si wafer.

Background Art

[0002] Since the noise characteristics of RF devices vary depending on the shape (Bow) of a polysilicon (Poly-Si) wafer, minute shape control is required. As a Poly-Si film formation process, a two-layer growth process (first layer: low-temperature deposition + second layer: high-temperature deposition) is widely known for improving productivity, and the wafer shape can be adjusted according to the film formation temperature and film thickness.

[0003] As a method for controlling the shape of a substrate, Patent Document 1 discloses a method of measuring the curved surface of a wafer, determining the curvature direction of the curved surface, and manufacturing by attaching polysilicon to one of the surfaces so that the warpage becomes small. Patent Document 2 describes a manufacturing method for suppressing the occurrence of warpage by making the shapes of the front and back surfaces the same when growing a SiC film on a carbon substrate by CVD.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0005] However, with conventional methods, it is difficult to perform minute shape adjustment, and it is necessary to reduce variations between film formation apparatuses and chambers.

[0006] The present invention has been made to solve the above problems, and an object thereof is to provide a method for manufacturing a polysilicon wafer that can reduce variations in the shape of a minute wafer and manufacture a polysilicon wafer with good reproducibility even when the film forming apparatus and the chamber are different.

Means for Solving the Problems

[0007] In order to solve the above problems, in the present invention, A method for manufacturing a polysilicon wafer in which a polysilicon layer is formed on a single crystal silicon substrate, (1) A step of forming a first polysilicon layer on a single crystal silicon substrate at a temperature of 1000 ° C. or lower by a CVD method, (2) A step of forming a second polysilicon layer on the first polysilicon layer at a temperature higher than 1000 ° C. by a CVD method, and In the step (1), the value (%) of the in-plane film thickness distribution of the first polysilicon layer to be formed is controlled within a predetermined range, and the difference between the maximum value (%) and the minimum value (%) of the predetermined range is set to 5.2 (%) or less. Provided is a method for manufacturing a polysilicon wafer.

[0008] With such a method for manufacturing a polysilicon wafer, even if the film forming apparatus and the chamber are different, it is possible to reduce variations in the shape of a minute wafer and manufacture a polysilicon wafer with good reproducibility.

[0009] In the step (1), it is preferable to control the maximum value (%) of the predetermined range to 1.5% or less.

[0010] By controlling the in-plane film thickness distribution in this way, it is possible to more stably reduce variations in the shape of a minute wafer and manufacture a polysilicon wafer with good reproducibility.

[0011] In addition, in the step (1), it is preferable to control the in-plane temperature distribution of the silicon single crystal substrate to control the in-plane film thickness distribution of the first polysilicon layer to be formed.

[0012] In this way, the control of the in-plane film thickness distribution of the first polysilicon layer can be easily performed.

[0013] Also, in the present invention, There is provided a method for manufacturing a polysilicon wafer for manufacturing a polysilicon wafer using two or more different manufacturing facilities, wherein in each of the two or more different manufacturing facilities, a method for manufacturing a polysilicon wafer is used to manufacture a polysilicon wafer using the above method for manufacturing a polysilicon wafer.

[0014] The method for manufacturing a polysilicon wafer of the present invention is extremely useful for mass-producing polysilicon wafers using two or more different manufacturing facilities.

Effects of the Invention

[0015] As described above, according to the method for manufacturing a polysilicon wafer of the present invention, even if the film forming apparatus and the chamber are different, it is possible to reduce the variation in the shape of the minute wafer and manufacture a polysilicon wafer with good reproducibility. In particular, the present invention is extremely beneficial in the mass production of Si wafers for RF devices that require precise control of the wafer shape.

Brief Description of the Drawings

[0016]

Figure 1

Figure 2

Figure 3

Figure 4

Embodiment for Carrying Out the Invention

[0017] In the two-layer growth process (the first layer: low-temperature deposition + the second layer: high-temperature deposition), the wafer shape can be adjusted according to the film formation temperature and film thickness. However, with these methods, it is difficult to make minute shape adjustments, and it has been difficult to make minute adjustments for variations between film formation apparatuses and chambers.

[0018] As a result of intensive studies on the above problems, the present inventors have found that by controlling the in-plane film thickness distribution of the first polysilicon layer within a predetermined range, minute shape adjustments can be made even when the film formation apparatus and chamber are different, and polysilicon wafers with the same level of wafer shape can be manufactured with good reproducibility, thus completing the present invention.

[0019] That is, the present invention is a method for manufacturing a polysilicon wafer having a polysilicon layer formed on a single-crystalline silicon substrate, comprising: (1) a step of forming a first polysilicon layer on the single-crystalline silicon substrate at a temperature of 1000 °C or lower by CVD; (2) a step of forming a second polysilicon layer on the first polysilicon layer at a temperature higher than 1000 °C by CVD, and in the step (1), the value (%) of the in-plane film thickness distribution of the first polysilicon layer to be formed is controlled within a predetermined range, and the difference between the maximum value (%) and the minimum value (%) of the predetermined range is within 5.2 (%).

[0020] Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.

[0021] [Method for Manufacturing Polysilicon Wafer] The method for manufacturing a polysilicon wafer of the present invention has steps (1) and (2). Hereinafter, it will be described in detail with reference to FIGS. 2 and 3.

[0022] <Step (1)> Step (1) is a step of forming a first polysilicon layer on a silicon single crystal substrate at a temperature of 1000 °C or lower by CVD method. In this step, the value (%) of the in-plane film thickness distribution of the first polysilicon layer to be formed is controlled within a predetermined range, and the difference between the maximum value (%) and the minimum value (%) within the predetermined range is set to 5.2 (%) or less.

[0023] The silicon single crystal substrate is not particularly limited. For example, it may be a CZ single crystal or an FZ single crystal, and may be doped or undoped. When doped, the type and concentration of the dopant are not particularly limited either. For example, in the case of n-type, it may be doped with P, Sb, or As, and in the case of p-type, it may be doped with B, Al, or Ga, etc. The diameter of the substrate is not particularly limited either. For example, it can be set to a diameter of 100 to 300 mm. There is also no particular limitation on the resistivity of the substrate, but for example, it can be a high resistivity of 5000 Ω·cm or more.

[0024] In this step, as shown in FIG. 2, film formation is performed by CVD method at a low temperature of 1000 °C or lower. The film formation temperature at this time is not particularly limited as long as it is 1000 °C or lower, but preferably it can be less than 980 °C. Also, there is no particular limitation on the lower limit of the film formation temperature, but for example, it can be 800 °C or higher. In this step, as shown in FIG. 3, a first polysilicon layer 2 serving as a seed layer is formed on the silicon single crystal substrate 1 by film formation at a low temperature.

[0025] At this time, by controlling the value (%) of the in-plane film thickness distribution of the first polysilicon layer 2 within the above-mentioned predetermined range, a polysilicon wafer with the desired warpage shape can be obtained after forming the second polysilicon layer in the subsequent step (2). On the other hand, if the value (%) of the in-plane film thickness distribution of the first polysilicon layer is not controlled within the above-mentioned predetermined range, even if the value (%) of the in-plane film thickness distribution of the second polysilicon layer is accurately controlled in the subsequent step (2), wafers with the same level of shape cannot be manufactured with good reproducibility.

[0026] The method for controlling the in-plane film thickness distribution of the first polysilicon layer to be formed is not particularly limited, and a conventionally known method may be used. For example, it is preferable to control the in-plane film thickness distribution of the first polysilicon layer to be formed by controlling the in-plane temperature distribution of the single-crystalline silicon substrate. The method for controlling the in-plane temperature distribution of the single-crystalline silicon substrate is not particularly limited either, and the function of a generally used film-forming apparatus may be used.

[0027] In the present invention, as the value (%) of the in-plane film thickness distribution, a value calculated by a known method may be used. For example, it can be a value obtained by the following formula. In-plane film thickness distribution (%) = (maximum film thickness - minimum film thickness) / (maximum film thickness + minimum film thickness) × 100

[0028] The predetermined range is not particularly limited as long as the difference between the maximum value (%) and the minimum value (%) of the range is within 5.2 (%). That is, the value (%) of the in-plane film thickness distribution of the first polysilicon layer itself may be high or low, as long as the value (%) of the in-plane film thickness distribution is accurately controlled. That is, the in-plane film thickness distribution (%) may be accurately controlled at a high value, or may be accurately controlled at a low value. So to speak, whether the in-plane film thickness distribution (%) of the first polysilicon layer is made uniform or deteriorated, as long as the film thickness distribution is at the same level, the wafer shape can be adjusted to the same level. The difference between the maximum value (%) and the minimum value (%) of the predetermined range can be 0 (%) or more. However, from the viewpoint of performing wafer manufacturing with better reproducibility, the difference between the maximum value (%) and the minimum value (%) of the predetermined range is preferably within 3%, more preferably within 1.5%, still more preferably within 1.0%, extremely preferably within 0.5%, and particularly preferably controlled to 0% (constant each time).

[0029] Also, the value (%) of the in-plane film thickness distribution of the first polysilicon layer to be formed can be controlled, for example, so that the maximum value (%) of the predetermined range is 10% or less. However, from the viewpoint of being able to more stably adjust the wafer shape to the same level, it is preferable to control it so that the maximum value (%) is 1.5% or less.

[0030] Hereinafter, more specific examples will be given and described for a predetermined range.

[0031] (Specific Example 1) When controlling so that the value (%) of the in-plane film thickness distribution of the first polysilicon layer becomes a constant value of 1.5%, since the maximum value of the predetermined range is 1.5 (%) and the minimum value is also 1.5 (%), the difference between the maximum value (%) and the minimum value (%) of the predetermined range is 0 (%).

[0032] (Specific Example 2) When controlling so that the value (%) of the in-plane film thickness distribution of the first polysilicon layer becomes 1.5% ± 0.5%, since the maximum value of the predetermined range is 2.0 (%) and the minimum value is 1.0 (%), the difference between the maximum value (%) and the minimum value (%) of the predetermined range is 1 (%).

[0033] (Specific Example 3) When controlling so that the value (%) of the in-plane film thickness distribution of the first polysilicon layer becomes a constant value of 6.8%, since the maximum value of the predetermined range is 6.8 (%) and the minimum value is also 6.8 (%), the difference between the maximum value (%) and the minimum value (%) of the predetermined range is 0 (%).

[0034] (Specific Example 4) When controlling so that the value (%) of the in-plane film thickness distribution of the first polysilicon layer becomes 6.8% ± 0.5%, since the maximum value of the predetermined range is 7.3 (%) and the minimum value is 6.3 (%), the difference between the maximum value (%) and the minimum value (%) of the predetermined range is 1 (%).

[0035] <Step (2)> Step (2) is a step of forming a second polysilicon layer on the first polysilicon layer at a temperature higher than 1000°C by CVD method.

[0036] In this process, as shown in FIG. 2, in order to increase the growth rate and productivity, a film is formed to a desired film thickness by CVD method at a high temperature higher than 1000°C. The film formation temperature at this time is not particularly limited as long as it is higher than 1000°C, but preferably can be 1050°C or higher. Also, there is no particular limitation on the upper limit of the film formation temperature, but for example, it can be 1200°C or lower. In this process, as shown in FIG. 3, a second polysilicon layer 3 is formed on the first polysilicon layer 2 by film formation at a high temperature, and a polysilicon wafer 4 can be obtained.

[0037] Regarding the second polysilicon layer as well, similar to the first polysilicon layer, it is preferable to control the in-plane film thickness distribution (%) within a predetermined range. By accurately controlling the in-plane film thickness distribution of the second polysilicon layer, wafers with the same level of shape can be manufactured with even better reproducibility.

[0038] Incidentally, the ratio of the thickness of the first polysilicon layer formed in step (1) to the thickness of the second polysilicon layer formed in step (2) can be arbitrary. However, since the growth rate of the polysilicon layer increases at higher temperatures, it is preferable from the viewpoint of productivity improvement to design the process so that the film formed in step (2) is thicker than that in step (1).

[0039] As described above, according to the present invention, even if the film forming apparatus and the chamber are different, it is possible to reduce the variation in the shape of the minute wafers and manufacture polysilicon wafers with good reproducibility.

[0040] [Method for manufacturing a polysilicon wafer for manufacturing a polysilicon wafer using two or more different manufacturing facilities] Further, the present invention provides a method for manufacturing a polysilicon wafer for manufacturing a polysilicon wafer using two or more different manufacturing facilities, wherein in each of the two or more different manufacturing facilities, a polysilicon wafer is manufactured using the above-described method for manufacturing a polysilicon wafer.

[0041] As described above, the method for manufacturing a polysilicon wafer of the present invention can reduce variations in the shape of a minute wafer and manufacture a polysilicon wafer with good reproducibility even if the film forming apparatus and the chamber are different. That is, polysilicon wafers of equivalent quality can be manufactured with good reproducibility regardless of the manufacturing equipment. Therefore, the method for manufacturing a polysilicon wafer of the present invention is particularly suitable for mass-producing polysilicon wafers simultaneously and in parallel using a plurality of manufacturing facilities.

Example

[0042] Hereinafter, the present invention will be specifically described using examples and comparative examples, but the present invention is not limited thereto.

[0043] In Examples 1 to 3 and Comparative Example 1 below, regarding the method for adjusting the film thickness distribution, the film thickness distribution was adjusted by adjusting the temperature distribution of the silicon single crystal substrate during polysilicon growth. However, in the present invention, the method for adjusting the film thickness distribution is not limited thereto.

[0044] A schematic diagram showing a single-wafer chemical vapor deposition apparatus (reactor) for growing poly-Si used in Examples 1 to 3 and Comparative Example 1 below is shown in Fig. 4. The chamber (reaction vessel) 12 of the chemical vapor deposition apparatus 10 is formed of a chamber base 11 and transparent quartz members 13 and 14 that sandwich the chamber base 11 from above and below. Inside this chamber 12, a susceptor 17 that supports a silicon single crystal substrate W on the upper wafer placement surface (counterbore portion) 19 is arranged. The susceptor 17 is provided with, for example, three or more through holes 16, and wafer lift pins 15 that are inserted into the through holes 16 and move up and down to place and separate the silicon single crystal substrate W are arranged. The susceptor 17 is connected to a wafer rotation mechanism 18, and during epitaxial growth, the susceptor 17 is rotated to rotate the placed silicon single crystal substrate W, and a poly-Si layer is grown on the silicon single crystal substrate W with a uniform film thickness. A gas introduction pipe 20 that introduces a chemical vapor deposition gas containing a source gas and a carrier gas (for example, hydrogen) into the chamber 12 and supplies the source gas and the carrier gas onto the surface of the silicon single crystal substrate W placed on the susceptor 17 is connected to the chamber 12. Further, a gas discharge pipe 21 that discharges gas from the chamber 12 is connected to the side of the chamber 12 opposite to the side where the gas introduction pipe 20 is connected.

[0045] (Example 1) The following experiments were carried out in two different reactors (RCT-A, RCT-B). A silicon single crystal substrate with a resistivity of 5000 Ω·cm or more and a diameter of 200 mm containing boron as an impurity was prepared. On the silicon single crystal substrate, a non-doped poly-Si film (first polysilicon layer) with a poly-Si film thickness of 0.3 μm (first layer) was grown using trichlorosilane (TCS) as the film-forming gas at a growth temperature of 870°C. Then, the growth temperature was changed to 1070°C, and a poly-Si wafer serving as a sample was manufactured by performing a CVD method in which a non-doped poly-Si film (second polysilicon layer) with a poly-Si film thickness of 1.9 μm (second layer) was continuously formed.

[0046] At this time, in the first film-forming process of RCT-A and B, the film thickness distribution was adjusted to 1.5% for both (the difference between the maximum value (%) and the minimum value (%) within the predetermined range was controlled to 0 (%)), and then the film thickness distribution of the second layer was also adjusted so that both RCT-A and B became 1.5%.

[0047] At this time, the wafer shape (Bow) of the Poly-Si wafer manufactured was measured. The results at that time are shown in Fig. 1. From Fig. 1, it was confirmed that the Bow values of the wafers manufactured by RCT-A and B were both about 4.35 μm, and it was possible to reproduce the same level of wafer shape by setting the film thickness distribution of the first layer of RCT-A and B to the same level.

[0048] The left figure in Fig. 1 is a figure in which the first layer was formed thicker than the original 0.3 μm (about 2.5 μm) to confirm the film thickness distribution of the first layer, and the film thickness within the wafer surface was plotted. Also, the horizontal axis of the left figure above indicates the film thickness measurement position, where CTR: the center of the wafer, R / 2: 50 mm from the center of the wafer, 10 mm: 90 mm from the center of the wafer (10 mm from the outer periphery). The right figure in Fig. 1 is the Bow value of the wafer when the film was formed according to the designed film thickness (0.3 μm for the first layer and 1.9 μm for the second layer). Note that whether the first layer is formed to the original 0.3 μm or thicker, the calculated value of the in-plane film thickness distribution (%) is theoretically the same value.

[0049] (Example 2) A Poly-Si wafer was manufactured in the same manner as in Example 1, except that in the first film-forming process of RCT-A, the film thickness distribution was adjusted to 1.5%, and in the first film-forming process of RCT-B, the film thickness distribution was adjusted to 6.7% (the difference between the maximum value (%) and the minimum value (%) within the predetermined range was controlled to 5.2 (%)). In addition, the film thickness distribution of the second layer was also adjusted so that both RCT-A and B became 1.5%, the same as in Example 1.

[0050] When measuring the wafer shape (Bow) of the Poly-Si wafers manufactured in Example 2, the Bow values of the wafers manufactured by RCT-A and B were both about 4.35 μm, and wafers with the same level of shape (Bow) were obtained with RCT-A and RCT-B.

[0051] (Example 3) A Poly-Si wafer was manufactured in the same manner as in Example 1, except that the film thickness distribution was adjusted to 6.8% in the first film formation step of RCT-A and the film thickness distribution was adjusted to 6.8% in the first film formation step of RCT-B (controlling the difference between the maximum value (%) and the minimum value (%) within the predetermined range to 0 (%)). In addition, the film thickness distribution of the second layer was also adjusted to 1.5% for both RCT-A and B, as in Example 1.

[0052] When measuring the wafer shape (Bow) of the Poly-Si wafers manufactured in Example 3, the Bow values of the wafers manufactured by RCT-A and B were both about 3.20 μm, and wafers with the same level of shape (Bow) were obtained with RCT-A and RCT-B.

[0053] (Comparative Example 1) A Poly-Si wafer was manufactured in the same manner as in Example 1, except that the film thickness distribution was adjusted to 1.5% in the first film formation step of RCT-A and the film thickness distribution was adjusted to 6.8% in the first film formation step of RCT-B (controlling the difference between the maximum value (%) and the minimum value (%) within the predetermined range to 5.3 (%)). In addition, the film thickness distribution of the second layer was also adjusted to 1.5% for both RCT-A and B, as in Example 1.

[0054] The wafer shape (Bow) of the Poly-Si wafer manufactured at this time was measured. The results at that time are shown in Fig. 1. From Fig. 1, the Bow of the wafer manufactured by RCT-A was about 4.35 μm, while the Bow of the wafer manufactured by RCT-B was about 3.20 μm. It was confirmed that different wafer shapes were obtained because the in-plane film thickness distribution of the first polysilicon layer was not controlled within the range where the difference between the maximum value (%) and the minimum value (%) was within 5.2 (%).

[0055] This specification includes the following inventions. [1]: A method for manufacturing polysilicon wafers in which a polysilicon layer is formed on a silicon single crystal substrate. (1) A method for manufacturing a silicon single crystal substrate, comprising the steps of: (a) depositing a silicon single crystal substrate at a temperature of 1000° C. or higher by a CVD method; (2) depositing a first polysilicon layer at a temperature below 1000.degree. C.; A second polysilicon layer is formed on the silicon layer by a CVD method at a temperature higher than 1000°C. and forming a film of the first polyimide in the step (1). The in-plane film thickness distribution value (%) of the silicon layer is controlled within a predetermined range. , and the difference between the maximum value (%) and the minimum value (%) of the predetermined range is 5.2 (%) 4. A method for producing a polysilicon wafer, comprising the steps of: [2]: In the step (1), the maximum value (%) of the predetermined range is set to 1.5% or less. 2. The method for producing a polysilicon wafer according to claim 1, wherein the temperature is controlled to be . [3] In the step (1), a temperature distribution in the surface of the silicon single crystal substrate is controlled. By this, the in-plane film thickness distribution of the first polysilicon layer to be formed is controlled. The method for producing a polysilicon wafer according to the above [1], [4] In the step (1), a temperature distribution in the surface of the silicon single crystal substrate is controlled. By this, the in-plane film thickness distribution of the first polysilicon layer to be formed is controlled. The method for producing a polysilicon wafer according to the above [2], [5]: A policy for manufacturing polysilicon wafers using two or more different manufacturing facilities. A method for manufacturing a silicon wafer, comprising the steps of: The polysilicone according to the above [1], [2], [3], or [4] is used. A method for manufacturing a polysilicon wafer, characterized by manufacturing the polysilicon wafer using a method for manufacturing a wafer. A method for manufacturing a polysilicon wafer.

[0056] Note that the present invention is not limited to the above-described embodiments. The above-described embodiments are examples, and any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and exhibits the same operational effects is included in the technical scope of the present invention.

Explanation of Reference Numerals

[0057] 1... Silicon single crystal substrate, 2... First polysilicon layer, 3... Second polysilicon layer, 4... Polysilicon wafer, 10... Chemical vapor deposition apparatus, 11... Chamber base, 12... Chamber, 13, 14... Transparent quartz members, 15... Wafer lift pin, 16... Through hole, 17... Susceptor, 18... Wafer rotation mechanism, 19... Wafer placement surface, 20... Gas introduction pipe, 21... Gas discharge pipe. W... Silicon single crystal substrate.

Claims

1. A method for manufacturing a polysilicon wafer having a polysilicon layer formed on a single-crystal silicon substrate, comprising: (1) a step of forming a first polysilicon layer on the single-crystal silicon substrate at a temperature of 1000°C or lower by CVD method; (2) a step of forming a second polysilicon layer on the first polysilicon layer at a temperature higher than 1000°C by CVD method; and in the step (1), the value (%) of the in-plane film thickness distribution of the first polysilicon layer to be formed is controlled within a predetermined range, and the difference between the maximum value (%) and the minimum value (%) of the predetermined range is 5.2 (%) or less. A method for manufacturing a polysilicon wafer, characterized in that.

2. The method for manufacturing a polysilicon wafer according to claim 1, wherein in the step (1), the maximum value (%) of the predetermined range is controlled to 1.5% or less.

3. The method for manufacturing a polysilicon wafer according to claim 1, wherein in the step (1), the in-plane film thickness distribution of the first polysilicon layer to be formed is controlled by controlling the in-plane temperature distribution of the single-crystal silicon substrate.

4. The method for manufacturing a polysilicon wafer according to claim 2, wherein in the step (1), the in-plane film thickness distribution of the first polysilicon layer to be formed is controlled by controlling the in-plane temperature distribution of the single-crystal silicon substrate.

5. A method for manufacturing a polysilicon wafer for manufacturing a polysilicon wafer using two or more different manufacturing facilities, In each of the two or more different manufacturing facilities, a polysilicon wafer is manufactured using the method for manufacturing a polysilicon wafer according to any one of claims 1 to 4. A method for manufacturing a polysilicon wafer, characterized in that.

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