Resource Configuration Method and Apparatus, Computer Storage Medium

Abstract

The present invention provides a resource configuration method and apparatus, and a computer storage medium, in which when the remaining minimum system information control resource set and related synchronization information block adopt a time division multiplexing mode, the configuration of the remaining minimum system information control resource set becomes more flexible and can be applied to more application scenarios. [Solution] The resource configuration method includes a step of determining that the remaining minimum system information control resource set RMSI CORESET and associated synchronization information blocks SS Blocks occupy different symbols for transmission in time division multiplexing mode, and a step of determining configuration parameters for the RMSI CORESET and associated SS Blocks, wherein the configuration parameters of the remaining minimum system information control resource sets associated with all SS Blocks in each SS Block burst set are the same.

Description

Technical Field

[0001] Cross-reference to Related Applications This application claims priority to a Chinese patent application filed with the Chinese Patent Office on November 14, 2017, with application number 201711123018.0 and invention title "Resource Configuration Method and Apparatus, Computer Storage Medium", and incorporates the entire disclosure thereof herein.

[0002] The present invention relates to the field of communication technologies, and particularly to a resource configuration method and apparatus, and a computer storage medium.

Background Art

[0003] Minimum system information (MSI) is the system information required for a terminal to perform an initial access. A part of the minimum system information is transmitted through a new radio (NR)-physical broadcast channel (PBCH), abbreviated as NR-PBCH for short, and the remaining minimum system information (RMSI) is configured to transmit and receive data under the control of being transmitted through NR-PDSCH. Further, the NR-PDSCH for transmitting RMSI is scheduled by NR-PDCCH. This NR-PDCCH (used to schedule the NR-PDSCH for carrying RMSI) is indicated by the configuration information of the RMSI control resource set (CORESET). Here, the configuration information of the RMSI CORESET is transmitted through NR-PBCH. As described in the current standard, the maximum bit width of the configuration information of the RMSI CORESET is 8 bits.

[0004] Each RMSI CORESET is associated with one synchronization signal block (SS Block). There are two multiplexing modes for the RMSI CORESET and the SS Block, namely Frequency Division Multiplexing (FDM) and Time Division Multiplexing (TDM). Here, the RMSI CORESET associated with the SS Block is transmitted in different symbols in the time domain during time division multiplexing. If the system cannot support the frequency division multiplexing mode, it is necessary to support the time division multiplexing mode.

Prior Art Documents

Non-Patent Documents

[0005]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] Embodiments of the present invention provide a resource configuration method, apparatus, and computer storage medium to make the configuration of the remaining minimum system information control resource set more flexible and applicable to more application scenarios when the remaining minimum system information control resource set and related synchronization information block use the time division multiplexing mode.

Means for Solving the Problems

[0007] The resource configuration method provided by the embodiments of the present invention is Determining that the remaining minimum system information control resource set RMSI CORESET and related synchronization information blocks SS Block transmit while occupying different symbols in a time-division multiplexing mode; Determining the configuration parameters of the RMSI CORESET and related SS Block; and The configuration parameters of the remaining minimum system information control resource sets related to all SS Blocks within each SS Block burst set are the same.

[0008] In this method, it is determined that the remaining minimum system information control resource set RMSI CORESET and related synchronization information blocks SS Block transmit while occupying different symbols in a time-division multiplexing mode, and the configuration parameters of the RMSI CORESET and related SS Block are determined. Here, the configuration parameters of the remaining minimum system information control resource sets related to all SS Blocks within each SS Block burst set are the same. Thereby, when the remaining minimum system information control resource set and related synchronization information blocks use the time-division multiplexing mode, the configuration of the remaining minimum system information control resource set becomes more flexible and can be applied to more application scenarios.

[0009] Optionally, the configuration parameters of the RMSI CORESET include The bandwidth occupied by the RMSI CORESET, The time-domain position of the RMSI CORESET, The frequency-domain position of the RMSI CORESET, and One or a combination of the number of consecutive or discontinuous time-domain symbols occupied by the RMSI CORESET.

[0010] Optionally, if the configuration parameters of the RMSI CORESET include the frequency domain position of the RMSI CORESET, the frequency domain positions of the RMSI CORESET and the associated SS Block satisfy any of the following relationships: The configured RMSI CORESET and the associated SS Block share a center frequency domain position, The frequency domain position of the entire configured RMSI CORESET is below the frequency domain position of the associated SS Block, The frequency domain position of the entire configured RMSI CORESET is above the frequency domain position of the associated SS Block.

[0011] Optionally, if the configuration parameters of the RMSI CORESET include the frequency domain position of the RMSI CORESET, the frequency domain position of the RMSI CORESET is a relative offset value with respect to the frequency domain position of the associated SS Block.

[0012] Optionally, the relative offset value is a predetermined value. Optionally, the relative offset value is a different value in different frequency bands or frequency ranges.

[0013] Optionally, the relative offset value is represented by c, and the value of c is as follows and is used to indicate the following different information respectively: When c = 0, it indicates that the center frequencies of the RMSI CORESET and the associated SS Block are aligned, When c = 1, it indicates that the start positions of the frequency domains of the RMSI CORESET and the associated SS Block are aligned, When c = 2, it indicates that the end positions of the frequency domains of the RMSI CORESET and the associated SS Block are aligned, When c = 3, the end position of the frequency domain of the RMSI CORESET aligns with the end position of the minimum carrier bandwidth of the terminal, indicating that the start position of the frequency domain of the related SS Block aligns with the start position of the minimum carrier bandwidth of the terminal. When c = 4, the start position of the frequency domain of the RMSI CORESET aligns with the start position of the minimum carrier bandwidth of the terminal, indicating that the end position of the frequency domain of the related SS Block aligns with the end position of the minimum carrier bandwidth of the terminal. Here, the minimum carrier bandwidth of the terminal is pre-set.

[0014] Optionally, when the configuration parameters of the RMSI CORESET include the time domain position of the RMSI CORESET, if the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {15, 15} kHz, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET precedes the time domain position of the related SS Block. The RMSI CORESET occupies one time domain symbol, and the time domain position of the RMSI CORESET is offset by -1 from the time domain position of the related SS Block, or The RMSI CORESET occupies one time domain symbol, and the time domain position of the RMSI CORESET is offset by -2 from the time domain position of the related SS Block, or The RMSI CORESET occupies two time domain symbols, and the time domain position of the RMSI CORESET is offset by -2 from the time domain position of the related SS Block. Configuration 2: The time domain position of the RMSI CORESET is after the time domain position of the related SS Block. The RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block, or The RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block, or The RMSI CORESET occupies two time-domain symbols, and the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block Configuration 3: The time-domain position of the RMSI CORESET associated with the SS Block with an even index precedes the time-domain position of this SS Block, and the time-domain position of the RMSI CORESET associated with the SS Block with an odd index is behind the time-domain position of this SS Block The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index,2)={0} is satisfied, the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block. When mod(SSB Index,2)={1} is satisfied, the time-domain position of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block; or The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index,2)={0} is satisfied, the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block. When mod(SSB Index,2)={1} is satisfied, the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block, or The RMSI CORESET occupies two time-domain symbols. When mod(SSB Index,2) = {0} is satisfied, the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block. When mod(SSB Index,2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block. Configuration 4: The time-domain position of the RMSI CORESET associated with an SS Block having an even index is behind the time-domain position of this SS Block, and the time-domain position of the RMSI CORESET associated with an SS Block having an odd index is in front of the time-domain position of this SS Block. The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index,2) = {0} is satisfied, the time-domain position phase of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block. When mod(SSB Index,2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block. Here, SSB is the SS Block and Index is the index.

[0015] Optionally, when the configuration parameters of the RMSI CORESET include the time-domain position of the RMSI CORESET, if the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {15, 30} kHz, the time-domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time-domain position of the RMSI CORESET is in front of the time-domain position of the associated SS Block, and the time-domain position of the RMSI CORESET is offset by -B from the time-domain position of the associated SS Block. Configuration 2: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block, and the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block. Configuration 3: The time domain position of the RMSI CORESET associated with an SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by -B from the time domain position of the associated SS Block. The time domain position of the RMSI CORESET associated with an SS Block having an odd index is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block. Here, B is a predetermined number of consecutive time domain symbols occupied by the RMSI CORESET.

[0016] Optionally, when the configuration parameters of the RMSI CORESET include the time domain position of the RMSI CORESET, if the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS, {SS Block SCS, RMSI CORESET SCS}, is {30, 30} or {120, 120} kHz, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with an SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with an SS Block having an odd index is behind the time domain position of this SS Block. Configuration 2: When mod(SSB Index, 4) = {0, 2} is satisfied, the time domain position of the RMSI CORESET is offset by -B from the time domain position of the associated SS Block, where SSB is the SS Block. Configuration 3: When mod(SSBIndex, 4) = {1, 3} is satisfied, the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block, where B is a predetermined number of consecutive time domain symbols occupied by the RMSI CORESET, and Index is an index.

[0017] Optionally, when the configuration parameters of the RMSI CORESET include the time domain position of the RMSI CORESET, the time domain position of the RMSI CORESET may adopt any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with an SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with an SS Block having an odd index is behind the time domain position of this SS Block. When mod(SSB Index, 4) = {0, 2} is satisfied, the time domain position of the RMSI CORESET is offset by -1 from the time domain position of the associated SS Block, where SSB is an SS Block. When mod(SSB Index, 4) = {1, 3} is satisfied, the time domain position phase of the RMSI CORESET is offset by +1 from the time domain position of the associated SS Block. Configuration 2: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block. When mod(SSB Index, 4) = {0, 2} is satisfied, the time domain position of the RMSI CORESET is offset by -2 from the time domain position of the associated SS Block. When mod(SSB Index, 4) = {1, 3} is satisfied, the time domain position of the RMSI CORESET is offset by -5 from the time domain position of the associated SS Block. Configuration 3: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block. When mod(SSB Index,4)={0,2} is satisfied, the time domain position of the RMSI CORESET is offset by k + 4 in the time domain position of the associated SS Block. When mod(SSB Index,4)={1,3} is satisfied, the time domain position of the RMSI CORESET is offset by +5 from the time domain position of the associated SS Block. Here, Index is the index.

[0018] Optionally, when the configuration parameter of the RMSI CORESET includes the time domain position of the RMSI CORESET, if the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {240,120} kHz, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with the SS Block with an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with the SS Block with an odd index is behind the time domain position of this SS Block. When mod(SSB Index,4)={0,1} is satisfied, the time domain position of the RMSI CORESET is offset by -2 or -3 120 kHz time domain symbols from the time domain position of the associated SS Block. When mod(SSB Index,4)={2,3} is satisfied, the time domain position of the RMSI CORESET is offset by +4 or +3 120 kHz time domain symbols from the time domain position of the associated SS Block. Configuration 2: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block. When mod(SSB Index, 4) = n is satisfied, the time domain position of the RMSI CORESET is offset by -((4 - n) + 2*n) 120 kHz time domain symbols from the time domain position of the associated SS Block. Configuration 3: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block. When mod(SSB Index, 4) = n is satisfied, the time domain position of the RMSI CORESET is offset by +(n + 2*(4 - n)) 120 kHz time domain symbols from the time domain position of the associated SS Block. Here, SSB is the SS Block and Index is the index.

[0019] Optionally, when the configuration parameters of the RMSI CORESET include the time domain position of the RMSI CORESET, if the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {240, 60} kHz, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with an SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with an SS Block having an odd index is behind the time domain position of this SS Block. When mod(SSB Index, 4) = n = {0, 1} is satisfied, the time domain of the RMSI CORESET is offset by -(n + 1) 60 kHz time domain symbols from the time domain position of the associated SS Block. When mod(SSB Index, 4) = n = {2, 3} is satisfied, the time domain position of the RMSI CORESET is offset by +(4 - n) 60 kHz time domain symbols from the time domain position of the associated SS Block. Configuration 2: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block. When mod(SSB Index, 4) = n = {0, 1} is satisfied, the time domain position of the RMSI CORESET is offset by -(2 + n) 60 kHz time domain symbols from the time domain position of the associated SS Block. When mod(SSB Index, 4) = n = {2, 3} is satisfied, the time domain position of the RMSI CORESET is offset by -(1 + n) 60 kHz time domain symbols from the time domain position of the associated SS Block. Configuration 3: The time domain position of the RMSI CORESET is after the time domain position of the associated SS Block. When mod(SSB Index, 4) = n = {0, 1} is satisfied, the time domain position of the RMSI CORESET is offset by (4 - n) 60 kHz time domain symbols from the time domain position of the associated SS Block. When mod(SSB Index, 4) = n = {2, 3} is satisfied, the time domain position of the RMSI CORESET is offset by (5 - n) 60 kHz time domain symbols from the time domain position of the associated SS Block. Here, SSB is the SS Block and Index is the index.

[0020] Optionally, determining the RMSI CORESET and the associated SS Block configuration parameters, for the case of the same or different SS Block subcarrier spacing (SCS) and RMSI CORESET SCS configuration scenarios, if the SS Block is not actually transmitted, the time domain position where the SS Block is not actually transmitted is configured for the RMSI CORESET.

[0021] Optionally, if the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {240,120} or {240,60} kHz, one SS Block position for every eight SS blocks is the time domain position of the RMSI CORESET.

[0022] Optionally, if the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {240,120} kHz, the time domain position of the RMSI CORESET adopts the following configuration: The candidate SS Block time domain position where the index is mod(SSB Index,7) is configured for the RMSI CORESET, and the number of time domain symbols occupied by the RMSI CORESET is B={1,2} time domain symbols, where When the SS Block index satisfies mod(SSB Index,8)={0,1}, the time domain position of the associated RMSI CORESET precedes the time domain position of this SS Block and is offset only by the time domain of the RMSI CORESET When the SS Block index satisfies mod(SSB Index,8)={2,3}, the time domain position of the associated RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by (2*(4-n)+(n-2)*B) 120 kHz time domain symbols from the time domain position of the associated SS Block. When the SS Block index satisfies mod(SSB Index,8)={4,5,6}, the time domain position of the associated RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by (2*(7-n)+(n-4)*B) 120 kHz time domain symbols from the time domain position of the associated SS Block. Here, SSB is the SS Block, Index is the index, and n is a predetermined value.

[0023] Optionally, when the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {240, 60} kHz, the time domain position of the RMSI CORESET adopts the following configuration: The time domain position of the candidate SS Block where the index is mod(SSB Index, 7) is configured with respect to the RMSI CORESET, and the number of time domain symbols occupied by the RMSI CORESET is B = {1} time domain symbol, where When the SS Block index satisfies mod(SSB Index, 8) = {0, 1}, the time domain position of the associated RMSI CORESET precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset from the time domain position of the associated SS Block by only two 120 kHz time domain symbols. When the SS Block index satisfies mod(SSB Index, 8) = {2, 3}, the time domain position of the associated RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset from the time domain position of the associated SS Block by only two 120 kHz time domain symbols. When the SS Block index satisfies mod(SSB Index, 8) = {4, 5, 6}, the time domain position of the associated RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset from the time domain position of the associated SS Block by only three 120 kHz time domain symbols. Here, SSB is the SS Block and Index is the index.

[0024] Optionally, the configuration parameters of the RMSI CORESET include the total number of physical resource blocks (PRBs) occupied by the RMSI CORESET, and the number of PRBs is a list of discrete candidate sets.

[0025] Optionally, the discrete candidate set is {48, 72, 96}. Optionally, when the configuration parameters of the RMSI CORESET include the combination of the bandwidth occupied by the RMSI CORESET and the number of consecutive time domain symbols occupied by the RMSI CORESET, the combination is specifically one of the following: {48 PRBs, 1 time domain symbol}, and {72 PRBs, 1 time domain symbol}, and {96 PRBs, 1 time domain symbol}, and {24 PRBs, 2 consecutive time domain symbols}, and {36 PRBs, 2 consecutive time domain symbols}, and {48 PRBs, 2 consecutive time domain symbols}, and {16 PRBs, 3 consecutive time domain symbols}, and {24 PRBs, 3 consecutive time domain symbols}, and {32 PRBs, 3 consecutive time domain symbols}, and {12 PRBs, 4 consecutive time domain symbols}, and {18 PRBs, 4 consecutive time domain symbols}, and {24 PRBs, 4 consecutive time domain symbols}, and The PRBs represent a plurality of physical resource blocks.

[0026] The resource configuration apparatus provided by the embodiments of the present invention includes a memory configured to store program instructions, and a processor configured to call the program instructions stored in the memory and execute the following processes according to the obtained program. The processor determines that the remaining minimum system information control resource set RMSI CORESET and the related synchronization information block SS Block occupy and transmit different symbols in a time-division multiplexing mode, determines the RMSI CORESET and the related SS Block configuration parameters, where the configuration parameters of the remaining minimum system information control resource set related to all SS Blocks within each SS Block burst set are the same.

[0027] Optionally, the configuration parameters of the RMSI CORESET include the bandwidth occupied by the RMSI CORESET, the time domain position of the RMSI CORESET, the frequency domain position of the RMSI CORESET, one or a combination of the number of consecutive or discontinuous time domain symbols occupied by the RMSI CORESET.

[0028] Optionally, when the configuration parameters of the RMSI CORESET include the frequency domain position of the RMSI CORESET, the frequency domain positions of the RMSI CORESET and the related SS Block satisfy any of the following relationships: The configured RMSI CORESET and the related SS Block share a center frequency domain position, the frequency domain position of the entire configured RMSI CORESET is below the frequency domain position of the related SS Block, the frequency domain position of the entire configured RMSI CORESET is above the frequency domain position of the related SS Block.

[0029] Optionally, when the configuration parameters of the RMSI CORESET include the frequency domain position of the RMSI CORESET, the frequency domain position of the RMSI CORESET is a relative offset value with respect to the frequency domain position of the related SS Block.

[0030] Optionally, the relative offset value is a predetermined value. Optionally, the relative offset value is different values in different frequency bands or frequency ranges.

[0031] Optionally, the relative offset value is represented by c, and the value of c is as follows and is used to indicate the following different information respectively: When c = 0, it indicates that the center frequencies of the SS Blocks associated with the RMSI CORESET are aligned. When c = 1, it indicates that the start positions of the frequency regions of the SS Blocks associated with the RMSI CORESET are aligned. When c = 2, it indicates that the end positions of the frequency regions of the SS Blocks associated with the RMSI CORESET are aligned. When c = 3, it indicates that the end position of the frequency region of the RMSI CORESET and the end position of the minimum carrier bandwidth of the terminal are aligned, but the start position of the frequency region of the associated SS Block and the start position of the minimum carrier bandwidth of the terminal are aligned. When c = 4, it indicates that the start position of the frequency region of the RMSI CORESET and the start position of the minimum carrier bandwidth of the terminal are aligned, but the end position of the frequency region of the associated SS Block and the end position of the minimum carrier bandwidth of the terminal are aligned. Here, the minimum carrier bandwidth of the terminal is set in advance.

[0032] Optionally, when the configuration parameter of the RMSI CORESET includes the time domain position of the RMSI CORESET, if the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {15, 15} kHz, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block. The RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block, or The RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block, or The RMSI CORESET occupies two time-domain symbols, and the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block, Configuration 2: The time-domain position of the RMSI CORESET is after the time-domain position of the associated SS Block, The RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block, or The RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block, or The RMSI CORESET occupies two time-domain symbols, and the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block, Configuration 3: The time-domain position of the RMSI CORESET associated with an SS Block having an even index precedes the time-domain position of this SS Block, and the time-domain position of the RMSI CORESET associated with an SS Block having an odd index is after the time-domain position of this SS Block, The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index,2)={0} is satisfied, the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block. When mod(SSB Index,2)={1} is satisfied, the time-domain position of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block; or, The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index,2)={0} is satisfied, the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block. When mod(SSB Index,2)={1} is satisfied, the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block; or, The RMSI CORESET occupies two time-domain symbols. When mod(SSB Index,2)={0} is satisfied, the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block. When mod(SSB Index,2)={1} is satisfied, the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block. Configuration 4: The time-domain position of the RMSI CORESET associated with an SS Block having an even index is behind the time-domain position of this SS Block, and the time-domain position of the RMSI CORESET associated with an SS Block having an odd index is ahead of the time-domain position of this SS Block. The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index,2)={0} is satisfied, the time-domain position of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block. When mod(SSB Index,2)={1} is satisfied, the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block. Here, SSB is the SS Block and Index is the index.

[0033] Optionally, if the configuration parameter of the RMSI CORESET includes the time domain position of the RMSI CORESET, when the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {15, 30} kHz, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block, and the time domain position of the RMSI CORESET is offset by -B from the time domain position of the associated SS Block. Configuration 2: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block, and the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block. Configuration 3: The time domain position of the RMSI CORESET associated with the SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by -B from the time domain position of the associated SS Block. The time domain position of the RMSI CORESET associated with the SS Block having an odd index is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block. Here, B is the predetermined number of consecutive time domain symbols occupied by the RMSI CORESET.

[0034] Optionally, if the configuration parameters of the RMSI CORESET include the time domain position of the RMSI CORESET, when the combination {SS Block subcarrier spacing (SCS), RMSI CORESET SCS} is {30, 30} or {120, 120} kHz, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with the SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with the SS Block having an odd index is behind the time domain position of this SS Block. Configuration 2: When mod(SSB Index, 4) = {0, 2} is satisfied, the time domain position of the RMSI CORESET is offset by -B from the time domain position of the associated SS Block, where SSB is the SS Block. Configuration 3: When mod(SSBIndex, 4) = {1, 3} is satisfied, the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block. Here, B is a predetermined number of consecutive time domain symbols occupied by the RMSI CORESET, and Index is the index.

[0035] Optionally, there may be a case where the configuration parameters of the RMSI CORESET include the time domain position of the RMSI CORESET, and the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with the SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with the SS Block having an odd index is behind the time domain position of this SS Block. When mod(SSB Index, 4) = {0, 2} is satisfied, the time domain position of the RMSI CORESET is offset by -1 from the time domain position of the associated SS Block, where SSB is the SS Block, When mod(SSB Index, 4) = {1, 3} is satisfied, the time domain position phase of the RMSI CORESET is offset by +1 from the time domain position of the associated SS Block, Configuration 2: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block, When mod(SSB Index, 4) = {0, 2} is satisfied, the time domain position of the RMSI CORESET is offset by -2 from the time domain position of the associated SS Block, When mod(SSB Index, 4) = {1, 3} is satisfied, the time domain position of the RMSI CORESET is offset by -5 from the time domain position of the associated SS Block, Configuration 3: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block, When mod(SSB Index, 4) = {0, 2} is satisfied, the time domain position of the RMSI CORESET is offset by +4 from the time domain position k of the associated SS Block, When mod(SSB Index, 4) = {1, 3} is satisfied, the time domain position of the RMSI CORESET is offset by +5 from the time domain position of the associated SS Block, where Index is the index.

[0036] Optionally, when the configuration parameter of the RMSI CORESET includes the time domain position of the RMSI CORESET, if the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {240, 120} kHz, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with the SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with the SS Block having an odd index is behind the time domain position of this SS Block. When mod(SSB Index,4)={0,1} is satisfied, the time domain position of the RMSI CORESET is offset by -2 or -3 120kHz time domain symbols from the time domain position of the associated SS Block. When mod(SSB Index,4)={2,3} is satisfied, the time domain position of the RMSI CORESET is offset by +4 or +3 120kHz time domain symbols from the time domain position of the associated SS Block. Configuration 2: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block. When mod(SSB Index,4)= n is satisfied, the time domain position of the RMSI CORESET is offset by -((4-n) + 2*n) 120kHz time domain symbols from the time domain position of the associated SS Block. Configuration 3: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block. When mod(SSB Index,4)= n is satisfied, the time domain position of the RMSI CORESET is offset by +( n + 2*(4-n)) 120kHz time domain symbols from the time domain position of the associated SS Block. Here, SSB is the SS Block and Index is the index.

[0037] Optionally, when the configuration parameter of the RMSI CORESET includes the time domain position of the RMSI CORESET, if the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS, {SS Block SCS, RMSI CORESET SCS}, is {240, 60} kHz, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with the SS Block with an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with the SS Block with an odd index is behind the time domain position of this SS Block. When mod(SSB Index, 4) = n = {0, 1} is satisfied, the time domain of the RMSI CORESET is offset by -(n + 1) 60 kHz time domain symbols from the time domain position of the associated SS Block. When mod(SSB Index, 4) = n = {2, 3} is satisfied, the time domain position of the RMSI CORESET is offset by +(4 - n) 60 kHz time domain symbols from the time domain position of the associated SS Block. Configuration 2: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block. When mod(SSB Index, 4) = n = {0, 1} is satisfied, the time domain position of the RMSI CORESET is offset by -(2 + n) 60 kHz time domain symbols from the time domain position of the associated SS Block. When mod(SSB Index, 4) = n = {2, 3} is satisfied, the time domain position of the RMSI CORESET is offset by -(1 + n) 60 kHz time domain symbols from the time domain position of the associated SS Block. Configuration 3: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block. When mod(SSB Index, 4) = n = {0, 1} is satisfied, the time domain position of the RMSI CORESET is offset from the time domain position of the associated SS Block by only (4 - n) 60 kHz time domain symbols. When mod(SSB Index, 4) = n = {2, 3} is satisfied, the time domain position of the RMSI CORESET is offset from the time domain position of the associated SS Block by only (5 - n) 60 kHz time domain symbols. Here, SSB is the SS Block and Index is the index.

[0038] Optionally, determining the RMSI CORESET and the associated SS Block configuration parameters, in the case of the same or different SS Block sub - carrier spacing (SCS) and RMSI CORESET SCS configurations, if the SS Block is not actually transmitted, the time domain position where the SS Block is not actually transmitted is configured for the RMSI CORESET. Optionally, if the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block sub - carrier spacing (SCS) and the RMSI CORESET SCS is {240, 120} or {240, 60} kHz, one SS Block position for every 8 SS blocks is the time domain position of the RMSI CORESET.

[0039] Optionally, if the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block sub - carrier spacing (SCS) and the RMSI CORESET SCS is {240, 120} kHz, the time domain position of the RMSI CORESET adopts the following configuration: The candidate SS Block time domain position where the index is mod(SSB Index, 7) is configured for the RMSI CORESET, and the number of time domain symbols occupied by the RMSI CORESET is B = {1, 2} time domain symbols, where When the SS Block index satisfies mod(SSB Index,8)={0,1}, the time domain position of the related RMSI CORESET precedes the time domain position of this SS Block and is offset only by the time domain of the RMSI CORESET. When the SS Block index satisfies mod(SSB Index,8)={2,3}, the time domain position of the related RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by (2*(4-n)+(n-2)*B) 120kHz time domain symbols from the time domain position of the related SS Block. When the SS Block index satisfies mod(SSB Index,8)={4,5,6}, the time domain position of the related RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by (2*(7-n)+(n-4)*B) 120kHz time domain symbols from the time domain position of the related SS Block. Here, SSB is the SS Block, Index is the index, and n is a predetermined value.

[0040] Optionally, when the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {240,60}kHz, the time domain position of the said RMSI CORESET adopts the following configuration: The time domain position of the candidate SS Block with the index mod(SSB Index,7) is configured for the RMSI CORESET, and the number of time domain symbols occupied by the RMSI CORESET is B={1} time domain symbol, where When the SS Block index satisfies mod(SSB Index,8)={0,1}, the time domain position of the related RMSI CORESET precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset from the time domain position of the related SS Block by only two 120 kHz time domain symbols. When the SS Block index satisfies mod(SSB Index,8)={2,3}, the time domain position of the related RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset from the time domain position of the related SS Block by only two 120 kHz time domain symbols. When the SS Block index satisfies mod(SSB Index,8)={4,5,6}, the time domain position of the related RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset from the time domain position of the related SS Block by only three 120 kHz time domain symbols. Here, SSB is the SS Block and Index is the index.

[0041] Optionally, the configuration parameters of the RMSI CORESET include the total number of physical resource blocks (PRBs) occupied by the RMSI CORESET, and the number of PRBs is a list of discrete candidate sets.

[0042] Optionally, the discrete candidate set is {48,72,96}. Optionally, when the configuration parameters of the RMSI CORESET include the combination of the bandwidth occupied by the RMSI CORESET and the number of consecutive time domain symbols occupied by the RMSI CORESET, the combination is specifically one of the following: {48 PRBs, one time domain symbol}, and {72 PRBs, one time domain symbol}, and {96 PRBs, one time-domain symbol}, and {24 PRBs, two consecutive time-domain symbols}, and {36 PRBs, two consecutive time-domain symbols}, and {48 PRBs, two consecutive time-domain symbols}, and {16 PRBs, three consecutive time-domain symbols}, and {24 PRBs, three consecutive time-domain symbols}, and {32 PRBs, three consecutive time-domain symbols}, and {12 PRBs, four consecutive time-domain symbols}, and {18 PRBs, four consecutive time-domain symbols}, and {24 PRBs, four consecutive time-domain symbols}, and The PRBs represent a plurality of physical resource blocks.

[0043] Another resource configuration apparatus provided by an embodiment of the present invention is a first unit configured to determine that the remaining minimum system information control resource set RMSI CORESET and related synchronization information blocks SS Block transmit by occupying different symbols in a time-division multiplexing mode, and a second unit configured to determine the configuration parameters of the RMSI CORESET and related SS Block, and The configuration parameters of the remaining minimum system information control resource set related to all SS Blocks within each SS Block burst set are the same.

[0044] A computer storage medium provided by another embodiment of the present invention is a computer storage medium storing computer-executable instructions configured to cause the computer to execute any of the above methods.

Brief Description of the Drawings

[0045] To more clearly illustrate the embodiments and conventional technical solutions according to the present invention, the following briefly introduces the drawings necessary for explaining the embodiments. Of course, the drawings in the following description are part of the embodiments according to the present invention, and those skilled in the art can obtain other drawings based on these drawings on the premise of not performing creative work.

Figure 1

Figure 2

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Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

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Figure 11

Embodiments for Carrying Out the Invention

[0046] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is obvious that the described embodiments are only some, rather than all, of the embodiments of the present invention. Based on the embodiments of the present invention, other embodiments obtained by those skilled in the art without creative work all fall within the protection scope of the present invention.

[0047] The technical solution of the present invention can be applied to various communication systems. For example, it can be applied to GSM (Global System of Mobile communication) system, CDMA (Code Division Multiple Access) system, WCDMA (registered trademark) (Wideband Code Division Multiple Access) system, GPRS (General Packet Radio Service), LTE (Long Term Evolution) system, LTE-A (Advanced long term evolution) system, UMTS (Universal Mobile Telecommunication System) new radio (NR), etc.

[0048] Also, in the embodiments according to the present invention, the UE (User Equipment) includes, but is not limited to, an MS (Mobile Station), a mobile terminal, an MT (Mobile Telephone), a handset, and a portable equipment. The user equipment can communicate with one or more core networks via a RAN (Radio Access Network, RAN). For example, the user equipment can also include an MT (also called a cellular phone), a computer with a wireless communication function, etc. The user equipment can be portable, pocket-sized, hand-held, built into a computer, or an in-vehicle mobile device.

[0049] In the embodiments according to the present invention, a base station (e.g., a connection point) can be a facility that communicates with a wireless terminal via one or more sectors at a wireless interface in an AN (Access Network). The base station can mutually convert a received radio frame and IP assembly and serve as a router between the wireless terminal and other parts of the access network. Here, other parts of the access network can include an IP network. The base station can cooperate in attribute management for the wireless interface. For example, the base station can be a base transceiver station (BTS) of GSM or CDMA, or a base station (NodeB) of WCDMA (registered trademark), an evolved base station (NodeB or eNB or e-NodeB, evolutional Node B) of LTE, or a base station (gNB) in 5G NR, but the present invention is not limited thereto.

[0050] Embodiments of the present invention provide a resource configuration method and apparatus, as well as a computer storage medium, such that when the remaining minimum system information control resource set and related synchronization information block adopt a time-division multiplexing mode, the configuration of the remaining minimum system information control resource set becomes more flexible and can be applied to more application scenarios.

[0051] Embodiments of the present invention provide a method for configuring an RMSI CORESET when the RMSI CORESET and related SS Block adopt a time-division multiplexing mode. Here, the time-division multiplexing mode adopted by the RMSI CORESET and related SS Block is as shown in FIG. 1. Here, regarding the RMSI CORESET and related SS Block, since the configuration parameters of the RMSI CORESET are notified through the PBCH included in the SS Block, the RMSI CORESET is associated with the SS Block.

[0052] In FIG. 1, "A" is the bandwidth occupied by the RMSI CORESET. The physical resource block (PRB) is the granularity. "B" is the number of consecutive time-domain symbols occupied by the RMSI CORESET. "D" is the minimum carrier bandwidth of the terminal where the PRB is the granularity. "a" is the bandwidth occupied by the SS block. "b" is the number of time-domain symbols occupied by the SS block. Also, "c" is the index of the frequency-domain offset of the RMSI CORESET with respect to the SS block.

[0053] At the same central carrier frequency, the NR-PBCH within all SS blocks in an SS block burst set carries the same content except for the SS block index. Therefore, regardless of whether the RMSI CORESET and the SS block employ FDM or TDM, the RMSI CORESET associated with all SS blocks in the SS block burst has the same configuration (e.g., the same occupied bandwidth, frequency domain position, occupied time domain symbols at the same central carrier frequency, etc.).

[0054] Therefore, optionally, regardless of whether the RMSI CORESET and the SS block adopt the FDM mode or the TDM mode, at the same central carrier frequency, the RMSI CORESET associated with each SS block in one SS block burst has the same configuration parameters as follows (the same configuration parameters described here may refer to the same type of configuration parameters, and the values of the same type of configuration parameters corresponding to different RMSI CORESETs associated with different SS Blocks may be different or the same): The bandwidth occupied by the RMSI CORESET; (denoted as "A" in Figure 1) The RMSI CORESET frequency domain position; The RMSI CORESET time domain position; The number of consecutive or discontinuous time domain symbols occupied by the RMSI CORESET; (denoted as "B" in Figure 1).

[0055] In addition, of course, other types of configuration parameters may also be included. The RMSI CORESET is assumed to occupy one or more time-domain symbols in the time domain, where the bandwidth occupied by the RMSI CORESET is the same on each time-domain symbol. That is, "A" has the same value in each time-domain symbol occupied by the RMSI CORESET when multiple time-domain symbols are occupied. Therefore, the total number of PRBs occupied by the RMSI CORESET can be calculated using the following formula.

[0056] Total number of PRBs occupied by the RMSI CORESET = Occupied bandwidth of each time-domain symbol × Number of consecutive time-domain symbols occupied = "A" × "B".

[0057] In the case of the TDM mode, it is more effective to define the configuration of a set of multiple parameter sets {number of consecutive time-domain symbols occupied, occupied bandwidth} based on the number of physical resource blocks (PRBs) required, compared to the allocation, definition, and configuration of the frequency-domain bandwidth and the number of consecutive time-domain symbols occupied by the RMSI CORESET.

[0058] Then, reliable transmission of the NR-PDCCH responsible for RMSI scheduling is considered. To support an aggregation level 8 of the NR-PDCCH, the total number of PRBs occupied by the NR-PDCCH needs to be at least 48 PRBs. Therefore, the candidate set of the total number of PRBs occupied by the NR-PDCCH is {48, 72, 96} PRBs.

[0059] Therefore, optionally, the configuration parameters of the RMSI CORESET can further include the total number of PRBs occupied by the RMSI CORESET. Preferably, the total number of PRBs occupied by the RMSI CORESET is a list of discrete candidate sets. For example, {48, 72, 96} PRBs.

[0060] Optionally, when the RMSI CORESET and related SS Block adopt the time-division multiplexing mode, the configuration parameters of the RMSI CORESET include at least the parameter set {occupied bandwidth, number of occupied continuous time domain symbols} = {A, B}.

[0061] For example, when the RMSI CORESET and related SS Block adopt the time-division multiplexing mode, the parameter set included in the configuration parameters of the RMSI CORESET is {occupied bandwidth, number of occupied continuous time domain symbols} = {A, B}. Here, the specific values of {occupied bandwidth, number of occupied continuous time domain symbols} are, for example, any of the following. ◎ {48 PRBs, 1 time domain symbol} ◎ {72 PRBs, 1 time domain symbol} ◎ {96 PRBs, 1 time domain symbol} ◎ {24 PRBs, 2 consecutive time domain symbols} ◎ {36 PRBs, 2 consecutive time domain symbols} ◎ {48 PRBs, 2 consecutive time domain symbols} ◎ {16 PRBs, 3 consecutive time domain symbols} ◎ {24 PRBs, 3 consecutive time domain symbols} ◎ {32 PRBs, 3 consecutive time domain symbols} ◎ {12 PRBs, 4 consecutive time domain symbols} ◎ {18 PRBs, 4 consecutive time domain symbols} ◎ {24 PRBs, 4 consecutive time domain symbols}. represents a plurality of physical resource blocks.

[0062] Optionally, the frequency domain position of the RMSI CORESET may be specified by the frequency domain offset position with respect to the associated SS Block. Specifically, there are still many ways to achieve this. For example, the reference points can be, respectively, the center, start, or end position of the bandwidth occupied by the RMSI CORESET and the bandwidth occupied by the SS Block. In the TDM mode, as shown in FIG. 1, there are the following three types of relative relationships.

[0063] In FIG. 1(a), the SS Block associated with the RMSI CORESET shares the center position of the bandwidth. In FIG. 1(b), the center of the bandwidth of the RMSI CORESET is above the center of the bandwidth of the associated SS Block. In FIG. 1(c), the center of the bandwidth of the RMSI CORESET is below the center of the bandwidth of the associated SS Block.

[0064] Therefore, optionally, when the RMSI CORESET and the associated SS Block adopt the time division multiplexing mode, the frequency domain position relationship between them can be one of the following relationships.

[0065] The RMSI CORESET and the associated SS Block share the center position. For example, in FIG. 1(a), the centers of the frequency domain positions of CS0 and the associated SSB0 overlap. CS represents the RMSI CORESET, SSB represents the SS Block, and the subsequent numbers are indexes (the same applies to similar descriptions in other embodiments and will not be repeated later).

[0066] The center of the bandwidth of the RMSI CORESET is below the center of the bandwidth of the associated SS Block. For example, in Figure 1(c), the center of the frequency domain position of CS0 is below the center of the frequency domain position of the associated SSB0. CS represents the RMSI CORESET, SSB represents the SS Block, and the numbers following each represent the index (the same applies to similar descriptions in other embodiments and will not be repeated later).

[0067] The center of the bandwidth of the RMSI CORESET is above the center of the bandwidth of the associated SS Block. For example, in Figure 1(b), the center of the frequency domain position of CS0 is above the center of the frequency domain position of the associated SSB0. CS represents the RMSI CORESET, SSB represents the SS Block, and the numbers following each represent the index (the same applies to similar descriptions in other embodiments and will not be repeated later).

[0068] To minimize the number of bits of the configuration parameters of the RMSI CORESET carried by the NR-PBCH, the granularity of the frequency domain offset parameter "c" in Figure 1 should be specified by the standard. That is, it is a predetermined value and does not need to be notified by the NR-PBCH. Here, the granularity may be specified by the standard according to the carrier frequency, and different values may be configured for different carrier frequencies. For example, the granularity corresponding to a carrier frequency higher than 6 GHz and a carrier frequency lower than 6 GHz may be different.

[0069] Therefore, optionally, when the RMSI CORESET and the associated SS Block adopt the time-division multiplexing mode, the granularity of the relative offset between their frequency domain positions is predefined by the standard, and different values can be used according to different frequency bands or frequency ranges. For example, for a smaller terminal minimum carrier bandwidth (e.g., 5 MHz or 10 MHz), the granularity can be 1 PRB, i.e., c = 1. For a larger terminal minimum carrier bandwidth (e.g., 100 MHz or 400 MHz), the granularity can be multiple PRBs, e.g., 6 PRBs, i.e., c = 6.

[0070] Furthermore, the frequency domain offset value c can also be defined by a limited number of values. For example, "c" = {0, 1, 2, 3, 4} represents five types of relative relationships respectively, as shown in FIGS. 5 and 6. Specifically, as shown in FIGS. 2(a)-(e) respectively: When c = 0, it indicates that the center frequencies of the RMSI CORESET and the associated SS Block are aligned. This corresponds to FIG. 2(a).

[0071] When c = 1, it indicates that the start positions of the frequency domains of the RMSI CORESET and the associated SS Block are aligned. This corresponds to FIG. 2(b). When c = 2, it indicates that the end positions of the frequency domains of the RMSI CORESET and the associated SS Block are aligned. This corresponds to FIG. 2(c). When c = 3, the end position of the frequency domain of the RMSI CORESET is aligned with the end position of the terminal minimum carrier bandwidth, while the start position of the frequency domain of the associated SS Block is aligned with the terminal minimum carrier bandwidth corresponding to FIG. 2(d). When c = 4, the start position of the frequency domain of the RMSI CORESET is aligned with the start position of the terminal minimum carrier bandwidth, while the end position of the frequency domain of the associated SS Block is aligned with the terminal minimum carrier bandwidth corresponding to FIG. 2(e).

[0072] In the embodiments of the present application, the specific value of the minimum carrier bandwidth of the terminal may be determined according to the actual demand or may be preset.

[0073] In NR, the transmission pattern of the SS Block is related to the set subcarrier spacing (SCS). Different SCS values correspond to different SS Block transmission patterns. Also, in the time slot where the SS Block is located, the time domain symbol resources available for RMSI CORESET transmission depend not only on the SS Block transmission pattern but also on the configurations of SS Block SCS and RMSI CORESET SCS.

[0074] When SS Block SCS = 15 kHz, the SS Block transmission pattern is as shown in FIG. 3. The index of the first symbol (SS time domain number block) that can be occupied by the SS Block is obtained by the following formula (the index granularity is based on SCS = 15 kHz). {2, 8} + 14 * n Here, when the carrier frequency is less than 3 GHz, n = 0, 1. When the carrier frequency is 3 - 6 GHz, n = 0, 1, 2, 3. At this time, RMSI CORESET SCS can be 15 kHz or 30 kHz. Therefore, at this point, there are two combinations of SS Block SCS and RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS}, which are {15, 15} kHz and {15, 30} kHz respectively.

[0075] Case 1: {15, 15} kHz. When the combination of SS Block SCS and RMSI CORESET SCS is {15, 15} kHz, the time domain position of the RMSI CORESET can be configured as follows.

[0076] As shown in Fig. 3(a), the time-domain position of each RMSI CORESET precedes the time-domain position of its associated SS Block. Here, for each RMSI CORESET: As shown in Fig. 3(a), block 1, the RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block. In an embodiment of the present invention, it should be noted that a negative offset value indicates that the time-domain position of the RMSI CORESET precedes the time-domain position of the associated SS Block. A positive value indicates that the position of the RMSI CORESET in the time domain is behind the position of the time domain of the associated SS Block (the same applies to the following content and will not be repeated later).

[0077] As shown in Fig. 3(a), block 2, the RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block.

[0078] As shown in Fig. 3(a), block 3, the RMSI CORESET occupies two time-domain symbols, and the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block.

[0079] As shown in Fig. 3(b), the time-domain position of each RMSI CORESET is behind the time-domain position of its associated SS Block. Here, for each RMSI CORESET: As shown in Fig. 3(b), block 1, the RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block.

[0080] As shown in Fig. 3(b) Mark 2, the RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block.

[0081] As shown in Fig. 3(b) Mark 3, the RMSI CORESET occupies two time-domain symbols, and the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block.

[0082] As shown in Fig. 3(c), the time-domain position of the RMSI CORESET associated with the SS Block having an even index is arranged immediately before the time-domain position of this SS Block. And the time-domain position of the RMSI CORESET associated with the SS Block having an odd index is arranged immediately after the time-domain position of this SS Block.

[0083] As shown in Fig. 3(c) Mark 1, the RMSI CORESET occupies one time-domain symbol. When mod(SSB Index,2)={0} is satisfied, the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block. When mod(SSB Index,2)={1} is satisfied, the time-domain position phase of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block.

[0084] As shown in Fig. 3(c) Mark 2, the RMSI CORESET occupies one time-domain symbol. When mod(SSB Index,2)={0} is satisfied, the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block. When mod(SSB Index,2)={1} is satisfied, the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block.

[0085] As shown in Fig. 3(c), the RMSI CORESET occupies two time-domain symbols. When mod(SSB Index, 2) = {0} is satisfied, the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block. When mod(SSB Index, 2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block.

[0086] As shown in Fig. 3(d), the time-domain position of the RMSI CORESET associated with an SS Block having an even index is arranged immediately after the time-domain position of this SS Block. And the time-domain position of the RMSI CORESET associated with an SS Block having an odd index is arranged immediately before the time-domain position of this SS Block.

[0087] As shown in Fig. 3(d), the RMSI CORESET occupies one time-domain symbol. When mod(SSB Index, 2) = {0} is satisfied, the time-domain position phase of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block. When mod(SSB Index, 2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block.

[0088] In an embodiment of the present invention, the Index represents an index.

[0089] Case 2: {15, 30} kHz. When the combination of SS BlockSCS and RMSI CORESET SCS is {15, 30} kHz, the time-domain position of the RMSI CORESET can be configured as follows: The value of the number "B" of time-domain symbols occupied by each RMSI CORESET can be 1, 2, 3, or 4. Here, for each RMSI CORESET: As shown by the gray line below Figure 4(b), the time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block, and the time domain position of the RMSI CORESET is offset by -B from the time domain position of the associated SS Block.

[0090] As shown by the black line above Figure 4(b), the time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block, and the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block.

[0091] As shown in Figure 4(c), the time domain position of the RMSI CORESET associated with the SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by -B from the time domain position of the associated SS Block. The time domain position of the RMSI CORESET associated with the SS Block having an odd index is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block.

[0092] For SS Block SCS = 30 kHz or 120 kHz, the configuration of the time domain position of the RMSI CORESET is introduced as follows: For SS Block SCS = 30 kHz or 120 kHz, the SS Block transmission pattern is as shown in Figure 3. The index of the first symbol that can be occupied by the SS Block is obtained by the following formula.

[0093] {4, 8, 16, 20} + 28*n Here, when the carrier frequency is less than 3 GHz (3 GHz or less), n = 0. When the carrier frequency exceeds 6 GHz (6 GHz or more), n = 0, 1. At this time, the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block SCS and the RMSI CORESET SCS can be {30,15}, {30,30}, {120,60} or {120,120} kHz. Here, the bandwidth and the number of time domain symbols occupied by the RMSI CORESET are as described in the above embodiments.

[0094] Case 1: {30, 30} or {120, 120}. FIG. 5 shows a possible configuration method of the time domain position of the RMSI CORESET. Here, "B" is the number of consecutive time domain symbols occupied by the RMSI CORESET, and its value can be 1 or 2.

[0095] As shown in FIG. 5, the time domain position of the RMSI CORESET related to the SS Block having an even index is arranged immediately before the time domain position of this SS Block. And the time domain position of the RMSI CORESET associated with the SS Block having an odd index is arranged immediately after the time domain position of this SS Block.

[0096] When mod(SSB Index, 4) = {0, 2} is satisfied, the time domain position of the RMSI CORESET is offset by -B from the time domain position of the related SS Block; When mod(SSB Index, 4) = {1, 3} is satisfied, the time domain position of the RMSI CORESET is offset by +B from the time domain position of the related SS Block.

[0097] Case 2: {30, 15} or {120, 60}. As shown by the dotted line at the top of FIG. 6, the time domain position of the RMSI CORESET associated with the SS Block having an even index is arranged immediately before the time domain position of this SS Block. And the time domain position of the RMSI CORESET associated with the SS Block having an odd index is arranged immediately after the time domain position of this SS Block.

[0098] Here, for each RMSI CORESET: When mod(SSB Index,4)={0,2} is satisfied, the time domain position of the RMSI CORESET is offset by -1 from the time domain position of the associated SS Block. When mod(SSB Index,4)={1,3} is satisfied, the time domain position phase of the RMSI CORESET is offset by +1 from the time domain position of the associated SS Block.

[0099] As shown by the solid line below FIG. 6, the time domain position of the RMSI CORESET is arranged before the time domain position of the associated SS Block. For each RMSI CORESET: When mod(SSB Index,4)={0,2} is satisfied, the time domain position of the RMSI CORESET is offset by -2 from the time domain position of the associated SS Block. When mod(SSB Index,4)={1,3} is satisfied, the time domain position of the RMSI CORESET is offset by -5 from the time domain position of the associated SS Block.

[0100] As shown by the dotted line below FIG. 6, the time domain position of the RMSI CORESET is arranged after the time domain position of the associated SS Block. For each RMSI CORESET: When mod(SSB Index,4)={0,2} is satisfied, the time domain position of the RMSI CORESET is offset by +4 from the time domain position of the associated SS Block, When mod(SSB Index, 4) = {1, 3} is satisfied, the time domain position of the RMSI CORESET is offset by +5 from the time domain position of the associated SS Block.

[0101] When SS Block SCS = 240 kHz, the configuration of the time domain position of the RMSI CORESET is introduced as follows: When SS Block SCS = 240 kHz, the SS Block transmission pattern is as shown in Figure 4. The index of the first symbol that can be occupied by the SS Block is obtained by the following formula.

[0102] {8, 12, 16, 20, 32, 36, 40, 44} + 56*n; Here, n = 0, 1, 2, 3, 5, 6, 7, 8. At this time, the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block SCS and the RMSI CORESET SCS can be {240, 120} or {240, 60} kHz. Here, the bandwidth and the number of time domain symbols occupied by the RMSI CORESET are as described in the above embodiment.

[0103] Case 1: In the case of {240, 120}, it is as shown in Figure 7(b). As shown by the upper dotted line in Figure 7(b), the time domain position of the RMSI CORESET associated with the SS Block having an even index is arranged immediately before the time domain position of this SS Block. And the time domain position of the RMSI CORESET associated with the SS Block having an odd index is arranged immediately after the time domain position of this SS Block.

[0104] Here, for each RMSI CORESET: When mod(SSB Index, 4) = {0, 1} is satisfied, the time domain position of the RMSI CORESET is offset by -2 or -3 120 kHz time domain symbols from the time domain position of the associated SS Block. When mod(SSB Index, 4) = {2, 3} is satisfied, the time domain position of the RMSI CORESET is offset by +4 or +3 120 kHz time domain symbols from the time domain position of the associated SS Block.

[0105] As shown by the solid line below Figure 7(b), the time domain position of the RMSI CORESET is arranged in front of the time domain position of the associated SS Block, and for each RMSI CORESET: When mod(SSB Index, 4) = n is satisfied, the time domain position of the RMSI CORESET is offset by -((4 - n) + 2*n) 120 kHz time domain symbols from the time domain position of the associated SS Block.

[0106] As shown by the dotted line below Figure 7(b), the time domain position of the RMSI CORESET is arranged behind the time domain position of the associated SS Block, and for each RMSI CORESET: When mod(SSB Index, 4) = n is satisfied, the time domain position of the RMSI CORESET is offset by +(n + 2*(4 - n)) 120 kHz time domain symbols from the time domain position of the associated SS Block, where n is a pre-set number greater than or equal to 0.

[0107] Case 2: As shown in Figure 7(c), {240, 60}. As shown by the dotted line above in Figure 7(c), the time domain position of the RMSI CORESET associated with the SS Block having an even index is arranged immediately before the time domain position of this SS Block. The time domain position of the RMSI CORESET associated with the SS Block having an odd index is arranged immediately after the time domain position of this SS Block. Here, for each RMSI CORESET: When mod(SSB Index, 4) = n = {0, 1} is satisfied, the time domain of the RMSI CORESET is offset by only -(n + 1) 60 kHz time domain symbols from the time domain position of the associated SS Block.

[0108] When mod(SSB Index, 4) = n = {2, 3} is satisfied, the time domain position of the RMSI CORESET is offset by only +(4 - n) 60 kHz time domain symbols from the time domain position of the associated SS Block.

[0109] As shown by the solid line below in Figure 7(c), the time domain position of the RMSI CORESET is arranged before the time domain position of the associated SS Block. For each RMSI CORESET: When mod(SSB Index, 4) = n = {0, 1} is satisfied, the time domain position of the RMSI CORESET is offset by only -(2 + n) 60 kHz time domain symbols from the time domain position of the associated SS Block, When mod(SSB Index, 4) = n = {2, 3} is satisfied, the time domain position of the RMSI CORESET is offset by only -(1 + n) 60 kHz time domain symbols from the time domain position of the associated SS Block.

[0110] As shown by the dotted line below in Figure 7(c), the time domain position of the RMSI CORESET is arranged after the time domain position of the associated SS Block. For each RMSI CORESET: When mod(SSB Index, 4) = n = {0, 1} is satisfied, the time domain position of the RMSI CORESET is offset by (4 - n) 60 kHz time domain symbols from the time domain position of the associated SS Block.

[0111] When mod(SSB Index, 4) = n = {2, 3} is satisfied, the time domain position of the RMSI CORESET is offset by (5 - n) 60 kHz time domain symbols from the time domain position of the associated SS Block.

[0112] When all candidate SS Blocks are actually transmitted, when SS Block SCS = 240 kHz and RMSI CORESET = 120 kHz, the RMSI CORESET can occupy only one time domain symbol. When RMSI CORESET = 60 kHz, each RMSI CORESET can share and occupy only one time domain symbol. Therefore, in order to increase the time domain symbols that can be occupied by the RMSI CORESET and improve the transmission performance of the RNSI CORESET, actually only 7 out of 8 SS Blocks are transmitted, and the position of the remaining 1 SS Block, as shown in Figure 8, is the block that transmits the RMSI CORESET.

[0113] As shown in Figure 8(b), Case 1: {240, 120}. The candidate SS Block time domain position, where the index is mod(SSB Index, 7), is configured for the RMSI CORESET, and the number of time domain symbols occupied by each RMSI CORESET is B = {1, 2} time domain symbols. Here, for each RMSI CORESET: When the SS Block index satisfies mod(SSB Index,8)={0,1}, the time domain position of the RMSI CORESET related to this SS Block precedes the time domain position of this SS Block, and the time domain position of this RMSI CORESET is offset by -((2 - n)*B + 2*n) 120kHz time domain symbols from the time domain position of the related SS Block.

[0114] When the SS Block index satisfies mod(SSB Index,8)={2,3}, the time domain position of the RMSI CORESET related to this SS Block is arranged behind the time domain position of this SS Block, and the time domain position of this RMSI CORESET is offset by (2*(4 - n)+(n - 2)*B) 120kHz time domain symbols from the time domain position of the related SS Block.

[0115] When the SS Block index satisfies mod(SSB Index,8)={4,5,6}, the time domain position of the RMSI CORESET related to this SS Block is arranged behind the time domain position of this SS Block, and the time domain position of this RMSI CORESET is offset by (2*(7 - n)+(n - 4)*B) 120kHz time domain symbols from the time domain position of the related SS Block.

[0116] Case 2: As shown in Fig. 8(c), {240, 60}. Here, the part circled in the figure is explained as follows: One SS Block is not transmitted for every 8 SS Blocks. In the figure, the circled position part can be used to transmit the RMSI CORESET. That is, the position in the time domain indicated by this circle is configured for the RMSI CORESET. Thus, in this scenario, the RMSI CORESET may occupy up to two consecutive time domain symbols.

[0117] The time domain position of the candidate SS Block whose index is mod(SSB Index,7) is configured for the RMSI CORESET, and the number of time domain symbols occupied by each RMSI CORESET is B={1} time domain symbol. Here, for each RMSI CORESET: When the SS Block index satisfies mod(SSB Index,8)={0,1}, the time domain position of the RMSI CORESET related to this SS Block precedes the time domain position of this SS Block, and the time domain position of this RMSI CORESET is offset by only two 120kHz time domain symbols from the time domain position of the related SS Block.

[0118] When the SS Block index satisfies mod(SSB Index,8)={2,3}, the time domain position of the RMSI CORESET related to this SS Block is arranged behind the time domain position of this SS Block, and the time domain position of this RMSI CORESET is offset by only two 120kHz time domain symbols from the time domain position of the related SS Block.

[0119] When the SS Block index satisfies mod(SSB Index,8)={4,5,6}, the time domain position of the RMSI CORESET related to this SS Block is arranged behind the time domain position of this SS Block, and the time domain position of this RMSI CORESET is offset by only three 120kHz time domain symbols from the time domain position of the related SS Block.

[0120] It should be noted that each RMSI CORESET described in the embodiments of the present invention refers to, for example, the RMSI CORESET corresponding to each index, such as CS0 or CS1. Similarly, each SS Block described in the embodiments of this application refers to the SS Block corresponding to each index, such as SSB0 or SSB1.

[0121] Briefly, referring to FIG. 9, the resource configuration method provided by the embodiment of the present application includes the following steps.

[0122] S101: Determine that the remaining minimum system information control resource set RMSI CORESET and the related synchronization information block SS Block occupy and transmit different symbols in the time-division multiplexing mode.

[0123] S102: Determine the configuration parameters of the RMSI CORESET and the related SS Block, and the configuration parameters of the remaining minimum system information control resource set related to all SS Blocks in each SS Block burst set are the same.

[0124] It should be noted that the method provided by the embodiment of the present invention may be executed on the network side or on the terminal side, and the specific execution entity is not limited.

[0125] In this method, it is determined that the remaining minimum system information control resource set RMSI CORESET and the related synchronization information block SS Block occupy and transmit different symbols in the time-division multiplexing mode; the configuration parameters of the RMSI CORESET and the related SS Block are determined, and the configuration parameters of the remaining minimum system information control resource set related to all SS Blocks in each SS Block burst set are the same. Thereby, when the remaining minimum system information control resource set and the related synchronization information block use the time-division multiplexing mode, the configuration of the remaining minimum system information control resource set becomes more flexible and can be applied to more application scenarios.

[0126] Optionally, the configuration parameters of the RMSI CORESET include one or a combination of the following parameters: ◎ The bandwidth occupied by the RMSI CORESET ◎ The time domain position of the RMSI CORESET ◎ The frequency domain position of the RMSI CORESET ◎ The number of consecutive or discontinuous time domain symbols occupied by the RMSI CORESET.

[0127] Optionally, if the configuration parameters of the RMSI CORESET include the frequency domain position of the RMSI CORESET, the frequency domain positions of the RMSI CORESET and the related SS Block satisfy one of the following relationships: ◎ The configured RMSI CORESET and the related SS Block share a center frequency domain position. ◎ The frequency domain position of the entire configured RMSI CORESET is below the frequency domain position of the related SS Block. ◎ The frequency domain position of the entire configured RMSI CORESET is above the frequency domain position of the related SS Block.

[0128] Optionally, if the configuration parameters of the RMSI CORESET include the frequency domain position of the RMSI CORESET, the frequency domain position of the RMSI CORESET is a relative offset value with respect to the frequency domain position of the related SS Block.

[0129] Optionally, the relative offset value of the frequency domain position of the RMSI CORESET with respect to the frequency domain position of the related SS Block is a predetermined value.

[0130] Optionally, the relative offset value of the frequency domain position of the RMSI CORESET with respect to the frequency domain position of the related SS Block is a different value in different frequency bands or frequency ranges.

[0131] Optionally, the relative offset value of the frequency domain position of the RMSI CORESET with respect to the frequency domain position of the related SS Block is represented by c, and the value of c is as follows and is used to indicate the following different information respectively: When c = 0, it indicates that the center frequencies of the SS Blocks associated with the RMSI CORESET are aligned. When c = 1, it indicates that the start positions of the frequency regions of the SS Blocks associated with the RMSI CORESET are aligned. When c = 2, it indicates that the end positions of the frequency regions of the SS Blocks associated with the RMSI CORESET are aligned. When c = 3, it indicates that the end position of the frequency region of the RMSI CORESET is aligned with the end position of the minimum carrier bandwidth of the terminal, while the start position of the frequency region of the associated SS Block is aligned with the start position of the minimum carrier bandwidth of the terminal. When c = 4, it indicates that the start position of the frequency region of the RMSI CORESET is aligned with the start position of the minimum carrier bandwidth of the terminal, while the end position of the frequency region of the associated SS Block is aligned with the end position of the minimum carrier bandwidth of the terminal. Here, the minimum carrier bandwidth of the terminal is pre-set.

[0132] Optionally, when the configuration parameters of the RMSI CORESET include the time-domain position of the RMSI CORESET, if the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS, {SS Block SCS, RMSI CORESET SCS}, is {15, 15} kHz, the time-domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time-domain position of the RMSI CORESET precedes the time-domain position of the associated SS Block. The RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block, or The RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block, or The RMSI CORESET occupies two time-domain symbols, and the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block. Configuration 2: The time-domain position of the RMSI CORESET is after the time-domain position of the associated SS Block. The RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block, or The RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block, or The RMSI CORESET occupies two time-domain symbols, and the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block. Configuration 3: The time-domain position of the RMSI CORESET associated with the SS Block with an even index precedes the time-domain position of this SS Block, and the time-domain position of the RMSI CORESET associated with the SS Block with an odd index is after the time-domain position of this SS Block. The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index,2) = {0} is satisfied, the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block. When mod(SSB Index,2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block. Or The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index,2) = {0} is satisfied, the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block. When mod(SSB Index,2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block, or The RMSI CORESET occupies two time-domain symbols. When mod(SSB Index,2) = {0} is satisfied, the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block. When mod(SSB Index,2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block. Configuration 4: The time-domain position of the RMSI CORESET associated with an SS Block having an even index is behind the time-domain position of this SS Block, and the time-domain position of the RMSI CORESET associated with an SS Block having an odd index precedes the time-domain position of this SS Block. The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index,2) = {0} is satisfied, the relative time-domain position of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block. When mod(SSB Index,2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block. Here, SSB is the SS Block and Index is the index.

[0133] Optionally, if the configuration parameters of the RMSI CORESET include the time-domain position of the RMSI CORESET, and the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {15, 30} kHz, the time-domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time-domain position of the RMSI CORESET precedes the time-domain position of the associated SS Block, and the time-domain position of the RMSI CORESET is offset by -B from the time-domain position of the associated SS Block. Configuration 2: The time-domain position of the RMSI CORESET is behind the time-domain position of the associated SS Block, and the time-domain position of the RMSI CORESET is offset by +B from the time-domain position of the associated SS Block. Configuration 3: The time-domain position of the RMSI CORESET associated with an SS Block having an even index precedes the time-domain position of this SS Block, and the time-domain position of the RMSI CORESET is offset by -B from the time-domain position of the associated SS Block. The time-domain position of the RMSI CORESET associated with an SS Block having an odd index is behind the time-domain position of this SS Block, and the time-domain position of the RMSI CORESET is offset by +B from the time-domain position of the associated SS Block. Here, B is a predetermined number of consecutive time-domain symbols occupied by the RMSI CORESET. Optionally, if the configuration parameters of the RMSI CORESET include the time-domain position of the RMSI CORESET, and the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {30, 30} or {120, 120} kHz, the time-domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with the SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with the SS Block having an odd index is behind the time domain position of this SS Block. Configuration 2: When mod(SSB Index,4)={0,2} is satisfied, the time domain position of the RMSI CORESET is offset by -B from the time domain position of the associated SS Block, where SSB is the SS Block. Configuration 3: When mod(SSBIndex,4)={1,3} is satisfied, the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block. Here, B is a predetermined number of consecutive time domain symbols occupied by the RMSI CORESET, and Index is the index.

[0134] Optionally, when the configuration parameter of the RMSI CORESET includes the time domain position of the RMSI CORESET, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with the SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with the SS Block having an odd index is behind the time domain position of this SS Block. When mod(SSB Index,4)={0,2} is satisfied, the time domain position of the RMSI CORESET is offset by -1 from the time domain position of the associated SS Block, where SSB is the SS Block. When mod(SSB Index,4)={1,3} is satisfied, the time domain position phase of the RMSI CORESET is offset by +1 from the time domain position of the associated SS Block. Configuration 2: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block, When mod(SSB Index, 4) = {0, 2} is satisfied, the time domain position of the RMSI CORESET is offset by -2 from the time domain position of the associated SS Block, When mod(SSB Index, 4) = {1, 3} is satisfied, the time domain position of the RMSI CORESET is offset by -5 from the time domain position of the associated SS Block, Configuration 3: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block, When mod(SSB Index, 4) = {0, 2} is satisfied, the time domain position of the RMSI CORESET is offset by +4 from the time domain position of the associated SS Block, When mod(SSB Index, 4) = {1, 3} is satisfied, the time domain position of the RMSI CORESET is offset by +5 from the time domain position of the associated SS Block, where Index is the index.

[0135] Optionally, when the configuration parameter of the RMSI CORESET includes the time domain position of the RMSI CORESET, if the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {240, 120} kHz, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with an SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with an SS Block having an odd index is behind the time domain position of this SS Block, When mod(SSB Index,4)={0,1} is satisfied, the time domain position of the RMSI CORESET is offset by -2 or -3 120 kHz time domain symbols from the time domain position of the associated SS Block. When mod(SSB Index,4)={2,3} is satisfied, the time domain position of the RMSI CORESET is offset by +4 or +3 120 kHz time domain symbols from the time domain position of the associated SS Block. Configuration 2: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block. When mod(SSB Index,4)= n is satisfied, the time domain position of the RMSI CORESET is offset by -((4-n) + 2*n) 120 kHz time domain symbols from the time domain position of the associated SS Block. Configuration 3: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block. When mod(SSB Index,4)= n is satisfied, the time domain position of the RMSI CORESET is offset by +( n + 2*(4-n)) 120 kHz time domain symbols from the time domain position of the associated SS Block. Here, SSB is the SS Block and Index is the index.

[0136] Optionally, when the configuration parameter of the RMSI CORESET includes the time domain position of the RMSI CORESET, and the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {240,60} kHz, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with the SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with the SS Block having an odd index is behind the time domain position of this SS Block. When mod(SSB Index,4)=n={0,1} is satisfied, the time domain of the RMSI CORESET is offset by -(n + 1) 60 kHz time domain symbols from the time domain position of the associated SS Block. When mod(SSB Index,4)=n={2,3} is satisfied, the time domain position of the RMSI CORESET is offset by +(4 - n) 60 kHz time domain symbols from the time domain position of the associated SS Block. Configuration 2: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block. When mod(SSB Index,4)=n={0,1} is satisfied, the time domain position of the RMSI CORESET is offset by -(2 + n) 60 kHz time domain symbols from the time domain position of the associated SS Block. When mod(SSB Index,4)=n={2,3} is satisfied, the time domain position of the RMSI CORESET is offset by -(1 + n) 60 kHz time domain symbols from the time domain position of the associated SS Block. Configuration 3: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block. When mod(SSB Index,4)=n={0,1} is satisfied, the time domain position of the RMSI CORESET is offset by (4 - n) 60 kHz time domain symbols from the time domain position of the associated SS Block. When mod(SSB Index,4)=n={2,3} is satisfied, the time domain position of the RMSI CORESET is offset by (5 - n) 60 kHz time domain symbols from the time domain position of the associated SS Block. Here, SSB is the SS Block and Index is the index.

[0137] Optionally, determining the RMSI CORESET and related SS Block configuration parameters, in the case of the same or different SS Block subcarrier spacing (SCS) and RMSI CORESET SCS configuration scenarios, if the SS Block is not actually transmitted, the time domain position where the SS Block is not actually transmitted is configured for the RMSI CORESET.

[0138] Optionally, if the combination of SS Block subcarrier spacing (SCS) and RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {240,120} or {240,60} kHz, one SS Block position for every eight SS blocks is the time domain position of the RMSI CORESET.

[0139] Optionally, if the combination of SS Block subcarrier spacing (SCS) and RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {240,120} kHz, the time domain position of the RMSI CORESET adopts the following configuration: The candidate SS Block time domain position where the index is mod(SSB Index,7) is configured for the RMSI CORESET, and the number of time domain symbols occupied by the RMSI CORESET is B = {1,2} time domain symbols, where When the SS Block index satisfies mod(SSB Index,8)={0,1}, the time domain position of the related RMSI CORESET precedes the time domain position of this SS Block and is only offset by the time domain of the RMSI CORESET When the SS Block index satisfies mod(SSB Index,8)={2,3}, the time domain position of the related RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by (2*(4-n)+(n-2)*B) 120kHz time domain symbols from the time domain position of the related SS Block. When the SS Block index satisfies mod(SSB Index,8)={4,5,6}, the time domain position of the related RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by (2*(7-n)+(n-4)*B) 120kHz time domain symbols from the time domain position of the related SS Block. Here, SSB is the SS Block, Index is the index, and n is a predetermined value.

[0140] Optionally, when the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {240,60}kHz, the time domain position of the said RMSI CORESET adopts the following configuration: The time domain position of the candidate SS Block with the index being mod(SSB Index,7) is configured for the RMSI CORESET, and the number of time domain symbols occupied by the RMSI CORESET is B={1} time domain symbol, where When the SS Block index satisfies mod(SSB Index,8)={0,1}, the time domain position of the related RMSI CORESET precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by 2 120kHz time domain symbols from the time domain position of the related SS Block. When the SS Block index satisfies mod(SSB Index,8) = {2,3}, the time domain position of the related RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset from the time domain position of the related SS Block by only two 120 kHz time domain symbols. When the SS Block index satisfies mod(SSB Index,8) = {4,5,6}, the time domain position of the related RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset from the time domain position of the related SS Block by only three 120 kHz time domain symbols. Here, SSB is the SS Block and Index is the index.

[0141] Optionally, the configuration parameters of the RMSI CORESET include the total number of physical resource blocks (PRBs) occupied by the RMSI CORESET, and the number of the PRBs is a list of discrete candidate sets.

[0142] Optionally, the discrete candidate set is {48,72,96}. Optionally, when the configuration parameters of the RMSI CORESET include the combination of the bandwidth occupied by the RMSI CORESET and the number of consecutive time domain symbols occupied by the RMSI CORESET, the combination is specifically one of the following: ◎ {48 PRBs, one time domain symbol} ◎ {72 PRBs, one time domain symbol} ◎ {96 PRBs, one time domain symbol} ◎ {24 PRBs, two consecutive time domain symbols} ◎ {36 PRBs, two consecutive time domain symbols} ◎ {48 PRBs, two consecutive time domain symbols} ◎ {16 PRBs, three consecutive time domain symbols} ◎ {24 PRBs, 3 consecutive time-domain symbols} ◎ {32 PRBs, 3 consecutive time-domain symbols} ◎ {12 PRBs, 4 consecutive time-domain symbols} ◎ {18 PRBs, 4 consecutive time-domain symbols} ◎ {24 PRBs, 4 consecutive time-domain symbols} The PRBs represent a plurality of physical resource blocks.

[0143] Correspondingly, referring to FIG. 10, the resource configuration apparatus provided by the embodiment of the present invention includes a memory 520 configured to store program instructions, and a transceiver 510 configured to transmit and receive data under the control of a processor 500.

[0144] The processor 500 determines that the remaining minimum system information control resource set RMSI CORESET and the related synchronization information block SS Block occupy and transmit different symbols in a time-division multiplexing mode.

[0145] Determine the configuration parameters of the RMSI CORESET and the related SS Block, and the configuration parameters of the remaining minimum system information control resource set related to all SS Blocks in each SS Block burst set are the same.

[0146] Optionally, the configuration parameters of the RMSI CORESET include one or a combination of the following parameters: ◎ The bandwidth occupied by the RMSI CORESET ◎ The time-domain position of the RMSI CORESET ◎ The frequency-domain position of the RMSI CORESET The number of consecutive or discontinuous time-domain symbols occupied by the RMSI CORESET.

[0147] Optionally, if the configuration parameters of the RMSI CORESET include the frequency domain position of the RMSI CORESET, the frequency domain positions of the RMSI CORESET and the associated SS Block satisfy one of the following relationships: The configured RMSI CORESET and the associated SS Block share a center frequency domain position, The frequency domain position of the entire configured RMSI CORESET is below the frequency domain position of the associated SS Block, The frequency domain position of the entire configured RMSI CORESET is above the frequency domain position of the associated SS Block.

[0148] Optionally, if the configuration parameters of the RMSI CORESET include the frequency domain position of the RMSI CORESET, the frequency domain position of the RMSI CORESET is a relative offset value with respect to the frequency domain position of the associated SS Block.

[0149] Optionally, the relative offset value of the frequency domain position of the RMSI CORESET with respect to the frequency domain position of the associated SS Block is a predetermined value.

[0150] Optionally, the relative offset value of the frequency domain position of the RMSI CORESET with respect to the frequency domain position of the associated SS Block is a different value in different frequency bands or frequency ranges.

[0151] Optionally, the relative offset value of the frequency domain position of the RMSI CORESET with respect to the frequency domain position of the associated SS Block is represented by c, and the value of c is as follows and is used to indicate the following different information respectively: When c = 0, it indicates that the center frequencies of the RMSI CORESET and the associated SS Block are aligned, When c = 1, it indicates that the start positions of the frequency domains of the RMSI CORESET and the associated SS Block are aligned, When c = 2, it indicates that the end positions of the frequency regions of the SS Blocks associated with the RMSI CORESET are aligned. When c = 3, it indicates that the end position of the frequency region of the RMSI CORESET is aligned with the end position of the minimum carrier bandwidth of the terminal, but the start position of the frequency region of the associated SS Block is aligned with the start position of the minimum carrier bandwidth of the terminal. When c = 4, it indicates that the start position of the frequency region of the RMSI CORESET is aligned with the start position of the minimum carrier bandwidth of the terminal, but the end position of the frequency region of the associated SS Block is aligned with the end position of the minimum carrier bandwidth of the terminal. Here, the minimum carrier bandwidth of the terminal is pre-set.

[0152] Optionally, when the configuration parameters of the RMSI CORESET include the time domain position of the RMSI CORESET, if the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS, {SS Block SCS, RMSI CORESET SCS}, is {15, 15} kHz, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block. The RMSI CORESET occupies one time domain symbol, and the time domain position of the RMSI CORESET is offset by -1 from the time domain position of the associated SS Block, or The RMSI CORESET occupies one time domain symbol, and the time domain position of the RMSI CORESET is offset by -2 from the time domain position of the associated SS Block, or The RMSI CORESET occupies two time domain symbols, and the time domain position of the RMSI CORESET is offset by -2 from the time domain position of the associated SS Block. Configuration 2: The time-domain position of the RMSI CORESET is behind the time-domain position of the associated SS Block, The RMSI CORESET occupies one time-domain symbol, and the time-domain position phase of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block, or, The RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block, or, The RMSI CORESET occupies two time-domain symbols, and the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block, Configuration 3: The time-domain position of the RMSI CORESET associated with an SS Block with an even index precedes the time-domain position of this SS Block, and the time-domain position of the RMSI CORESET associated with an SS Block with an odd index is behind the time-domain position of this SS Block, The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index,2)={0} is satisfied, the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block. When mod(SSB Index,2)={1} is satisfied, the time-domain position phase of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block,; or, The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index,2)={0} is satisfied, the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block. When mod(SSB Index,2)={1} is satisfied, the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block, or, The RMSI CORESET occupies two time-domain symbols. When mod(SSB Index, 2) = {0} is satisfied, the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block. When mod(SSB Index, 2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block. Configuration 4: The time-domain position of the RMSI CORESET associated with an SS Block having an even index is behind the time-domain position of this SS Block, and the time-domain position of the RMSI CORESET associated with an SS Block having an odd index precedes the time-domain position of this SS Block. The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index, 2) = {0} is satisfied, the time-domain position phase of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block. When mod(SSB Index, 2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block. Here, SSB is the SS Block and Index is the index.

[0153] Optionally, when the configuration parameters of the RMSI CORESET include the time-domain position of the RMSI CORESET, if the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {15, 30} kHz, the time-domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time-domain position of the RMSI CORESET precedes the time-domain position of the associated SS Block, and the time-domain position of the RMSI CORESET is offset by -B from the time-domain position of the associated SS Block. Configuration 2: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block, and the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block. Configuration 3: The time domain position of the RMSI CORESET associated with an SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by -B from the time domain position of the associated SS Block. The time domain position of the RMSI CORESET associated with an SS Block having an odd index is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block. Here, B is a predetermined number of consecutive time domain symbols occupied by the RMSI CORESET.

[0154] Optionally, when the configuration parameters of the RMSI CORESET include the time domain position of the RMSI CORESET, if the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {30, 30} or {120, 120} kHz, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with an SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with an SS Block having an odd index is behind the time domain position of this SS Block. Configuration 2: When mod(SSB Index, 4) = {0, 2} is satisfied, the time domain position of the RMSI CORESET is offset by -B from the time domain position of the associated SS Block, where SSB is the SS Block. Configuration 3: When mod(SSBIndex, 4) = {1, 3} is satisfied, the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block, where B is a predetermined number of consecutive time domain symbols occupied by the RMSI CORESET, and Index is an index.

[0155] Optionally, when the configuration parameters of the RMSI CORESET include the time domain position of the RMSI CORESET, the time domain position of the RMSI CORESET may adopt any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with an SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with an SS Block having an odd index is behind the time domain position of this SS Block. When mod(SSB Index, 4) = {0, 2} is satisfied, the time domain position of the RMSI CORESET is offset by -1 from the time domain position of the associated SS Block, where SSB is an SS Block. When mod(SSB Index, 4) = {1, 3} is satisfied, the time domain position phase of the RMSI CORESET is offset by +1 from the time domain position of the associated SS Block. Configuration 2: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block. When mod(SSB Index, 4) = {0, 2} is satisfied, the time domain position of the RMSI CORESET is offset by -2 from the time domain position of the associated SS Block. When mod(SSB Index, 4) = {1, 3} is satisfied, the time domain position of the RMSI CORESET is offset by -5 from the time domain position of the associated SS Block. Configuration 3: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block. When mod(SSB Index,4)={0,2} is satisfied, the time domain position of the RMSI CORESET is offset by k + 4 in the time domain position of the associated SS Block. When mod(SSB Index,4)={1,3} is satisfied, the time domain position of the RMSI CORESET is offset by +5 from the time domain position of the associated SS Block. Here, Index is the index.

[0156] Optionally, when the configuration parameter of the RMSI CORESET includes the time domain position of the RMSI CORESET, if the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {240,120} kHz, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with an SS Block with an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with an SS Block with an odd index is behind the time domain position of this SS Block. When mod(SSB Index,4)={0,1} is satisfied, the time domain position of the RMSI CORESET is offset by -2 or -3 120 kHz time domain symbols from the time domain position of the associated SS Block. When mod(SSB Index,4)={2,3} is satisfied, the time domain position of the RMSI CORESET is offset by +4 or +3 120 kHz time domain symbols from the time domain position of the associated SS Block. Configuration 2: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block. When mod(SSB Index, 4) = n is satisfied, the time domain position of the RMSI CORESET is offset from the time domain position of the associated SS Block by -((4 - n)+2*n) 120 kHz time domain symbols. Configuration 3: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block. When mod(SSB Index, 4) = n is satisfied, the time domain position of the RMSI CORESET is offset from the time domain position of the associated SS Block by +(n + 2*(4 - n)) 120 kHz time domain symbols. Here, SSB is the SS Block and Index is the index.

[0157] Optionally, when the configuration parameters of the RMSI CORESET include the time domain position of the RMSI CORESET, if the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {240, 60} kHz, the time domain position of the RMSI CORESET adopts one of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with an SS Block having an even index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with an SS Block having an odd index is behind the time domain position of this SS Block. When mod(SSB Index, 4)=n = {0, 1} is satisfied, the time domain of the RMSI CORESET is offset from the time domain position of the associated SS Block by -(n + 1) 60 kHz time domain symbols. When mod(SSB Index, 4)=n = {2, 3} is satisfied, the time domain position of the RMSI CORESET is offset from the time domain position of the associated SS Block by +(4 - n) 60 kHz time domain symbols. Configuration 2: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block. When mod(SSB Index, 4) = n = {0, 1} is satisfied, the time domain position of the RMSI CORESET is offset by -(2 + n) 60 kHz time domain symbols from the time domain position of the associated SS Block. When mod(SSB Index, 4) = n = {2, 3} is satisfied, the time domain position of the RMSI CORESET is offset by -(1 + n) 60 kHz time domain symbols from the time domain position of the associated SS Block. Configuration 3: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block. When mod(SSB Index, 4) = n = {0, 1} is satisfied, the time domain position of the RMSI CORESET is offset by (4 - n) 60 kHz time domain symbols from the time domain position of the associated SS Block. When mod(SSB Index, 4) = n = {2, 3} is satisfied, the time domain position of the RMSI CORESET is offset by (5 - n) 60 kHz time domain symbols from the time domain position of the associated SS Block. Here, SSB is the SS Block and Index is the index.

[0158] Optionally, determining the RMSI CORESET and the associated SS Block configuration parameters, in the case of the same or different SS Block subcarrier spacings (SCS) and RMSI CORESET SCS configuration scenarios, if the SS Block is not actually transmitted, the time domain position where the SS Block is not actually transmitted is configured for the RMSI CORESET.

[0159] Optionally, if the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {240,120} or {240,60} kHz, one SS Block position per eight SS blocks is the time domain position of the RMSI CORESET.

[0160] Optionally, if the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {240,120} kHz, the time domain position of the RMSI CORESET adopts the following configuration: The candidate SS Block time domain position where the index is mod(SSB Index,7) is configured for the RMSI CORESET, and the number of time domain symbols occupied by the RMSI CORESET is B={1,2} time domain symbols, where When the SS Block index satisfies mod(SSB Index,8)={0,1}, the time domain position of the related RMSI CORESET precedes the time domain position of this SS Block and is offset only by the time domain of the RMSI CORESET When the SS Block index satisfies mod(SSB Index,8)={2,3}, the time domain position of the related RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by (2*(4 - n)+(n - 2)*B) 120 kHz time domain symbols from the time domain position of the related SS Block, When the SS Block index satisfies mod(SSB Index,8)={4,5,6}, the time domain position of the related RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by (2*(7 - n)+(n - 4)*B) 120 kHz time domain symbols from the time domain position of the related SS Block, Here, SSB is the SS Block, Index is the index, and n is a predetermined value.

[0161] Optionally, when the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {240,60} kHz, the time domain position of the RMSI CORESET adopts the following configuration: The time domain position of the candidate SS Block where the index is mod(SSB Index,7) is configured with respect to the RMSI CORESET, and the number of time domain symbols occupied by the RMSI CORESET is B = {1} time domain symbol, where When the SS Block index satisfies mod(SSB Index,8) = {0,1}, the time domain position of the related RMSI CORESET precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset from the time domain position of the related SS Block by only two 120 kHz time domain symbols. When the SS Block index satisfies mod(SSB Index,8) = {2,3}, the time domain position of the related RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset from the time domain position of the related SS Block by only two 120 kHz time domain symbols. When the SS Block index satisfies mod(SSB Index,8) = {4,5,6}, the time domain position of the related RMSI CORESET is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset from the time domain position of the related SS Block by only three 120 kHz time domain symbols. Here, SSB is the SS Block and Index is the index.

[0162] Optionally, the configuration parameters of the RMSI CORESET include the total number of physical resource blocks (PRBs) occupied by the RMSI CORESET, and the number of PRBs is a list of discrete candidate sets.

[0163] Optionally, the discrete candidate set is {48, 72, 96}.

[0164] Optionally, when the configuration parameters of the RMSI CORESET include a combination of the bandwidth occupied by the RMSI CORESET and the number of consecutive time domain symbols occupied by the RMSI CORESET, the combination is specifically one of the following: ◎ {48 PRBs, 1 time domain symbol} ◎ {72 PRBs, 1 time domain symbol} ◎ {96 PRBs, 1 time domain symbol} ◎ {24 PRBs, 2 consecutive time domain symbols} ◎ {36 PRBs, 2 consecutive time domain symbols} ◎ {48 PRBs, 2 consecutive time domain symbols} ◎ {16 PRBs, 3 consecutive time domain symbols} ◎ {24 PRBs, 3 consecutive time domain symbols} ◎ {32 PRBs, 3 consecutive time domain symbols} ◎ {12 PRBs, 4 consecutive time domain symbols} ◎ {18 PRBs, 4 consecutive time domain symbols} ◎ {24 PRBs, 4 consecutive time domain symbols} The PRBs represent a plurality of physical resource blocks.

[0165] Here, in FIG. 10, the bus architecture includes any number of interconnected buses and bridges. Specifically, one or more processors represented by processor 500 and various circuits of memory represented by memory 520 are connected. The bus architecture can also connect other circuits such as external equipment, voltage regulators, and power management circuits. Since these are well-known techniques in the art, they will not be described in detail in the present invention. The bus interface provides an interface. The transceiver 510 can be a plurality of components, that is, it includes a transmitter and a receiver, and provides a unit for communicating with other devices via a transmission medium. The processor 500 manages the bus architecture and normal processing, and the memory 520 can store data used when the processor 500 operates.

[0166] The processor 500 can be a central processing unit (CPU), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or a complex programmable logic device (CPLD).

[0167] Note that the device shown in FIG. 10 may be a device on the network side or a device on the terminal side. According to actual requirements, other devices not shown in FIG. 10 can be further added and configured, and the details are not described here.

[0168] Referring to FIG. 11, another resource configuration device provided by the embodiment of the present application is a first unit 11 configured to determine that the remaining minimum system information control resource set RMSI CORESET and related synchronization information block SS Block transmit by occupying different symbols in a time-division multiplexing mode, A second unit 12 configured to determine the RMSI CORESET and related SS Block configuration parameters.

[0169] Here, the configuration parameters of the remaining minimum system information control resource sets related to each SS Block within each SS Block burst set are the same.

[0170] The first unit may be a memory, and the second unit may be a processor. That is, the device provided by the embodiments of the present application is not limited to the structure shown in FIG. 10 and may not include components such as a transceiver and a bus interface.

[0171] Embodiments of the present application provide a computer storage medium configured to store computer program instructions used by the above-described computing device, and the computer program instructions include a program for executing the above-described resource configuration method.

[0172] The computer storage medium may be any available medium or data storage device accessible to a computer. It includes, but is not limited to, magnetic memory (such as floppy disks, hard disks, magnetic tapes, magneto-optical disks (MO), etc.), optical memory (such as CDs, DVDs, BDs, HVDs, etc.), semiconductor memory (such as ROM, EPROM, EEPROM, non-volatile memory (NAND FLASH (registered trademark)), solid state disks (SSDs), etc.).

[0173] The method provided by the embodiments of the present application can be applied to terminal devices and can also be applied to network devices.

[0174] Here, the terminal device can also be referred to as a user equipment (abbreviated as "UE"), a mobile station (abbreviated as "MS"), a mobile terminal (abbreviated as "MT"), etc. Optionally, the terminal can have the function of communicating with one or more core networks via a radio access network (RAN). For example, the terminal can be a mobile phone (or a "cellular" phone) or a computer with a mobile function. For example, the terminal can be a portable, pocket-sized, handheld, computer-integrated, or vehicle-mounted mobile device.

[0175] The network device can be a base station (e.g., an access point), which means a device in the access network that communicates with wireless terminals via one or more sectors on the air interface. The base station is used to perform the mutual conversion between the received air frames and IP packets and is used as a router between the wireless terminal and the rest of the access network. The base station can further adjust the attribute management of the air interface. For example, the base station can be a base transceiver station (BTS) in GSM or CDMA, or a Node B in WCDMA (registered trademark), or an evolved Node B (Node B or eNB or e-node B) in LTE. This is not limited in the embodiments of the present invention.

[0176] In summary, in the TDM mode, in the embodiments of the present application, considering the restrictions on the bits of the RMSI CORESET configuration information, the RMSI CORESET is configured as flexibly as possible.

[0177] As a technician in this field, since the embodiments of the present invention can provide a method, a system, or a computer program product, it should be understood that the present invention can adopt a complete hardware embodiment, a complete software embodiment, or an embodiment combining both software and hardware. Furthermore, the present invention can adopt the form of one or more computer program products. The product can be implemented on a computer-usable storage medium (including but not limited to disk storage devices, CD-ROMs, optical storage devices, etc.) containing computer-usable program code.

[0178] The above has described the present invention by means of the flowcharts and / or block diagrams of the method, apparatus (system), and computer program product of the embodiments of the present invention. It should be understood that each flow and / or block in the flowchart and / or block diagram, and the combination of the flows and / or blocks in the flowchart and / or block diagram, can be realized by computer program instructions. The processor can provide these computer program instructions to the processing unit of a general-purpose computer, a special-purpose computer, an embedded processing device, or other programmable data processing device facilities, and the processor of the computer or other programmable data processing device can execute these computer program instructions to realize the functions specified in one or more flows in the flowchart and / or one or more blocks in the block diagram.

[0179] These computer program instructions can also be stored in a computer-readable storage device that causes a computer or other programmable data processing device to operate in a specific manner. Thereby, the device containing the instructions can execute the instructions in the computer-readable storage device to realize the functions specified in one or more flows in the flowchart and / or one or more blocks in the block diagram.

[0180] These computer program instructions can also be implemented on a computer or other programmable data processing apparatus. A computer or other programmable apparatus on which the computer program instructions are implemented realizes related processing by executing a series of operation steps, and realizes the functions specified in one or more flows in the flowchart and / or one or more blocks in the block diagram by instructions executed on the computer or other programmable apparatus.

[0181] It is also possible to modify the technical solutions described in the above-described embodiments or replace some of the technical elements therein. Such modifications and replacements are not considered to depart from the scope of the technology of each embodiment of the present invention.

[0182] Of course, those skilled in the art can also modify the technical solutions described in the above-described embodiments or replace some of the technical elements therein. Such modifications and replacements are not considered to depart from the scope of the technology of each embodiment of the present invention. All such modifications and replacements fall within the scope of the claims of the present invention.

Description of Reference Numerals

[0183] 500 Processor 510 Transceiver 520 Memory

Claims

1. Determining that the remaining minimum system information control resource set RMSI CORESET and the associated synchronization information block SS Block transmit by occupying different symbols in a time-division multiplexing mode; Comprising any one of means 1 to 7, and in the one means, determining the configuration parameters of the RMSI CORESET and the configuration parameters of the associated SS Block; The configuration parameters of the remaining minimum system information control resource set associated with all SS Blocks within each SS Block burst set are the same; Means 1: The configuration parameters of the RMSI CORESET include the time domain position of the RMSI CORESET. If the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {15, 15} kHz, the time domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block, The RMSI CORESET occupies one time domain symbol, and the time domain position of the RMSI CORESET is offset by -1 from the time domain position of the associated SS Block, or Configuration 2: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block, The RMSI CORESET occupies one time domain symbol, and the time domain position of the RMSI CORESET is offset by +2 from the time domain position of the associated SS Block, or The RMSI CORESET occupies two time domain symbols, and the time domain position of the RMSI CORESET is offset by +2 from the time domain position of the associated SS Block, Configuration 3: The time domain position of the RMSI CORESET associated with the SS Block having an even SSB Index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with the SS Block having an odd SSB Index is behind the time domain position of this SS Block, The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index, 2) = {0} is satisfied, the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block. When mod(SSB Index, 2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block, or, The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index, 2) = {0} is satisfied, the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block. When mod(SSB Index, 2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block, or, The RMSI CORESET occupies two time-domain symbols. When mod(SSB Index, 2) = {0} is satisfied, the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block. When mod(SSB Index, 2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block, Configuration 4: The time-domain position of the RMSI CORESET associated with an SS Block having an even SSB Index is behind the time-domain position of this SS Block, and the time-domain position of the RMSI CORESET associated with an SS Block having an odd SSB Index is ahead of the time-domain position of this SS Block, The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index, 2) = {0} is satisfied, the time-domain position of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block. When mod(SSB Index, 2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block, Here, SSB is the SS Block, and SSB Index is the SSB index. Means 2: The configuration parameters of the RMSI CORESET include the time domain position of the RMSI CORESET. If the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {15, 30} kHz, the time domain position of the RMSI CORESET adopts one of the following configurations: Configuration 1: The time domain position of the RMSI CORESET precedes the time domain position of the associated SS Block, and the time domain position of the RMSI CORESET is offset by -B from the time domain position of the associated SS Block. Configuration 2: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block, and the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block. Here, B is a predetermined number of consecutive time domain symbols occupied by the RMSI CORESET. Configuration 3: The time domain position of the RMSI CORESET associated with an SS Block having an even SSB Index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by -B from the time domain position of the associated SS Block. The time domain position of the RMSI CORESET associated with an SS Block having an odd SSB Index is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block. Here, B is a predetermined number of consecutive time domain symbols occupied by the RMSI CORESET, SSB is the SS Block, and SSB Index is the SSB index. Means 3: The configuration parameters of the RMSI CORESET include the time-domain position of the RMSI CORESET. If the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {30, 30} or {120, 120} kHz, the time-domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time-domain position of the RMSI CORESET related to the SS Block with an even SSB Index precedes the time-domain position of this SS Block, and the time-domain position of the RMSI CORESET related to the SS Block with an odd SSB Index is behind the time-domain position of this SS Block. Here, SSB is the SS Block, and SSB Index is the SSB index. Means 4: The configuration parameters of the RMSI CORESET include the time-domain position of the RMSI CORESET. If the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {240, 120} kHz, the time-domain position of the RMSI CORESET adopts any of the following configurations: Configuration 2: The time-domain position of the RMSI CORESET precedes the time-domain position of the related SS Block. When mod(SSB Index, 4) = n is satisfied, the time-domain position of the RMSI CORESET is offset by -((4 - n) + 2 * n) time-domain symbols with a subcarrier spacing (SCS) of 120 kHz from the time-domain position of the related SS Block. Configuration 3: The time-domain position of the RMSI CORESET is behind the time-domain position of the related SS Block. When mod(SSB Index, 4) = n is satisfied, the time-domain position of the RMSI CORESET is offset by +(n + 2 * (4 - n)) time-domain symbols with a subcarrier spacing (SCS) of 120 kHz from the time-domain position of the related SS Block. Here, SSB is the SS Block, and SSB Index is the SSB index. Means 5: The configuration parameters of the RMSI CORESET include the time-domain position of the RMSI CORESET. If the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {240, 60} kHz, the time-domain position of the RMSI CORESET adopts any of the following configurations: Configuration 2: The time-domain position of the RMSI CORESET precedes the time-domain position of the associated SS Block, when mod(SSB Index, 4) = n = {0, 1} is satisfied, the time-domain position of the RMSI CORESET is offset by -(2 + n) time-domain symbols with a subcarrier spacing (SCS) of 60 kHz from the time-domain position of the associated SS Block, or when mod(SSB Index, 4) = n = {2, 3} is satisfied, the time-domain position of the RMSI CORESET is offset by -(1 + n) time-domain symbols with a carrier spacing (SCS) of 60 kHz from the time-domain position of the associated SS Block, Configuration 3: The time-domain position of the RMSI CORESET is behind the time-domain position of the associated SS Block, when mod(SSB Index, 4) = n = {0, 1} is satisfied, the time-domain position of the RMSI CORESET is offset by (4 - n) time-domain symbols with a subcarrier spacing (SCS) of 60 kHz from the time-domain position of the associated SS Block, or when mod(SSB Index, 4) = n = {2, 3} is satisfied, the time-domain position of the RMSI CORESET is offset by (5 - n) time-domain symbols with a subcarrier spacing (SCS) of 60 kHz from the time-domain position of the associated SS Block, where SSB is the SS Block and SSB Index is the SSB index, Means 6 The Means 6 further includes Means 6-1, Determining the configuration parameters of the RMSI CORESET and the configuration parameters of the associated SS Block includes that, in the case of the same or different SS Block subcarrier spacing (SCS) and RMSI CORESET SCS configuration scenarios, if the SS Block is not actually transmitted, the time domain position where the SS Block is not actually transmitted is configured for the RMSI CORESET. If the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {240, 120} or {240, 60} kHz, the time domain position of one SS Block for every eight SS blocks is the time domain position of the RMSI CORESET. Means 6-1 If the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {240, 120} kHz, the time domain position of the RMSI CORESET adopts the following configuration: The candidate SS Block time domain position where SSB Index is mod(SSB Index, 7) is configured for the RMSI CORESET, and the number of time domain symbols occupied by the RMSI CORESET is B = {1, 2} time domain symbols. Here, When SSB Index satisfies mod(SSB Index, 8) = n = {0, 1}, the time domain position of the associated RMSI CORESET precedes the time domain position of the SS Block where SSB Index satisfies mod(SSB Index, 8) = n = {0, 1}, and the time domain of the RMSI CORESET is offset by (-((2 - n) * B + 2 * n)) time domain symbols with a subcarrier spacing (SCS) of 120 kHz from the time domain position of the associated SS Block, where the B = {1, 2} time domain symbols, or When the SSB Index satisfies mod(SSB Index, 8) = n = {2, 3}, the time domain position of the related RMSI CORESET is behind the time domain position of the SS Block where the SSB Index satisfies mod(SSB Index, 8) = n = {2, 3}, and the time domain position of the RMSI CORESET is offset by (2*(4 - n)+(n - 2)*B) time domain symbols with a subcarrier spacing (SCS) of 120 kHz from the time domain position of the related SS Block, where the B = {1, 2} time domain symbols, or When the SSB Index satisfies mod(SSB Index, 8) = n = {4, 5, 6}, the time domain position of the related RMSI CORESET is behind the time domain position of the SS Block where the SSB Index satisfies mod(SSB Index, 8) = n = {4, 5, 6}, and the time domain position of the RMSI CORESET is offset by (2*(7 - n)+(n - 4)*B) time domain symbols with a subcarrier spacing (SCS) of 120 kHz from the time domain position of the related SS Block, where the B = {1, 2} time domain symbols, where SSB is an SS Block and SSB Index is an SSB index, characterized by a resource configuration method.

2. The resource configuration method according to claim 1, characterized in that the configuration parameter of the RMSI CORESET includes the frequency domain position of the RMSI CORESET, and the frequency domain position of the RMSI CORESET is a relative offset value with respect to the frequency domain position of the related SS Block.

3. The resource configuration method according to claim 1, characterized in that the configuration parameter of the RMSI CORESET includes the total number of physical resource blocks (PRBs) occupied by the RMSI CORESET, and the total number of the PRBs is a list of discrete candidate sets.

4. The configuration parameter of the RMSI CORESET includes a combination of the bandwidth occupied by the RMSI CORESET and the number of consecutive time domain symbols occupied by the RMSI CORESET, and the combination is {48 PRBs, 1 time domain symbol} and {72 PRBs, one time-domain symbol}, and {96 PRBs, one time-domain symbol}, and {24 PRBs, two consecutive time-domain symbols}, and {36 PRBs, two consecutive time-domain symbols}, and {48 PRBs, two consecutive time-domain symbols}, and {16 PRBs, three consecutive time-domain symbols}, and {24 PRBs, three consecutive time-domain symbols}, and {32 PRBs, three consecutive time-domain symbols}, and {12 PRBs, four consecutive time-domain symbols}, and {18 PRBs, four consecutive time-domain symbols}, and {24 PRBs, four consecutive time-domain symbols}, and is any one of them, The resource configuration method according to claim 1, wherein the PRBs represent a plurality of physical resource blocks.

5. A first unit configured to determine that the remaining minimum system information control resource set RMSI CORESET and the related synchronization information block SS Block transmit while occupying different symbols in a time-division multiplexing mode; It has any one of means 1 to means 7, and a second unit configured to determine the configuration parameters of the RMSI CORESET and the configuration parameters of the related SS Block by the one means having; The configuration parameters of the remaining minimum system information control resource set related to all SS Blocks within each SS Block burst set are the same, Means 1: The configuration parameters of the RMSI CORESET include the time-domain position of the RMSI CORESET. If the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {15, 15} kHz, the time-domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time-domain position of the RMSI CORESET precedes the time-domain position of the related SS Block, The RMSI CORESET occupies one time-domain symbol, and the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the related SS Block, or Configuration 2: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block, the RMSI CORESET occupies one time domain symbol, and the time domain position of the RMSI CORESET is offset by +2 from the time domain position of the associated SS Block, or, the RMSI CORESET occupies two time domain symbols, and the time domain position of the RMSI CORESET is offset by +2 from the time domain position of the associated SS Block, Configuration 3: The time domain position of the RMSI CORESET associated with an SS Block having an even SSB Index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with an SS Block having an odd SSB Index is behind the time domain position of this SS Block, the RMSI CORESET occupies one time domain symbol, when mod(SSB Index,2)={0} is satisfied, the time domain position of the RMSI CORESET is offset by -1 from the time domain position of the associated SS Block, when mod(SSB Index,2)={1} is satisfied, the time domain position of the RMSI CORESET is offset by +1 from the time domain position of the associated SS Block, or, the RMSI CORESET occupies one time domain symbol, when mod(SSB Index,2)={0} is satisfied, the time domain position of the RMSI CORESET is offset by -2 from the time domain position of the associated SS Block, when mod(SSB Index,2)={1} is satisfied, the time domain position of the RMSI CORESET is offset by +2 from the time domain position of the associated SS Block, or, The RMSI CORESET occupies two time-domain symbols. When mod(SSB Index, 2) = {0} is satisfied, the time-domain position of the RMSI CORESET is offset by -2 from the time-domain position of the associated SS Block. When mod(SSB Index, 2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by +2 from the time-domain position of the associated SS Block. Configuration 4: The time-domain position of the RMSI CORESET associated with an SS Block having an even SSB Index is behind the time-domain position of this SS Block, and the time-domain position of the RMSI CORESET associated with an SS Block having an odd SSB Index precedes the time-domain position of this SS Block. The RMSI CORESET occupies one time-domain symbol. When mod(SSB Index, 2) = {0} is satisfied, the time-domain position of the RMSI CORESET is offset by +1 from the time-domain position of the associated SS Block. When mod(SSB Index, 2) = {1} is satisfied, the time-domain position of the RMSI CORESET is offset by -1 from the time-domain position of the associated SS Block. Here, SSB is the SS Block, and SSB Index is the SSB index. Means 2: The configuration parameters of the RMSI CORESET include the time-domain position of the RMSI CORESET. If the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {15, 30} kHz, the time-domain position of the RMSI CORESET adopts any of the following configurations: Configuration 1: The time-domain position of the RMSI CORESET precedes the time-domain position of the associated SS Block, and the time-domain position of the RMSI CORESET is offset by -B from the time-domain position of the associated SS Block. Configuration 2: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block, and the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block, where B is a predetermined number of consecutive time domain symbols occupied by the RMSI CORESET, Configuration 3: The time domain position of the RMSI CORESET associated with an SS Block having an even SSB Index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by -B from the time domain position of the associated SS Block. The time domain position of the RMSI CORESET associated with an SS Block having an odd SSB Index is behind the time domain position of this SS Block, and the time domain position of the RMSI CORESET is offset by +B from the time domain position of the associated SS Block, where B is a predetermined number of consecutive time domain symbols occupied by the RMSI CORESET, SSB is the SS Block, and SSB Index is the SSB index, Means 3: If the configuration parameters of the RMSI CORESET include the time domain position of the RMSI CORESET and the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {30, 30} or {120, 120} kHz, the time domain position of the RMSI CORESET adopts either of the following configurations: Configuration 1: The time domain position of the RMSI CORESET associated with an SS Block having an even SSB Index precedes the time domain position of this SS Block, and the time domain position of the RMSI CORESET associated with an SS Block having an odd SSB Index is behind the time domain position of this SS Block, where SSB is the SS Block and SSB Index is the SSB index, Means 4: The configuration parameters of the RMSI CORESET include the time-domain position of the RMSI CORESET. If the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {240, 120} kHz, the time-domain position of the RMSI CORESET adopts any of the following configurations: Configuration 2: The time-domain position of the RMSI CORESET precedes the time-domain position of the associated SS Block, when mod(SSB Index, 4) = n is satisfied, the time-domain position of the RMSI CORESET is offset by only the time-domain symbol where the subcarrier spacing (SCS) is 120 kHz by -((4 - n) + 2*n) subcarrier spacings from the time-domain position of the associated SS Block, Configuration 3: The time-domain position of the RMSI CORESET is behind the time-domain position of the associated SS Block, when mod(SSB Index, 4) = n is satisfied, the time-domain position of the RMSI CORESET is offset by only the time-domain symbol where the subcarrier spacing (SCS) is 120 kHz by +(n + 2*(4 - n)) subcarrier spacings from the time-domain position of the associated SS Block, where SSB is the SS Block and SSB Index is the SSB index, Means 5: The configuration parameters of the RMSI CORESET include the time-domain position of the RMSI CORESET. If the combination of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS {SS Block SCS, RMSI CORESET SCS} is {240, 60} kHz, the time-domain position of the RMSI CORESET adopts any of the following configurations: Configuration 2: The time-domain position of the RMSI CORESET precedes the time-domain position of the associated SS Block, when mod(SSB Index, 4) = n = {0, 1} is satisfied, the time-domain position of the RMSI CORESET is offset by - (2 + n) time-domain symbols where the subcarrier spacing (SCS) is 60 kHz from the time-domain position of the associated SS Block, or When mod(SSB Index, 4) = n = {2, 3} is satisfied, the time domain position of the RMSI CORESET is offset by (1 + n) time domain symbols with a carrier spacing (SCS) of 60 kHz from the time domain position of the associated SS Block. Configuration 3: The time domain position of the RMSI CORESET is behind the time domain position of the associated SS Block. When mod(SSB Index, 4) = n = {0, 1} is satisfied, the time domain position of the RMSI CORESET is offset by (4 - n) time domain symbols with a subcarrier spacing (SCS) of 60 kHz from the time domain position of the associated SS Block, or When mod(SSB Index, 4) = n = {2, 3} is satisfied, the time domain position of the RMSI CORESET is offset by (5 - n) time domain symbols with a subcarrier spacing (SCS) of 60 kHz from the time domain position of the associated SS Block. Here, SSB is the SS Block and SSB Index is the SSB index. Means 6 The said Means 6 further includes Means 6-1. Determining the configuration parameters of the said RMSI CORESET and the configuration parameters of the associated SS Block includes that in the case of the same or different SS Block subcarrier spacing (SCS) and RMSI CORESET SCS configuration situations, if the SS Block is not actually transmitted, the time domain position where the SS Block is not actually transmitted is configured for the RMSI CORESET. If the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {240, 120} or {240, 60} kHz, the time domain position of one SS Block for every eight SS Blocks is the time domain position of the RMSI CORESET. Means 6-1 If the combination {SS Block SCS, RMSI CORESET SCS} of the SS Block subcarrier spacing (SCS) and the RMSI CORESET SCS is {240, 120} kHz, the time domain position of the said RMSI CORESET adopts the following configuration: The candidate SS Block time domain position where the SSB Index is mod(SSB Index, 7) is configured for the RMSI CORESET, and the number of time domain symbols occupied by the RMSI CORESET is B = {1, 2} time domain symbols, where, when the SSB Index satisfies mod(SSB Index, 8) = n = {0, 1}, the time domain position of the related RMSI CORESET precedes the time domain position of the SS Block where the SSB Index satisfies mod(SSB Index, 8) = n = {0, 1}, and the time domain of the RMSI CORESET is offset by (-((2 - n) * B + 2 * n)) time domain symbols from the time domain position of the related SS Block, where the subcarrier spacing (SCS) is 120 kHz, and here, the B = {1, 2} time domain symbols, or when the SSB Index satisfies mod(SSB Index, 8) = n = {2, 3}, the time domain position of the related RMSI CORESET is behind the time domain position of the SS Block where the SSB Index satisfies mod(SSB Index, 8) = n = {2, 3}, and the time domain position of the RMSI CORESET is offset by (2 * (4 - n) + (n - 2) * B) time domain symbols from the time domain position of the related SS Block, where the subcarrier spacing (SCS) is 120 kHz, and here, the B = {1, 2} time domain symbols, or when the SSB Index satisfies mod(SSB Index, 8) = n = {4, 5, 6}, the time domain position of the related RMSI CORESET is behind the time domain position of the SS Block where the SSB Index satisfies mod(SSB Index, 8) = n = {4, 5, 6}, and the time domain position of the RMSI CORESET is offset by (2 * (7 - n) + (n - 4) * B) time domain symbols from the time domain position of the related SS Block, where the subcarrier spacing (SCS) is 120 kHz, and here, the B = {1, 2} time domain symbols, where SSB is an SS Block and SSB Index is an SSB index, a resource configuration device characterized thereby.

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