Plasma processing apparatus

The plasma processing apparatus addresses the issue of adhesion by using a silicon-containing shield member and upper electrode to form a conductive exposed area, facilitating the removal of reaction products and improving processing efficiency.

JP7700389B2Active Publication Date: 2025-06-30TOKYO ELECTRON LTD
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Patent Information

Application Number
JP2024567360
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2023-08-22
Filing Date
2023-12-04
Publication Date
2025-06-30
Estimated Expiration
2043-12-04

AI Technical Summary

Technical Problem

The challenge in plasma processing is to suppress the adhesion of reaction products to the exposed areas within the plasma processing space.

Method used

A plasma processing apparatus is designed with a chamber, substrate support, upper electrode, first insulating member, and a shield member made of silicon-containing material. The upper electrode and shield member form a conductive portion exposed to the plasma processing space, allowing for efficient removal of reaction products during dry cleaning.

Benefits of technology

This configuration effectively suppresses the adhesion of reaction products to the exposed areas, enhancing the cleanliness and efficiency of the plasma processing apparatus.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention provides a plasma processing device in one illustrative embodiment. This plasma processing device is provided with a chamber, a substrate-supporting part, an upper electrode, a first insulating member, and a shield member. The chamber is electrically grounded and provides a processing space for the plasma. The top electrode constitutes a portion of a top part that is provided so as to close a chamber opening located above the plasma processing space. The first insulating member constitutes a portion of the top part and is provided between the upper electrode and the chamber so as to electrically isolate the upper electrode and the chamber from each other. The shield member constitutes another portion of the top part, is formed from a conductive silicon-containing substance, and extends to the chamber from the periphery of the upper electrode. A site on the top part that is exposed to the plasma processing space is formed from a conductor including the upper electrode and the shield member.
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Description

Technical Field

[0001] Embodiments of the present disclosure relate to a plasma processing apparatus.

Background Art

[0002] A plasma processing apparatus is used in plasma processing of a substrate. The plasma processing apparatus disclosed in Patent Document 1 below includes a processing chamber, an upper electrode, and a shielding member. The upper electrode closes an opening in the ceiling of the processing chamber via an insulating shielding member. The upper electrode includes an inner electrode plate provided in the processing chamber and an outer electrode plate provided outside the inner electrode plate. A flow path for flowing a gas is formed in a gap between the inner electrode plate and the outer electrode plate.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The present disclosure provides a technique for suppressing adhesion of reaction products to a site exposed to a plasma processing space.

Means for Solving the Problems

[0005] In one exemplary embodiment, a plasma processing apparatus is provided. The plasma processing apparatus includes a chamber, a substrate support, an upper electrode, a first insulating member, and a shield member. The chamber is electrically grounded and provides a processing space for plasma. The substrate support is provided in the chamber and is configured to support a substrate. The upper electrode is a part of the top portion provided to close the opening of the chamber above the plasma processing space, is configured to be capable of applying high-frequency power, and is provided above the substrate support. The first insulating member is a part of the top portion and is provided between the upper electrode and the chamber to electrically separate the upper electrode from the chamber. The shield member is another part of the top portion, has conductivity, is formed from a silicon-containing material, and extends from the periphery of the upper electrode to the chamber. The portion of the top portion that is exposed to the plasma processing space is composed of a conductor including the upper electrode and the shield member.

Advantages of the Invention

[0006] According to the present disclosure, adhesion of reaction products to the portion exposed to the plasma processing space can be suppressed.

Brief Description of the Drawings

[0007]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Embodiments for Carrying Out the Invention

[0008] Hereinafter, various exemplary embodiments will be described in detail with reference to the drawings. In each drawing, the same or corresponding parts will be denoted by the same reference numerals.

[0009] FIG. 1 is a diagram for explaining a configuration example of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing apparatus 1 is an example of a substrate processing apparatus. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support unit 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. Further, the plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas discharge port for discharging gas from the plasma processing space. The gas supply port is connected to a gas supply unit 20 described later, and the gas discharge port is connected to an exhaust system 40 described later. The substrate support unit 11 is disposed in the plasma processing space and has a substrate support surface for supporting a substrate.

[0010] The plasma generation unit 12 is configured to generate plasma from at least one process gas supplied into the plasma processing space. The plasma formed in the plasma processing space may be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECR plasma), helicon wave plasma (HWP), surface wave plasma (SWP), or the like. Also, various types of plasma generation units including an alternating current (AC) plasma generation unit and a direct current (DC) plasma generation unit may be used. In one embodiment, the AC signal (AC power) used in the AC plasma generation unit has a frequency in the range of 100 kHz to 10 GHz. Accordingly, the AC signal includes radio frequency (RF) signals and microwave signals. In one embodiment, the RF signal has a frequency in the range of 100 kHz to 150 MHz.

[0011] The control unit 2 processes computer-executable instructions for causing the plasma processing apparatus 1 to execute various processes described in the present disclosure. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 so as to execute the various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 is realized by, for example, a computer 2a. The processing unit 2a1 may be configured to read a program from the storage unit 2a2 and perform various control operations by executing the read program. This program may be stored in the storage unit 2a2 in advance, or may be acquired via a medium when necessary. The acquired program is stored in the storage unit 2a2 and read from the storage unit 2a2 by the processing unit 2a1 and executed. The medium may be various storage media readable by the computer 2a, or may be a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The storage unit 2a2 may include a RAM (Random Access Memory), a ROM (Read Only Memory), an HDD (Hard Disk Drive), an SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a LAN (Local Area Network).

[0012] Hereinafter, a configuration example of a capacitively coupled plasma processing apparatus as an example of the plasma processing apparatus 1 will be described. FIG. 2 is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus.

[0013] The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. The plasma processing apparatus 1 also includes a substrate support unit 11 and a gas introduction unit. The gas introduction unit is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas introduction unit includes a showerhead 13. The substrate support unit 11 is disposed in the plasma processing chamber 10. The showerhead 13 is disposed above the substrate support unit 11. In one embodiment, the showerhead 13 constitutes at least a part of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the showerhead 13, the side wall 10a of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 is grounded. The showerhead 13 and the substrate support unit 11 are electrically insulated from the housing of the plasma processing chamber 10.

[0014] The substrate support unit 11 includes a main body 111 and a ring assembly 112. The main body 111 has a central region 111a for supporting the substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of the substrate W. The annular region 111b of the main body 111 surrounds the central region 111a of the main body 111 in plan view. The substrate W is disposed on the central region 111a of the main body 111, and the ring assembly 112 is disposed on the annular region 111b of the main body 111 so as to surround the substrate W on the central region 111a of the main body 111. Accordingly, the central region 111a is also referred to as a substrate support surface for supporting the substrate W, and the annular region 111b is also referred to as a ring support surface for supporting the ring assembly 112.

[0015] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive member. The conductive member of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b disposed within the ceramic member 1111a. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Note that other members surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member, may have the annular region 111b. In this case, the ring assembly 112 may be disposed on the annular electrostatic chuck or the annular insulating member, or may be disposed on both the electrostatic chuck 1111 and the annular insulating member. Also, at least one RF / DC electrode coupled to the RF power supply 31 and / or the DC power supply 32 described later may be disposed within the ceramic member 1111a. In this case, the at least one RF / DC electrode functions as a lower electrode. When the bias RF signal and / or the DC signal described later is supplied to the at least one RF / DC electrode, the RF / DC electrode is also referred to as a bias electrode. Note that the conductive member of the base 1110 and the at least one RF / DC electrode may function as a plurality of lower electrodes. Also, the electrostatic electrode 1111b may function as a lower electrode. Accordingly, the substrate support portion 11 includes at least one lower electrode.

[0016] The ring assembly 112 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one cover ring. The edge ring is formed of a conductive material or an insulating material, and the cover ring is formed of an insulating material.

[0017] Further, the substrate support portion 11 may include a temperature control module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature control module may include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof. A heat transfer fluid such as brine or gas flows through the flow path 1110a. In one embodiment, the flow path 1110a is formed in the base 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111. Further, the substrate support portion 11 may include a heat transfer gas supply portion configured to supply a heat transfer gas to a gap between the back surface of the substrate W and the central region 111a.

[0018] The shower head 13 is configured to introduce at least one process gas from the gas supply unit 20 into the plasma processing space 10s. The shower head 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas introduction ports 13c. The process gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s from the plurality of gas introduction ports 13c. Further, the shower head 13 includes at least one upper electrode. Note that the gas introduction unit may include, in addition to the shower head 13, one or more side gas injectors (SGI) attached to one or more openings formed in the side wall 10a.

[0019] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one process gas from the corresponding gas source 21 to the shower head 13 via the corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Further, the gas supply unit 20 may include at least one flow modulation device for modulating or pulsing the flow rate of at least one process gas.

[0020] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. Thereby, plasma is formed from at least one processing gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a part of the plasma generation unit 12. Further, by supplying a bias RF signal to at least one lower electrode, a bias potential is generated on the substrate W, and the ion component in the formed plasma can be drawn into the substrate W.

[0021] In one embodiment, the RF power supply 31 includes a first RF generation unit 31a and a second RF generation unit 31b. The first RF generation unit 31a is coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit, and is configured to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generation unit 31a may be configured to generate a plurality of source RF signals having different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.

[0022] The second RF generation unit 31b is coupled to at least one lower electrode via at least one impedance matching circuit and is configured to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generation unit 31b may be configured to generate a plurality of bias RF signals having different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. Also, in various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0023] Further, the power supply 30 may include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generation unit 32a and a second DC generation unit 32b. In one embodiment, the first DC generation unit 32a is connected to at least one lower electrode and is configured to generate a first DC signal. The generated first DC signal is applied to at least one lower electrode. In one embodiment, the second DC generation unit 32b is connected to at least one upper electrode and is configured to generate a second DC signal. The generated second DC signal is applied to at least one upper electrode.

[0024] In various embodiments, the first and second DC signals may be pulsed. In this case, a sequence of voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses may have a pulse waveform that is rectangular, trapezoidal, triangular, or a combination thereof. In one embodiment, a waveform generation unit for generating a sequence of voltage pulses from a DC signal is connected between the first DC generation unit 32a and at least one lower electrode. Accordingly, the first DC generation unit 32a and the waveform generation unit constitute a voltage pulse generation unit. When the second DC generation unit 32b and the waveform generation unit constitute a voltage pulse generation unit, the voltage pulse generation unit is connected to at least one upper electrode. The voltage pulses may have a positive polarity or a negative polarity. Also, the sequence of voltage pulses may include one or more positive-polarity voltage pulses and one or more negative-polarity voltage pulses within one period. Note that the first and second DC generation units 32a and 32b may be provided in addition to the RF power supply 31, or the first DC generation unit 32a may be provided in place of the second RF generation unit 31b.

[0025] The exhaust system 40 may be connected to, for example, a gas outlet 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is adjusted by the pressure regulating valve. The vacuum pump may include a turbo molecular pump, a dry pump, or a combination thereof.

[0026] Hereinafter, a plasma processing apparatus according to one exemplary embodiment will be described with reference to FIGS. 2 and 3. FIG. 3 is a diagram showing an upper electrode and a shield member provided in the plasma processing apparatus shown in FIG. 2.

[0027] As shown in FIG. 3, the side wall 10a of the plasma processing chamber 10 has a substantially cylindrical shape. The side wall 10a is connected to the ground, and its potential is set to the ground potential. The upper end of the side wall 10a is open.

[0028] The plasma processing apparatus 1 has a top portion 14 above the plasma processing space 10s. The top portion 14 is provided so as to close the opening of the plasma processing chamber 10. That is, the top portion 14 covers and closes the opening at the upper end of the side wall 10a. A part of the top portion 14 is exposed to the plasma processing space 10s.

[0029] The shower head 13 that constitutes a part of the top portion 14 includes at least one upper electrode 13d. The upper electrode 13d is a part of the top portion 14, is configured to be able to apply high-frequency power, and is provided above the substrate support portion 11. The upper electrode 13d is electrically connected to, for example, the first RF generation unit 31a. The first RF generation unit 31a is an example of a high-frequency power source.

[0030] The upper electrode 13d includes a top plate 13e and a first support 13f. The top plate 13e has a substantially disk shape. The top plate 13e is in contact with the plasma processing space 10s. The top plate 13e is formed of a conductive material such as silicon, aluminum oxide, or quartz. Note that the top plate 13e may be configured by forming a corrosion-resistant film on the surface of a member made of a conductor such as aluminum. The corrosion-resistant film is formed of a material such as aluminum oxide or yttrium oxide, for example.

[0031] The first support 13f is provided on the top plate 13e. The first support 13f detachably supports the top plate 13e. The first support 13f is formed of, for example, aluminum. The first support 13f provides at least one gas diffusion chamber 13b inside thereof. The first support 13f provides at least one gas inlet 13c together with the top plate 13e. At least one gas inlet 13c extends downward from at least one gas diffusion chamber 13b and penetrates the top plate 13e.

[0032] The top portion 14 further includes a first insulating member 41. The first insulating member 41 is a part of the top portion 14. The first insulating member 41 is provided between the upper electrode 13d and the plasma processing chamber 10. The first insulating member 41 electrically separates the upper electrode 13d and the plasma processing chamber 10. The first insulating member 41 is provided outside the upper electrode 13d (on the side wall 10a side). The first insulating member 41 has a substantially annular shape and extends in the circumferential direction so as to surround the upper electrode 13d. The first insulating member 41 is formed of an insulator such as quartz.

[0033] The top portion 14 further includes a shield member 42. The shield member 42 is another part of the top portion 14 and has conductivity. The shield member 42 is formed of, for example, a silicon-containing material. The shield member 42 extends from the periphery of the upper electrode 13d to the plasma processing chamber 10. The shield member 42 extends in the circumferential direction so as to surround the peripheral portion of the top plate 13e. The shield member 42 has, for example, a substantially annular shape. The shield member 42 is electrically floating. That is, the shield member 42 has a floating potential different from the potential of the upper electrode 13d and the potential of the plasma processing chamber 10.

[0034] The portion of the top portion 14 exposed to the plasma processing space 10s is composed of a conductor including the upper electrode 13d and the shield member 42. For example, the portion of the top portion 14 exposed to the plasma processing space 10s is composed only of a conductor. Hereinafter, the portion of the top portion 14 exposed to the plasma processing space 10s is referred to as the "exposed portion of the top portion 14". In the example shown in FIG. 3, the exposed portion of the top portion 14 is composed only of the upper electrode 13d (or the top plate 13e) and the shield member 42. The shield member 42 is provided, for example, below the first insulating member 41. The shield member 42 extends so that the first insulating member 41 is not exposed to the plasma processing space 10s. In the example shown in FIG. 3, the shield member 42 is provided below a part of the first support 13f, the first insulating member 41, and a part of the second support 43 described later.

[0035] In the plasma processing apparatus 1, the entire exposed area of the top portion 14 is formed of a conductive material. Therefore, the reaction products adhering to the exposed area can be removed by the electrical bias during dry cleaning. As a result, it is possible to suppress the reaction products from adhering as particles onto the substrate W.

[0036] The plasma processing chamber 10 may further include a second support 43. The second support 43 is provided outside the first insulating member 41 and above the shield member 42. A minute gap is provided between the second support 43 and the shield member 42. The second support 43 is provided on the side wall 10a of the plasma processing chamber 10. The second support 43 is electrically connected to the side wall 10a of the plasma processing chamber 10. The potential of the second support 43 is set to the ground potential. The first insulating member 41 is provided between the first support 13f of the upper electrode 13d and the second support 43. The second support 43 has a substantially annular shape and extends in the circumferential direction so as to surround the first insulating member 41. The second support 43 is formed of a metal such as aluminum.

[0037] The plasma processing apparatus 1 further includes at least one second insulating member 44. The at least one second insulating member 44 is provided outside the first insulating member 41 and on the shield member 42. The at least one second insulating member 44 is interposed between the plasma processing chamber 10 and the shield member 42. In the example shown in FIG. 3, the at least one second insulating member 44 is provided such that its lower surface contacts the outer upper surface of the shield member 42. The at least one second insulating member 44 is provided between the shield member 42 and the second support 43. The at least one second insulating member 44 is, for example, a plate-like member having a substantially annular shape. The at least one second insulating member 44 is formed of an insulator such as insulating ceramics, quartz, or metal oxide.

[0038] The plasma processing apparatus 1 further includes at least one third insulating member 45. The at least one third insulating member 45 is provided under the shield member 42. The at least one third insulating member 45 is interposed between the plasma processing chamber 10 and the shield member 42. The shield member 42 is supported between the at least one second insulating member 44 and the at least one third insulating member 45.

[0039] In the example shown in FIG. 3, the at least one third insulating member 45 includes a third support 45a and a sealing member 45b. The third support 45a is provided on the side wall 10a. The third support 45a supports the shield member 42 from below. A part inside the third support 45a may be exposed to the plasma processing space 10s below the top portion 14. The sealing member 45b is provided between the shield member 42 and the third support 45a. The sealing member 45b is arranged to contact an outer portion of the shield member 42 and an outer portion of the third support 45a. The sealing member 45b is, for example, an O-ring that separates the reduced-pressure environment including the plasma processing space 10s from the atmospheric pressure environment.

[0040] As a path through which a current flows based on the high-frequency power supplied to the upper electrode 13d, a first path that does not pass through the plasma and a second path that passes through the plasma can be considered. In the first path, the current flows from the upper electrode 13d to the side wall 10a through the shield member 42, the at least one second insulating member 44, and the second support 43. In the second path, the current flows from the upper electrode 13d to the side wall 10a via the plasma in the plasma processing space 10s. The at least one second insulating member 44 reduces the capacitance between the shield member 42 and the second support 43 and increases the impedance of the first path. The high-frequency power supplied to the upper electrode 13d is efficiently coupled to the plasma in the plasma processing space 10s. Also, the high-frequency power supplied to the upper electrode 13d is more efficiently coupled to the plasma even below the shield member 42.

[0041] Whether the high-frequency power is efficiently coupled to the plasma in the plasma processing space 10s in the second path can be determined by the variation of the impedance circuit (matcher) provided in the power supply 30. When the high-frequency power is more efficiently coupled to the plasma, the resistance value recognized by the impedance circuit increases as the plasma density increases, and the resistance value decreases as the plasma density decreases. The resistance value here is the real part of the impedance of the load recognized in the impedance circuit.

[0042] Hereinafter, refer to FIG. 4. FIG. 4 is a graph showing the change in the real part (resistance value) of the impedance of the load of the high-frequency power supply according to the power level of the high-frequency power supplied to the upper electrode. In the graph shown in FIG. 4, the horizontal axis is the power level (W) of the high-frequency power supplied to the upper electrode 13d, and the vertical axis is the real part of the impedance of the load of the high-frequency power supply (the first RF generation unit 31a), that is, the resistance value (Ω). The horizontal axis of FIG. 4 shows that the power level (W) of the high-frequency power increases from left to right. The characteristics shown in the graph of FIG. 4 were obtained with the second insulating member 44 having a thickness of 5 mm provided between the shield member 42 and the second support 43. The second insulating member 44 is a quartz member. The gap between the upper electrode 13d and the shield member 42 is 0.5 mm. The graph shown in FIG. 4 shows the resistance value when the power level of the high-frequency power is changed. The impedance of the load of the high-frequency power supply (the first RF generation unit 31a) and its real part (resistance value) are recognized in the matcher connected between the high-frequency power supply and the upper electrode 31d.

[0043] As shown in FIG. 4, the real part of the impedance of the load of the high-frequency power supply, that is, the resistance value, increases as the power level of the high-frequency power increases. Furthermore, the resistance value changes linearly with the increase in the power level of the high-frequency power. This indicates that the high-frequency power is efficiently coupled to the plasma.

[0044] FIG. 5 is a graph showing the relationship between the plasma density and the real part (resistance value) of the impedance of the load of the high-frequency power source. In the graph shown in FIG. 5, the horizontal axis represents the plasma density (S / m), and the vertical axis represents the real part of the impedance of the load of the high-frequency power source (the first RF generation unit 31a), that is, the resistance value (Ω). The horizontal axis of FIG. 5 shows an increase in plasma density (S / m) from left to right. FIG. 5 shows the measurement results when the thicknesses of the second insulating member 44 are set to 5 mm, 10 mm, 15 mm, 20 mm, and 35 mm, respectively.

[0045] As shown in FIG. 5, when plasma is generated, the real part of the impedance of the load of the high-frequency power source, that is, the resistance value, decreases as the plasma density increases. This result indicates that it is possible to specify the plasma density based on the resistance value and that it is possible to control the plasma density based on the resistance value. Also, as shown in FIG. 5, the resistance value changes more greatly in response to changes in the plasma density as the thickness of the second insulating member 44 increases. This shows that by using the second insulating member 44 having a large thickness, it becomes easier to detect fluctuations in the plasma density and it becomes possible to more easily control the plasma density.

[0046] As described above, various exemplary embodiments have been described, but the present invention is not limited to the above-described exemplary embodiments, and various additions, omissions, substitutions, and changes may be made. Also, it is possible to form other embodiments by combining elements in different embodiments. For example, at least one of the upper electrode 13d and the shield member 42 may be electrically connected to the second DC generation unit 32b. The second DC generation unit 32b is an example of a DC power source.

[0047] Hereinafter, with reference to FIG. 6, another exemplary embodiment of the plasma processing apparatus employed in the plasma processing apparatus will be described. FIG. 6 is a diagram for explaining the plasma processing apparatus according to another exemplary embodiment. The plasma processing apparatus 1A according to the exemplary embodiment shown in FIG. 6 is different from the plasma processing apparatus 1 in that the first insulating member 41A has a first insulating portion 46 and a second insulating portion 47. That is, it is different in that the plasma processing apparatus 1A does not include the second insulating member 44 of the plasma processing apparatus 1.

[0048] The top portion 14 includes the first insulating member 41A. The first insulating member 41A is a part of the top portion 14. The first insulating member 41A is formed of an insulator such as quartz. The first insulating member 41A has a first insulating portion 46, and the first insulating portion 46 is provided between the upper electrode 13d and the plasma processing chamber 10. The first insulating portion 46 electrically separates the upper electrode 13d and the plasma processing chamber 10. The first insulating portion 46 is provided outside the upper electrode 13d (on the side wall 10a side). The first insulating portion 46 has a substantially annular shape and extends in the circumferential direction so as to surround the upper electrode 13d.

[0049] The second insulating portion 47 is provided outside the first insulating portion 46 and on the shield member 42. The second insulating portion 47 has, for example, a substantially annular shape and extends in the circumferential direction so as to surround the first insulating portion 46. The second insulating portion 47 extends so as to protrude outward from the lower end portion of the first insulating portion 46. The second insulating portion 47 is interposed between the plasma processing chamber 10 and the shield member 42. In the example shown in FIG. 6, the second insulating portion 47 is provided such that its lower surface contacts the upper surface outside the shield member 42. The second insulating portion 47 is provided between the shield member 42 and the second support 43.

[0050] In this way, in the plasma processing apparatus 1A, the first insulating member 41A having the first insulating portion 46 and the second insulating portion 47 is interposed between the upper electrode 13d and the plasma processing chamber 10, and between the plasma processing chamber 10 and the shield member 42. As a result, the number of members for insulating the current can be reduced, and the man-hours required for installing the plasma processing apparatus 1A can be reduced.

[0051] Further, a DC connection portion 48 is provided in the second support 43. The DC connection portion 48 is connected from the inside of the second support 43 through the second insulating portion 47 to a portion outside the shield member 42. The portion outside the shield member 42 is, for example, a portion outside the shield member 42 in the radial direction and is a portion not exposed to the plasma processing space 10s. The portion outside the shield member 42 may be a peripheral edge portion of the shield member 42. The portion outside the shield member 42 is sandwiched and supported between the lower end portion of the DC connection portion 48 and at least one third insulating member 45. For example, the lower end portion of the DC connection portion 48 is provided directly above the sealing member 45b of at least one third insulating member 45 in the circumferential direction. The shield member 42 in the plasma processing apparatus 1A does not necessarily have to be electrically floating.

[0052] The second DC signal generated by the second DC generation unit 32b is applied to the shield member 42 via the DC connection portion 48. The second DC generation unit 32b generates a signal having a frequency of, for example, 400 kHz as the second DC signal and supplies it to the shield member 42 via the DC connection portion 48. At this time, for example, the first RF generation unit 31a may generate a signal having a frequency of, for example, 100 MHz as the source RF signal and supply it to the upper electrode 13d. Further, at this time, the second RF generation unit 31b may generate a signal having a frequency of, for example, 13 MHz as the bias RF generation signal and supply it to the lower electrode. In this way, even when the DC connection portion 48 is located outside the first insulating member 41A, by connecting the DC connection portion 48 through the second insulating portion 47 to the shield member 42, the second DC signal can be appropriately applied to the shield member 42.

[0053] Further, the inner wall portion 10t inside the side wall 10a facing the plasma processing space 10s is formed of silicon. The inner wall portion 10t can serve as a counter electrode with respect to the shield member 42. At least a part of the current applied to the shield member 42 flows to the side wall 10a via the plasma in the plasma processing space 10s and the inner wall portion 10t. Thus, since the inner wall portion 10t is formed of silicon, there is no need to separately arrange another member (device) serving as a counter electrode in the plasma processing space 10s. Therefore, the man-hours required for installing the plasma processing apparatus 1A can be reduced.

[0054] Hereinafter, an example of a processing circuit that can be used as one or more processing circuits in the plasma processing apparatus 1 such as the control unit 2 will be described. FIG. 7 is a block diagram of a processing circuit that implements the operations described in this specification on a computer. FIG. 7 illustrates a processing circuit 130 that can be used to control control processing on an arbitrary computer. The descriptions or blocks in the flowchart represent a module, segment, or part of code that includes one or more executable instructions for implementing a specific logical function or step of the processing. As will be understood by those skilled in the art, depending on the related functions, another embodiment having executable functions in an order different from the illustrated or described order, such as substantially simultaneously or in the reverse order, is included within the scope of the exemplary embodiments of the present disclosure. The various elements, features, and processes described in this specification may be used independently of each other or may be combined in various ways. All possible combinations and partial combinations may be included within the scope of the present disclosure.

[0055] In FIG. 7, the processing circuit 130 includes a CPU 1200 that performs one or more of the above-described and hereinafter-described control processes. The processing data and instructions may be stored in the memory 1202. These processing data and instructions may be stored in a storage medium disk 1204 such as a hard disk drive (HDD) or a portable storage medium, or may be stored remotely. Furthermore, the present disclosure described in the claims is not limited to the form of a computer-readable medium in which instructions for the processes according to the present invention are stored. For example, these instructions may be stored in a CD, DVD, flash memory, RAM, ROM, PROM, EPROM, EEPROM, hard disk, or any other information processing device such as a server and / or computer with which the processing circuit 130 communicates.

[0056] Furthermore, the present disclosure described in the claims may be provided as a utility application, background daemon, component of an operating system, or a combination thereof, and may be executed in conjunction with an operating system known to those skilled in the art such as the CPU 1200 and Microsoft Windows, UNIX, Solaris, LINUX, Apple MAC-OS, etc.

[0057] The hardware elements that make up the processing circuit 130 can be realized by various circuit elements. Furthermore, each function of the above-described embodiments can be implemented by a circuit including one or more processing circuits. As shown in FIG. 7, the processing circuit includes a processing device on which a specific program has been made, for example, a processing device (CPU) 1200. The processing circuit also includes devices such as application specific integrated circuits (ASICs) and conventional circuit components configured to perform the described functions.

[0058] In FIG. 7, the processing circuit 130 includes a CPU 1200 that performs the above-described processing. The processing circuit 130 may be a general-purpose computer or a specific dedicated machine. In one embodiment, when the processing device 1200 is programmed to control the plasma generation unit 12 and the gas supply unit 20 (particularly, when performing any of the processing described in FIGS. 1 to 6), the processing circuit 130 functions as a specific dedicated machine.

[0059] Alternatively or further, the CPU 1200 may be implemented on an FPGA, ASIC, PLD, or using discrete logic circuits, as would be understood by those skilled in the art. Further, the CPU 1200 may be implemented as a plurality of processing devices that cooperate to perform the instructions of the processing of the present invention described above in parallel.

[0060] The processing circuit 130 in FIG. 7 also includes a network controller 1206 for interfacing with the network 1228, such as an Intel Ethernet PRO network interface card of Intel Corporation in the United States. The network 1228 may be, as is understandable, a public network such as the Internet, a private network such as a LAN or WAN, or any combination thereof, and may also include a subnetwork such as a PSTN or ISDN. The network 1228 may also be wired, such as an Ethernet network, or wireless, such as a cellular network including an EDGE, 3G, 4G wireless cellular system. The wireless network may also be Wi-Fi, Bluetooth, or any other known wireless communication form.

[0061] The processing circuit 130 further includes a display device controller 1208, such as a graphics card or graphics adapter, for interfacing with a display device 1210 such as a monitor. A general-purpose I / O interface 1212 is interfaced with a keyboard and / or mouse 1214, and a touch panel 1216 that is integrated with or separate from the display device 1210. The general-purpose I / O interface is also connected to various peripheral devices 1218 such as a printer and a scanner.

[0062] The memory device controller 1224 is connected to the memory medium disk 1204 via a communication bus 1226 such as ISA, EISA, VESA, PCI, etc., and all components of the processing circuit 130 are connected to each other. Regarding the general features and functions of the display device 1210, the keyboard and / or mouse 1214, and the display device controller 1208, the memory device controller 1224, the network controller 1206, the audio controller 1220, and the general-purpose I / O interface 1212, the description is omitted in this specification as known for the sake of simplicity.

[0063] The exemplary circuit elements described in this disclosure are replaceable with other elements and may have a structure different from the examples described in this specification. Further, a circuit configured to implement the features described in this specification may be implemented by a plurality of circuit units (e.g., chips), or these features may be incorporated into the circuits of a single chipset.

[0064] The functions and features described in this specification may also be executed by various components distributed on the system. For example, one or more processing devices may execute the functions of these systems, in which case the processing devices are distributed over a plurality of components communicating within a network. As distributed components, in addition to various human interfaces and communication devices (display monitors, smartphones, tablets, personal digital assistants (PDAs), etc.), one or more client machines and server machines capable of sharing processing may be included. The network may be a private network such as a LAN or WAN, or a public network such as the Internet. Input to the system may be received by direct input from the user, or remotely in real time or as batch processing. Further, some of the embodiments may be implemented on modules or hardware that are not the same as those described above. Therefore, other embodiments are also included in the scope of the claims.

[0065] Here, various exemplary embodiments included in the present disclosure are described in the following [E1] to [E9].

[0066] [E1] A chamber that is electrically grounded and provides a plasma processing space, A substrate support portion provided in the chamber and configured to support a substrate, A part of the top portion provided to close the opening of the chamber above the plasma processing space, configured to be capable of applying high-frequency power, and an upper electrode provided above the substrate support portion, A part of the top portion, a first insulating member provided between the upper electrode and the chamber so as to electrically separate the upper electrode and the chamber, Another part of the top portion, having conductivity, formed from a silicon-containing material, and a shield member extending from the periphery of the upper electrode to the chamber, Including, A portion of the top portion exposed to the plasma processing space is composed of a conductor including the upper electrode and the shield member, Plasma processing apparatus.

[0067] [E2] Further comprising at least one second insulating member provided outside the first insulating member so as to be interposed between the chamber and the shield member and on the shield member, The plasma processing apparatus according to [E1].

[0068] [E3] At least one third insulating member provided under the shield member so as to be interposed between the chamber and the shield member, and further comprising the at least one third insulating member that supports the shield member between the at least one second insulating member and the at least one third insulating member, The plasma processing apparatus according to [E2].

[0069] [E4] The plasma processing apparatus according to [E3], wherein the at least one third insulating member is formed of an insulating ceramic, quartz, or a metal oxide.

[0070] [E5] The first insulating member has a first insulating portion provided between the upper electrode and the chamber, and a second insulating portion provided outside the first insulating portion and on the shield member so as to be interposed between the chamber and the shield member. The plasma processing apparatus according to [E1]. [E1]

[0071] [E6] The plasma processing apparatus according to [E5], further comprising at least one other insulating member provided under the shield member so as to be interposed between the chamber and the shield member, and supporting the shield member between the second insulating portion of the first insulating member and the at least one other insulating member. [E5]

[0072] [E7] The plasma processing apparatus according to [E6], wherein the at least one third insulating member is formed of an insulating ceramic, quartz, or a metal oxide.

[0073] [E8] The plasma processing apparatus according to any one of [E1] to [E7], further comprising a DC power source electrically connected to at least one of the upper electrode and the shield member.

[0074] [E9] The plasma processing apparatus according to any one of [E1] to [E7], wherein the shield member is electrically floating.

[0075] [E10] The plasma processing apparatus according to any one of [E1] to [E9], further comprising a high-frequency power source configured to generate the high-frequency power and electrically connected to the upper electrode.

[0076] From the above description, it will be understood that the various embodiments of the present disclosure are described herein for the purpose of illustration and that various changes can be made without departing from the scope and spirit of the present disclosure. Therefore, the various embodiments disclosed herein are not intended to be limiting, and the true scope and spirit are indicated by the appended claims.

Description of Reference Numerals

[0077] 1, 1A... Plasma processing apparatus, 2... Control unit, 10... Plasma processing chamber, 10a... Side wall, 10s... Plasma processing space, 11... Substrate support unit, 12... Plasma generation unit, 13... Shower head, 13d... Upper electrode, 13e... Top plate, 13f... First support, 14... Ceiling part, 30... Power source, 31... RF power source, 31a... First RF generation unit, 32... DC power source, 32b... Second DC generation unit, 41, 41A... First insulating member, 42... Shielding member, 43... Second support, 44... Second insulating member, 45... Third insulating member, 46... First insulating part, 47... Second insulating part, 111... Main body part, 112... Ring assembly, 1110... Base, 1111... Electrostatic chuck, W... Substrate.

Claims

1. A chamber providing a plasma processing space, a substrate support portion provided in the chamber and configured to support a substrate, a part of the top portion provided above the plasma processing space to close the opening of the chamber, configured to be capable of applying high-frequency power, and an upper electrode provided above the substrate support portion, a part of the top portion, a first insulating member provided between the upper electrode and the chamber to electrically isolate the upper electrode from the chamber, another part of the top portion, a shield member having conductivity, formed from a silicon-containing material, and extending from the periphery of the upper electrode to the chamber, at least one second insulating member provided outside the first insulating member and on the shield member so as to be interposed between the chamber and the shield member, at least one third insulating member provided under the shield member so as to be interposed between the chamber and the shield member, and supporting the shield member between the at least one second insulating member and the at least one third insulating member, the at least one third insulating member, comprising, a part of the top portion exposed to the plasma processing space is composed of a conductor including the upper electrode and the shield member, a plasma processing apparatus.

2. The plasma processing apparatus according to claim 1, wherein the at least one third insulating member is formed from insulating ceramics, quartz, or a metal oxide.

3. A chamber providing a plasma processing space, a substrate support portion provided in the chamber and configured to support a substrate, a part of the top portion provided above the plasma processing space to close the opening of the chamber, configured to be capable of applying high-frequency power, and an upper electrode provided above the substrate support portion, a part of the top portion, a first insulating member provided between the upper electrode and the chamber to electrically isolate the upper electrode from the chamber, another part of the top portion, a shield member having conductivity, formed from a silicon-containing material, and extending from the periphery of the upper electrode to the chamber, comprising, a part of the top portion exposed to the plasma processing space is composed of a conductor including the upper electrode and the shield member, the first insulating member is A first insulating part provided between the upper electrode and the chamber; A second insulating part provided outside the first insulating part and on the shield member so as to be interposed between the chamber and the shield member; and having, A plasma processing apparatus.

4. At least one other insulating member provided under the shield member so as to be interposed between the chamber and the shield member, and supporting the shield member between the second insulating part of the first insulating member and the at least one other insulating member. Further comprising at least one other insulating member, The plasma processing apparatus according to claim 3.

5. The plasma processing apparatus according to claim 4, wherein the at least one other insulating member is formed of insulating ceramics, quartz or metal oxide.

6. The plasma processing apparatus according to any one of claims 1 to 5, further comprising a DC power source electrically connected to at least one of the upper electrode and the shield member.

7. The plasma processing apparatus according to any one of claims 1 to 5, wherein the shield member is electrically floating.

8. The plasma processing apparatus according to any one of claims 1 to 5, further comprising a high-frequency power source configured to generate the high-frequency power and electrically connected to the upper electrode.

9. The inner wall portion inside the side wall of the chamber is formed of silicon. The plasma processing apparatus according to any one of claims 1 to 5.

10. The plasma processing apparatus according to any one of claims 1 to 5, further comprising a DC power source electrically connected to a portion outside the shield member.

11. Further comprising a DC power source electrically connected to a portion outside the shield member via a connection portion, The plasma processing apparatus according to any one of claims 3 to 5, wherein the connection portion penetrates the second insulating part and is connected to a portion outside the shield member.

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