Coil electronic component

Abstract

To provide a coil electronic component capable of reducing the machining impact applied to a support substrate or the like when a through hole is formed in the support substrate, and securing sufficient performance even when a space between coil patterns is reduced and miniaturized.SOLUTION: A coil electronic component 100 includes: a support substrate 102; a coil pattern 103 disposed on the support substrate; a sealing material 101 for sealing at least a part of the support substrate 102 and the coil pattern 103; and external electrodes 105 and 106 which are disposed on the outside of the sealing material 101 and connected to the coil pattern 103. The coil pattern 103 includes a seed layer 103a having a thickness of 1.5 μm or less and a plating layer 103b disposed on the seed layer.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a coil electronic component.

Background Art

[0002] With the miniaturization and thinning of electronic devices such as digital TVs, mobile phones, and notebooks, miniaturization and thinning are also required for coil components applied to such electronic devices. In addition, in order to meet such needs, research and development on various forms of wound or thin-film coil components are actively carried out.

[0003] The main issue due to the miniaturization and thinning of coil electronic components is to achieve the same characteristics as before despite such miniaturization and thinning. In order to meet such requirements, it is necessary to increase the proportion of the magnetic material in the core filled with the magnetic material, but there is a limit to increasing the proportion due to reasons such as the strength of the inductor body and the change in frequency characteristics according to the insulation.

[0004] In the case of such coil electronic components, attempts have been continuously made to further reduce the thickness of the chip with the recent changes such as the integration, multifunctionality, and slimming of sets. Therefore, in this technical field, a method capable of ensuring high performance and reliability during the slimming of such chips is required.

Summary of the Invention

Problems to be Solved by the Invention

[0005] One of the objects of the present invention is to provide a coil electronic component capable of ensuring sufficient performance even when the interval between coil patterns is reduced for miniaturization. Another object is to reduce the processing impact applied to the support substrate or the like when forming through holes in the support substrate.

Means for Solving the Problems

[0006] As a method for solving the above-described problems, the present invention proposes a novel structure of a coil electronic component through one embodiment. Specifically, it includes a support substrate, a coil pattern disposed on the support substrate, a sealing material that seals at least a part of the support substrate and the coil pattern, and an external electrode disposed outside the sealing material and connected to the coil pattern. The coil pattern includes a seed layer having a thickness of 1.5 μm or less, and a plating layer disposed on the seed layer.

[0007] In one embodiment, the seed layer can have a thickness of 0.5 μm or more.

[0008] In one embodiment, the coil pattern forms a plurality of turns, and adjacent turns can be spaced apart at a pitch of 35 μm or less.

[0009] In one embodiment, the support substrate can have a thickness of 20 μm or more and 40 μm or less.

[0010] In one embodiment, the plating layer can include a first plating layer disposed on the seed layer and a second plating layer that covers the first plating layer.

[0011] In one embodiment, the first plating layer is a pattern plating layer and can have the same width as the seed layer.

[0012] In one embodiment, the second plating layer can cover the upper surface and side surface of the first plating layer, as well as the side surface of the seed layer.

[0013] In one embodiment, the second plating layer may be an isotropic plating layer.

[0014] In one embodiment, the plating layer can further include a third plating layer disposed on the upper part of the second plating layer.

[0015] In one embodiment, the third plating layer may be an anisotropic plating layer.

[0016] In one embodiment, the thickness of the encapsulant may be 0.65 mm or less.

[0017] In one embodiment, the seed layer may be a Cu layer.

Advantages of the Invention

[0018] In the case of the coil electronic component according to one embodiment of the present invention, by realizing the coil pattern using a thin seed pattern, the interval between the coil patterns can be reduced. Thereby, even when miniaturized, high performance can be obtained.

Brief Description of the Drawings

[0019]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Embodiments for Carrying Out the Invention

[0020] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Also, the embodiments of the present invention are provided to more fully explain the present invention to those with average knowledge in the relevant technical field. Therefore, elements such as the shape and size in the drawings may be enlarged or reduced (or emphasized or simplified) for a clearer explanation, and elements denoted by the same reference numerals in the drawings are the same elements.

[0021] FIG. 1 is a perspective view schematically showing a coil electronic component according to an embodiment of the present invention, FIG. 2 is a cross-sectional view taken along line I-I' of FIG. 1, and FIG. 3 is a cross-sectional view taken along line II-II'' of FIG. 1.

[0022] Referring to the above drawings, a coil electronic component 100 according to an embodiment of the present invention includes a sealing material 101, a support substrate 102, a coil pattern 103, and external electrodes 105 and 106. The coil pattern 103 includes a seed layer 103a and a plating layer 103b disposed thereon. Here, the thickness t1 of the seed layer 103a is formed to be 1.5 μm or less. Thereby, with the seed layer 103a as a seed, the plating layer 103b etched according to the shape of the coil pattern 103 is not over-etched. Details thereof will be described later.

[0023] The encapsulant 101 can encapsulate at least a part of the support substrate 102 and the coil pattern 103, and can form the appearance of the coil electronic component 100. In the case of this embodiment, the length of the encapsulant 101 (the length in the X direction in FIG. 1) may be larger than the thickness (the length in the Z direction in FIG. 1), and further, the ratio of the thickness to the length of the encapsulant 101 can be about 0.6 or less. In this way, the coil electronic component 100 with a reduced thickness corresponds to a so-called Low Profile component. In this case, the thickness T of the encapsulant 101 can be 0.65 mm or less. In the case of such a low-profile coil electronic component 100, there is a limit to increasing the size of the coil pattern 103, and it may be difficult to improve the electrical and magnetic characteristics. In this embodiment, by utilizing a method such as reducing the thickness of the seed layer 103a and reducing the interval between the coil patterns 103, even if the coil electronic component 100 is miniaturized, characteristics such as inductance are sufficiently ensured.

[0024] When the area covering the coil pattern 103 in the encapsulant 101 is defined as the covering portion, the thickness of the covering portion may be smaller than the thickness of the coil pattern 103. Further, the thickness of the coil pattern 103 may be twice or more the thickness of the covering portion. In this way, by increasing the thickness of the coil pattern 103 as compared with the covering portion of the support substrate 102, the DC resistance characteristics and Ls characteristics of the coil electronic component 100 can be improved.

[0025] On one hand, the encapsulant 101 can be formed such that a partial region of the extraction pattern L is exposed to the outside. The encapsulant 101 can contain magnetic particles, and an insulating resin can be interposed between such magnetic particles. Further, the surface of the magnetic particles can be coated with an insulating film. The magnetic particles that can be included in the encapsulant 101 include ferrite, metal, etc. In the case of metal, for example, it can be made of an Fe-based alloy or the like. Specifically, the magnetic particles can be formed of a nano-crystalline grain boundary alloy having an Fe-Si-B-Cr composition, an Fe-Ni-based alloy, or the like. For example, the particle size of the Fe-based alloy particles may be 0.1 μm or more and 20 μm or less, and they can be included in a dispersed form on a polymer such as an epoxy resin or polyimide. Thus, when realizing magnetic particles with an Fe-based alloy, although excellent in magnetic properties such as magnetic permeability, there is a possibility of being weak against ESD (Electrostatic Discharge). Therefore, an additional insulating structure can be interposed between the coil pattern 103 and the magnetic particles. Also, as shown in the illustrated form, the encapsulant 101 can fill the region between adjacent patterns in the coil pattern 103.

[0026] The support substrate 102 supports the coil pattern 103 and can be formed of a polypropylene glycol (PPG) substrate, a ferrite substrate, a metal-based soft magnetic substrate, or the like. As shown in the illustrated form, the central portion of the support substrate 102 is penetrated to form a through-hole, and the through-hole can be filled with the encapsulant 101 to form a magnetic core portion C. In the case of this embodiment, the thickness t2 of the support substrate 102 may be 20 μm or more and 40 μm or less. This is thinner than those used in conventional coil electronic components. By reducing the thickness t2 of the support substrate 102 compared to the conventional one, the thickness of the coil pattern 103 can be increased, and the amount filled in the region between the coil patterns 103 in the encapsulant 101 can be increased. Therefore, based on components of the same thickness, the DC resistance (Rdc) characteristics are improved by the amount of increase in the thickness of the coil pattern 103, and the amount of magnetic particles included in the encapsulant 101 increases, and the Ls characteristics can also be improved.

[0027] The coil pattern 103 is disposed on at least one of a first surface (upper surface with reference to FIG. 2) and a second surface (lower surface with reference to FIG. 2) that face each other on the support substrate 102. As in the present embodiment, the coil pattern 103 may be disposed on both the first surface and the second surface of the support substrate 102, or alternatively, may be disposed on only one surface of the support substrate 102. The coil pattern 103 can include a pad region P, and each coil pattern 103 formed on the first surface and the second surface of the support substrate 102 can be connected to each other via a via V that penetrates the support substrate 102. The via V that penetrates the support substrate 102 can be formed by forming a through hole by laser processing or the like and filling it with a conductive material. However, a processing impact may be applied to the support substrate 102 during laser processing. As described above, when the support substrate 102 has a thin thickness of 20 to 40 μm, the laser processing energy can be reduced, and the possible processing impact applied to the support substrate 102 can be reduced. Also, the size of the via V formed in the support substrate 102 is reduced, which can be advantageous for miniaturization of the coil electronic component 100. Furthermore, such laser processing can be performed in a state where the seed layer 103a is formed, and when a thin seed layer 103a of 1.5 μm or less is used as in the present embodiment, the impact due to laser processing can be further reduced.

[0028] As described above, the coil pattern 103 includes a seed layer 103a having a thickness t1 of 1.5 μm or less and a plating layer 103b thereon. In this case, the seed layer 103a can have a thickness of 0.5 μm or more. The seed layer 103a may be a Cu layer in the form of a Cu thin film or the like. However, it may contain other metal components such as Ag, Pt, Ni, etc., and may not contain Cu. By forming the seed layer 103a to have a thinner thickness than before, the interval between turns in the coil pattern 103 can be reduced. As a result, the number of turns of the coil pattern 103, the size of the magnetic core portion C, etc. can be increased. And the increase in the number of turns of the coil pattern 103, the size of the magnetic core portion C, etc. can bring about an improvement in the inductance characteristics of the coil electronic component 100. Specifically, referring to FIG. 2, the coil pattern 103 forms a plurality of turns, and adjacent turns can be separated by a pitch d of 35 μm or less.

[0029] Referring to FIGS. 4 and 5, the realization of a fine pitch by the thin seed layer 103a will be described. FIG. 4 is a diagram showing a state in which a seed layer 103a' and a plating layer 103b' are sequentially formed on the support substrate 102. The plating layer 103b' can be a pattern plating layer formed using the seed layer 103a' as a seed, and can contain components such as Cu, Ag, Pt, Ni, etc. Since the seed layer 103a' in FIG. 4 is formed over the entire surface of the support substrate 102, it is necessary to etch it according to the shape of the coil pattern 103. When etching the seed layer 103a', the plating layer 103b' is etched together. FIG. 5 is a diagram showing a state in which the etching process is completed, and the dotted line corresponds to the outer lines of the seed layer 103a' and the plating layer 103b' before etching. By such an etching process, the seed layer 103a and the plating layer 103b can have the same width.

[0030] When the seed layer 103a' is formed thick, the plating layer 103b' is over-etched. As a result, the thickness of the coil pattern 103 becomes thin and the interval between turns becomes wider. According to the experimental results of the present inventor, it was possible to minimize the thickness t1 of the seed layer 103a to 1.5 μm or less. However, when the thickness t1 of the seed layer 103a is too thin, there is a possibility that a recess may occur in the support substrate 102 due to an etching process or the like, and it may become difficult to form the coil pattern 103 itself. Table 1 below shows the results of experiments on the feasibility of realizing a fine pitch, the presence or absence of substrate recesses, and the feasibility of realizing a coil according to the thickness of the seed layer 103a. Here, the presence or absence of realizing a fine pitch means that the turns adjacent to each other in the coil pattern 103 are 35 μm or less.

[0031]

Table 1

[0032] As can be seen from the above experimental results, when the thickness of the seed layer exceeds 1.5 μm, the interval between the coil patterns becomes wide and it is impossible to realize a fine pitch. This is because, as described above, the coil pattern is over-etched in the process of etching the seed layer. Also, when the thickness of the seed layer is less than 0.5 μm, it was found that there is a problem that a recess occurs in the substrate. From such results, it was confirmed that the thickness of the seed layer is preferably 0.5 μm or more and 1.5 μm.

[0033] Referring again to FIGS. 1 to 3, the remaining configuration of the coil electronic component 100 will be described. The external electrodes 105 and 106 are disposed outside the encapsulant 101 and are connected to the lead-out pattern L. The external electrodes 105 and 106 can be formed using a paste containing a metal excellent in electrical conductivity. The paste can be, for example, a conductive paste containing nickel (Ni), copper (Cu), tin (Sn), silver (Ag), or the like alone or an alloy thereof. Further, a plating layer can be further formed on the external electrodes 105 and 106. In this case, the plating layer can contain any one or more selected from the group consisting of nickel (Ni), copper (Cu), and tin (Sn). For example, a nickel (Ni) layer and a tin (Sn) layer may be formed in this order.

[0034] The lead-out pattern L is disposed on the outermost side of the coil pattern 103, provides a connection path to the external electrodes 105 and 106, and can be formed in an integral structure with the coil pattern 103. In this case, as shown in the illustrated form, for connection to the external electrodes 105 and 106, the lead-out pattern L can be realized in a form wider than the coil pattern 103. Here, the width corresponds to the width in the X direction with reference to FIG. 1.

[0035] Referring to FIG. 6, a coil electronic component according to a modified example will be described. In FIG. 6, only the support substrate 102 and the coil pattern 103 are shown, and the remaining components may be the same as those in the above-described embodiment. In the case of this modification example, the coil pattern 103 includes a seed layer 103a and a plurality of plating layers 103b, 103c, 103d. The plurality of plating layers 103a, 103c, 103d are referred to as a first plating layer 103b, a second plating layer 103b, and a third plating layer 103d, respectively. The first plating layer 103b can be a pattern plating layer formed using the seed layer 103a as a seed as described above, and can have the same width as the seed layer 103a.

[0036] The second plating layer 103c can cover the upper surface and the side surface of the first plating layer 103b and the side surface of the seed layer 103a. In this case, the second plating layer 103c can be an isotropic plating layer. The third plating layer 103d can be disposed on the upper part of the second plating layer 103c and can be an anisotropic plating layer that has grown in the thickness direction rather than in the width direction. However, in FIG. 6, although the third plating layer 103d is shown in a form that covers only the upper surface of the second plating layer 103c, the third plating layer 103d can also cover the side surface of the second plating layer 103c. As in this modification example, the coil pattern 103 can be formed in a multilayer structure. In this case, the aspect ratio of the coil pattern 103 can be improved, and the DC resistance (Rdc) characteristics of the coil pattern 103 and the like can be improved.

[0037] As described above in detail with respect to the embodiments of the present invention, the scope of the present invention is not limited thereto, and it is obvious to those having ordinary knowledge in the art that various modifications and variations are possible within the scope not departing from the technical idea of the present invention described in the claims. [Item 1] A support substrate, A coil pattern disposed on the support substrate, A sealing material that seals at least a part of the support substrate and the coil pattern, An external electrode disposed outside the sealing material and connected to the coil pattern, and includes, The coil pattern includes a seed layer having a thickness of 1.5 μm or less and a plating layer disposed on the seed layer, and is a coil electronic component. [Item 2] The coil electronic component according to Item 1, wherein the seed layer has a thickness of 0.5 μm or more. [Item 3] The coil electronic component according to Item 1 or 2, wherein the coil pattern forms a plurality of turns, and adjacent turns are separated by a pitch of 35 μm or less. [Item 4] The coil electronic component according to any one of Items 1 to 3, wherein the support substrate has a thickness of 20 μm or more and 40 μm or less. [Item 5] The coil electronic component according to any one of Items 1 to 4, wherein the plating layer includes a first plating layer disposed on the seed layer and a second plating layer covering the first plating layer. [Item 6] The coil electronic component according to Item 5, wherein the first plating layer is a pattern plating layer and has the same width as the seed layer. [Item 7] The coil electronic component according to Item 5 or 6, wherein the second plating layer covers the upper surface and side surface of the first plating layer and the side surface of the seed layer. [Item 8] The coil electronic component according to Item 7, wherein the second plating layer is an isotropic plating layer. [Item 9] The coil electronic component according to Item 7 or 8, wherein the plating layer further includes a third plating layer disposed on the upper part of the second plating layer. [Item 10] The coil electronic component according to Item 9, wherein the third plating layer is an anisotropic plating layer. [Item 11] The coil electronic component according to any one of Items 1 to 10, wherein the thickness of the sealing material is 0.65 mm or less. [Item 12] The coil electronic component according to any one of Items 1 to 11, wherein the seed layer is a Cu layer.

Explanation of Symbols

[0038] 100 Coil Electronic Component 101 Encapsulant 102 Support Substrate 103 Coil Pattern 103a Seed Layer 103b, 103c, 103d Plating Layers 105, 106 External Electrodes L Lead-out Pattern P Pad V Via C Magnetic Core Portion

Claims

1. A support substrate, a coil pattern disposed on the support substrate, a sealing material that seals at least a part of the support substrate and the coil pattern, and an external electrode disposed outside the sealing material and connected to the coil pattern, wherein the coil pattern includes a seed layer having a thickness of 1.5 μm or less and a plating layer disposed on the seed layer, the plating layer includes a single-layer first plating layer disposed on the seed layer, a second plating layer covering the upper surface and side surfaces of the first plating layer, and a third plating layer disposed on the upper part of the second plating layer, the thickness of the first plating layer is greater than the sum of the thickness of the second plating layer and the thickness of the third plating layer, a coil electronic component.

2. The coil electronic component according to claim 1, wherein the seed layer does not contain Cu and contains other metal components other than Cu.

3. The coil pattern includes a first coil pattern disposed on a first surface of the support substrate and a second coil pattern disposed on a second surface of the support substrate facing the first surface, when viewed in the direction from the first surface to the second surface of the support substrate, the sealing material filled between one turn of the first coil pattern and another turn adjacent to the one turn overlaps with one turn of the second coil pattern, The coil electronic component according to claim 1 or 2.

4. The coil electronic component according to any one of claims 1 to 3, wherein the seed layer has a thickness of 0.5 μm or more.

5. The coil electronic component according to any one of claims 1 to 4, wherein the coil pattern forms a plurality of turns, and adjacent turns are separated by a pitch of 35 μm or less.

6. The coil electronic component according to any one of claims 1 to 5, wherein the support substrate has a thickness of 20 μm or more and 40 μm or less.

7. The coil electronic component according to any one of claims 1 to 6, wherein the plating layer includes a first plating layer disposed on the seed layer and a second plating layer covering the first plating layer.

8. The coil electronic component according to claim 7, wherein the first plating layer is a pattern plating layer and has the same width as the seed layer.

9. The coil electronic component according to claim 7 or 8, wherein the second plating layer covers the upper surface and side surfaces of the first plating layer and the side surfaces of the seed layer.

10. The coil electronic component according to claim 9, wherein the second plating layer is an isotropic plating layer.

11. The coil electronic component according to claim 9 or 10, wherein the plating layer further includes a third plating layer disposed on top of the second plating layer.

12. The coil electronic component according to claim 11, wherein the third plating layer is an anisotropic plating layer.

13. The coil electronic component according to any one of claims 1 to 12, wherein the thickness of the encapsulant is 0.65 mm or less.

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