Multilayer ceramic capacitor
By orienting {100} planes in the dielectric ceramic layer of multilayer ceramic capacitors, the dielectric constant and capacitance are enhanced, addressing the limitations of conventional methods and improving performance.
Patent Information
- Application Number
- JP2023551420
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-09-28
- Filing Date
- 2022-09-22
- Publication Date
- 2025-07-01
- Estimated Expiration
- 2042-09-22
AI Technical Summary
Conventional methods for increasing the dielectric constant and capacitance of multilayer ceramic capacitors have limitations in achieving further miniaturization and large capacitance.
The dielectric ceramic layer of the multilayer ceramic capacitor is composed of perovskite-type oxides with a controlled crystal plane orientation, specifically focusing on a {100} plane ratio of 4% or more, which enhances the dielectric constant and allows for miniaturization and increased capacitance.
The solution results in a multilayer ceramic capacitor with a higher dielectric constant and larger capacitance, while maintaining reliability and extending high-temperature load life.
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Abstract
Description
Technical Field
[0001] The present invention relates to a multilayer ceramic capacitor.
Background Art
[0002] With the miniaturization of electronic devices such as mobile phones and the increase in the speed of CPUs, the demand for multilayer ceramic capacitors (MLCCs) is increasing more and more. A multilayer ceramic capacitor has a structure in which dielectric ceramic layers and internal electrode layers are alternately laminated, and due to the thinly laminated high-permittivity dielectric ceramic layers, it has a large capacitance while being small in size. Multilayer ceramic capacitors with various materials are known, but those using a barium titanate (BaTiO3)-based compound for the dielectric ceramic layer and a base metal such as nickel (Ni) for the internal electrode layer are widely used because they are inexpensive and exhibit high characteristics.
[0003] In realizing the miniaturization and large capacitance of multilayer ceramic capacitors, it is important to thin the dielectric ceramic layer and at the same time increase its permittivity. That is, when the opposing area of the internal electrode layer is S, the number of dielectric ceramic layers sandwiched between the internal electrode layers is n, the relative permittivity of the dielectric ceramic layer is ε r , the thickness of the dielectric ceramic layer is t, and the relative permittivity of vacuum is ε0, the capacitance C of the multilayer ceramic capacitor is proportional to the relative permittivity ε r as shown in the following formula (1).
[0004]
Equation
[0005] In this regard, it has been conventionally proposed to increase the dielectric constant by controlling the composition and distribution of the dielectric ceramic layer, or the particle size of the crystal particles. For example, Patent Document 1 discloses a dielectric porcelain composed of crystal particles mainly containing barium titanate, and a multilayer ceramic capacitor in which this dielectric porcelain is applied to a dielectric layer. The concentration of rare earth elements is maximized on the surface of the crystal particles and is 0.1 atomic% or less in a region deeper than 100 nm from the surface (Claims 1 and
[0001] of Patent Document 1). Further, since the crystal particles hardly contain rare earth elements in the internal region (core part), this region contains a large proportion of a crystal phase exhibiting ferroelectricity, and it is described that this enables an increase in the ferroelectric constant (
[0016] and
[0018] of Patent Document 1).
[0006] Patent Document 2 discloses a multilayer ceramic capacitor in which a ceramic dielectric layer is composed of sintered particles containing core-shell particles and uniformly solid-solved particles, the area ratio of the core-shell particles to the entire sintered particles is 5 to 15%, and the average particle size of the entire sintered particles is 0.3 to 0.5 μm (Claim 1 of Patent Document 2). Also, even when the thickness of the ceramic dielectric layer is thinned to 2.0 μm or less, it is described that a multilayer ceramic capacitor having a relative dielectric constant of the dielectric layer of 5000 or more and simultaneously having stable capacitance temperature characteristics can be provided (Claims 1 and
[0016] of Patent Document 2).
[0007] Patent Document 3 discloses a multilayer ceramic capacitor in which a dielectric layer is composed of a sintered body containing barium titanate and a silicon compound, and a fresnoite phase having an average crystal particle diameter of 1 μm or less exists in the dielectric layer (Claim 1 of Patent Document 3). Also, it is described that when the fresnoite phase is formed, the solid solution of the additive compound into barium titanate is promoted, the grain growth by firing is promoted, and the dielectric constant per particle increases (
[0047] of Patent Document 3).
Prior Art Documents
Patent Documents
[0008] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-084267 [Patent Document 2] Japanese Patent Application Laid-Open No. 2015-053530 [Patent Document 3] Japanese Patent No. 5211262 [Summary of the Invention] [Problems to be Solved by the Invention]
[0009] Thus, in a multilayer ceramic capacitor, it has been proposed to increase the dielectric constant by controlling the composition, distribution, crystal grain size, etc. of the dielectric ceramic layer. However, although such a conventional method has a certain effect, it has limitations in reducing the size and increasing the capacitance of the multilayer ceramic capacitor.
[0010] In view of such problems, the present inventors have conducted intensive studies. As a result, in a multilayer ceramic capacitor including a dielectric ceramic layer containing a perovskite-type oxide as a main component and an internal electrode layer, by focusing on and controlling the crystal planes of the crystal particles constituting the dielectric ceramic layer, the dielectric constant of the dielectric ceramic layer can be increased, and as a result, it has been found that further miniaturization and increased capacitance of the multilayer ceramic capacitor become possible.
[0011] The present invention has been completed based on such findings, and an object thereof is to provide a multilayer ceramic capacitor capable of increasing the dielectric constant of the dielectric ceramic layer and enabling miniaturization and increased capacitance. [Means for Solving the Problems]
[0012] The present invention includes the following aspects. In this specification, the expression "~" includes the numerical values at both ends. That is, "X~Y" is synonymous with "X or more and Y or less".
[0013] According to one aspect of the present invention, there are a first main surface and a second main surface facing each other in the thickness direction, a first side surface and a second side surface facing each other in the width direction, and a first end surface and a second end surface facing each other in the length direction, a body portion including a plurality of dielectric ceramic layers and a plurality of internal electrode layers laminated in the thickness direction, and a pair of external electrodes provided on each of the first end surface and the second end surface and connected to the plurality of internal electrode layers, wherein the dielectric ceramic layer includes crystal grains composed of a perovskite-type oxide containing an A-site element and a B-site element, when observing a cross section of the dielectric ceramic layer using a scanning transmission electron microscope (S-TEM), the dielectric ceramic layer includes {100} grains in which the {100} plane of the perovskite structure is observed as crystal grains, a multilayer ceramic capacitor is provided in which, in the cross section, the number ratio of the {100} grains in the crystal grains is 4% or more.
Advantages of the Invention
[0014] According to the present invention, a multilayer ceramic capacitor capable of increasing the dielectric constant of the dielectric ceramic layer and enabling miniaturization and large capacitance is provided.
Brief Description of the Drawings
[0015]
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
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Figure 9
Best Mode for Carrying Out the Invention
[0016] Specific embodiments of the present invention (hereinafter referred to as "the present embodiments") will be described. Note that the present invention is not limited to the following embodiments, and various modifications are possible without changing the gist of the present invention.
[0017] (1) Multilayer ceramic capacitor The multilayer ceramic capacitor of the present embodiment has a first main surface and a second main surface that face each other in the thickness direction, a first side surface and a second side surface that face each other in the width direction, and a first end surface and a second end surface that face each other in the length direction, and includes a body portion including a plurality of dielectric ceramic layers and a plurality of internal electrode layers laminated in the thickness direction, and a pair of external electrodes provided on each of the first end surface and the second end surface and connected to the plurality of internal electrode layers. In this multilayer ceramic capacitor, the dielectric ceramic layer includes crystal particles composed of a perovskite-type oxide containing an A-site element and a B-site element. Further, when observing the cross-section of the dielectric ceramic layer using a scanning transmission electron microscope (S-TEM), the dielectric ceramic layer includes {100} particles in which the {100} plane of the perovskite structure is observed as crystal particles. Furthermore, in the cross-section, the number ratio of {100} particles in the crystal particles is 4% or more.
[0018] One embodiment of the multilayer ceramic capacitor will be described with reference to FIGS. 1 to 3. FIG. 1 is a perspective view showing the outer shape of the multilayer ceramic capacitor. FIGS. 2 and 3 are cross-sectional views showing the internal structure of the multilayer ceramic capacitor. The multilayer ceramic capacitor (100) includes a body portion (6) including a plurality of stacked dielectric ceramic layers (2) and a plurality of internal electrode layers (4), and a pair of external electrodes (8a, 8b) provided on both end faces (14a, 14b) of the body portion (6). The multilayer ceramic capacitor (100) and the body portion (6) have a substantially rectangular parallelepiped shape. The substantially rectangular parallelepiped includes not only a rectangular parallelepiped but also a rectangular parallelepiped with rounded corners and / or edges. Further, the multilayer ceramic capacitor (100) and the body portion (6) have a first main surface (10a) and a second main surface (10b) facing each other in the thickness direction T, a first side surface (12a) and a second side surface (12b) facing each other in the width direction W, and a first end face (14a) and a second end face (14b) facing each other in the length direction L. Here, the thickness direction T refers to the direction in which the plurality of dielectric ceramic layers (2) and the plurality of internal electrode layers (4) are stacked. The length direction L refers to the direction orthogonal to the end faces (14a, 14b) on which the external electrodes (8a, 8b) are provided. The width direction W is a direction orthogonal to the thickness direction T and the length direction L. A plane including the thickness direction T and the width direction W is defined as a WT plane, a plane including the width direction W and the length direction L is defined as an LW plane, and a plane including the length direction L and the thickness direction T is defined as an LT plane.
[0019] The external electrodes (8a, 8b) are composed of a first external electrode (8a) provided on the first end face (14a) and a second external electrode (8b) provided on the second end face (14b). The first external electrode (8a) may extend not only to the first end face (14a) but also to a part of the first main surface (10a), the second main surface (10b), the first side surface (12a), and the second side surface (12b). Further, the second external electrode (8b) may extend not only to the second end face (14b) but also to a part of the first main surface (10a), the second main surface (10b), the first side surface (12a), and the second side surface (12b). However, the first external electrode (8a) and the second external electrode (8b) are not in contact with each other and are electrically separated.
[0020] The internal electrode layer (4) is composed of a plurality of first internal electrode layers (4a) and a plurality of second internal electrode layers (4b). The first internal electrode layer (4a) extends to the first end face (14a), where it is electrically connected to the first external electrode (8a). The second internal electrode layer (4b) extends to the second end face (14b), where it is electrically connected to the second external electrode (8b). The first internal electrode layer (4a) and the second internal electrode layer (4b) facing each other with the dielectric ceramic layer (2) in between are not electrically connected. Therefore, when a voltage is applied between the first internal electrode layer (4a) and the second internal electrode layer (4b) via the external electrodes (8a, 8b), charges are accumulated. The accumulated charges generate capacitance, thereby exhibiting the function as a capacitive element.
[0021] The dimensions of the multilayer ceramic capacitor (100) are not particularly limited. However, the lengthwise dimension L is preferably 0.2 mm or more and 1.2 mm or less, the widthwise dimension W is preferably 0.1 mm or more and 0.7 mm or less, and the stacking direction dimension T is preferably 0.1 mm or more and 0.7 mm or less.
[0022] <Dielectric ceramic layer> The dielectric ceramic layer contains crystal grains. These crystal grains are the grains (main crystal grains) that form the main component of the dielectric ceramic layer, and are composed of perovskite-type oxides containing A-site elements and B-site elements. That is, the dielectric ceramic layer is a sintered polycrystalline body mainly composed of perovskite-type oxides. The perovskite-type oxide has a composition represented by the general formula: ABO3, and has a crystal structure similar to cubic crystals such as cubic, tetragonal, orthorhombic, and rhombohedral crystals at room temperature. Each of the atoms of the A-site element (hereinafter, "A-site atoms") and the atoms of the B-site element (hereinafter, "B-site atoms") is ionized to occupy the A-site and B-site of the perovskite structure. Examples of the A-site element include elements with relatively large ionic sizes such as barium (Ba), calcium (Ca), and strontium (Sr), and examples of the B-site element include elements with relatively small ionic sizes such as titanium (Ti), zirconium (Zr), and hafnium (Hf).
[0023] The crystal structure of the perovskite-type oxide is shown in Fig. 4. Ti 4+ ionized B-site atoms such as etc. (hereinafter referred to as "B-site ions") occupy the body-centered position of the unit cell and are located at the face-centered positions, surrounded by six oxygen ions (O 2- ) that form an octahedron. Also, ionized A-site atoms such as Ba 2+ etc. (hereinafter referred to as "A-site ions") occupy the eight corners of the unit cell. When the positively charged A-site ions and / or B-site ions are displaced, dielectric polarization occurs, thereby showing normal dielectric or ferroelectric properties at room temperature. In this specification, ionized atoms (ions) may sometimes be simply referred to as "atoms".
[0024] The combination of the A-site element and the B-site element is not particularly limited as long as the perovskite-type structure is maintained. Each of the A-site element and the B-site element may contain only one kind of element, or may contain a combination of a plurality of elements. Furthermore, the content ratio of the perovskite-type oxide in the dielectric ceramic layer may be 50% by mass or more, 60% by mass or more, 70% by mass or more, 80% by mass or more, or even 90% by mass or more.
[0025] Preferably, the A-site element contains barium (Ba), and the B-site element contains titanium (Ti). That is, the perovskite-type oxide may be a barium titanate (BaTiO3)-based compound. BaTiO3 has a large spontaneous polarization at room temperature. Therefore, it is a ferroelectric showing a high dielectric constant. Thus, by using a BaTiO3-based compound as the main component, it becomes possible to further increase the capacitance of the capacitor. Note that the BaTiO3-based compound includes not only BaTiO3 but also those in which a part of Ba in BaTiO3 is substituted with other A-site elements such as Sr and / or Ca, or those in which a part of Ti is substituted with other B-site elements such as Zr and / or Hf. However, the ratio of Ba in the A-site element is preferably 70% or more, more preferably 80% or more, and even more preferably 90% or more in terms of molar ratio. Also, the ratio of Ti in the B-site element is preferably 70% or more, more preferably 80% or more, and even more preferably 90% or more in terms of molar ratio. The A-site element may not contain components other than Ba and inevitable impurity elements, and the B-site element may not contain components other than Ti and inevitable impurity elements. Here, the inevitable impurities are components that are inevitably mixed during the manufacturing process.
[0026] The dielectric ceramic layer may contain components other than the main component as additive components. Examples of the additive components include, but are not limited to, rare earth elements (RE), manganese (Mn), magnesium (Mg), silicon (Si), aluminum (Al), and vanadium (V). The rare earth element (RE) is a general term for elements constituting a group consisting of scandium (Sc) having an atomic number of 21, yttrium (Y) having an atomic number of 39, and lanthanum (La) having an atomic number of 57 to lutetium (Lu) having an atomic number of 71 in the periodic table. As the rare earth element (RE), one or more selected from the group consisting of yttrium (Y), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), and lutetium (Lu) are preferable, and dysprosium (Dy) is particularly preferable. Further, the form of existence of the additive component is not limited. It may be contained in any of crystal grains, grain boundaries, and triple points. When contained in crystal grains, it may occupy the A site, the B site, or both sites of the perovskite-type oxide (ABO3) simultaneously.
[0027] In the multilayer ceramic capacitor of the present embodiment, the dielectric ceramic layer contains {100} particles as crystal particles. Here, the {100} particles are crystal particles in which the {100} plane of the perovskite structure is observed in at least a part thereof when the cross section of the dielectric ceramic layer is observed using a scanning transmission electron microscope (S-TEM). That is, part or all of the crystal particles are {100} particles. Further, in the {100} particles, it is sufficient that the {100} plane is observed in at least a part of the region. The cross section is a plane including the thickness direction, that is, the stacking direction of the dielectric ceramic layer and the internal electrode layer. The cross section can also be said to be a plane whose perpendicular line is orthogonal to the thickness direction, for example, the LT plane or the WT plane. Further, the {100} plane is a crystal lattice plane represented by Miller indices, and includes six planes of (100), (010), (001), (-100), (0-10), and (00-1).
[0028] A scanning transmission electron microscope (S-TEM) is a device that scans a converged micro-incident probe on a sample, converts transmitted electrons into a luminance signal, and observes a fine structure. Due to recent advancements in devices, the spatial resolution has been improved to 50 pm or less, and the detection sensitivity can also capture up to the single-atom level. In S-TEM, various images can be observed using electrons scattered from the sample. Among such images, an image obtained by detecting electrons having a scattering angle larger than the convergence angle of the incident probe using an annular detector is an annular dark-field (ADF) image. Further, among the ADF images, an image having a particularly large scattering angle is a high-angle annular dark-field (HAADF) image. Since the intensity of HAADF depends on the atomic number Z, the HAADF image is excellent in elemental identification ability. Therefore, in particular, by analyzing the HAADF image, the position information of elements can be evaluated with high accuracy.
[0029] The presence and ratio of {100} particles can be examined by obtaining and analyzing an ADF image, a HAADF image, and / or an electron diffraction pattern for the central portion of the crystal particles constituting the dielectric ceramic layer. Specifically, an ADF image or a HAADF image of the central portion of a specific particle is obtained by the nano beam electron diffraction (NBD) method during S-TEM observation. Then, in this image, when a {100} plane based on the atomic arrangement constituting the perovskite-type oxide is observed, the particle can be determined as a {100} particle. Alternatively, an electron diffraction pattern may be obtained by the NBD method, and when only a periodic pattern based on the {100} plane exists in this electron diffraction pattern, the particle may be determined as a {100} particle.
[0030] S-TEM observation is performed on a cross-section including the thickness direction of the dielectric ceramic layer. More specifically, it is preferable to observe a region at the center in the length direction (L direction) of the dielectric ceramic layer and at the center of a plane (WT plane) including the width direction (W direction) and the thickness direction (T direction). The observation may be performed on a region with a field of view of 10 μm × 10 μm or a region containing 200 crystal grains. Also, in S-TEM observation, the microscope axis is fixed in a direction substantially perpendicular to the cross-section of the dielectric ceramic layer, and in this state, the cross-section of the dielectric ceramic layer is tilted within a range of ±5°. Then, a particle in which a {100} plane is observed within this range (±5°) of the tilt angle is defined as a {100} particle. In short, a particle in which a {100} plane is exposed within a range of ±5° with respect to the vertical axis of the cross-section of the dielectric ceramic layer is a {100} particle.
[0031] Regarding the {100} particles, a more detailed explanation will be given based on the actual measurement results. An example of the cross-sectional HAADF image of the {100} particles contained in the dielectric ceramic layer of the multilayer ceramic capacitor of this embodiment is shown in FIG. 5. This multilayer ceramic capacitor uses barium titanate (BaTiO3) for the dielectric ceramic layer. In FIG. 5, bright spots based on Ba and bright spots based on Ti are observed, and these bright spots respectively constitute a lattice-like atomic (ionic) arrangement. Also, the brightness of the Ba bright spots is higher than that of the Ti bright spots. This is because the atomic weight of Ba is larger than that of Ti.
[0032] In the multilayer ceramic capacitor of this embodiment, in the above-described cross-section, that is, the cross-section including the thickness direction of the dielectric ceramic layer, the number ratio of the {100} particles in the crystal particles is 4% or more. By increasing the ratio of the {100} particles, the dielectric constant of the dielectric ceramic layer can be increased. Although the details of the mechanism are unclear, it is considered that it may be related to the orientation state of the crystal grains contained in the dielectric ceramic layer. That is, the crystal of the perovskite-type oxide constituting the crystal particles has six equivalent planes such as the (100) plane constituting the {100} plane in the cubic crystal structure. Therefore, estimating the number ratio of the {100} particles when the crystal particles are randomly oriented using the concept of solid angle, the ratio is only about 1.5%. Therefore, it can be said that the dielectric ceramic layer with the number ratio of the {100} particles of 4% or more has crystal grains oriented and the ratio of the {100} particles is higher than that in the random orientation. It is considered that the dielectric constant increases when BaTiO3 is C-axis oriented in the direction perpendicular to the internal electrode.
[0033] The higher the number ratio of the {100} particles, the more preferable. The number ratio is preferably 10% or more, more preferably 15% or more, and even more preferably 20% or more. The upper limit of the number ratio is not particularly limited.
[0034] Preferably, in the cross-section described above, the {100} particles have an atomic arrangement region, and the average area ratio thereof is 10% or more in the cross-section of the {100} particles. Here, the atomic arrangement region refers to a region where the atomic arrangement of the perovskite-type oxide, that is, the regular arrangement of A-site atoms and B-site atoms, is observed by S-TEM observation. In the {100} particles, while there is a region where the {100} plane is observed at the center, that is, the atomic arrangement region, there may be an atomic non-arrangement region where the {100} plane is not observed around it. Specifically, the {100} plane may be observed at the center and not observed at the outer periphery. In the atomic arrangement region, the regular arrangement of A-site atoms and B-site atoms constituting the perovskite-type oxide is observed, whereas in the atomic non-arrangement region, no regular arrangement is observed. This is because in the atomic non-arrangement region, the lattice strain of A-site atoms and B-site atoms is particularly large, indicating structural irregularity.
[0035] By increasing the ratio of the atomic arrangement region, the crystal strain can be reduced, and the reliability of the multilayer ceramic capacitor can be improved. The average area ratio of the atomic arrangement region is more preferably 20% or more, even more preferably 30% or more, and particularly preferably 40% or more. The upper limit of the average area ratio is not particularly limited. However, typically it is 50% or less.
[0036] The area ratio of the atomic arrangement region can be determined by the S-TEM observation described above. That is, for each {100} particle, the ADF image or HAADF image of the entire particle is obtained by the NBD method, and the region where the atomic arrangement is observed (atomic arrangement region) is determined in these images. Then, the area ratio of the atomic arrangement region in the particle cross-section is calculated, and the average value thereof is obtained as the average area ratio.
[0037] Preferably, in the cross-section described above, the {100} particles have an atomic distribution region at one or more atomic positions within the particle, and the area (S Δc≦2% ) of this atomic distribution region is 0.050 nm 2Is as follows. Here, the atomic distribution region is a measure of the spread of the positional distribution of atoms centered on lattice points. Specifically, in an ADF image or a HAADF image, it is a single region that exists inside the unit cell centered on one lattice point and where the atomic concentration difference (Δc) between the A-site element or B-site element corresponding to this lattice point is 2 atm% or less. Here, the atomic concentration difference (Δc) is the difference (c max ) from the maximum value (c max -c) of the atomic concentration (c) of this element (A-site element or B-site element) inside this unit cell.
[0038] In an ideal crystal, at absolute zero, atoms or ions exist only at the lattice points they should occupy. However, at temperatures above absolute zero, phonons are generated and atoms or ions thermally vibrate (lattice vibration) around the lattice points. Also, in a real crystal, defects such as lattice defects occur, and as a result, atoms may be arranged at positions shifted from the lattice points. This is because the crystal field changes due to the defects. Therefore, the positional distribution of atoms spreads. That is, focusing on a unit cell centered on a certain lattice point, the concentration of the atoms that should occupy this lattice point is maximum at the lattice point and decreases as the distance from the lattice point increases. Therefore, if the size of the atomic distribution region can be quantitatively estimated, the spread of the atomic positional distribution can be evaluated from it.
[0039] The area (S Δc≦2%By reducing ), the high-temperature load life of the multilayer ceramic capacitor is extended, and as a result, it becomes possible to improve the reliability. Although the details of the mechanism are unknown, the following speculation is made. That is, in a real crystal, there are many lattice defects such as oxygen vacancies and atomic defects. In particular, since the multilayer ceramic capacitor is manufactured by firing in a reducing atmosphere, it is considered that there are many oxygen vacancies in the dielectric ceramic layer contained therein. And this oxygen vacancy is considered to be a factor that shortens the high-temperature load life of the multilayer ceramic capacitor. Also, when there are many lattice defects such as oxygen vacancies, the position distribution of elements spreads by causing lattice distortion, and as a result, it is considered that the area of the atomic distribution region increases. On the other hand, when the area of the atomic distribution region is small, the lattice defects are reduced and the high-temperature load life is extended. The smaller the area of the atomic distribution region, the more preferable. The area is 0.045 nm 2 The following is preferable, 0.040 nm 2 The following is more preferable, 0.035 nm 2 The following is even more preferable, 0.030 nm 2 The following is particularly preferable, 0.023 nm 2 The following is most preferable. The lower limit is not particularly limited. For example, the area is 0.001 nm 2 or more.
[0040] Atomic distribution region (S Δc≦2%The area of ) will be further described in detail based on the actual measurement results. An example of a cross-sectional HAADF image of {100} particles contained in the dielectric ceramic layer of the multilayer ceramic capacitor of the present embodiment is shown in FIG. 5. Also, a cross-sectional HAADF image of a multilayer ceramic capacitor obtained by the prior art is shown in FIG. 6. Here, both the multilayer ceramic capacitors of the present embodiment and the prior art use barium titanate (BaTiO3) for the dielectric ceramic layer. In both FIGS. 5 and 6, bright spots based on Ba and bright spots based on Ti are observed, and these bright spots respectively constitute a lattice-like atomic (ionic) arrangement. However, the bright spot size of the {100} particles of the present embodiment is small, while the bright spot size of the {100} particles of the prior art is large. This is because in the {100} particles of the present embodiment, the atomic distribution regions of ionized Ba and Ti are concentrated near the lattice points, whereas in the {100} particles of the prior art, distortion occurs in the Ba and Ti lattices and the atomic distribution regions are expanded.
[0041] Next, the method for measuring the area (S Δc≦2% ) of the atomic distribution region will be described. FIG. 7 shows the positional variation of the Ba concentration and the Ti concentration in the cross-section of the {100} particle. This is obtained by performing a composition analysis by energy dispersive X-ray spectroscopy (EDX) along a straight line in the cross-section of the {100} particle and determining the atomic concentration obtained by this analysis as a function of position (distance). The Ba concentration and the Ti concentration vary periodically. Also, reflecting the positions of Ba and Ti in the crystal, the Ti concentration is minimum at the position where the Ba concentration is maximum (peak), and the Ti concentration is maximum at the position where the Ba concentration is minimum.
[0042] FIG. 8 shows the position where the Ba concentration (c) is maximum (c max ) in FIG. 7 as the origin, and the difference in Ba concentration (Δc = c max-c) is graphed for each lattice. In the {100} particles of this embodiment, the positional variation of the Ba concentration difference is sharp. That is, when moving away from the origin, the Ba concentration rapidly decreases. In contrast, in the {100} particles of the prior art, the Ba concentration difference is broad. This tendency reflects the size of the bright spots in the HAADF image. Therefore, in the graph of FIG. 8, by obtaining the distance from the origin for the position where the difference in Ba concentration (Δc) is 2 atm%, and calculating the area of the circle with this distance as the radius, this can be regarded as the area (S Δc≦2% ) of the Ba atom distribution region.
[0043] Specifically, in the graph of FIG. 8, a line where the difference in Ba concentration (Δc) is 2 atm% is drawn horizontally on the horizontal axis. Then, the distances from the vertical axis of the two points (point a and point b) where this line intersects the graph of the Ba concentration difference are read, and are respectively d a and d b . Then, according to the following formulas (2) and (3), the area (S Δc≦2% ) of the atomic distribution region can be obtained.
[0044]
Equation
[0045] The dielectric ceramic layer preferably has a thickness of 1.0 μm or less, particularly preferably 0.4 μm or less. By thinning the dielectric ceramic layer, it becomes possible to increase the capacitance of the multilayer ceramic capacitor. However, if the dielectric ceramic layer is overly thinned, it becomes difficult to suppress the deterioration of the insulation characteristics. The thickness of the dielectric ceramic layer is typically 0.15 μm or more.
[0046] <Internal electrode layer> The internal electrode layer contains a conductive metal. As the conductive metal, known electrode materials such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), and alloys containing these may be used. However, from the perspective of cost reduction, base metals such as Ni and Cu are suitable, and Ni is particularly suitable. The internal electrode layer may contain other components in addition to the conductive metal. Examples of other components include ceramic components that act as co-materials. Examples of the ceramic component include perovskite oxides such as BaTiO3-based compounds contained in the dielectric ceramic layer.
[0047] The thickness of the internal electrode layer is preferably 0.20 μm or more and 0.80 μm or less. By setting the thickness of the internal electrode layer to 0.20 μm or more, defects such as electrode disconnection can be suppressed. Also, by setting the thickness to 0.80 μm or less, it becomes possible to suppress a decrease in the proportion of the dielectric ceramic layer in the capacitor and a resulting decrease in capacitance. Also, the number of layers of the internal electrode layer is preferably 15 or more and 700 or less.
[0048] <External electrode> As the external electrode, a known configuration can be adopted. For example, a laminated structure composed of an underlayer, a first plating layer, and a second plating layer may be used from the end face side of the multilayer ceramic capacitor. The underlayer contains a metal such as nickel (Ni) or copper (Cu), for example. Also, ceramic powder may be contained in addition to the metal as a co-material. The first plating layer is, for example, a nickel (Ni) plating layer. The second plating layer is, for example, a tin (Sn) plating layer. Also, a conductive resin layer may be provided between the underlayer and the first plating layer. The conductive resin layer is a layer containing conductive metal particles such as copper (Cu), silver (Ag), and nickel (Ni) and resin. The form of the external electrode is not limited as long as it is electrically connected to the internal electrode layer and functions as an external input / output terminal.
[0049] (2) Manufacturing method of multilayer ceramic capacitor The multilayer ceramic capacitor of this embodiment is not limited in its manufacturing method as long as it satisfies the above-described requirements. However, it is preferably manufactured by the following method. A preferred manufacturing method includes the following steps: a step of producing a green sheet containing at least a dielectric raw material (green sheet production step), a step of applying a conductive paste to the surface of the green sheet to obtain a green sheet having an internal electrode pattern formed thereon (electrode pattern formation step), a step of laminating and pressing a plurality of green sheets to obtain a laminated block (lamination step), a step of cutting the obtained laminated block to obtain a laminated chip (cutting step), a step of subjecting the obtained laminated chip to a debinding treatment and a firing treatment to obtain a body part (firing step), and a step of forming an external electrode on the obtained body part (external electrode formation step). Details of each step will be described below.
[0050] <Green sheet production step> In the green sheet production step, a green sheet containing at least a dielectric raw material is produced. The green sheet is a precursor of the dielectric ceramic layer of the capacitor and contains the main component raw material and the additive component raw material of the dielectric ceramic layer. The production of the green sheet may be performed by a known method and is not particularly limited. The main component raw material and the additive component raw material may be mixed to produce a dielectric raw material, a binder and a solvent may be added to and mixed with the obtained dielectric raw material to form a slurry, and a green sheet may be formed from the obtained slurry.
[0051] As the main component raw material, a powder of a perovskite-type oxide (ABO3) such as a BaTiO3-based compound can be used. The perovskite-type oxide powder may be synthesized by a known method such as a solid-phase reaction method, a hydrothermal synthesis method, or an alkoxide method. As the additive component raw material, known ceramic raw materials such as oxides, carbonates, hydroxides, nitrates, organic acid salts, alkoxides, and / or chelate compounds of additive components (RE, Mn, Mg, Si, Al, V, etc.) may be used.
[0052] The raw material mixing can be carried out by known methods. For example, there is a method of wet mixing and pulverizing the weighed main component raw material and additive component raw material together with a pulverizing medium and pure water using a ball mill. When wet mixing is performed, the obtained mixture may be dried. The slurrying can also be carried out by known methods, and an organic binder and an organic solvent may be mixed with the dielectric raw material. As the organic binder, a known binder such as a polyvinyl butyral-based binder may be used. Also, as the organic solvent, a known solvent such as toluene or ethanol may be used. Additives such as plasticizers may be added to the slurry as necessary. Furthermore, the forming of the green sheet may be carried out by known methods such as the doctor blade method or the lip method.
[0053] <Electrode Pattern Forming Process> In the electrode pattern forming process, a conductive paste is applied to the surface of the green sheet to produce a green sheet with an internal electrode pattern formed. The internal electrode pattern becomes the internal electrode layer after firing. As the conductive metal contained in the conductive paste, conductive materials such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), and alloys containing these may be used. Also, a ceramic component that acts as a co-material may be added to the conductive paste. As the ceramic component, the main component raw material of the dielectric ceramic layer can be used. The application of the conductive paste may be carried out by known methods such as screen printing or gravure printing.
[0054] <Laminating Process> In the laminating process, a plurality of green sheets are laminated and pressure-bonded to produce a laminated block. At this time, a green sheet with an internal electrode pattern formed is used, but a part of a green sheet without an internal electrode pattern formed may also be used. The lamination and pressure-bonding may be carried out by known methods.
[0055] <Cutting Process> In the cutting process, the obtained laminated block is cut to produce a laminated chip. The cutting may be carried out so that a chip of a predetermined size is obtained and at least a part of the internal electrode pattern is exposed on the end face of the laminated chip.
[0056] <Firing Process> In the firing process, the obtained laminated chip is subjected to a debinding process and a firing process to produce a green body. Through the firing process, the green sheet and the internal electrode pattern are co-fired to become a dielectric ceramic layer and an internal electrode layer, respectively. The conditions for the debinding process may be determined according to the types of organic binders contained in the green sheet and the internal electrode pattern. Also, the firing process may be performed at a temperature at which the laminated chip is sufficiently densified. For example, it may be performed under the condition of holding at a temperature of 1200 °C or higher and 1300 °C or lower for 0 minutes or more and 30 minutes or less. Further, the firing is performed in an atmosphere in which the perovskite-type oxide as the main component is not reduced and the oxidation of the conductive metal is suppressed. For example, it may be performed in an N2-H2-H2O gas stream with an oxygen partial pressure of 10 -10 ~10 -12 MPa. Further, an annealing process may be performed after firing.
[0057] In the manufacturing method of this embodiment, a dielectric material with a relatively high crystallinity, for example, BaTiO3 with a c-axis / a-axis ratio of 1.0085 or more, is used as the main component raw material. In the firing process, the laminated chip is held at a predetermined temperature for a predetermined time, and after the firing process, pressure is applied in the thickness direction by an annealing process. In this way, by performing the annealing process at a predetermined temperature while applying pressure in the lamination direction, stress is applied to the crystal grains with a relatively high crystallinity, and due to this stress, the crystal grains are rearranged and the orientation progresses. The holding temperature is preferably 800 °C or higher and 1000 °C or lower, and the holding time (pressure application time) is preferably 30 minutes or more and 120 minutes or less. The applied pressure is preferably 1 MPa or more and 120 MPa or less. If the applied pressure is less than 1 MPa, the stress is insufficient, so the rearrangement of the crystal grains becomes insufficient. Therefore, in the finally obtained multilayer ceramic capacitor, the ratio of {100} particles in the dielectric ceramic layer cannot be increased. On the other hand, if it exceeds 120 MPa, the applied pressure becomes excessive, so there is a risk of defects such as cracks and chips in the laminated chip.
[0058] <External Electrode Formation Process> In the external electrode forming process, an external electrode is formed on the obtained green body. The external electrode may be formed by a known method. For example, a conductive paste containing a metal such as silver (Ag), copper (Cu), and / or nickel (Ni) may be applied and baked on the end face of the green body where the internal electrode is drawn out and exposed. Alternatively, a method may be used in which a conductive paste is applied to both end faces of the laminated chip before firing and then a firing treatment is performed. Further, the formed electrode may be used as a base layer, and a plating film such as nickel (Ni) or tin (Sn) may be formed thereon. Through the external electrode formation in this way, a multilayer ceramic capacitor is manufactured.
Example
[0059] The present invention will be described in more detail using the following examples and comparative examples. However, the present invention is not limited to the following examples.
[0060] (1) Fabrication of multilayer ceramic capacitor [Comparative Examples 1, 2 and Examples 1 to 22] As the main component raw material, Ba m TiO3 powder was prepared. Here, m is the A / B molar ratio of the perovskite-type oxide (ABO3), that is, the Ba / Ti molar ratio. Also, Ba m As the TiO3 powder, one having a D50 particle size of 140 nm, a c-axis / a-axis ratio of the perovskite structure of 1.0090, and m of 1.005 was used. Next, the prepared Ba m TiO3 powder was weighed and wet-mixed by a ball mill to crush the aggregates.
[0061] Separate from the main component raw material, additive component (Dy, Mg, Mn, Si, Al, V) raw materials were weighed. As the additive component raw materials, dysprosium oxide (Dy2O3), magnesium carbonate (MgCO3), manganese carbonate (MnCO3), silicon oxide (SiO2), aluminum oxide (Al2O3), and vanadium oxide (V2O5) were used. The weighing was performed so that for 100 mol parts of Ti in the main component, Dy: 1.0 mol part, Mg: 0.03 mol part, Mn: 0.1 mol part, Si: 0.8 mol part, Al: 0.08 mol part, V: 0.08 mol part.
[0062] Next, an additive component raw material was added to the main component raw material, and after wet mixing using a ball mill, it was dried and heat-treated to obtain a dielectric raw material. To the obtained dielectric raw material, a polyvinyl butyral-based binder and ethanol as an organic solvent were added, and wet mixing was performed using a ball mill for a predetermined time to prepare a slurry. This slurry was sheet-shaped to prepare a green sheet for a dielectric ceramic layer.
[0063] Next, a conductive paste mainly composed of Ni was screen-printed on the surface of the obtained green sheet to form a conductive paste layer serving as an internal electrode layer in a pattern. Then, a plurality of green sheets on which the conductive paste layer was formed were laminated, and green sheets on which the conductive paste layer was not formed were disposed above and below the laminated green sheets, and the whole was pressure-bonded to prepare a laminated block. Then, the obtained laminated block was cut with a dicing saw to obtain a laminated chip. The lamination was performed such that the ends from which the conductive paste layers were drawn out were staggered. The cutting was performed such that the conductive paste layer was exposed on the side surface.
[0064] Side margin green sheets (side margin green bodies) were attached to both side surfaces of the cut laminated chip where the conductive paste layer was exposed. The side margin green sheets were prepared in the same manner as the green sheets for the dielectric ceramic layer.
[0065] The laminated chip to which the side margin green body was attached was fired in an N2-H2O-H2 gas stream under conditions of an oxygen partial pressure of 1.8×10 -9 ~8.7×10 -10 MPa, a heating rate of 20°C / sec, and a maximum temperature of 1260°C for 0.5 hours. After firing, annealing treatment was performed while applying pressure in the lamination direction in an atmosphere of an oxygen partial pressure of 1.0×10 -12 ~10 -15 MPa and a temperature of 800 to 1000°C to obtain a laminated ceramic capacitor body part.
[0066] A conductive paste mainly composed of copper (Cu) was applied to the end face of the green body obtained by firing, from which the internal electrode layer was drawn out. Then, the applied conductive paste was baked at 900 °C to form the underlayer of the external electrode. Further, Ni plating and Sn plating were successively performed on the surface layer of the underlayer by wet plating. In this way, a multilayer ceramic capacitor was manufactured.
[0067] The manufactured multilayer ceramic capacitor had a length L dimension of 0.4 mm, a width direction W dimension of 0.2 mm, and a thickness direction T dimension of 0.2 mm. Also, the thickness of the dielectric layer in the inner layer part was 0.5 μm, the thickness of the internal electrode layer was 0.4 μm, and the number of dielectric ceramic layers was 150.
[0068] (2) Evaluation Regarding the obtained multilayer ceramic capacitor, evaluations of various characteristics were performed as follows.
[0069] <Dielectric characteristics> The capacitance C of the multilayer ceramic capacitor was measured using an automatic bridge type measuring instrument. The measurement was performed under the conditions of a temperature of 25 °C, an effective voltage of 0.5 Vrms, and a frequency of 1 kHz. Then, using the capacitance C, the relative permittivity (ε r ) of the dielectric ceramic layer was obtained. Also, based on the value of the relative permittivity of Comparative Example 1, the ratio to it was obtained as the relative permittivity ratio (ε r ratio).
[0070] <High-temperature load life> A high-accelerated life test (HALT) was performed on the multilayer ceramic capacitor to obtain the mean time to failure (MTTF). In the high-accelerated life test, a high-temperature load was applied to the multilayer ceramic capacitor under the conditions of 150 °C and 6.3 V. Then, the time when the insulation resistance became 10 kΩ or less was determined as a failure, and the mean time to failure (MTTF) was calculated. The number of measurements was 10. Also, based on the value of the mean time to failure of Comparative Example 1, the ratio to it was obtained as the MTTF ratio.
[0071] <S-TEM observation> The cross-section of the dielectric ceramic layer of a multilayer ceramic capacitor was observed using a scanning transmission electron microscope (S-TEM). For the S-TEM observation, thin film processing was performed by the focused ion beam (FIB) method to prepare an observation sample. Specifically, a thin sample with a thickness of 100 nm or less having a plane (WT plane) including the width direction and the thickness direction was taken out from the central part in the length direction (L direction) of the multilayer ceramic capacitor. The thickness of this thin sample was smaller than the radius of the crystal grains contained in the sample. Then, for 200 crystal grains in the thin sample, the central part of each crystal grain was observed by a scanning transmission electron microscope (S-TEM) under the condition of a spatial resolution of 100 pm or less, and analysis by the nano-beam electron diffraction (NBD) method was performed.
[0072] Then, when the sample was tilted within the range of ±5°, particles in which the {100} plane was observed were judged as {100} particles, and the number thereof was counted. Then, the number ratio of the {100} particles in the crystal particles was obtained. Also, for each {100} particle, the entire particle was observed by S-TEM to determine the region where the atomic arrangement was observed, and the area ratio of the atomic arrangement region was calculated. Then, the average value of the area ratios of the atomic arrangement regions was obtained as the average area ratio. An example of the HAADF image of the region where the atomic arrangement of the {100} particles is observed is shown in FIG. 5.
[0073] Also, in the obtained HAADF image, using the EDX device attached to the S-TEM, the Ba concentration and the Ti concentration of the {100} particle cross-section were obtained as a function of distance (position variation) and graphed. An example of the obtained graph is shown in FIG. 7. Point A in the figure is a location where the position variation of the Ba concentration is relatively sharp, and point B is a relatively broad location. Point C in the figure is a location where the position variation of the Ti concentration is relatively sharp, and point D is a relatively broad location. It is considered that the location where the position variation is sharp has a small lattice strain, while the location where the position variation is broad has a large lattice strain. Next, for one lattice including points A to D, the concentration differences (Δc = c maxThe function of the distance (-c) (positional variation) was determined and graphed. The obtained graphs are shown in FIGS. 8 and 9. For comparison, the results obtained for BaTiO3 fabricated by the prior art are also shown in FIGS. 8 and 9.
[0074] And from the obtained graphs, the areas (S Δc≦2% ) of the Ba atom distribution region and the Ti atom distribution region were determined. Specifically, a line where the concentration difference (Δc) is 2 atm% was drawn horizontally on the horizontal axis. Then, the distances from the vertical axis at the two points (point a and point b) where this line intersects the graph of the concentration difference were read, and they were respectively d a and d b . And, according to the following equations (2) and (3), the area (S Δc≦2% ) of the atom distribution region was calculated. The areas of the atom distribution regions were calculated for all the detected {100} particles, and the average value of the 10 selected in order from the smallest area was determined.
[0075]
Equation
[0076] (3) Evaluation Results For Comparative Examples 1 and 2 and Examples 1 to 22, the pressure application conditions during firing and the characteristics of the dielectric ceramic layer are summarized in Table 1 below. Note that Table 1 below shows the area (S Δc≦2% ) of the Ba atom distribution region. The area of the Ti atom distribution region was almost the same as the value for Ba.
[0077] The higher the pressure applied and the longer the application time during the firing process in the manufacture of the multilayer ceramic capacitor, the higher the ratio of {100} particles, and accordingly, the higher the relative permittivity (ε r ). In particular, in Examples 1 to 22 where the number ratio of {100} particles was 4% or more, the relative permittivity was 2920 or more, and in Examples 4 to 9 and 14 to 22 where the number ratio was 10% or more, the relative permittivity was 3220 or more.
[0078] Moreover, the higher the applied pressure and the longer the application time, the larger the area ratio of the atomic arrangement region, and accordingly, the longer the mean time to failure (MTTF). In particular, in Examples 5 to 9 and 13 to 22 with an area ratio of 10% or more, the MTTF was 25 hours or more, and in Examples 8, 9 and 14 to 22 with an area ratio of 30% or more, the MTTF was 31 hours or more.
[0079] On the other hand, in Comparative Examples 1 and 2, the relative permittivity was 2670 or less, and the MTTF remained at 20 hours or less.
[0080]
Table 1
Claims
1. It has a first main surface and a second main surface that face each other in the thickness direction, a first side surface and a second side surface that face each other in the width direction, and a first end surface and a second end surface that face each other in the length direction, a body part including a plurality of dielectric ceramic layers and a plurality of internal electrode layers laminated in the thickness direction, and a pair of external electrodes provided on each of the first end surface and the second end surface and connected to the plurality of internal electrode layers. A multilayer ceramic capacitor, wherein the dielectric ceramic layer is a sintered polycrystal containing crystal grains composed of a perovskite-type oxide containing an A-site element and a B-site element, when observing a cross section of the dielectric ceramic layer using a scanning transmission electron microscope (S-TEM), the dielectric ceramic layer contains {100} grains in which the {100} plane of the perovskite structure is observed as crystal grains, A multilayer ceramic capacitor, wherein in the cross section, the number ratio of the {100} grains in the crystal grains is 4% or more.
2. The multilayer ceramic capacitor according to claim 1, wherein the number ratio of the {100} grains is 10% or more.
3. The multilayer ceramic capacitor according to claim 1, wherein in the cross section, the {100} grains include an atomic arrangement region where the atomic arrangement of the perovskite-type oxide is observed, and the average area ratio of the atomic arrangement region in the cross section of the {100} grains is 10% or more.
4. The multilayer ceramic capacitor according to claim 2, wherein in the cross section, the {100} grains include an atomic arrangement region where the atomic arrangement of the perovskite-type oxide is observed, and the average area ratio of the atomic arrangement region in the cross section of the {100} grains is 10% or more.
5. The multilayer ceramic capacitor according to claim 3, wherein the average area ratio of the atomic arrangement region is 30% or more.
6. The multilayer ceramic capacitor according to claim 4, wherein the average area ratio of the atomic arrangement region is 30% or more.
7. The multilayer ceramic capacitor according to any one of claims 1 to 6, wherein the A-site element contains barium (Ba) and the B-site element contains titanium (Ti).
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