Voltage Divider Circuit and Communication Device

Abstract

To make it possible to reduce the amplitude of a high-frequency carrier signal while maintaining a signal component related to information in the high-frequency carrier signal (amplitude modulated wave) whose amplitude is changed according to the information.SOLUTION: A voltage dividing circuit includes: an input circuit that inputs a high-frequency carrier signal amplitude-modulated according to information; and an amplitude reduction circuit that reduces amplitude of the input high-frequency carrier signal and outputs it. The amplitude reduction circuit detects polarity of the input high-frequency carrier signal and causes a certain voltage drop for the high-frequency carrier signal according to the detected polarity.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a voltage dividing circuit and a communication device.

Background Art

[0002] In a communication device that changes the amplitude of a high-frequency carrier signal (carrier wave) according to the information to be transmitted and performs information transmission using an amplitude-modulated wave having an amplitude change, a rectifier circuit is used as an amplitude detector for extracting a signal component (modulation component) related to the information from the amplitude-modulated wave (see, for example, Non-Patent Document 1). The configuration of a general rectifier circuit used as an amplitude detector is shown in FIG. 15. The rectifier circuit (voltage doubler rectifier circuit) shown in FIG. 15 is composed of a capacitor C101, C102, diodes D101, D102, and a resistor R101.

[0003] One electrode of the capacitor C101 is connected to the input terminal SGI, and the other electrode is connected to the cathode of the diode D101. The anode of the diode D101 is connected to the reference potential line. One electrode of the capacitor C102 is connected to the reference potential line, and the other electrode is connected to the cathode of the diode D102 and the output terminal SGO. The anode of the diode D102 is connected to the interconnection point between the other electrode of the capacitor C101 and the cathode of the diode D101. The resistor R101 is connected in parallel with the capacitor C102. The rectifier circuit shown in FIG. 15 performs envelope detection on the amplitude-modulated wave input from the input terminal SGI, and outputs a signal (detection output) corresponding to the envelope of the amplitude-modulated wave from the output terminal SGO.

Prior Art Documents

Non-Patent Documents

[0004]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] When the amplitude of a high-frequency carrier signal is large, for example, 300 Vpp (peak to peak), the breakdown voltages of the diodes D101 and D102 used in the rectifier circuit shown in FIG. 15 also need to be 300 V. Even when using another conventional rectifier circuit different from the rectifier circuit shown in FIG. 15 as an amplitude detector, the diodes used in the rectifier circuit, by their nature, require a breakdown voltage comparable to the amplitude of the high-frequency carrier signal. Furthermore, when performing high-speed information transmission, it is necessary to use a high-frequency carrier signal with a high frequency according to the data rate, and the diodes used in the rectifier circuit are required not only to have a high breakdown voltage but also to have high-speed operating performance.

[0006] Here, when the frequency of the high-frequency carrier signal is, for example, a high frequency of 10 MHz or more, there is no diode that combines the corresponding high speed and high breakdown voltage. Therefore, conventionally, a high-frequency carrier signal (amplitude-modulated wave) whose amplitude is changed according to information has been attenuated by an attenuator composed of elements such as resistors and capacitors, and then amplitude detection has been performed using a rectifier circuit. For example, when the amplitude of the high-frequency carrier signal is 300 Vpp, it is attenuated by about (1 / 6) by an attenuator to suppress it to an amplitude of about 50 Vpp and applied to a rectifier circuit (amplitude detector) to satisfy the breakdown voltage of a high-speed diode of about 100 V.

[0007] However, in order to satisfy the breakdown voltage of the diode used in the rectifier circuit (amplitude detector), when the high-frequency carrier signal (amplitude-modulated wave) whose amplitude is changed according to information is attenuated by an attenuator, the signal component (modulation component) related to the information in the amplitude-modulated wave is also attenuated. As a result, the output level of the rectifier circuit (amplitude detector) also decreases, and it becomes necessary to gain in the subsequent stage, resulting in deterioration of resistance to noise and deterioration of communication performance. The present invention has been made in view of such circumstances, and an object thereof is to be able to reduce the amplitude of a high-frequency carrier signal while maintaining the signal component related to the information in the high-frequency carrier signal (amplitude-modulated wave) whose amplitude is changed according to information.

Means for Solving the Problems

[0008] The voltage dividing circuit according to the present invention includes an input means for inputting a high-frequency carrier signal amplitude-modulated according to information, and an amplitude reducing means for reducing and outputting the amplitude of the input high-frequency carrier signal. The amplitude reducing means includes a detecting means for detecting the polarity of the input high-frequency carrier signal, and a voltage drop means for generating a constant voltage drop in accordance with the detected polarity with respect to the high-frequency carrier signal, and is characterized by this.

Effects of the Invention

[0009] According to the present invention, it is possible to reduce the amplitude of a high-frequency carrier signal while maintaining the signal component related to the information in the high-frequency carrier signal whose amplitude is changed according to information.

Brief Description of the Drawings

[0010]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Figure 15

Embodiments for Carrying Out the Invention

[0011] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0012] (First Embodiment) The first embodiment of the present invention will be described. FIG. 1 is a diagram showing a configuration example of the voltage dividing circuit in the first embodiment. In FIG. 1, 11 is an input circuit, 12 is an amplitude reduction circuit, and 13 is a detection circuit. FIG. 1 shows an example in which the voltage dividing circuit in the present embodiment is realized using one amplitude reduction circuit 12.

[0013] The input circuit 11 varies the amplitude of a high-frequency carrier signal (carrier wave) according to the information to be transmitted, and inputs the high-frequency carrier signal (amplitude-modulated wave) with the amplitude variation. The high-frequency carrier signal (amplitude-modulated wave) whose amplitude is varied according to the information and is input by the input circuit 11 is supplied to the detection circuit 13 via the amplitude reduction circuit 12 as a voltage division circuit.

[0014] The amplitude reduction circuit 12 has its input terminal SGI connected to the input circuit 11 and its output terminal SGO connected to the detection circuit 13. The amplitude reduction circuit 12 receives, at the input terminal SGI, the high-frequency carrier signal (amplitude-modulated wave) whose amplitude is varied according to the information, and while maintaining the signal component (modulation component) related to the information in the input amplitude-modulated wave, reduces the amplitude of the high-frequency carrier signal (carrier component) and outputs it from the output terminal SGO.

[0015] The amplitude reduction circuit 12 includes diodes D1, D2, D3, D4, a resistor R1, and a capacitor C1. The anode of diode D1 and the cathode of diode D3 are connected to the input terminal SGI, and the anode of diode D2 and the cathode of diode D4 are connected to the output terminal SGO. The cathode of diode D1 and the cathode of diode D2 are connected, and the anode of diode D3 and the anode of diode D4 are connected. One end of the resistor R1 and one electrode of the capacitor C1 are connected to the connection point VbP between the cathodes of diode D1 and diode D2, and the other end of the resistor R1 and the other electrode of the capacitor C1 are connected to the connection point VbM between the anodes of diode D3 and diode D4. That is, as shown in FIG. 1, in the amplitude reduction circuit 12, the four diodes D1 to D4 are connected to form a bridge circuit, and the resistor R1 and the capacitor C1 are connected in parallel between the VbP point and the VbM point. In the example shown in FIG. 1, the diodes D1, D2, D3, D4 are an example of detection means for detecting the polarity of the high-frequency carrier signal, and the resistor R1 and the capacitor C1 are an example of voltage drop means for generating a certain voltage drop according to the detected polarity with respect to the high-frequency carrier signal.

[0016] The detection circuit 13 performs envelope detection on the input high-frequency carrier signal (amplitude-modulated wave) and outputs a signal (detection output) corresponding to the envelope of the amplitude-modulated wave. The detection circuit 13 is, for example, a rectifier circuit (voltage-doubling rectifier circuit) as shown in FIG. 15. In the example shown in FIG. 1, the detection circuit 13 performs envelope detection on the high-frequency carrier signal (amplitude-modulated wave) with reduced amplitude output from the output terminal SGO of the amplitude reduction circuit 12, and outputs a signal corresponding to the envelope of the amplitude-modulated wave (signal component related to information). Note that, not limited to the detection circuit 13, other load circuits or the like may be connected to the output terminal SGO of the amplitude reduction circuit 12.

[0017] Referring to FIG. 2, the operation of the amplitude reduction circuit 12 as a voltage division circuit in the present embodiment will be described. When the high-frequency carrier signal input by the input circuit 11 is a positive value with respect to the reference potential, a current flows between the input terminal SGI and the output terminal SGO of the amplitude reduction circuit 12 along the path FL1 shown by the solid line in FIG. 2, that is, the path from the input terminal SGI → diode D1 → point VbP → point VbM → diode D4 → output terminal SGO. When the high-frequency carrier signal input by the input circuit 11 is a negative value with respect to the reference potential, a current flows between the input terminal SGI and the output terminal SGO of the amplitude reduction circuit 12 along the path FL2 shown by the broken line in FIG. 2, that is, the path from the output terminal SGO → diode D2 → point VbP → point VbM → diode D3 → input terminal SGI.

[0018] As described above, in the amplitude reduction circuit 12, the path through which the current flows is switched according to the polarity of the high-frequency carrier signal, and the current always flows in a constant direction with respect to the resistor R1 and the capacitor C1 regardless of the polarity of the high-frequency carrier signal. Due to the voltage drop generated by the resistor R1 and the capacitor C1, the signal level (amplitude) of the high-frequency carrier signal is reduced and supplied to the detection circuit 13. Since the signal level (amplitude) of the high-frequency carrier signal is reduced by the voltage drop caused by the same resistor R1 and capacitor C1 regardless of the polarity of the high-frequency carrier signal, a communication system with high symmetry and high fidelity of the high-frequency carrier signal can be configured.

[0019] Here, since current is supplied to the next-stage circuit (in this example, the detection circuit 13) via the resistor R1, the resistance value of the resistor R1 may be determined so as to cause a desired voltage drop in consideration of the breakdown voltages of the respective circuit elements in the next-stage circuit (detection circuit 13). Also, the capacitance value of the capacitor C1 may be determined so as to have a sufficient time constant (R×C) with respect to the spectrum of the signal component (modulation component) related to the information so that a constant voltage can be maintained regardless of the amplitude change of the high-frequency carrier signal.

[0020] Also, when the amplitude of the input high-frequency carrier signal changes according to the signal component related to the information, the current flowing between the input terminal SGI and the output terminal SGO of the amplitude reduction circuit 12 is as follows. <State A> When the AC amplitude of the signal input to the amplitude reduction circuit 12 is constant Current flows by an amount that replenishes the amount of charge discharged from the capacitor C1 through the resistor R1. <State B> When the AC amplitude of the signal input to the amplitude reduction circuit 12 changes so as to increase Since the voltage across the capacitor C1 rises, more current flows to increase the charge of the capacitor C1. Even after that, as long as the voltage across the capacitor C1 is higher than in State A, a larger current than in State A flows. <State C> When the AC amplitude of the signal input to the amplitude reduction circuit 12 changes so as to decrease Since the voltage across the capacitor C1 is high, the flowing current becomes small. The charge of the capacitor C1 is discharged by the resistor R1, and this state continues until current flows out. Even after that, since the voltage of the capacitor C1 becomes lower than in State A, a smaller current than in State A flows.

[0021] In this way, the current flowing between the input terminal SGI and the output terminal SGO of the amplitude reduction circuit 12 is such that a predetermined current flows while the AC amplitude of the input signal is constant, the current increases when the AC amplitude of the input signal changes so as to increase, and the current decreases when the AC amplitude of the input signal changes so as to decrease. Therefore, in the detection circuit 13, the AC amplitude of the input signal can be amplified and detected.

[0022] FIG. 3 is a diagram for explaining the input / output waveforms of the amplitude reduction circuit 12 as a voltage division circuit in the present embodiment. FIG. 3(A) shows an example of an input waveform input from the input terminal SGI of the amplitude reduction circuit 12, and FIG. 3(B) shows an example of an output waveform output from the output terminal SGO of the amplitude reduction circuit 12.

[0023] As described above, in the amplitude reduction circuit 12 to which a high-frequency carrier signal is input, since the voltage across the resistor R1 and the capacitor C1 connected between the VbP point and the VbM point hardly changes, the voltage drop between the input terminal SGI and the output terminal SGO becomes substantially constant. As a result, at the output of the amplitude reduction circuit 12, the voltage of the high-frequency carrier signal drops by the holding voltage between the VbP point and the VbM point, but since the holding voltage hardly changes due to the resistor R1 and the capacitor C1, the signal component (modulation component) related to the information is preserved as it is. Further, by switching the current path in the amplitude reduction circuit 12 according to the polarity of the high-frequency carrier signal, a positive voltage drop is given when the high-frequency carrier signal is a positive value with respect to the reference potential, and a negative voltage drop is given when the high-frequency carrier signal is a negative value with respect to the reference potential.

[0024] As shown by an example in FIGS. 3(A) and 3(B), for example, a high-frequency carrier signal with an input amplitude Vcar1 has its amplitude reduced by a voltage drop VH1 between the VbP point and the VbM point and is output as a high-frequency carrier signal with an amplitude Vcar2. In this way, the amplitude of the high-frequency carrier signal is reduced, but the signal component (modulation component) Vsig1 related to the information in the input high-frequency carrier signal and the signal component (modulation component) Vsig2 related to the information in the output high-frequency carrier signal are maintained.

[0025] As described above, according to the voltage division circuit (amplitude reduction circuit 12) in the present embodiment, it is possible to reduce the amplitude (carrier component) of the high-frequency carrier signal while maintaining the signal component (modulation component) related to the information in the high-frequency carrier signal (amplitude-modulated wave) whose amplitude is changed according to the information to be transmitted. In other words, the voltage division circuit in the present embodiment reduces the amplitude of the input high-frequency carrier signal (amplitude-modulated wave) with an amplitude change by the voltage division ratio, and expands the modulation degree by an amount corresponding to the voltage division ratio and outputs it. Hereinafter, this will be described.

[0026] The amplitude-varying high-frequency carrier signal (amplitude-modulated wave) Sin input to the voltage division circuit is generally described by (Equation 1). Further, (Equation 1) can be expanded as (Equation 2), which means that the input amplitude-modulated wave Sin consists of a carrier component indicated by the first term and a sideband component indicated by the second term. In the following equations, fs(t) is a modulation wave (normalized so that |fs(t)| ≤ 1), fc is the frequency of the carrier signal, and t is time. Sin = A*(1+m*fs(t))*sin(2*π*fc*t) …(Equation 1) = A*sin(2*π*fc*t)+A*m*fs(t)*sin(2*π*fc*t) …(Equation 2) In the input amplitude-modulated wave Sin represented by (Equation 1) and (Equation 2), the amplitude of the carrier component is A and the modulation degree is m.

[0027] On the other hand, since only the carrier component of the amplitude-modulated wave Sout output from the voltage division circuit is voltage-divided and its amplitude is reduced, only the carrier component (the first term) of (Equation 2) is multiplied by the voltage division ratio and described as (Equation 3), and further becomes (Equation 4). Sout = (voltage division ratio)*A*sin(2*π*fc*t)+A*m*fs(t)*sin(2*π*fc*t) …(Equation 3) = (voltage division ratio*A)*(1+(m / voltage division ratio)*fs(t))*sin(2*π*fc*t) …(Equation 4) In (Equation 3) and (Equation 4), the partial pressure ratio is (amplitude of the carrier component in the output signal) / (amplitude of the carrier component in the input signal). According to (Equation 4), it can be seen that for the output amplitude-modulated wave Sout, the amplitude of the carrier component is (A * partial pressure ratio), and the modulation degree is (m / partial pressure ratio).

[0028] That is, when comparing (Equation 1) and (Equation 4), the voltage dividing circuit reduces the amplitude of the input amplitude-modulated wave to the partial pressure ratio and expands the modulation degree in proportion to the partial pressure ratio. For example, when dividing the voltage by a partial pressure ratio of (1 / 5), the voltage dividing circuit reduces the amplitude of the amplitude-modulated wave to (1 / 5) and expands the modulation degree by five times.

[0029] Therefore, according to the voltage dividing circuit in the present embodiment, even for an amplitude-modulated wave with a very low modulation degree, it is possible to improve the modulation degree and efficiently extract the signal component related to information from the amplitude-modulated wave. Conventionally, when the signal level of a high-frequency carrier signal is high, the carrier signal is attenuated according to the breakdown voltage of the diode used in the detection circuit (rectifier circuit), resulting in deterioration of the reception performance. In contrast, according to the voltage dividing circuit in the present embodiment, it is possible to reduce the amplitude of the carrier signal while improving the modulation degree in the amplitude-modulated wave, and good amplitude detection characteristics can be obtained.

[0030] Next, an example of the simulation in the voltage dividing circuit in the present embodiment to which the amplitude reduction circuit 12 is applied will be described. FIG. 4 is a diagram showing the configuration of the voltage dividing circuit used in the simulation. In FIG. 4, 11 is an input circuit, 12-1 is a first amplitude reduction circuit, 12-2 is a second amplitude reduction circuit, 13 is a detection circuit, and 14 is a filter circuit.

[0031] The circuit shown in Fig. 4 is configured such that the amplitude of the high-frequency carrier signal (amplitude-modulated wave) input from the input circuit 11 is reduced by two cascaded amplitude reduction circuits 12-1 and 12-2, and the signal component related to the information is extracted from the further amplitude-reduced amplitude-modulated wave by the detection circuit 13 and the filter circuit 14. In the example shown in Fig. 4, a voltage division circuit is realized using two amplitude reduction circuits 12-1 and 12-2 connected in series.

[0032] The input circuit 11 inputs a high-frequency carrier signal (amplitude-modulated wave) whose amplitude is changed according to the information. The input terminal of the first amplitude reduction circuit 12-1 is connected to the input circuit 11, and the output terminal of the first amplitude reduction circuit 12-1 is connected to the input terminal of the second amplitude reduction circuit 12-2. The output terminal of the second amplitude reduction circuit 12-2 is connected to the input terminal of the detection circuit 13. The output terminal of the detection circuit 13 is connected to the input terminal of the filter circuit 14, and the output of the filter circuit 14 is output as the output signal (detection output) from the output terminal OUT.

[0033] The amplitude reduction circuits 12-1 and 12-2 output by reducing the amplitude of the high-frequency carrier signal (carrier component) while maintaining the signal component (modulation component) related to the information in the input amplitude-modulated wave. The amplitude reduction circuits 12-1 and 12-2 are each configured in the same manner as the amplitude reduction circuit 12 shown in FIG. 1. That is, each of the amplitude reduction circuits 12-i (where i is a subscript and i = 1, 2 in the example shown in FIG. 4) has diodes D1, D2, D3, D4, a resistor R1-i, and a capacitor C1-i. The anode of diode D1 and the cathode of diode D3 are connected to the input terminal of the amplitude reduction circuit 12-i, and the anode of diode D2 and the cathode of diode D4 are connected to the output terminal of the amplitude reduction circuit 12-i. The cathode of diode D1 and the cathode of diode D2 are connected, and the anode of diode D3 and the anode of diode D4 are connected. One end of the resistor R1-i and one electrode of the capacitor C1-i are connected to the connection point VbP between the cathodes of diode D1 and diode D2, and the other end of the resistor R1-i and the other electrode of the capacitor C1-i are connected to the connection point VbM between the anodes of diode D3 and diode D4. In the example shown in FIG. 4, in each of the amplitude reduction circuits 12-i, the diodes D1, D2, D3, D4 are an example of detection means for detecting the polarity of the high-frequency carrier signal, and the resistor R1-i and the capacitor C1-i are an example of voltage drop means for generating a certain voltage drop according to the detected polarity with respect to the high-frequency carrier signal. Note that the resistance value of the resistor R1-i and the capacitance value of the capacitor C1-i can be independently selected for each amplitude reduction circuit 12-i, and may be different values according to the amplitude reduction circuit 12-i, or may be the same value for a plurality of amplitude reduction circuits 12-i.

[0034] The detection circuit 13 is an amplitude detection circuit that performs envelope detection on the input amplitude-modulated wave and outputs a signal (detection output) corresponding to the envelope of the amplitude-modulated wave. In the example shown in FIG. 4, the detection circuit 13 is a rectifier circuit (doubling voltage rectifier circuit) having capacitors C2, C3, diodes D5, D6, and a resistor R2. One electrode of the capacitor C2 is connected to the output terminal of the second amplitude reduction circuit 12-2, and the other electrode is connected to the cathode of the diode D5. The anode of the diode D6 is connected to the interconnection point between the other electrode of the capacitor C2 and the cathode of the diode D5, and the cathode is connected to the input terminal of the filter circuit 14. One electrode of the capacitor C3 and one end of the resistor R2 are connected to the cathode of the diode D6. The anode of the diode D5, the other electrode of the capacitor C3, and the other end of the resistor R2 are connected to the reference potential line.

[0035] The filter circuit 14 smoothes (removes the carrier) the signal (detection output) output from the detection circuit 13 and outputs it. In the example shown in FIG. 4, the filter circuit 14 is an RC filter circuit (second-order RC low-pass filter circuit) having resistors R3, R4 and capacitors C4, C5. One end of the resistor R3 is connected to the output terminal of the filter circuit 14, and the other end is connected to one end of the resistor R4. The other end of the resistor R4 is connected to the output terminal OUT. One electrode of the capacitor C4 is connected to the other end of the resistor R3, and one electrode of the capacitor C5 is connected to the other end of the resistor R4. The other electrodes of the capacitor C4 and the capacitor C5 are connected to the reference potential line.

[0036] Taking as an example the case where an amplitude-modulated wave Sig represented by (Equation 5) with the amplitude (A) of the high-frequency carrier signal being 100 V, the frequency (Fc) being 10 MHz, the amplitude (g) of the signal component (modulation component) related to the information being 1.0 V, and the frequency (Fg) being 300 kHz is input from the input circuit 11. This amplitude-modulated wave Sig is given an amplitude variation of 2.0 Vpp by the signal component related to the information. Sig = A*(1+m*sin(2*π*Fg))*sin(2*π*Fc*t) …(Equation 5)

[0037] Note that the resistance values of the resistors R1-1 and R1-2 in the amplitude reduction circuits 12-1 and 12-2 are set to 22 kΩ, and the capacitance values of the capacitors C1-1 and C1-2 are set to 0.01 μF. Also, the capacitance value of the capacitor C2 in the detection circuit 13 is set to 0.01 μF, the capacitance value of the capacitor C3 is set to 100 pF, and the resistance value of the resistor R2 is set to 10 kΩ. Further, the resistance values of the resistors R3 and R4 in the filter circuit 14 are set to 10 kΩ, and the capacitance values of the capacitors C4 and C5 are set to 1 pF.

[0038] Figures 5 and 6 are diagrams showing the input and output waveforms of each circuit when the amplitude-modulated wave Sig is input from the input circuit 11. Figure 5(A) shows the amplitude-modulated wave Sig (input waveform of the first amplitude reduction circuit 12-1) from the input circuit 11, Figure 5(B) shows the output waveform of the first amplitude reduction circuit 12-1 (input waveform of the second amplitude reduction circuit 12-2), and Figure 5(C) shows the output waveform of the second amplitude reduction circuit 12-2. Figure 6 focuses on the signal components (modulation components) related to the information in the input and output of each circuit and is shown as follows: Figure 6(A) shows the amplitude-modulated wave Sig (input waveform of the first amplitude reduction circuit 12-1) from the input circuit 11, Figure 6(B) shows the output waveform of the first amplitude reduction circuit 12-1 (input waveform of the second amplitude reduction circuit 12-2), Figure 6(C) shows the output waveform of the second amplitude reduction circuit 12-2 (input waveform of the detection circuit 13). Also, Figure 6(D) shows the output waveform of the detection circuit 13 (input waveform of the filter circuit 14), and Figure 6(E) shows the output waveform of the filter circuit 14.

[0039] The amplitude-modulated wave Sig having an amplitude fluctuation of 200 V shown in Fig. 5(A) has its amplitude reduced by the holding voltage VH1 by the first amplitude reduction circuit 12-1, and becomes an amplitude-modulated wave having an amplitude fluctuation of about 106 V as shown in Fig. 5(B) and is output from the first amplitude reduction circuit 12-1. Further, the amplitude-modulated wave having an amplitude fluctuation of about 106 V output from the first amplitude reduction circuit 12-1 has its amplitude reduced by the holding voltage VH2 by the second amplitude reduction circuit 12-2, and becomes an amplitude-modulated wave having an amplitude fluctuation of about 12 V as shown in Fig. 5(C) and is output from the second amplitude reduction circuit 12-2. Thus, according to the voltage division circuit in the present embodiment, the input amplitude-modulated wave has its amplitude reduced by the amount of the holding voltage via the amplitude reduction circuits 12-1 and 12-2.

[0040] On the other hand, as shown in Figs. 6(A) to 6(E), the amplitude of the signal component (modulation component) related to the information is maintained without being reduced. For example, as shown in Fig. 6(B), the amplitude-modulated wave output from the first amplitude reduction circuit 12-1 has its amplitude reduced to about 53 V, but the amplitude of the signal component (modulation component) is maintained at 2.0 Vpp without being reduced. Then, while the amplitude of the signal component (modulation component) is maintained at 2.0 Vpp, it is input to the detection circuit 13, and as shown in Figs. 6(D) and 6(E), the signal component (modulation component) is extracted from the amplitude-modulated wave by the detection circuit 13 and the filter circuit 14.

[0041] FIG. 7 is a diagram showing the voltage waveform between the VbP point and the VbM point of the amplitude reduction circuit 12-i when the amplitude-modulated wave Sig is input from the input circuit 11. FIG. 7(A) shows the voltage waveform between the VbP point and the VbM point, and FIG. 7(B) shows an enlarged view of a part thereof. The oscillation of the voltage between the VbP point and the VbM point is very small, 250 mVpp as shown in FIG. 7(B), compared to the amplitude modulation (2.0 Vpp) of the signal component (modulation component) in the amplitude-modulated wave Sig, and it can be seen that the voltage between the VbP point and the VbM point is a substantially constant DC voltage (about 45 V). This substantially constant voltage causes a voltage drop on the positive side when the value of the amplitude-modulated wave is positive, and causes a voltage drop on the negative side when the value of the amplitude-modulated wave is negative, reducing the amplitude of the amplitude-modulated wave.

[0042] The oscillation of the voltage between the VbP point and the VbM point of the amplitude reduction circuit 12-i can be controlled by the time constants of the resistance components (resistance R1-i, impedance of the input circuit, load resistance, etc.) and the capacitance components (capacitance C1-i, etc.). For example, by increasing the capacitance of the capacitance C1-i, it is possible to further suppress the oscillation of the voltage between the VbP point and the VbM point.

[0043] (Second Embodiment) Next, a second embodiment of the present invention will be described. FIG. 8 is a diagram showing a configuration example of a voltage dividing circuit in the second embodiment. In FIG. 8, the same components as those shown in FIG. 1 are denoted by the same reference numerals, and redundant descriptions are omitted. The voltage dividing circuit in the second embodiment has a plurality of amplitude reduction circuits connected in cascade. FIG. 8 shows an example in which three amplitude reduction circuits 12-1, 12-2, and 12-3 are connected in series. The input terminal of the amplitude reduction circuit 12-1 is connected to the input circuit 11, and the output terminal of the amplitude reduction circuit 12-1 is connected to the input terminal of the amplitude reduction circuit 12-2. The output terminal of the amplitude reduction circuit 12-2 is connected to the input terminal of the amplitude reduction circuit 12-3, and the output terminal of the amplitude reduction circuit 12-3 is connected to the input terminal of the detection circuit 13. The amplitude reduction circuits 12-1, 12-2, and 12-3 are each configured in the same manner as the amplitude reduction circuit 12 shown in FIG. 1. That is, each of the amplitude reduction circuits 12-i (i is a subscript, and in the example shown in FIG. 8, i = 1, 2, 3) has diodes D1, D2, D3, D4, a resistor R1-i, and a capacitor C1-i. In the example shown in FIG. 8, in each of the amplitude reduction circuits 12-i, the diodes D1, D2, D3, D4 are an example of detection means for detecting the polarity of a high-frequency carrier signal, and the resistor R1-i and the capacitor C1-i are an example of voltage drop means for generating a certain voltage drop in accordance with the polarity detected with respect to the high-frequency carrier signal. The resistance value of the resistor R1-i and the capacitance value of the capacitor C1-i can be independently selected for each amplitude reduction circuit 12-i.

[0044] FIG. 8 shows an example in which three amplitude reduction circuits 12-1, 12-2, and 12-3 are connected in series, but the number of amplitude reduction circuits connected in cascade is not limited to three and can be any plurality. The input terminal of the first-stage amplitude reduction circuit among the plurality of amplitude reduction circuits is connected to an input circuit that inputs a high-frequency carrier signal (amplitude-modulated wave), the input terminals of the second-stage and subsequent amplitude reduction circuits are connected to the output stage of the previous amplitude reduction circuit, and the output terminal of the final-stage amplitude reduction circuit is connected to a detection circuit or a load circuit. For example, the number of cascaded stages may be determined according to the breakdown voltage of the amplitude reduction circuit.

[0045] According to the voltage dividing circuit in the second embodiment, similar to the first embodiment, it is possible to reduce the amplitude (carrier component) of the high-frequency carrier signal while maintaining the signal component (modulation component) related to the information in the high-frequency carrier signal (amplitude-modulated wave) whose amplitude is changed according to the information to be transmitted. Further, by cascadingly connecting a plurality of amplitude reduction circuits, it is possible to relax the breakdown voltage of the diodes in each amplitude reduction circuit.

[0046] (Third Embodiment) Next, a third embodiment of the present invention will be described. FIG. 9 is a diagram showing a configuration example of the voltage dividing circuit in the third embodiment. In FIG. 9, the same components as those shown in FIG. 1 are denoted by the same reference numerals, and redundant descriptions are omitted. In FIG. 9, 11 is an input circuit, 21-1, 21-2, and 21-3 are amplitude reduction circuits, and 13 is a detection path. The amplitude reduction circuits 21-1, 21-2, and 21-3 are cascadingly connected between the input circuit 11 and the detection path 13. Each of the amplitude reduction circuits 21-1, 21-2, and 21-3 reduces and outputs the amplitude (carrier component) of the high-frequency carrier signal while maintaining the signal component (modulation component) related to the information in the input high-frequency carrier signal (amplitude-modulated wave).

[0047] Each of the amplitude reduction circuits 21-i (where i is a subscript, and in the example shown in FIG. 9, i = 1, 2, 3) has diodes D1A, D1B, D2A, D2B, D3A, D3B, D4A, D4B, a resistor R1-i, and a capacitor C1-i. The cathode of diode D1A is connected to the anode of diode D1B, and the cathode of diode D2A is connected to the anode of diode D2B. Also, the cathode of diode D3A is connected to the anode of diode D3B, and the cathode of diode D4A is connected to the anode of diode D4B. The anode of diode D1A and the cathode of diode D3B are connected to the input terminal of the amplitude reduction circuit 21-i, and the anode of diode D2A and the cathode of diode D4B are connected to the output terminal of the amplitude reduction circuit 21-i. The cathodes of diode D1B and diode D2B are connected, and the anodes of diode D3A and diode D4A are connected. One end of the resistor R1-i and one electrode of the capacitor C1-i are connected to the connection point VbP between the cathodes of diode D1B and diode D2B, and the other end of the resistor R1-i and the other electrode of the capacitor C1-i are connected to the connection point VbM between the anodes of diode D3A and diode D4A.

[0048] That is, diodes D1A and D1B are connected in series between the input terminal of amplitude reduction circuit 21-i and point VbP, and diodes D2A and D2B are connected in series between the output terminal of amplitude reduction circuit 21-i and point VbP. Also, diodes D3A and D3B are connected in series between point VbM and the input terminal of amplitude reduction circuit 21-i, and diodes D4A and D4B are connected in series between point VbM and the output terminal of amplitude reduction circuit 21-i. In this way, a bridge circuit is formed by four sets of serially connected diodes, and resistor R1-i and capacitor C1-i are connected in parallel between point VbP and point VbM. In the example shown in FIG. 9, in each of amplitude reduction circuits 21-i, diodes D1A, D1B, D2A, D2B, D3A, D3B, D4A, and D4B are an example of detection means for detecting the polarity of a high-frequency carrier signal, and resistor R1-i and capacitor C1-i are an example of voltage drop means for generating a certain voltage drop according to the detected polarity with respect to the high-frequency carrier signal. The resistance value of resistor R1-i and the capacitance value of capacitor C1-i can be independently selected for each amplitude reduction circuit 21-i.

[0049] According to the voltage division circuit in the third embodiment, similar to the first embodiment, while maintaining the signal component (modulation component) related to the information in the high-frequency carrier signal (amplitude-modulated wave) whose amplitude is changed according to the transmitted information, the amplitude (carrier component) of the high-frequency carrier signal can be reduced. Also, by forming a bridge circuit using four sets of pairs of two diodes connected in series, the breakdown voltage of each amplitude reduction circuit 21-i can be increased. Increasing the breakdown voltage of each amplitude reduction circuit 21-i leads to reducing the influence of the parasitic capacitance of the diode. When the voltage applied to the diode changes in the reverse direction, it is possible to suppress the current that should be blocked by the characteristics of the diode from flowing through the parasitic capacitance and reducing the rectification efficiency by amplitude reduction circuit 21-i. In the above description, an example of connecting two diodes in series is shown, but the number of diodes connected in series is arbitrary and may be three or more.

[0050] (Fourth Embodiment) Next, a fourth embodiment of the present invention will be described. FIG. 10 is a diagram showing a configuration example of a voltage dividing circuit in the fourth embodiment. In FIG. 10, the same components as those shown in FIGS. 1 and 8 are denoted by the same reference numerals, and redundant descriptions are omitted. The circuit configuration of the voltage dividing circuit in the fourth embodiment shown in FIG. 10 is the same as the circuit configuration of the voltage dividing circuit in the second embodiment shown in FIG. 8. However, in the voltage dividing circuit in the fourth embodiment shown in FIG. 10, the resistors R1-1, R1-2, and R1-3 included in the amplitude reduction circuits 12-1, 12-2, and 12-3 have different resistance values instead of the same resistance value.

[0051] The amplitude reduction circuits 12-1, 12-2, and 12-3 are connected in cascade, and the same load current flows through the amplitude reduction circuits 12-1, 12-2, and 12-3. Therefore, when a high-frequency carrier signal is input, the voltages between the VbP point and the VbM point of each of the amplitude reduction circuits 12-1, 12-2, and 12-3 are determined according to the values of the respective resistors R1-1, R1-2, and R1-3. Therefore, by setting the resistance values of the resistors R1-1, R1-2, and R1-3 included in the amplitude reduction circuits 12-1, 12-2, and 12-3 to desired values, it is possible to freely set the amount of amplitude reduction in each of the amplitude reduction circuits 12-1, 12-2, and 12-3.

[0052] In the circuit configuration shown in FIG. 10, let the resistance value of the resistor R1-1 included in the amplitude reduction circuit 12-1 be RA, the resistance value of the resistor R1-2 included in the amplitude reduction circuit 12-2 be RB, and the resistance value of the resistor R1-3 included in the amplitude reduction circuit 12-3 be RC. Here, considering the parasitic capacitances associated with each of the amplitude reduction circuits 12-1, 12-2, and 12-3, when the resistance values of the resistors R1-1, R1-2, and R1-3 included in each of the amplitude reduction circuits 12-1, 12-2, and 12-3 are set to the same resistance value (RA = RB = RC), a higher voltage is applied to the amplitude reduction circuit 12 on the first stage side due to the influence of the parasitic capacitance. Therefore, for example, by setting the resistance values of the resistors R1-1, R1-2, and R1-3 included in each of the amplitude reduction circuits 12-1, 12-2, and 12-3 to increase sequentially from the first stage side (RA < RB < RC), the voltages applied to each of the amplitude reduction circuits 12 can be equalized.

[0053] According to the voltage dividing circuit in the fourth embodiment, similar to the first embodiment, while maintaining the signal component (modulation component) related to the information in the high-frequency carrier signal (amplitude-modulated wave) whose amplitude is changed according to the transmitted information, the amplitude of the high-frequency carrier signal (carrier component) can be reduced, and the amount of amplitude reduction in each of the amplitude reduction circuits 12-1, 12-2, and 12-3 can be freely set.

[0054] (Fifth Embodiment) Next, a fifth embodiment of the present invention will be described. FIG. 11 is a diagram showing a configuration example of the voltage dividing circuit in the fifth embodiment. In FIG. 11, the same components as those shown in FIG. 1 are denoted by the same reference numerals, and redundant descriptions are omitted. In FIG. 11, 11 is an input circuit, 31-1, 31-2, and 31-3 are amplitude reduction circuits, and 13 is a detection path. The amplitude reduction circuits 31-1, 31-2, and 31-3 are connected in cascade between the input circuit 11 and the detection path 13. Each of the amplitude reduction circuits 31-1, 31-2, and 31-3 reduces and outputs the amplitude of the high-frequency carrier signal (carrier component) while maintaining the signal component (modulation component) related to the information in the input high-frequency carrier signal (amplitude-modulated wave).

[0055] Each of the amplitude reduction circuits 31-i (where i is a subscript, and in the example shown in FIG. 11, i = 1, 2, 3) further includes a Zener diode ZD1-i in addition to diodes D1, D2, D3, D4, resistors R1-i, and capacitors C1-i. The anode of diode D1 and the cathode of diode D3 are connected to the input terminal of the amplitude reduction circuit 31-i, and the anode of diode D2 and the cathode of diode D4 are connected to the output terminal of the amplitude reduction circuit 31-i. The cathode of diode D1 and the cathode of diode D2 are connected, and the anode of diode D3 and the anode of diode D4 are connected. One end of resistor R1-i, one electrode of capacitor C1-i, and the cathode of Zener diode ZD1-i are connected to the connection point VbP between the cathodes of diode D1 and diode D2. Also, the other end of resistor R1-i, the other electrode of capacitor C1-i, and the anode of Zener diode ZD1-i are connected to the connection point VbM between the anodes of diode D3 and diode D4. In the example shown in FIG. 4, in each of the amplitude reduction circuits 31-i, diodes D1, D2, D3, D4 are an example of detection means for detecting the polarity of a high-frequency carrier signal, and resistors R1-i, capacitors C1-i, and Zener diodes ZD1-i are an example of voltage drop means for generating a certain voltage drop according to the detected polarity with respect to the high-frequency carrier signal. The resistance value of resistor R1-i, the capacitance value of capacitor C1-i, and the breakdown voltage of Zener diode ZD1-i can be independently selected for each amplitude reduction circuit 12-i.

[0056] According to the voltage dividing circuit in the fifth embodiment, similar to the first embodiment, while maintaining the signal component (modulation component) related to the information in the high-frequency carrier signal (amplitude-modulated wave) whose amplitude is changed according to the transmitted information, the amplitude (carrier component) of the high-frequency carrier signal can be reduced. Also, by connecting a Zener diode ZD1-i between the VbP point and the VbM point of each amplitude reduction circuit 31-i, the voltage between the VbP point and the VbM point can be regulated by the breakdown voltage of the Zener diode ZD1-i, and it is possible to prevent an excessive voltage from being applied to the circuit elements.

[0057] For example, when a large number of amplitude reduction circuits 31-i are connected in cascade and the balance between the circuits is disrupted, it is possible to prevent the amount of reduction in the amplitude of the high-frequency carrier signal (amplitude-modulated wave) by the amplitude reduction circuit 31-i from becoming excessive. Also, for example, since the amplitude of the high-frequency carrier signal (amplitude-modulated wave) cannot be reduced above the breakdown voltage of the Zener diode ZD1-i, it becomes possible to appropriately allocate the amount of reduction in the amplitude of the high-frequency carrier signal (amplitude-modulated wave) to each amplitude reduction circuit 31-i.

[0058] Here, the amplitude reduction circuit 31-i is intended to hold a constant voltage internally regardless of the amplitude variation of the input high-frequency carrier signal (amplitude-modulated wave). Therefore, it is not limited to using the time constant formed by resistance components such as the resistor R1-i and capacitance components such as the capacitor C1-i, and it is sufficient if it can hold a substantially constant voltage internally, and the circuit configuration is not limited. In the example shown in FIG. 11, in addition to the resistor R1-i and the capacitor C1-i, a Zener diode ZD1-i is used, but it can also be realized with only the Zener diode ZD1-i.

[0059] (Sixth Embodiment) Next, a sixth embodiment of the present invention will be described. FIG. 12 is a diagram showing an example of a circuit configuration in the sixth embodiment. In FIG. 12, the same components as those shown in FIGS. 1 and 8 are denoted by the same reference numerals, and redundant descriptions are omitted. In FIG. 12, 11 is an input circuit, 12-1, 12-2, and 12-3 are amplitude reduction circuits, 41 is a tuning circuit, and 13 is a detection path. The circuit shown in FIG. 12 is an example in which a tuning circuit 41 composed of a capacitor C11, a capacitor C12, and an inductor L11 is connected between the amplitude reduction circuit 12-3 and the detection circuit 13.

[0060] As described above, the load connected to the voltage dividing circuit constituted by the amplitude reduction circuit does not necessarily have to be the detection circuit 13, and can be any load circuit. For example, it can be an LC filter circuit, a band-pass filter circuit (band-pass filter circuit), a low-pass filter circuit, a high-pass filter circuit, or the like. In addition, it is also possible to receive it as a pure load and provide a synchronous detection circuit such as an IQ detection circuit to extract a signal output with high quality.

[0061] (Seventh Embodiment) Next, a seventh embodiment of the present invention will be described. FIG. 13 is a diagram showing a configuration example of the voltage dividing circuit in the seventh embodiment. In FIG. 13, the same components as those shown in FIG. 1 are denoted by the same reference numerals, and redundant descriptions are omitted. In FIG. 13, 11 is an input circuit, 51-1, 51-2, and 51-3 are amplitude reduction circuits, and 13 is a detection path. The amplitude reduction circuits 51-1, 51-2, and 51-3 are connected in cascade between the input circuit 11 and the detection path 13. Each of the amplitude reduction circuits 51-1, 51-2, and 51-3 outputs by reducing the amplitude (carrier component) of the high-frequency carrier signal while maintaining the signal component (modulation component) related to the information in the input high-frequency carrier signal (amplitude-modulated wave).

[0062] Each of the amplitude reduction circuits 51-i (where i is a subscript, and in the example shown in FIG. 13, i = 1, 2, 3) has diodes D11, D12, D13, D14, resistors R11-i, R12-i, and capacitors C11-i, C12-i. The anode of diode D11 is connected to the input terminal of the amplitude reduction circuit 51-i, and the cathode of diode D12 is connected to the output terminal of the amplitude reduction circuit 51-i. One end of resistor R11-i and one electrode of capacitor C11-i are connected to the cathode of diode D11, and the other end of resistor R11-i and the other electrode of capacitor C11-i are connected to the anode of diode D12. Also, the anode of diode D13 is connected to the output terminal of the amplitude reduction circuit 51-i, and the cathode of diode D14 is connected to the input terminal of the amplitude reduction circuit 51-i. One end of resistor R12-i and one electrode of capacitor C12-i are connected to the cathode of diode D13, and the other end of resistor R12-i and the other electrode of capacitor C12-i are connected to the anode of diode D14.

[0063] That is, in the amplitude reduction circuit 51-i, in the path through which current flows when the input high-frequency carrier signal is a positive value with respect to the reference potential (the path through diodes D11 and D12), a resistor R11-i and a capacitor C11-i are connected in parallel between diode D11 and diode D12. Also, in the amplitude reduction circuit 51-i, in the path through which current flows when the input high-frequency carrier signal is a negative value with respect to the reference potential (the path through diodes D13 and D14), a resistor R12-i and a capacitor C12-i, which are different from resistor R11-i and capacitor C11-i, are connected in parallel between diode D13 and diode D14. Thus, in the amplitude reduction circuit 51-i, a resistor and a capacitor are connected in parallel for each current path. In the example shown in FIG. 13, in each of the amplitude reduction circuits 51-i, diodes D11, D12, D13, and D14 are an example of detection means for detecting the polarity of the high-frequency carrier signal, and resistors R11-i, R12-i and capacitors C11-i, C12-i are an example of voltage drop means for generating a certain voltage drop according to the detected polarity with respect to the high-frequency carrier signal. Note that the resistance values of resistors R11-i, R12-i and the capacitance values of capacitors C11-i, C12-i can be independently selected for each amplitude reduction circuit 51-i.

[0064] The pair of resistor R11-i and capacitor C11-i connected in parallel, and the pair of resistor R12-i and capacitor C12-i have resistance values and capacitance values such that a desired voltage drop can be obtained and a sufficient time constant is provided with respect to the spectrum of the signal component (modulation component) related to the information, and a substantially constant holding voltage can be obtained with respect to the amplitude change of the high-frequency carrier signal. Therefore, also in the voltage division circuit in the seventh embodiment, it is possible to reduce the amplitude of the high-frequency carrier signal (carrier component) while maintaining the signal component (modulation component) related to the information in the high-frequency carrier signal (amplitude-modulated wave) whose amplitude has been changed according to the transmitted information.

[0065] In the example shown in FIG. 13, in the amplitude reduction circuits 51-1, 51-2, and 51-3, the respective current circuits are coupled, the output terminal of the amplitude reduction circuit 51-1 is connected to the input terminal of the amplitude reduction circuit 51-2, and the output terminal of the amplitude reduction circuit 51-2 is connected to the input terminal of the amplitude reduction circuit 51-3. However, the present invention is not limited to this. The cathode of the diode D12 of the amplitude reduction circuit 51-1 may be connected to the anode of the diode D11 of the amplitude reduction circuit 51-2, and the anode of the diode D13 of the amplitude reduction circuit 51-1 may be connected to the cathode of the diode D14 of the amplitude reduction circuit 51-2. Further, the cathode of the diode D12 of the amplitude reduction circuit 51-2 may be connected to the anode of the diode D11 of the amplitude reduction circuit 51-3, and the anode of the diode D13 of the amplitude reduction circuit 51-2 may be connected to the cathode of the diode D14 of the amplitude reduction circuit 51-3.

[0066] (Eighth Embodiment) Next, the eighth embodiment of the present invention will be described. When a load circuit such as a detection circuit is connected to a circuit in which current flows only when a high-frequency carrier signal such as a half-wave rectifier circuit is a positive value with respect to a reference potential or a negative value with respect to the reference potential, the current path corresponding to the other case becomes unnecessary because no current flows in the other case. The voltage dividing circuit in the eighth embodiment described below allows current to flow only when a high-frequency carrier signal is a positive value with respect to a reference potential or a negative value with respect to the reference potential, and reduces the amplitude (carrier component) of the high-frequency carrier signal. Hereinafter, a voltage dividing circuit corresponding to the case where a high-frequency carrier signal is a positive value with respect to a reference potential will be described as an example.

[0067] FIG. 14 is a diagram showing a configuration example of a voltage dividing circuit in the eighth embodiment. In FIG. 14, the same components as those shown in FIG. 1 are denoted by the same reference numerals, and redundant descriptions are omitted. In FIG. 14, 11 is an input circuit, 61-1, 61-2, and 61-3 are amplitude reduction circuits, and 62 is a detection path. The amplitude reduction circuits 61-1, 61-2, and 61-3 are connected in cascade between the input circuit 11 and the detection path 62.

[0068] Each of the amplitude reduction circuits 61-i (where i is a subscript and i = 1, 2, 3) is configured such that current flows only when the input high-frequency carrier signal (amplitude-modulated wave) is a positive value with respect to the reference potential, and no current flows when it is a negative value with respect to the reference potential. Each of the amplitude reduction circuits 61-i reduces the amplitude (carrier component) of the high-frequency carrier signal while maintaining the signal component (modulation component) related to information for the portion of the input high-frequency carrier signal (amplitude-modulated wave) that is a positive value with respect to the reference potential, and outputs it.

[0069] The amplitude reduction circuit 61-i includes a diode D21, a diode D22, a resistor R21-i, and a capacitor C21-i. The anode of the diode D21 is connected to the input terminal of the amplitude reduction circuit 61-i, and the cathode of the diode D22 is connected to the output terminal of the amplitude reduction circuit 61-i. One end of the resistor R21-i and one electrode of the capacitor C21-i are connected to the cathode of the diode D21, and the other end of the resistor R21-i and the other electrode of the capacitor C21-i are connected to the anode of the diode D22. That is, in the amplitude reduction circuit 61-i, the diodes D21 and D22 are connected such that current flows when the input high-frequency carrier signal is a positive value with respect to the reference potential, and the resistor R21-i and the capacitor C21-i are connected in parallel between the diode D21 and the diode D22. In the example shown in FIG. 14, in each of the amplitude reduction circuits 61-i, the diodes D21 and D22 are an example of detection means for detecting the polarity of the high-frequency carrier signal, and the resistor R21-i and the capacitor C21-i are an example of voltage drop means for generating a certain voltage drop according to the detected polarity with respect to the high-frequency carrier signal. The resistance value of the resistor R21-i and the capacitance value of the capacitor C21-i can be independently selected for each amplitude reduction circuit 61-i.

[0070] The detection circuit 62 performs envelope detection on the input high-frequency carrier signal (amplitude-modulated wave) and outputs a signal (detection output) corresponding to the envelope of the amplitude-modulated wave. In the example shown in FIG. 14, the detection circuit 62 is a half-wave rectifier circuit including a diode D23, a resistor R22, and a capacitor C22. The anode of the diode D23 is connected to the output terminal of the amplitude reduction circuit 61-3, and the cathode is connected to the output terminal OUT. One end of the resistor R22 and one electrode of the capacitor C22 are connected to the cathode of the diode D23 and the output terminal OUT, and the other end of the resistor R22 and the other electrode of the capacitor C22 are connected to the reference potential line. Note that instead of the detection circuit 62, another load circuit that performs a significant operation when the high-frequency carrier signal is a positive value with respect to the reference potential may be connected.

[0071] In each amplitude reduction circuit 61-i, the resistor R21-i and the capacitor C21-i connected in parallel have resistance values and capacitance values such that a desired voltage drop can be obtained and a sufficient time constant is provided with respect to the spectrum of the signal component (modulation component) related to the information in the high-frequency carrier signal (amplitude-modulated wave). As a result, even if the amplitude of the input high-frequency carrier signal changes according to the signal component related to the information, the voltage across both the resistor R21-i and the capacitor C21-i hardly changes, so the voltage drop is substantially constant. Consequently, at the output of the amplitude reduction circuit 61-i, the voltage of the high-frequency carrier signal drops by the amount of the voltage drop caused by the resistor R21-i and the capacitor C21-i, while the signal component (modulation component) related to the information is output while being maintained.

[0072] Therefore, according to the voltage dividing circuit in the eighth embodiment, it is possible to reduce the amplitude (carrier component) of the high-frequency carrier signal while maintaining the signal component (modulation component) related to the information in the high-frequency carrier signal (amplitude-modulated wave) whose amplitude has been changed according to the information to be transmitted. Although an example of extracting the signal component only when the high-frequency carrier signal is a positive value with respect to the reference potential has been described, it can be similarly realized by reversing the directionality of the diodes in each circuit so as to extract the signal component only when it is a negative value with respect to the reference potential.

[0073] In each of the above-described embodiments, an example in which three amplitude reduction circuits are connected in cascade has been mainly described. However, the number of amplitude reduction circuits included in the voltage dividing circuit in each embodiment is arbitrary. For example, the number of amplitude reduction circuits may be determined according to the withstand voltage, the amount of amplitude reduction (voltage drop amount), etc. in each amplitude reduction circuit. The voltage dividing circuit according to the present invention has a great degree of freedom in terms of the configuration method, element selection, parameter determination, etc., as exemplified in each of the above-described embodiments, and it is possible to appropriately select the circuit configuration according to various conditions such as the required performance, the level of the input signal, and the actual component performance.

[0074] Note that each of the above embodiments merely shows an example of the implementation of the present invention, and the technical scope of the present invention should not be construed in a limited manner by these. That is, the present invention can be implemented in various forms without departing from its technical idea or its main features.

Explanation of Reference Numerals

[0075] 11 Input circuit 12, 21, 31, 51, 61 Amplitude reduction circuit 13, 62 Detection circuit 14 Filter circuit 41 Tuning circuit

Claims

1. Input means for inputting a high-frequency carrier signal amplitude-modulated according to information, and Amplitude reduction means for reducing and outputting the amplitude of the input high-frequency carrier signal, The amplitude reduction means includes: Detection means for detecting the polarity of the input high-frequency carrier signal, and Voltage drop means for generating a constant voltage drop according to the detected polarity with respect to the high-frequency carrier signal, characterized by a voltage dividing circuit.

2. Input means for inputting a high-frequency carrier signal amplitude-modulated according to information, and Amplitude reduction means for reducing and outputting the amplitude of the input high-frequency carrier signal, The amplitude reduction means includes: Detection means for detecting the polarity of the input high-frequency carrier signal, and Voltage drop means for generating a constant voltage drop according to the detected polarity with respect to the high-frequency carrier signal, The path through which current flows is switched to a first current path or a second current path different from the first current path according to the polarity of the high-frequency carrier signal, and the voltage drop means has a current flowing in a constant direction regardless of the first current path and the second current path, characterized by a voltage dividing circuit.

3. The voltage drop means has a resistor and a capacitor connected in parallel, characterized by the voltage dividing circuit according to Claim 1 or 2.

4. The voltage across both ends of the resistor and the capacitor connected in parallel holds a substantially constant voltage regardless of the amplitude change of the input high-frequency carrier signal, characterized by the voltage dividing circuit according to Claim 3.

5. Input means for inputting a high-frequency carrier signal amplitude-modulated according to information, and Amplitude reduction means for reducing and outputting the amplitude of the input high-frequency carrier signal, The amplitude reduction means includes: Detection means for detecting the polarity of the input high-frequency carrier signal, and Voltage drop means for generating a constant voltage drop according to the detected polarity with respect to the high-frequency carrier signal, The voltage drop means has a resistor and a capacitor connected in parallel, and the resistor and the capacitor connected in parallel have a large time constant with respect to the amplitude change according to the information in the input high-frequency carrier signal, characterized by a voltage dividing circuit.

6. Characterized by having a plurality of the amplitude reduction means connected in series, according to any one of Claims 1 to 5.

7. The voltage drop means has a Zener diode, and the voltage dividing circuit according to any one of claims 1 to 6 is characterized in that.

8. The detection means A first diode having an anode connected to the input terminal, A second diode having a cathode connected to the cathode of the first diode and an anode connected to the output terminal, A third diode having a cathode connected to the input terminal, A fourth diode having an anode connected to the anode of the third diode and a cathode connected to the output terminal, and The voltage drop means is connected between a connection point between the cathode of the first diode and the cathode of the second diode and a connection point between the anode of the third diode and the anode of the fourth diode, and the voltage dividing circuit according to any one of claims 1 to 7 is characterized in that.

9. Each of the first to fourth diodes is a plurality of diodes connected in series, and the voltage dividing circuit according to claim 8 is characterized in that.

10. The voltage dividing circuit according to any one of claims 1 to 9, A communication device characterized by having a detection means to which a high-frequency carrier signal whose amplitude has been reduced by the voltage dividing circuit is input.

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